Mim capacitors and methods of manufacturing the same
By using the second-to-top metal layer as the lower electrode in the MIM capacitor and employing a double damask process, only one photomask is needed to define the upper electrode, thus solving the problem of excessive photomask usage in existing technologies and achieving cost savings.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI HUALI INTEGRATED CIRCUIT CORP
- Filing Date
- 2026-03-31
- Publication Date
- 2026-07-10
AI Technical Summary
The current manufacturing process for MIM capacitors requires two photomasks to define the lower and upper plates, resulting in higher costs.
The patterned structure of the second-to-top metal layer is used as the lower electrode plate, and only one photomask is needed to define the upper electrode plate. The top metal layer and through-holes are formed through a double damask process, reducing the use of photomasks.
This saves on a photomask, reducing the cost of the photolithography process.
Smart Images
Figure CN122373374A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a metal-insulator-metal (MIM) capacitor. This invention also relates to a method for manufacturing a MIM capacitor. Background Technology
[0002] In existing MIM capacitors, the upper and lower plates need to be defined using two masks. The specific structure of an existing MIM capacitor is as follows: Figure 1 As shown, the lower electrode 102, capacitor dielectric layer 103, and upper electrode 104 of the MIM capacitor are all formed in the interlayer film 105 between the second-to-top metal layer 101 and the top metal layer 107. The top metal layer 107 is also typically made of MIM. T It is indicated that the second-to-top metal layer 101 also typically uses M. T-1 The lower electrode plate 102 extends to the outside of the upper electrode plate 104, and the upper electrode plate 104 and the lower electrode plate 102 are respectively connected to the electrodes composed of the corresponding top metal layers 107 through corresponding through holes 105 at the top.
[0003] Depend on Figure 1 As shown, the lower electrode 102 and the upper electrode 104 each require a photomask for definition. In semiconductor manufacturing, photolithography is a costly process, and adding a photomask increases the cost. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a MIM capacitor that can be defined using only one photomask, thereby saving photomasks and thus reducing costs. To this end, the present invention also provides a method for manufacturing a MIM capacitor.
[0005] To solve the above-mentioned technical problems, the MIM capacitor provided by the present invention includes: A semiconductor substrate, wherein a metal interconnect structure consisting of multiple metal layers is formed on the top surface of the semiconductor substrate, the metal layers including a second-to-top metal layer and a top metal layer.
[0006] The patterned structure of the second-to-top metal layer includes the lower electrode of the MIM capacitor.
[0007] A capacitor dielectric layer is formed on the top surface of the lower electrode and an upper electrode is formed on the top surface of the capacitor dielectric layer, with the lower electrode extending to the outside of the upper electrode.
[0008] The patterned structure of the top metal layer includes an upper electrode and a lower electrode.
[0009] The upper electrode and the upper electrode plate are connected through a first through hole, and the lower electrode and the lower electrode plate are connected through a second through hole.
[0010] A further improvement is that the material of the second-to-top metal layer includes copper.
[0011] A further improvement is that the material of the top metal layer includes copper.
[0012] A further improvement is that the material of the capacitor dielectric layer includes a high dielectric constant material.
[0013] A further improvement is that the high dielectric constant material comprises AlN and / or AlO.
[0014] A further improvement is that the material of the upper electrode plate includes TiN.
[0015] A further improvement is that the material of the interlayer film between the second-to-top metal layer and the top metal layer includes a low dielectric constant material.
[0016] To solve the above-mentioned technical problems, the manufacturing method of MIM capacitor provided by the present invention includes the following steps: A semiconductor substrate with a patterned subtop metal layer is provided, the patterned structure of which includes the lower electrode of a MIM capacitor.
[0017] The capacitor dielectric layer and the upper electrode material layer are formed sequentially.
[0018] The upper electrode material layer and the capacitor dielectric layer are patterned and etched. The upper electrode is composed of the patterned upper electrode material layer, and the lower electrode extends to the outside of the upper electrode.
[0019] An interlayer film, through-holes through the interlayer film, and a top metal layer are formed and the top metal layer is patterned; the patterned structure of the top metal layer includes an upper electrode and a lower electrode; the through-holes include a first through-hole and a second through-hole, the upper electrode and the upper electrode plate are connected through the first through-hole, and the lower electrode and the lower electrode plate are connected through the second through-hole.
[0020] A further improvement is that the material of the second-to-top metal layer includes copper.
[0021] A further improvement is that the material of the top metal layer includes copper.
[0022] A further improvement is to use a double damask process to form the top metal layer and the through-hole.
[0023] A further improvement is that the material of the capacitor dielectric layer includes a high dielectric constant material.
[0024] A further improvement is that the high dielectric constant material comprises AlN and / or AlO.
[0025] A further improvement is that the material of the upper electrode plate includes TiN.
[0026] A further improvement is that the material of the interlayer film includes a material with a low dielectric constant.
[0027] The lower electrode of the MIM capacitor of this invention is composed of a patterned structure of the second-to-top metal layer. Therefore, the lower electrode does not need to be patterned separately, thus saving a photomask layer used to define the lower electrode. This invention only needs to use one photomask to define the upper electrode. Therefore, this invention only needs one photomask to define the MIM capacitor. Compared with the existing structure, this invention can save one photomask. Therefore, this invention can save photomask and thus save costs. Attached Figure Description
[0028] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments: Figure 1 This is a schematic diagram of the structure of an existing MIM capacitor; Figure 2 This is a schematic diagram of the structure of the MIM capacitor according to an embodiment of the present invention; Figures 3-5 This is a schematic diagram of the structure of each step in the manufacturing method of the MIM capacitor according to an embodiment of the present invention. Detailed Implementation
[0029] like Figure 2 The diagram shown is a structural schematic of a MIM capacitor according to an embodiment of the present invention; the MIM capacitor of the present invention includes: A semiconductor substrate (not shown) has a metal interconnect structure consisting of multiple metal layers formed on its top surface, the metal layers including a second-to-top metal layer 201 and a top metal layer 206.
[0030] The patterned structure of the subtop metal layer 201 includes the lower electrode 201a of the MIM capacitor. Figure 2 In the diagram, the patterned structure of the subtop metal layer 201, which serves as the lower electrode plate, is marked separately by label 201a.
[0031] A capacitor dielectric layer 202 is formed on the top surface of the lower electrode 201a and an upper electrode 203 is formed on the top surface of the capacitor dielectric layer 202. The lower electrode 201a extends to the outside of the upper electrode 203.
[0032] The patterned structure of the top metal layer 206 includes an upper electrode and a lower electrode.
[0033] The upper electrode and the upper electrode plate 203 are connected through a first through hole 205b, and the lower electrode and the lower electrode plate 201a are connected through a second through hole 205a.
[0034] In this embodiment of the invention, the material of the second-top metal layer 201 includes copper.
[0035] The material of the top metal layer 206 includes copper.
[0036] The material of the interlayer film 204 between the second-top metal layer 201 and the top metal layer 206 includes a low dielectric constant material.
[0037] The top metal layer 201 and the through hole 205 are formed simultaneously using a double damask process. Figure 2 In the diagram, the first through hole is indicated by the designation 205b, and the second through hole is indicated by the designation 205a.
[0038] Figure 2 The image shows the interlayer film 204a at the bottom of the subtop metal layer 201.
[0039] The material of the capacitor dielectric layer 202 includes a high dielectric constant material.
[0040] In some preferred embodiments, the high dielectric constant material includes AlN and / or AlO. The upper electrode 203 is made of TiN.
[0041] In this embodiment of the invention, the lower electrode 201a of the MIM capacitor is composed of a patterned structure of the second-to-top metal layer 201. Therefore, the lower electrode 201a does not need to be patterned separately, thus saving a photomask layer used to define the lower electrode 201a. In this embodiment of the invention, only one photomask is needed to define the upper electrode 203. Therefore, this embodiment of the invention only needs one photomask to define the MIM capacitor. Compared with the existing structure, this embodiment of the invention can save one photomask. Therefore, this embodiment of the invention can save photomask and thus save costs.
[0042] like Figures 3 to 5 The diagram shown is a structural schematic of each step in the manufacturing method of a MIM capacitor according to an embodiment of the present invention. The manufacturing method of a MIM capacitor according to an embodiment of the present invention includes the following steps: like Figure 3 As shown, a semiconductor substrate (not shown) is provided with a patterned subtop metal layer 201, the patterned structure of which includes the lower electrode 201a of a MIM capacitor. Figure 3The diagram only shows the patterned structure of the second-top metal layer 201, and also shows the interlayer film 204a at the bottom of the second-top metal layer 201. In the method of this embodiment, the material of the second-top metal layer 201 includes copper. The second-top metal layer 201 can be formed using a damask or double damask process. The damask process only forms the patterned structure of the second-top metal layer 201. When using the double damask process, the openings of the bottom vias in the interlayer film 204a and the grooves of the pattern in the second-top metal layer 201 are formed simultaneously, and then copper is electroplated to fill both the openings and the grooves. The copper filled in the openings serves as the bottom vias, and the copper filled in the grooves serves as the second-top metal layer 201. Figure 3 In this context, the subtop metal layer corresponding to the lower electrode plate is individually denoted by the symbol 201a.
[0043] like Figure 4 As shown, a capacitor dielectric layer 202 and an upper electrode plate 203 material layer are formed sequentially.
[0044] In this embodiment of the invention, the material of the capacitor dielectric layer 202 includes a high dielectric constant material.
[0045] In some preferred embodiments, the high dielectric constant material includes AlN and / or AlO.
[0046] The material of the upper electrode plate 203 includes TiN.
[0047] like Figure 5 As shown, the upper electrode 203 material layer and the capacitor dielectric layer 202 are patterned and etched. The upper electrode 203 is composed of the patterned and etched upper electrode 203 material layer, and the lower electrode 201a extends to the outside of the upper electrode 203. The patterned etching of the upper electrode 203 material layer and the capacitor dielectric layer 202 includes photolithography definition and etching processes. During photolithography definition, a photomask is required. After photolithography is completed, a photoresist pattern is formed. Then, the patterned etching is achieved by using the photoresist pattern as a mask.
[0048] Back Figure 2 As shown, an interlayer film 204, a through-hole 205 passing through the interlayer film 204, and a top metal layer 206 are formed, and the top metal layer 206 is patterned. The patterned structure of the top metal layer 206 includes an upper electrode and a lower electrode. The through-hole includes a first through-hole 205b and a second through-hole 205a. The upper electrode and the upper electrode plate 203 are connected through the first through-hole 205b, and the lower electrode and the lower electrode plate 201a are connected through the second through-hole 205a. The first through-hole is indicated by the symbol 205b, and the second through-hole is indicated by the symbol 205a.
[0049] In this embodiment of the invention, the top metal layer 206 is made of copper. The interlayer film 204 is made of a low dielectric constant material.
[0050] The top metal layer 206 and the via 205 are formed using a double damask process. In the double damask process, the interlayer film 204 is formed first, then the via openings and trenches are formed in the interlayer film 204, and then copper is electroplated to form the via 205 and the top metal layer 206. At this point, the top metal layer 206 has been patterned.
[0051] In this embodiment of the invention, M is utilized T-1 The large Cu dummy region serves as the lower electrode 201a. The dummy region represents the area that does not need to be used as a metal interconnect. The high dielectric constant (HK) dielectric of ALN / ALO is directly deposited, which can reduce two masks to one, thereby saving costs.
[0052] In the method of this embodiment of the invention, directly in M T-1 The process involves directly depositing ALN / ALO HK dielectric; then depositing TiN as the upper electrode; followed by oxide depositing to form an interlayer film, and then performing photolithography (PH) / etching (ET) on vias and trenches. M is then performed. T Cu coating.
[0053] The present invention has been described in detail above through specific embodiments, but these are not intended to limit the invention. Many modifications and improvements can be made by those skilled in the art without departing from the principles of the invention, and these should also be considered within the scope of protection of the present invention.
Claims
1. A MIM capacitor, characterized in that, include: A semiconductor substrate, wherein a metal interconnect structure consisting of multiple metal layers is formed on the top surface of the semiconductor substrate, the metal layers including a second-to-top metal layer and a top metal layer; The patterned structure of the second-to-top metal layer includes the lower electrode of the MIM capacitor; A capacitor dielectric layer is formed on the top surface of the lower electrode plate and an upper electrode plate is formed on the top surface of the capacitor dielectric layer. The lower electrode plate extends to the outside of the upper electrode plate. The patterned structure of the top metal layer includes an upper electrode and a lower electrode; The upper electrode and the upper electrode plate are connected through a first through hole, and the lower electrode and the lower electrode plate are connected through a second through hole.
2. The MIM capacitor as described in claim 1, characterized in that: The material of the second-to-top metal layer includes copper.
3. The MIM capacitor as described in claim 2, characterized in that: The material of the top metal layer includes copper.
4. The MIM capacitor as described in claim 3, characterized in that: The material of the capacitor dielectric layer includes a high dielectric constant material.
5. The MIM capacitor as described in claim 4, characterized in that: The high dielectric constant material includes AlN and / or AlO.
6. The MIM capacitor as described in claim 5, characterized in that: The material of the upper electrode plate includes TiN.
7. The MIM capacitor as described in claim 3, characterized in that: The material of the interlayer film between the second-to-top metal layer and the top metal layer includes a low dielectric constant material.
8. A method for manufacturing a MIM capacitor, characterized in that, Includes the following steps: A semiconductor substrate with a patterned subtop metal layer is provided, the patterned structure of which includes the lower electrode of a MIM capacitor; The capacitor dielectric layer and the upper electrode material layer are formed sequentially; The upper electrode material layer and the capacitor dielectric layer are patterned and etched. The upper electrode is composed of the patterned upper electrode material layer, and the lower electrode extends to the outside of the upper electrode. An interlayer film, through-holes through the interlayer film, and a top metal layer are formed and the top metal layer is patterned; the patterned structure of the top metal layer includes an upper electrode and a lower electrode; the through-holes include a first through-hole and a second through-hole, the upper electrode and the upper electrode plate are connected through the first through-hole, and the lower electrode and the lower electrode plate are connected through the second through-hole.
9. The method for manufacturing a MIM capacitor as described in claim 8, characterized in that: The material of the second-to-top metal layer includes copper.
10. The method for manufacturing a MIM capacitor as described in claim 9, characterized in that: The material of the top metal layer includes copper.
11. The method for manufacturing a MIM capacitor as described in claim 10, characterized in that: The top metal layer and the through-hole are formed using a double damask process.
12. The method for manufacturing a MIM capacitor as described in claim 10, characterized in that: The material of the capacitor dielectric layer includes a high dielectric constant material.
13. The method for manufacturing a MIM capacitor as described in claim 12, characterized in that: The high dielectric constant material includes AlN and / or AlO.
14. The method for manufacturing a MIM capacitor as described in claim 13, characterized in that: The material of the upper electrode plate includes TiN.
15. The method for manufacturing a MIM capacitor as described in claim 10, characterized in that: The interlayer film is made of a material with a low dielectric constant.