Micro LED with opening current

Abstract

A light emitting diode (LED) array is described that includes a plurality of mesas defining pixels having sidewalls, each mesa including an epitaxial stack on a substrate. The epitaxial stack includes a first n-type layer on the substrate, a second n-type layer on the first n-type layer, an n-type confinement layer on the second n-type layer, an active region having an active region width on the n-type confinement layer, a p-type confinement layer on the active region, and a second p-type layer on the p-type confinement layer. The n-type confinement layer and the p-type confinement layer independently have a width smaller than that of the active region.

Description

Technical Field

[0001] Embodiments of this disclosure generally relate to arrays of light-emitting diode (LED) devices and methods of manufacturing the same. More particularly, embodiments relate to LED devices having reduced Shockley-Reid-Hall (RSH) nonradiative recombination on the mesa sidewalls. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor light source that emits visible light when an electric current flows through it. LEDs combine P-type and N-type semiconductors. LEDs typically use group III compound semiconductors. At higher temperatures, group III compound semiconductors offer more stable operation than devices using other semiconductors. Group III compounds are typically formed on substrates made of sapphire or silicon carbide (SiC).

[0003] AlInGaP quaternary compound semiconductors are promising candidates for red emission in microLEDs and may offer advantages over group III nitride material systems. AlInGaP microLEDs feature high external quantum efficiency (EQE), low voltage, narrow peak size, small full width at half maximum (FWHM) wavelength, good reliability, and a wider color gamut coverage. AlInGaP microLEDs have a wide range of applications, with mesa sizes ranging from 1 micrometer to tens of micrometers.

[0004] However, AlInGaP exhibits minority carrier diffusion lengths of several micrometers, significantly longer than Group III nitrides, and thus a more pronounced mesa size effect. Due to the higher surface area to volume ratio, smaller LED sizes can lead to high Shockley-Reed-Hall (SRH) nonradiative recombination at sidewall defect sites, caused by plasma dry etching. This high SRH nonradiative recombination at sidewall defect sites also degrades the reliability of smaller mesa microLEDs.

[0005] An ideal micro-LED AlInGaP device architecture exhibits minimal SRH nonradiative recombination on the mesa sidewalls. Therefore, improved LED devices are needed. More specifically, improvements are required to reduce sidewall damage and limit carrier outflow from sidewall damage sites in the active region, particularly as device size decreases. Summary of the Invention

[0006] Embodiments of this disclosure relate to LED devices and methods of manufacturing LED devices. In one or more embodiments, a light-emitting diode (LED) device includes: an epitaxial stack on a substrate, the epitaxial stack including at least one n-type layer, at least one p-type layer, a first confinement layer, a second confinement layer, and an active region having an active region width, wherein the first confinement layer and the second confinement layer independently have a width smaller than the active region width; a p-type contact on the epitaxial stack; and an n-type contact adjacent to at least one n-type layer.

[0007] Further embodiments of this disclosure relate to light-emitting diode (LED) arrays. In one or more embodiments, the LED array includes: a plurality of mesa defining pixels having sidewalls, each mesa including: an epitaxial stack on a substrate, the epitaxial stack including a first n-type layer on the substrate, a second n-type layer on the first n-type layer, an n-type confinement layer on the second n-type layer, an active region having an active region width on the n-type confinement layer, a p-type confinement layer on the active region, a second p-type layer on the p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have widths smaller than the active region width; a p-type contact on the epitaxial stack; and an n-type contact on the first n-type layer adjacent to the second n-type layer.

[0008] Additional embodiments of this disclosure relate to a method of manufacturing a light-emitting diode (LED) device. In one or more embodiments, a method of manufacturing a light-emitting diode (LED) device includes: growing a plurality of epitaxial layers on a substrate, including at least one n-type layer, an active region having an active region width, and at least one p-type layer to form a mesa with sidewalls; processing the sidewalls of the mesa to form an n-type confinement layer and a p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have a width smaller than the active region width; forming a p-contact on the at least one p-type layer; and forming an n-contact adjacent to the at least one n-type layer. Attached Figure Description

[0009] To gain a more detailed understanding of the foregoing enumerated features of this disclosure, reference can be made to embodiments for a more specific description. This disclosure has been briefly outlined above, and some embodiments are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical embodiments of this disclosure and should therefore not be construed as limiting its scope, as this disclosure may allow for other equally effective embodiments. The embodiments described herein are illustrated in the accompanying drawings by way of example rather than limitation, wherein like references denote similar elements.

[0010] Figure 1 A process flow diagram of a method for forming an LED die according to one or more embodiments is shown; Figure 2 A schematic cross-sectional view of the extension configuration according to one or more embodiments is shown; Figure 3A A schematic cross-sectional view of the extension configuration according to one or more embodiments is shown; Figure 3B An isometric view of the extension configuration according to one or more embodiments is shown; Figure 4 Examples of general-purpose devices according to some embodiments are shown; Figure 5 An example lighting system according to some embodiments is shown; Figure 6 An example hardware arrangement for implementing the disclosed subject matter above is shown according to some embodiments; Figure 7 A block diagram illustrating an example of a system according to some embodiments is shown; and Figure 8 An example method for manufacturing a lighting device according to some embodiments is shown.

[0011] For ease of understanding, the same reference numerals are used where possible to denote common, identical elements in the figures. These figures are not drawn to scale. For example, the height and width of the tabletop are not drawn to scale. Detailed Implementation

[0012] Before describing several exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the details of the construction or process steps set forth in the following description. This disclosure can have other embodiments and can be practiced or performed in various ways.

[0013] According to one or more embodiments, as used herein, the term "substrate" refers to an intermediate or final structure having a surface or a portion thereof, on which a process is performed. Additionally, in some embodiments, reference to a substrate also refers only to a portion of the substrate, unless the context explicitly indicates otherwise. Furthermore, according to some embodiments, reference to deposition on a substrate includes deposition on a bare substrate, or deposition on a substrate on which one or more layers, films, features, or materials are deposited or formed.

[0014] In one or more embodiments, "substrate" means any substrate on which a film processing is performed during the fabrication process, or a material surface formed on a substrate. In exemplary embodiments, depending on the application, substrate surfaces on which processing is performed include materials such as silicon, silicon oxide, silicon-on-insulator (SOI), strained silicon, amorphous silicon, doped silicon, carbon-doped silicon oxide, germanium, gallium arsenide, glass, sapphire, and any other suitable materials such as metals, metal nitrides, group III nitrides (e.g., GaN, AlN, InN, and other alloys), metal alloys, and other conductive materials. Substrates include, but are not limited to, light-emitting diode (LED) devices. In some embodiments, the substrate is exposed to pretreatment processes such as polishing, etching, reduction, oxidation, hydroxylation, annealing, UV curing, electron beam curing, and / or baking of the substrate surface. In addition to film processing directly on the surface of the substrate itself, in some embodiments, any of the disclosed film processing steps are also performed on an underlayer formed on the substrate, and the term "substrate surface" is intended to include such an underlayer as indicated by the context. Therefore, for example, where a film / layer or part of a film / layer has already been deposited on the substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0015] In this disclosure, the terms "wafer" and "substrate" will be used interchangeably. Thus, as used herein, a wafer is used as a substrate for forming the LED device described herein.

[0016] Examples of different light illumination systems and / or light-emitting diodes (“LEDs”) implementations will be described more fully below with reference to the accompanying drawings. These examples are not mutually exclusive, and features found in one example may be combined with features found in one or more other examples to achieve further implementations. Therefore, it will be understood that the examples shown in the accompanying drawings are provided for illustrative purposes only and are not intended to limit this disclosure in any way. Similar figures always refer to similar elements.

[0017] Semiconductor light-emitting devices, or optical power-emitting devices, such as those emitting ultraviolet (UV) or infrared (IR) optical power, are among the most efficient light sources available today. These devices can include light-emitting diodes, resonant cavity light-emitting diodes, vertical cavity laser diodes, edge-emitting lasers, and so on (hereinafter referred to as "LEDs"). For example, due to their compact size and low power consumption requirements, LEDs can be attractive candidates for many different applications. For example, they can be used as light sources (e.g., flashlights and camera flashes) in handheld battery-powered devices such as cameras and mobile phones. They can also be used for automotive lighting, head-up display (HUD) lighting, garden lighting, street lighting, video torches, general lighting (e.g., home, shop, office and studio lighting, theater / stage lighting and architectural lighting), augmented reality (AR) lighting, virtual reality (VR) lighting, as display backlights, and in the infrared spectrum. A single LED can provide light with a lower brightness than an incandescent light source, and therefore, multi-junction devices or LED arrays (such as monolithic LED arrays, micro-LED arrays, etc.) can be used for applications that expect or require higher brightness.

[0018] This invention generally relates to the manufacture of red light sources for high-power general lighting system applications. The embodiments described herein depict LED devices and methods for forming LED devices. In particular, this disclosure describes LED devices and methods for producing LED devices that reduce SRH nonradiative recombination at sidewall defect sites, thereby advantageously improving the performance of AlInGaP microLEDs. One or more embodiments of the LED devices improve the reliability performance of microLEDs and reduce the size-dependent effects of AlInGaP microLEDs.

[0019] One or more embodiments of this disclosure are described with reference to the accompanying drawings. In one or more embodiments, in order to improve the AlInGaP microLED EQE, the injected current is held in the active region away from the mesa sidewalls, where mesa fabrication processes (such as dry etching) can introduce a large number of defects.

[0020] Figure 1 A process flow diagram of a method according to one or more embodiments is shown. Figure 2 A cross-sectional view of an LED device according to one or more embodiments is shown. Figure 3A A cross-sectional view of an LED device according to one or more embodiments is shown. Figure 3B An isometric view of an LED device according to one or more embodiments is shown.

[0021] One aspect of the present invention relates to a method for manufacturing an LED array. First, refer to… Figure 1In operation 12, an LED device is fabricated by forming a mesa stack on the substrate. In operation 14, the mesa is then processed to form a confinement layer. In operation 16, contacts are formed on the mesa to form the LED device.

[0022] Reference Figure 2 In one or more embodiments, a semiconductor mesa structure 100 is fabricated to construct a light-emitting diode (LED). The mesa size can range from submicron to hundreds of micrometers. The mesa can be circular, square, or any other shape. In one or more embodiments, a plurality of epitaxial layers 103 are formed on a substrate 102. The substrate 102 can be any substrate known to those skilled in the art, configured for forming an LED device. In one or more embodiments, the substrate 102 comprises one or more of sapphire, silicon carbide, silicon (Si), quartz, magnesium oxide (MgO), zinc oxide (ZnO), spinel, gallium phosphide (GaP), etc. In one or more embodiments, the substrate 102 is a transparent substrate. In a particular embodiment, the substrate 102 comprises sapphire. In one or more embodiments, the substrate 102 is not patterned prior to forming the LED. Therefore, in some embodiments, the substrate 102 is not patterned and can be considered flat or substantially flat. In other embodiments, the substrate 102 is a patterned substrate. In one or more embodiments, the plurality of epitaxial layers 103 include a first n-type layer 104 formed on a substrate 102, a second n-type layer 106 formed on the first n-type epitaxial layer 104, a third n-type layer 108 formed on the second n-type layer 106, an active region 110 formed on the third n-type layer 108, a first p-type layer 112 formed on the top surface of the active region 110, and a second p-type layer 114 formed on the first p-type layer 112.

[0023] In one or more embodiments, the first n-type layer 104, the second n-type layer 106, and the third n-type layer 108 may comprise any III-V group semiconductor material, including binary, ternary, and quaternary alloys of gallium (Ga), aluminum (Al), indium (In), nitrogen (n), and phosphorus (P). Therefore, in some embodiments, the first n-type layer 104, the second n-type layer 106, and the third n-type layer 108 comprise aluminum indium gallium phosphide (AlInGaP). AlInGaP is a semiconductor material that provides a platform for fabricating high-brightness red, orange, green, and yellow light-emitting diodes. AlInGaP can be grown by any suitable method known to those skilled in the art. In some embodiments, AlInGaP can be grown via heteroepitaxial growth. In one or more embodiments, the first n-type layer 104, the second n-type layer 106, and the third n-type layer 108 are independently doped with an n-type dopant, such as silicon (Si) or tellurium (Te). In one or more embodiments, the dopant concentration is in the range of 1e17-2e19 cm⁻¹.3 Within a certain range. In one or more embodiments, the thickness of the first n-type layer 104 may be in the range of 1µm to 3µm to ensure a wide process margin for subsequent etching steps to contact the layer.

[0024] In one or more embodiments, the first p-type layer 112 and the second p-type layer 114 may comprise any III-V semiconductor material, including binary, ternary, and quaternary alloys of gallium (Ga), aluminum (Al), indium (In), nitrogen (N), and phosphorus (P). Therefore, in some embodiments, the first p-type layer 112 and the second p-type layer 114 comprise aluminum indium gallium phosphide (AlInGaP). In one or more embodiments, the first p-type layer 112 and the second p-type layer 114 may be independently doped with any suitable p-type dopant known to those skilled in the art. In one or more embodiments, the first p-type layer 112 and the second p-type layer 114 may be independently doped with magnesium (Mg).

[0025] In one or more embodiments, the material layers constituting the plurality of epitaxial layers 103 or mesa can be deposited by one or more of metal-organic chemical vapor deposition (MOCVD), physical vapor deposition, organometallic vapor phase epitaxy (OMVPE), liquid phase epitaxy (LPE), hydride vapor phase epitaxy (HVPE) and molecular beam epitaxy (MBE).

[0026] According to some embodiments, "chemical vapor deposition," as used herein, refers to a process in which a thin film of material is deposited from a vapor phase by the decomposition of chemicals on a substrate surface. In CVD, the substrate surface is simultaneously or substantially simultaneously exposed to precursors and / or co-reagents. A particular subset of CVD processes commonly used in LED manufacturing uses metal-organic precursor chemicals and is referred to as MOCVD or metal-organic vapor phase epitaxy (MOVPE). As used herein, "substantially simultaneously" means that there is a significant overlap in the exposure of the co-current or precursors.

[0027] In one or more embodiments, the µLED array 100 is fabricated by placing a substrate in a metal-organic vapor phase epitaxy (MOVPE) reactor, or an MBE reactor, or an LPE reactor or an HVPE reactor, thereby epitaxially growing the µLED array layer. In one or more embodiments, by Figure 2 Photolithographic patterning is performed on the stack of materials, followed by etching to form... Figure 3AThe process involves several steps. First, a photoresist (to make it more versatile and to add other patterning masks, such as hard masks) is applied to the wafer with the epitaxial stack. Second, the photoresist is exposed to UV light or a laser using a photomask or by direct writing, followed by selective removal of the photoresist from unwanted areas using photoresist developer chemicals. A photoresist baking process is used to remove moisture from the remaining photoresist. Finally, an etching process is used to shape the mesa. The etching process can be a dry plasma etching process or a wet etching process. refer to Figure 1 as well as Figure 3A and 3B In operation 14, in one or more embodiments, a mesa sidewall treatment following dry etching is used to reduce damage, employing processes such as wet etching and low-power plasma treatment. In one or more embodiments, a mesa structure 150 is advantageously fabricated having semiconductor confinement layers 108B, 112B above and below the active region 110, the external dimensions of which are smaller than the external dimensions of the active region 110 layer itself.

[0028] In one or more embodiments, the third n-type layer 108 is processed to etch sidewalls 152 such that the external dimensions of the n-type confinement layer 108B are in the range of 0.1 µm to 2.0 µm smaller than the active region 110. In one or more embodiments, the processing on layer 108 may be wet etching or low-power plasma processing. In one or more embodiments, the first p-type layer 112 is processed to etch sidewalls 152 such that the external dimensions of the p-type confinement layer 112B are in the range of 0.1 µm to 2.0 µm smaller than the active region 110. In one or more embodiments, the processing on layer 112 may be wet etching or low-power plasma processing. In one or more embodiments, in the active region layer 110, the carrier current can be confined from the mesa sidewall 152 where the non-radiative emission defect is located. Depending on the material and design of the LED epitaxial layer 103, the size difference between the confining layers 108B, 112B and the active region layer 110 can range from submicron to micron.

[0029] In one or more embodiments, after the mezzanine sidewalls are treated, a passivation layer (not shown) may be deposited on the mezzanine sidewalls using processes including, but not limited to, atomic layer deposition (ALD), PECVD, and spin-on glass (SOG) with thermal or plasma processes. The passivation layer may comprise any suitable material known to those skilled in the art. In one or more embodiments, the passivation layer is selected from one or more of alumina (Al2O3), silicon oxide (SiO2), aluminum nitride (AlN), titanium oxide (TiO2), and silicon nitride (Si3N4).

[0030] Reference Figure 1 and Figures 3A to 3B In operation 16, a contact is formed on the mesa 150. In one or more embodiments, a p-contact layout design is used to maximize the spacing between the mesa sidewall 152 and the edge of the p-contact 116. In one or more embodiments, any chip size can be used. In a particular embodiment, LEDs are most effective for microLEDs with a mesa size less than 50µm. In one or more embodiments, the p-contact 116 can comprise any suitable contact material known to those skilled in the art. In some embodiments, the p-contact 116 comprises one or more of aluminum (Al), gold (Au), zinc (Zn), platinum (Pt), silver (Ag), zinc oxide (ZnO), indium tin oxide (ITO), etc.

[0031] In one or more embodiments, the n-contact 118 is formed adjacent to the second n-type layer 106. The n-contact 118 may comprise any suitable material known to those skilled in the art. In some embodiments, the n-contact 118 comprises one or more of copper (Cu), aluminum (Al), palladium (Pd), gold (Au), germanium (Ge), nickel (Ni), titanium (Ti), etc.

[0032] Figure 4 Examples of general-purpose devices according to some embodiments are shown. For example, device 600 may be a mobile device, such as a laptop computer (PC), tablet PC, smartphone, or augmented reality (AR) / virtual reality (VR) device, or an automotive device. Various elements may be provided on the backplane indicated above, while other elements may be local or remote. As described herein, examples may include, or operate on, logic or multiple components, modules, or mechanisms.

[0033] Modules and components are tangible entities (e.g., hardware) capable of performing specified operations and can be configured or arranged in a certain way. In one example, circuitry can be arranged as a module in a specified manner (e.g., internally or relative to external entities, such as other circuitry). In one example, all or part of one or more computer systems (e.g., standalone, client, or server computer systems) or one or more hardware processors can be configured by firmware or software (e.g., instructions, application portions, or applications) to operate and perform specified operations. In one example, the software may reside on a machine-readable medium. In one example, when executed by the underlying hardware of the module, the software causes the hardware to perform the specified operations.

[0034] Therefore, the terms "module" (and "component") should be understood to encompass tangible entities, that is, entities that are physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., provisionally) configured (e.g., programmed) to operate or perform any of the operations described herein in a specified manner. Consider the example of modules being provisionally configured, where each module does not need to be instantiated at any given time. For example, in cases where modules include general-purpose hardware processors configured using software, the general-purpose hardware processors can be configured as different modules at different times. The software can accordingly configure the hardware processors, for example, to constitute a specific module at one time and different modules at different times.

[0035] Electronic device 600 may include a hardware processor (or equivalent processing circuitry) 602 (e.g., a central processing unit (CPU), GPU, hardware processor core, or any combination thereof), and memory 604 (which may include main memory and static memory), some or all of which may communicate with each other via interconnect (e.g., bus) 608. Memory 604 may contain any or all removable and non-removable storage, volatile or non-volatile storage. Electronic device 600 may also include a display / light source 610, such as the aforementioned LED, or a video display, an alphanumeric input device 612 (e.g., a keyboard), and a user interface (UI) navigation device 614 (e.g., a mouse). In one example, the display / light source 610, input device 612, and UI navigation device 614 may be a touchscreen display. Electronic device 600 may additionally include a storage device (e.g., a drive unit) 616, a signal generation device 618 (e.g., a speaker), a network interface device 620, one or more cameras 628, and one or more sensors 630, such as a global positioning system (GPS) sensor, a compass, an accelerometer, or other sensors such as those described herein. Electronic device 600 may also include an output controller, such as a serial (e.g., Universal Serial Bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection, to communicate with or control one or more peripheral devices (e.g., printer, card reader, etc.).

[0036] Storage device 616 may include a non-transitory machine-readable medium 622 (hereinafter referred to as machine-readable medium) on which one or more sets of data structures or instructions 624 (e.g., software) are stored, embodying or being used by any one or more of the techniques or functions described herein. During execution of instructions 624 by electronic device 600, instructions 624 may also reside wholly or at least partially within memory 604 and / or hardware processor 602. While machine-readable medium 622 is shown as a single medium, the term "machine-readable medium" may include a single medium or multiple media (e.g., centralized or distributed databases and / or associated caches and servers) configured to store one or more instructions 624. The term "machine-readable medium" can include: any medium capable of storing, encoding, or carrying instructions that are executed by electronic device 600 and cause electronic device 600 to perform any one or more technologies of this disclosure; or any medium capable of storing, encoding, or carrying data structures used by or associated with such instructions. Non-limiting examples of machine-readable media can include solid-state memory as well as optical and magnetic media. Specific examples of machine-readable media can include: non-volatile memory, such as semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; disks, such as internal hard disks and removable disks; magneto-optical disks; random access memory (RAM); and CD-ROM and DVD-ROM disks.

[0037] Instruction 624 can also transmit or receive over a communication network using transmission medium 626 via network interface device 620, utilizing any of a variety of wireless local area network (WLAN) transmission protocols or SPI or CAN buses. Example communication networks may include local area networks (LANs), wide area networks (WANs), packet data networks (e.g., the Internet), mobile phone networks (e.g., cellular networks), common old-style telephone (POTS) networks, and wireless data networks. Communication on the network may include one or more different protocols, such as the IEEE 802.11 family of standards called Wi-Fi, the IEEE 802.16 family of standards called WiMax, the IEEE 802.16.4 family of standards, the Long Term Evolution (LTE) family of standards, the Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, Next Generation (NG) / 6th Generation (6G) standards, etc. In one example, network interface device 620 may include one or more physical jacks (e.g., Ethernet, coaxial, or telephone jacks) or one or more antennas for connection to transmission medium 626.

[0038] Please note that the term "circuit" as used herein refers to a hardware component, is part of a hardware component, or includes a hardware component, such as electronic circuits, logic circuits, processors (shared, dedicated, or grouped) and / or memories (shared, dedicated, or grouped), application-specific integrated circuits (ASICs), field-programmable devices (FPDs) (e.g., field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), complex PLDs (CPLDs), high-capacity PLDs (HCPLDs), structured ASICs, or programmable SoCs), digital signal processors (DSPs), etc., configured to provide the described functions. In some embodiments, the circuit may execute one or more software or firmware programs to provide at least some of the described functions. The term "circuit" may also refer to a combination of one or more hardware elements (or a combination of circuits used in an electrical or electronic system) and program code for performing the functions of that program code. In these embodiments, the combination of hardware elements and program code may be referred to as a particular type of circuit.

[0039] As used herein, the term "processor circuit" or "processor" therefore refers to, or is part of, or includes, a circuit capable of sequentially and automatically performing a series of arithmetic or logical operations, or recording, storing, and / or transmitting digital data. The term "processor circuit" or "processor" may also refer to one or more application processors, one or more baseband processors, a physical central processing unit (CPU), a single-core or multi-core processor, and / or any other device capable of executing or otherwise operating computer-executable instructions, such as program code, software modules, and / or functional procedures.

[0040] Camera 628 can sense light of at least one or more wavelengths emitted by an LED. Camera 628 may include optics (e.g., at least one camera lens) capable of collecting reflected light from and / or emitted by an illuminated area. The camera lens may direct the reflected light onto a multi-pixel sensor (also known as a light sensor) to form an image on the multi-pixel sensor. The processor 602 can control and drive LEDs via one or more drivers. For example, the processor 602 can optionally control one or more LEDs in an LED array, independently of other LEDs in the LED array, to illuminate an area in a specified manner. Furthermore, sensor 630 can be integrated into camera 628 and / or light source 610. Sensor 630 can sense visible light and / or infrared light, and in addition to receiving reflected light from LEDs, it can also sense ambient light and / or changes / flicker of ambient light. The sensor can have one or more segments (capable of sensing the same wavelength / wavelength range or different wavelengths / bands), similar to an LED array. Figure 5An example lighting system according to some embodiments is shown. As mentioned above, some elements shown in the lighting system 700 may not be present, while other additional elements may be provided within the lighting system 700. The lighting system 700 may include a controller 702 that uses a pixel array 710 containing a plurality of individual pixels 712 to control the lighting. In some embodiments, some or all of the components described as controller 702 may be disposed on a backplane, such as, for example, a complementary metal-oxide-semiconductor (CMOS) backplane. Controller 702 may be coupled to or include one or more processors 704. Processor 704 may receive image data (in frames) via an interface and may process the image data to control generator 706a, for example, controlling analog signals or PWM duty cycles and / or on-time, so that lighting system 700 produces an image indicated by the image data. The controller 702 may also include a frame buffer 708. The frame buffer 708 may store one or more images in front of one or more processors 704, and store instructions for implementation by one or more processors 704. Generator 706a can be controlled by processor 704 and can generate drive signals according to instructions. Generator 706a can be connected to driver 706b to drive pixel array 710, such that pixel 712 provides the desired light intensity.

[0041] Each pixel 712 may include one or more LEDs 714. The LEDs 714 may be of different colors and may be controlled individually or in groups. As shown, for each pixel 712 or LED 714, the pixel 712 may include a PWM switch and a current source. The pixel 712 may be driven by a driver 706b. A signal from a generator 706a can cause the switch to turn on and off according to the signal value. A signal corresponding to the light intensity can cause the current source to generate current, thereby causing the pixel 712 to produce a corresponding light intensity.

[0042] The lighting system 700 may also include a power supply 720. In some embodiments, the power supply 720 may be a battery that generates power for the controller 702.

[0043] Figure 6Example hardware arrangements for implementing the disclosed subject matter are shown according to some embodiments. In particular, hardware arrangement 800 may include LED die 802 comprising an LED array(s) and a backplane, such as a CMOS backplane 804. LED die 802 may be coupled to CMOS backplane 804 via one or more interconnects 810, wherein interconnects 810 may provide signal transmission between LED die 802 and CMOS backplane 804. Interconnects 810 may include one or more solder bump connectors, one or more copper pillar bump connectors, other types of interconnects known in the art, or some combination thereof.

[0044] LED die 802 may include circuitry for implementing the LED array described above. Specifically, LED die 802 may include multiple LEDs. LED die 802 may include a shared active layer and a shared substrate for the LED array, and therefore the LED array may be a monolithic LED array. Each LED in the LED array may include a separate segmented active layer and / or substrate. In some embodiments, LED die 802 may also include switches and current sources to drive the LED array as described above. In other embodiments, the switches and current sources may be included in a CMOS backplane 804. The LED may be a microLED or an LED larger than a microLED.

[0045] The CMOS backplane 804 may include circuitry for implementing a control module. The CMOS backplane 804 may utilize interconnects 810 to provide drive and intensity signals to the LED array, enabling the LED array to generate light according to the signals and intensity. The hardware layout 800 may also include a PCB 806. The PCB 806 may include circuitry implementing the various functions described herein. The PCB 806 may be coupled to a CMOS backplane 804. For example, the PCB 806 may be coupled to the CMOS backplane 804 via one or more wire bonds 812. The PCB 806 and the CMOS backplane 804 may exchange image data, power and / or feedback, and other signals through coupling.

[0046] As shown in the figure, LEDs and the circuitry supporting the LED array can be packaged together, including a substrate support or printed circuit board (PCB) for powering the LEDs and controlling light generation. The PCB supporting the LED array can include vias, heat sinks, ground planes, traces, and flip-chip or other mounting systems. The substrate support or PCB can be formed from any suitable material, such as ceramic, silicon, aluminum, etc. If the substrate support material is conductive, an insulating layer can be formed on the substrate material, and a pattern of metal electrodes can be formed on the insulating layer for contact with the micro-LED array. The substrate support can act as a mechanical support, provide an electrical interface between the electrodes and power supply on the LED array, and also provide a heat sink function.

[0047] Generally, LED arrays can support a wide range of applications. These applications may include standalone applications for providing general lighting (e.g., inside or outside a room or vehicle) or for providing specific images. In addition to devices such as luminaires, projectors, and mobile devices, the system can also be used to provide AR and VR-based applications. Visualization systems, such as VR and AR systems, are becoming increasingly prevalent in numerous fields, including entertainment, education, medicine, and business. Various types of devices can be used to provide AR / VR to users, including head-mounted displays, glasses, and projectors. Such AR / VR systems may include components similar to those described above: micro-LED arrays, displays or screens (potentially including touchscreen elements), micro-LED array controllers, sensors, and other controllers. AR / VR components can be housed in a single structure, or one or more of the components shown can be mounted separately and connected via wired or wireless communication. Power and user data can be provided to the controller. User data input may include information provided by audio commands, haptic feedback, eye or pupil positioning, or a connected keyboard, mouse, or game controller. Sensors may include cameras, depth sensors, audio sensors, accelerometers, dual-axis or tri-axis gyroscopes, and other types of motion and / or environmental / wearer sensors that provide user input data. Other sensors may include, but are not limited to, barometric pressure, stress, temperature, or any other suitable sensors for local or remote environmental monitoring. In some embodiments, control input may include detected touches or taps, gesture input, or control based on the position of the head-mounted device or display. As another example, an estimated position of the AR / VR system relative to an initial position can be determined based on one or more measurement signals from one or more gyroscopes or positioning sensors that measure translational or rotational motion.

[0048] In some embodiments, the controller can control a single microLED or a group or multiple groups of LEDs to display content (AR / VR and / or non-AR / VR) to the user, while simultaneously controlling other LEDs and sensors used in eye tracking to adjust the displayed content. The content display LED can be designed to emit light in the visible light band (approximately 400 nm to 780 nm), while the tracking LED can be designed to emit light in the IR band (approximately 780 nm to 2200 nm). In some embodiments, the tracking LED and the content LED can be active simultaneously. In some embodiments, the tracking LED can be controlled to emit tracking light during periods when the content LED is deactivated and therefore not displaying content to the user. The AR / VR system can incorporate optics, as described above, and / or an AR / VR display, for example, by coupling light emitted from an LED array onto the AR / VR display. In some embodiments, the AR / VR controller can use data from sensors to integrate measurement signals received from an accelerometer over time to estimate a velocity vector, and then integrate the velocity vector over time to determine the estimated location of a reference point for the AR / VR system. In other embodiments, the reference point used to describe the location of the AR / VR system can be based on a depth sensor, a camera positioning view, or an optical flow. Based on changes in the position, orientation, or motion of the AR / VR system, the system controller can send images or commands to the luminescent array controller. Images or commands can also be changed or modified via user data input or automatic data input.

[0049] Generally, in a VR system, the display presents a view of the scene, such as a 3D scene, to the user. The user can move within the scene, such as by repositioning their head or by walking. The VR system can detect the user's movement and change the view of the scene accordingly. For example, when the user rotates their head, the system can present a scene view that changes in orientation to match the user's gaze direction. In this way, the VR system can simulate the user's presence in a 3D scene. Furthermore, the VR system can receive tactile sensory input, such as tactile sensory input from wearable positioning sensors, and can optionally provide tactile feedback to the user.

[0050] On the other hand, in AR systems, displays can incorporate elements of the user's surrounding environment into the scene view. For example, an AR system can add text captions and / or visual elements to a view of the user's surroundings. For instance, a retailer can use an AR system to show a user what a piece of furniture would look like in a room in their home by combining a visualization of the furniture with a captured image of the user's surroundings. As the user moves around the room, the visualization takes the user's movement into account and changes the furniture's visualization in a way that matches the movement. For example, an AR system can place a virtual chair in the room. The user can stand in the room in front of the virtual chair's location to see the front of the chair. The user can move to an area behind the virtual chair's location to see the back of the chair. In this way, the AR system can add elements to a dynamic view of the user's surroundings.

[0051] Figure 7A block diagram of an example system according to some embodiments is shown. System 900 may use microLEDs to provide AR / VR functionality. System 900 may include a wearable housing 912, such as a head-mounted device or goggles. Housing 912 may mechanically support and house the elements described in detail below. In some examples, one or more of the elements described in detail below may be included in one or more additional housings that may be separate from wearable housing 912 and may be wirelessly and / or wired coupled to wearable housing 912. For example, a separate housing may reduce the weight of wearable goggles, such as by including batteries, radios, and other components. Housing 912 may include one or more batteries 914 that may power any or all of the elements described in detail below. Housing 912 may include circuitry that may be electrically coupled to an external power source, such as a wall socket, to charge battery 914. Housing 912 may include one or more radios 916 for wireless communication with a server or network via a suitable protocol, such as WiFi. System 900 may include one or more sensors 918, such as optical sensors, audio sensors, tactile sensors, thermal sensors, gyroscope sensors, time-of-flight sensors, triangulation-based sensors, etc. In some examples, one or more sensors may sense the user's position, orientation, and / or orientation. In some examples, one or more of the sensors 918 may generate sensor signals in response to the sensed position, orientation, and / or orientation. Sensor signals may include sensor data corresponding to the sensed position, orientation, and / or orientation. For example, sensor data may include a depth map of the surrounding environment. In some examples, such as for an AR system, one or more of the sensors 918 may capture real-time video images of the surrounding environment near the user. System 900 may include one or more video generation processors 920. The one or more video generation processors 920 may receive scene data representing a three-dimensional scene, such as a set of location coordinates of objects in the scene or a depth map of the scene. This data may be received from a server and / or storage medium. The one or more video generation processors 920 may receive one or more sensor signals from one or more sensors 918. In response to scene data representing the surrounding environment and at least one sensor signal representing the user's position and / or orientation relative to the surrounding environment, the one or more video generation processors 920 may generate at least one video signal corresponding to the scene view. In some examples, the one or more video generation processors 920 may generate two video signals, one for each of the user's eyes, representing the view of the scene from the user's left and right eye perspectives, respectively. In some examples, the one or more video generation processors 920 may generate more than two video signals and combine these video signals to provide one video signal for both eyes, two video signals for both eyes, or other combinations.

[0052] System 900 may include one or more light sources 922 that can provide light to the display of system 900. For example, a suitable light source 922 may include the microLEDs described above. One or more light sources 922 may include light-generating elements with different colors or wavelengths. For example, the light source may include a red light-emitting diode that can emit red light, a green light-emitting diode that can emit green light, and a blue light-emitting diode that can emit blue light. Red, green, and blue light are combined in a specified ratio to produce any suitable color that is visually perceptible in the visible portion of the electromagnetic spectrum.

[0053] System 900 may include one or more modulators 924. Modulators 924 may be implemented in at least two configurations. In a first configuration, modulator 924 may include circuitry capable of directly modulating a light source 922. For example, light source 922 may include an array of light-emitting diodes (LEDs), and modulator 924 may directly modulate the electrical power, voltage, and / or current supplied to each LED in the array to form modulated light. Modulation may be performed in an analog and / or digital manner. In some examples, light source 922 may include an array of red LEDs, an array of green LEDs, and an array of blue LEDs, and modulator 924 may directly modulate the red, green, and blue LEDs to form modulated light to produce a specified image.

[0054] In a second configuration, modulator 924 may include a modulation panel, such as a liquid crystal panel. Light source 922 may produce uniform or nearly uniform illumination to illuminate the modulation panel. The modulation panel may include pixels. Each pixel may selectively attenuate light in a corresponding portion of the modulation panel area in response to an electrical modulation signal to form modulated light. In some examples, modulator 924 may include multiple modulation panels capable of modulating light of different colors. For example, modulator 924 may include a red modulation panel capable of attenuating red light from a red light source (such as a red LED), a green modulation panel capable of attenuating green light from a green light source (such as a green LED), and a blue modulation panel capable of attenuating blue light from a blue light source (such as a blue LED).

[0055] In some examples of the second configuration, the modulator 924 may receive uniform or nearly uniform white light from a white light source (such as a white light-emitting diode). The modulation panel may include a wavelength-selective filter on each pixel of the modulation panel. The panel pixels may be arranged in groups (such as three or four per group), where each group may form pixels for a color image. For example, each group may include panel pixels with a red filter, panel pixels with a green filter, and panel pixels with a blue filter. Other suitable configurations may also be used.

[0056] System 900 may include one or more modulation processors 926 that can receive video signals, such as from one or more video generation processors 920, and in response, can generate an electrically modulated signal. In a configuration where modulator 924 directly modulates light source 922, the electrically modulated signal can drive modulator 924. In a configuration where modulator 924 includes a modulation panel, the electrically modulated signal can drive the modulation panel.

[0057] System 900 may include one or more beam combiners 928 (also called beam splitters) that can combine beams of different colors to form a single multicolor beam. For the light source 922, it may include a configuration of multiple light-emitting diodes of different colors. System 900 may include one or more wavelength-sensitive (e.g., dichroic) beam combiners 928 that can combine light of different colors to form a single multicolor beam. System 900 can direct modulated light to a viewer's eyes in at least two configurations. In a first configuration, system 900 can function as a projector and may include suitable projection optics 930 that can project modulated light onto one or more screens 932. The screens 932 may be located at an appropriate distance from the user's eyes. System 900 may optionally include one or more lenses 934 that can image a virtual image of the screens 932 at an appropriate distance from the eyes, such as a near-focal distance, such as 500mm, 750mm, or another suitable distance. In some examples, system 900 may include a single screen 932 such that modulated light can be directed to both of the user's eyes. In some examples, system 900 may include two screens 932 such that modulated light from each screen 932 can be directed to the corresponding eye of the user. In some examples, system 900 may include more than two screens 932. In a second configuration, system 900 can direct modulated light directly to one or both of the viewer's eyes. For example, the projection optics 930 can form an image on the retina of a user's eye, or on each retina of a user's two eyes.

[0058] For some configurations of the AR system, system 900 may include a display that is at least partially transparent, allowing the user to view their surroundings through the display. In this configuration, the AR system may generate modulated light that corresponds to an enhancement of the surrounding environment, rather than the environment itself. For example, in the example of a retailer displaying a chair, the AR system may direct modulated light corresponding to the chair but not to the rest of the room toward the screen or the user's eyes.

[0059] Figure 8 An example method for manufacturing a lighting device according to some embodiments is shown. Not all operations can be performed in method 1000, and / or additional operations may be present. These operations may occur in a different order than that shown in Figure 12. In operation 1002, a temporary substrate is attached to the initial structure, which includes the substrate and epitaxial layers (including an n-type semiconductor layer, a p-type semiconductor layer, and an active region). If the TCO layer may have already been deposited on the initial structure, the temporary substrate is attached to the TCO layer.

[0060] In operation 1004, the substrate is etched or otherwise removed, and the n-type semiconductor layer is etched so that the thickness of the remaining epitaxial layer is significantly less than the thickness of the initial structure.

[0061] In operation 1006, the epitaxial layer is etched to form trapezoidal pixels.

[0062] In operation 1008, an oxide layer is deposited on the pixel and then etched to expose the n-type semiconductor layer on top of the pixel as well as a temporary substrate or TCO layer.

[0063] In operation 1010, a metal seed layer and a metal plating layer are deposited on an oxide layer and an opening, and etched to electrically isolate portions of the metal plating layer. Another oxide layer is deposited on the metal plating layer, an opening is etched to expose portions of the metal plating layer, and a bonding layer is deposited and fabricated on the opening to provide bonding pads that contact the exposed portions of the metal plating layer.

[0064] In operation 1012, the resulting structure is blended by attaching a monolithic structure to a bonding pad.

[0065] In operation 1014, the temporary substrate is removed from the hybrid structure.

[0066] In operation 1016, periodic nanostructures are patterned on the TCO layer, which can be deposited after the temporary substrate is removed if the TCO layer is not already present.

[0067] While specific features of the systems and methods have been shown and described herein, many modifications and variations will occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations. The method operations may be performed substantially simultaneously or in different orders. Example

[0068] Various embodiments are listed below. It should be understood that, within the scope of the invention, the embodiments listed below can be combined with all aspects and other embodiments.

[0069] Example (a). A light-emitting diode includes: an epitaxial stack on a substrate, the epitaxial stack including at least an n-type layer, at least a p-type layer, a first confinement layer, a second confinement layer, and an active region having an active region width, wherein the first confinement layer and the second confinement layer independently have a width smaller than the active region width; a p-type contact on the epitaxial stack; and an n-type contact adjacent to the at least one n-type layer.

[0070] Example (b). The light-emitting diode of Example (a), wherein the width of the first confining layer is in the range of 1µm to 50µm.

[0071] Example (c). Light-emitting diodes of Examples (a) to (b), wherein the width of the second confinement layer is in the range of 1µm to 50µm.

[0072] Example (d). Light-emitting diodes of Examples (a) to (c), wherein the active region width of the second confinement layer is in the range of 2µm to 55µm.

[0073] Example (e). Light-emitting diodes of Examples (a) to (d), wherein the at least one n-type layer comprises aluminum indium gallium phosphide (AlInGaP).

[0074] Example (f). Light-emitting diodes of Examples (a) to (e), wherein the at least one n-type layer is doped with one or more of silicon (Si) or tellurium (Te).

[0075] Example (g). Light-emitting diodes of Examples (a) to (f), wherein the at least one p-type layer comprises aluminum indium gallium phosphide (AlInGaP).

[0076] Example (h). Light-emitting diodes of Examples (a) to (g), wherein at least one p-type layer is doped with magnesium (Mg) or carbon (C).

[0077] Example (i). A light-emitting diode (LED) array includes: a plurality of mesa defining pixels having sidewalls, each mesa including: an epitaxial stack on a substrate, the epitaxial stack including a first n-type layer on the substrate, a second n-type layer on the first n-type layer, an n-type confinement layer on the second n-type layer, an active region having an active region width on the n-type confinement layer, a p-type confinement layer on the active region, a second p-type layer on the p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have a width smaller than the active region width; a p-type contact on the epitaxial stack; and an n-type contact on the first n-type layer adjacent to the second n-type layer.

[0078] Example (j). An array of light-emitting diodes (LEDs) of Example (i), wherein the width of the first confining layer is in the range of 1µm to 50µm.

[0079] Example (k). Light-emitting diode (LED) arrays of Examples (i) to (j), wherein the width of the second confinement layer is in the range of 1µm to 50µm.

[0080] Example (l). Light-emitting diode (LED) arrays of Examples (i) to (k), wherein the active region width of the second confinement layer is in the range of 2µm to 55µm.

[0081] Example (m). Light-emitting diode (LED) arrays of Examples (i) to (l), wherein the first n-type layer, the second n-type layer, and the n-type confinement layer independently comprise aluminum indium gallium phosphide (AlInGaP).

[0082] Example (n). Light-emitting diode (LED) arrays of Examples (i) to (m), wherein one or more of the first n-type layer, the second n-type layer, and the n-type confinement layer are doped with one or more of silicon (Si) or tellurium (Te).

[0083] Example (o). Light-emitting diode (LED) arrays of Examples (i) to (n), wherein the p-type confinement layer and the second p-type layer independently comprise aluminum indium gallium phosphide (AlInGaP).

[0084] Example (p). Light-emitting diode (LED) arrays of Examples (i) to (o), wherein one or more of the p-type confinement layer and the second p-type layer are doped with magnesium (Mg) or carbon (C).

[0085] Example (q). A display comprising an array of light-emitting diodes (LEDs) of Examples (i) to (p) secured to a device substrate by anodized metallization bumps.

[0086] Example (r). The display of Example (q) further includes a gallium arsenide (GaAs) substrate on which an epitaxial layer is grown. Examples. Displays of examples (q) to (r), wherein pixels emit monochrome. Example (t). Displays of Examples (q) to (s), wherein the pixels emit red. Example (u). The display according to Examples (q) to (t) includes: a light-emitting diode (LED) having at least one feature size of less than or equal to 500 micrometers, said feature size being selected from the group consisting of: height, width, depth, thickness and combinations thereof.

[0087] Example (v) A method of manufacturing a light-emitting diode (LED) device, the method comprising: growing a plurality of epitaxial layers on a substrate, including at least one n-type layer, an active region having an active region width, and at least one p-type layer to form a mesa with sidewalls; processing the sidewalls of the mesa to form an n-type confinement layer and a p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have a width smaller than the active region width; forming a p-contact on the at least one p-type layer; and forming an n-contact adjacent to the at least one n-type layer.

[0088] In the context of describing the materials and methods discussed herein (especially in the context of the following claims), the terms “a,” “an,” and “the,” and similar designations, should be interpreted to cover both the singular and plural, unless otherwise indicated herein or clearly contradicted by the context. Unless otherwise indicated herein, the recitation of ranges of values ​​herein is intended only as a shorthand method for individually referring to each individual value falling within that range, and each individual value is incorporated into this specification as if it were separately recited herein. Unless otherwise indicated herein or clearly contradicted by the context, all methods described herein can be performed in any suitable order. The use of any and all example or exemplary language (e.g., “such as”) provided herein is intended only to better elucidate the materials and methods and does not constitute a limitation on the scope unless otherwise claimed. No language in this specification should be construed as indicating that any unclaimed element is essential to the practice of the disclosed materials and methods.

[0089] Throughout this specification, the terms first, second, third, etc., may be used to describe various elements, and these elements should not be limited by these terms. These terms may be used to distinguish one element from another.

[0090] Throughout this specification, references to a layer, region, or substrate being “on” or “extending” to another element mean that it may be directly on or directly extended to another element, or that intermediate elements may be present. When an element is referred to as being “directly on” or “directly extended to” another element, there may be no intermediate elements present. Furthermore, when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element and / or connected or coupled to the other element via one or more intermediate elements. When an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intermediate elements between that element and the other element. It will be understood that these terms are intended to cover different orientations of elements, except for any orientations depicted in the figures.

[0091] Relative terms such as “below,” “above,” “top,” “bottom,” “horizontal,” or “vertical” may be used herein to describe the relationship of one element, layer, or region relative to another element, layer, or region, as illustrated in the figures. It will be understood that these terms are intended to cover different orientations of the device, in addition to those depicted in the figures.

[0092] Throughout this specification, references to "an embodiment," "some embodiments," "one or more embodiments," or "embodiment" mean that a particular feature, structure, material, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Therefore, the appearance of phrases such as "in one or more embodiments," "in some embodiments," "in one embodiment," or "in an embodiment" throughout this specification does not necessarily refer to the same embodiment of this disclosure. Furthermore, in one or more embodiments, specific features, structures, materials, or characteristics are combined in any suitable manner.

[0093] Although this disclosure has been described with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of this disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatus of this disclosure without departing from the spirit and scope of this disclosure. Therefore, it is intended that this disclosure include modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting diode, comprising: An epitaxial stack on a substrate, the epitaxial stack including at least one n-type layer, at least one p-type layer, a first confinement layer, a second confinement layer, and an active region having an active region width, wherein the first confinement layer and the second confinement layer independently have a width smaller than the active region width; p-type contact on epitaxial stack; and An n-type contact adjacent to the at least one n-type layer.

2. The light-emitting diode according to claim 1, wherein the width of the first confining layer is in the range of 1µm to 50µm.

3. The light-emitting diode according to claim 1, wherein the width of the second confining layer is in the range of 1µm to 50µm.

4. The light-emitting diode according to claim 1, wherein the active region width of the second confinement layer is in the range of 2µm to 55µm.

5. The light-emitting diode of claim 1, wherein the at least one n-type layer comprises aluminum indium gallium phosphide (AlInGaP) and is optionally doped with one or more of silicon (Si) or tellurium (Te).

6. The light-emitting diode of claim 1, wherein the at least one p-type layer comprises aluminum indium gallium phosphide (AlInGaP) and is optionally doped with magnesium (Mg) or carbon (C).

7. A light-emitting diode (LED) array, comprising: Multiple mesa surfaces defining pixels with sidewalls, each mesa surface comprising: An epitaxial stack on a substrate, the epitaxial stack comprising a first n-type layer on the substrate, a second n-type layer on the first n-type layer, an n-type confinement layer on the second n-type layer, an active region having an active region width on the n-type confinement layer, a p-type confinement layer on the active region, and a second p-type layer on the p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have a width smaller than the active region width; p-type contacts on epitaxial stacks; and The n-type contact is adjacent to the second n-type layer on the first n-type layer.

8. The light-emitting diode (LED) array according to claim 7, wherein the width of the n-type confinement layer is in the range of 1µm to 50µm.

9. The light-emitting diode (LED) array according to claim 7, wherein the width of the p-type confinement layer is in the range of 1µm to 50µm.

10. The light-emitting diode (LED) array of claim 7, wherein the active region width of the second confinement layer is in the range of 2µm to 55µm.

11. The light-emitting diode (LED) array of claim 7, wherein the first n-type layer, the second n-type layer and the n-type confinement layer independently comprise aluminum indium gallium phosphide (AlInGaP).

12. The light-emitting diode (LED) array of claim 11, wherein one or more of the first n-type layer, the second n-type layer and the n-type confinement layer are independently doped with one or more of silicon (Si) or tellurium (Te).

13. The light-emitting diode (LED) array of claim 7, wherein the p-type confinement layer and the second p-type layer independently comprise aluminum indium gallium phosphide (AlInGaP).

14. The light-emitting diode (LED) array of claim 13, wherein one or more of the p-type confinement layer and the second p-type layer are doped with magnesium (Mg) or carbon (C).

15. A display comprising an array of light-emitting diodes (LEDs) of claim 7, which is fixed to a device substrate by anodized metallization bumps.

16. The display of claim 15, further comprising a gallium arsenide (GaAs) substrate on which the epitaxial stack is grown.

17. The display of claim 15, wherein the pixel emits a monochrome emission.

18. The display of claim 15, wherein the pixel emits red.

19. The display of claim 15, comprising: A light-emitting diode (LED) having at least one feature dimension of less than or equal to 500 micrometers, said feature dimension being selected from the group consisting of: height, width, depth, thickness and combinations thereof.

20. A method for manufacturing a light-emitting diode (LED) device, the method comprising: Multiple epitaxial layers are grown on a substrate, the epitaxial layers including at least one n-type layer, an active region having an active region width, and at least one p-type layer to form a mesa with sidewalls; The sidewalls of the platform are processed to form an n-type confinement layer and a p-type confinement layer, wherein the n-type confinement layer and the p-type confinement layer independently have a width smaller than the width of the active region; A p-contact is formed on the at least one p-type layer; and An n-contact is formed adjacent to the at least one n-type layer.

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