Method for adjusting minimum operating voltage of static memory

Abstract

This application provides a method for adjusting the minimum operating voltage of a static memory (SMC), belonging to the field of semiconductor technology. The method includes: simulating and obtaining the read static noise margin and write static noise margin of the SMC at at least two predetermined operating voltages within at least two predetermined temperature ranges; obtaining a first ratio of the median to the standard deviation of the read static noise margin for each predetermined operating voltage within each predetermined temperature range, and a second ratio of the median to the standard deviation of the write static noise margin for each predetermined operating voltage within each predetermined temperature range; performing linear fitting on all the first ratios and all the second ratios within each predetermined temperature range to obtain a first fitting line and a second fitting line, to determine the changing trend of the minimum read operating voltage and the minimum write operating voltage with temperature; and adjusting the threshold voltage of at least one transistor when the changing trend does not meet the requirements, thereby improving the performance of the SMC.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and specifically to a method for adjusting the minimum operating voltage of a static memory. Background Technology

[0002] Static Random-Access Memory (SRAM) is widely used in Very Large Scale Integration (VLSI) circuits due to its performance and compatibility advantages. During the manufacturing process of SRAM, factors such as the manufacturing process affect the minimum operating voltage (Vmin). The minimum operating voltage of SRAM can be divided into read minimum operating voltage and write minimum operating voltage. Currently, both the read (Vmin) and write (Vmin) minimum operating voltages of SRAM increase with increasing temperature, which does not conform to the physical mechanism that the read minimum operating voltage increases with increasing temperature while the write minimum operating voltage decreases with increasing temperature. Summary of the Invention

[0003] In view of this, the embodiments of this application aim to provide a method for adjusting the minimum operating voltage of a static memory, so as to solve the problem that the minimum operating voltage of a static memory does not conform to the physical mechanism when changing with temperature.

[0004] This application provides a method for adjusting the minimum operating voltage of a static memory, including:

[0005] At at least two predetermined temperature ranges, the static noise margins for reading and writing of the static memory at at least two predetermined operating voltages are simulated and obtained respectively. At least two static noise margins for reading and writing are obtained at each predetermined operating voltage.

[0006] Obtain a first ratio of the median to the standard deviation of the read static noise tolerance for each predetermined operating voltage within each predetermined temperature range, and obtain a second ratio of the median to the standard deviation of the write static noise tolerance for each predetermined operating voltage within each predetermined temperature range;

[0007] A first fitting line is obtained by linearly fitting all the first ratios under each predetermined temperature range, and a second fitting line is obtained by linearly fitting all the second ratios under each predetermined temperature range.

[0008] Based on all the first fitted lines and all the second fitted lines, determine whether the trends of the minimum read operating voltage and minimum write operating voltage of the static memory with temperature meet the requirements; and...

[0009] If not, adjust the threshold voltage of at least one transistor in the static memory so that the temperature variation trends of the minimum read operating voltage and the minimum write operating voltage meet the requirements.

[0010] In some embodiments, when the minimum operating voltage for reading increases with temperature and the minimum operating voltage for writing decreases with temperature, the trends of the minimum operating voltage for reading and the minimum operating voltage for writing with temperature meet the requirements.

[0011] In some embodiments, the threshold voltage of the transistor is adjusted by adjusting predetermined parameters, including flat-band voltage.

[0012] In some embodiments, the step of adjusting the predetermined parameters of the transistor includes:

[0013] Obtain a first relationship curve for each predetermined temperature range, where the predetermined parameter of the transistor corresponds to the same first ratio as the minimum operating voltage.

[0014] Obtain a second relationship curve for each predetermined temperature range, showing the predetermined parameter of the transistor and the minimum write operating voltage corresponding to the same second ratio; and,

[0015] The predetermined parameters of the transistor are adjusted based on all the first relationship curves and all the second relationship curves.

[0016] In some embodiments, when adjusting the predetermined parameters of the plurality of transistors, each transistor acquires a corresponding first relationship curve and a second relationship curve, and adjusts the predetermined parameters of the transistor according to the first relationship curve and the second relationship curve corresponding to the transistor.

[0017] In some embodiments, the step of adjusting the predetermined parameters of the transistor according to all the first relationship curves and all the second relationship curves includes:

[0018] Obtain the intersection point of the first relationship curve and the second relationship curve within the same predetermined temperature range;

[0019] Obtain the edge intersections from all the intersections, where the edge intersections are the intersections with the maximum and minimum predetermined parameters; and,

[0020] The predetermined parameters of the transistor are adjusted to be between the predetermined parameters of the edge intersection.

[0021] In some embodiments, the step of obtaining a first relationship curve between the predetermined parameter of the transistor and the first ratio corresponding to the minimum operating voltage for each predetermined temperature range includes:

[0022] Within each predetermined temperature range, the minimum operating voltage for reading is obtained, corresponding to at least two different predetermined parameters of the transistor and the same first ratio.

[0023] The first relationship curve is obtained by linearly fitting all the minimum operating voltages for reading under the same first ratio within each predetermined temperature range.

[0024] And / or, the step of obtaining a second relationship curve for the predetermined parameter of the transistor and the minimum write operating voltage corresponding to the same second ratio within each predetermined temperature range includes:

[0025] Within each predetermined temperature range, the minimum write operating voltage corresponding to the same second ratio for at least two different predetermined parameters of the transistor is obtained;

[0026] The second relationship curve is obtained by linearly fitting all the minimum write operating voltages corresponding to the same second ratio within each predetermined temperature range.

[0027] In some embodiments, the magnitudes of the first ratio and the second ratio are positively correlated with the yield of the static memory, and the yield represented by the first ratio corresponding to the first relationship curve is the same as the yield represented by the second ratio corresponding to the second relationship curve.

[0028] In some embodiments, the magnitudes of the first ratio and the second ratio are positively correlated with the yield of the static memory, and the yield represented by the first ratio corresponding to the first relationship curve and the yield represented by the second ratio corresponding to the second relationship curve are both greater than or equal to 90%.

[0029] In some embodiments, the predetermined temperature range is at least two of 115°C to 135°C, 20°C to 40°C, and -20°C to -50°C; and / or, the predetermined operating voltage is at least two of the rated operating voltage of the static memory, ±10% of the rated operating voltage of the static memory, and ±20% of the rated operating voltage of the static memory.

[0030] This application adjusts the threshold voltage of the transistor to regulate the temperature-dependent minimum operating voltage of the static memory, thereby ensuring that the temperature-dependent minimum operating voltage conforms to the physical mechanism that the minimum operating voltage for reading increases and the minimum operating voltage for writing decreases as the temperature rises, thus enabling the static memory to achieve better performance. Attached Figure Description

[0031] Figure 1 A flowchart illustrating a method for adjusting the minimum operating voltage of a static memory according to an embodiment of this application.

[0032] Figure 2 This is a schematic diagram of the cell structure of a static memory provided in an embodiment of this application in the read state.

[0033] Figure 3 This is a schematic diagram of the cell structure of a static memory provided in an embodiment of this application in the write state.

[0034] Figure 4 This is a schematic diagram of the cell structure of a static memory provided in an embodiment of this application in the write state.

[0035] Figure 5 This is a schematic diagram illustrating the acquisition of read static noise tolerance according to an embodiment of this application.

[0036] Figure 6 This is a schematic diagram of the cell structure of a static memory provided in another embodiment of this application in the write state.

[0037] Figure 7 This is a schematic diagram illustrating the acquisition of write static noise tolerance according to an embodiment of this application.

[0038] Figure 8 This is a schematic diagram of a first fitting line and a second fitting line within a preset temperature range, provided as an embodiment of this application.

[0039] Figure 9 This is a schematic diagram of a first fitting line and a second fitting line within a preset temperature range, provided as an embodiment of this application.

[0040] Figure 10 This is a schematic diagram of a first fitting line and a second fitting line within a preset temperature range, provided as an embodiment of this application.

[0041] Figure 11 A graph showing the relationship between the minimum operating voltage and a first ratio at multiple preset temperatures for a static memory provided in an embodiment of this application.

[0042] Figure 12A graph showing the relationship between the minimum operating voltage and the second ratio at multiple preset temperatures for a static memory provided in an embodiment of this application.

[0043] Figure 13 A flowchart illustrating a method for adjusting predetermined parameters of a transistor according to an embodiment of this application.

[0044] Figure 14 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 2M provided in an embodiment of this application under a preset temperature range.

[0045] Figure 15 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 64M provided in an embodiment of this application under a preset temperature range.

[0046] Figure 16 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 2M provided in an embodiment of this application under a preset temperature range.

[0047] Figure 17 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 64M provided in an embodiment of this application under a preset temperature range.

[0048] Figure 18 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 2M provided in an embodiment of this application under a preset temperature range.

[0049] Figure 19 A graph showing the relationship between predetermined parameters of transistors and the minimum operating voltage of a static memory with a storage space of 64M provided in an embodiment of this application under a preset temperature range.

[0050] Figure 20 A graph showing the relationship between predetermined transistor parameters and minimum operating voltage for a static memory with a storage space of 2M provided in an embodiment of this application.

[0051] Figure 21 A graph showing the relationship between predetermined transistor parameters and minimum operating voltage for a static memory with a storage space of 64M provided in an embodiment of this application.

[0052] Figure 22 A flowchart of a method for adjusting predetermined parameters of a transistor provided in another embodiment of this application. Detailed Implementation

[0053] According to the theory of physical mechanisms, as the temperature rises, the minimum operating voltage for reading static memory will increase, while the minimum operating voltage for writing static memory will decrease. However, most current static memory does not conform to this physical mechanism. Tests have shown that as the temperature rises, the minimum operating voltage for both reading and writing of most static memory increases, requiring adjustment.

[0054] Currently, the minimum operating voltage of static memory can be dynamically monitored and adjusted through CP testing (Chip Probing). However, different voltage points need to be set during the testing process, which is time-consuming and involves complex data processing. Alternatively, the temperature effect of the minimum operating voltage of static memory can be improved by adding auxiliary circuits to the circuit structure of the static memory. However, adding auxiliary circuits will increase the chip area.

[0055] Based on this, this application provides a method for adjusting the minimum operating voltage of a static memory (SMC), comprising: simulating and obtaining read static noise margins and write static noise margins of the SMC at at least two predetermined operating voltages under at least two predetermined temperature ranges, wherein at least two read static noise margins and write static noise margins are obtained under each predetermined operating voltage; obtaining a first ratio of the median to the standard deviation of the read static noise margins for each predetermined operating voltage under each predetermined temperature range, and obtaining a second ratio of the median to the standard deviation of the write static noise margins for each predetermined operating voltage under each predetermined temperature range; performing linear fitting on all the first ratios under each predetermined temperature range to obtain a first fitting line, and performing linear fitting on all the second ratios under each predetermined temperature range to obtain a second fitting line; determining whether the trends of the minimum read operating voltage and the minimum write operating voltage of the SMC with temperature meet the requirements based on all the first fitting lines and all the second fitting lines; and, if not, adjusting the threshold voltage of at least one transistor in the SMC so that the trends of the minimum read operating voltage and the minimum write operating voltage with temperature meet the requirements. This application, on the one hand, obtains the minimum operating voltage for reading and writing through fitting, which reduces testing time and data processing complexity, and can also accurately determine the changing trend of the minimum operating voltage for reading and writing with temperature. On the other hand, by adjusting the threshold voltage of the transistor, the trend of the minimum operating voltage of the static memory with temperature is adjusted, so that the trend of the minimum operating voltage with temperature changes conforms to the physical mechanism that the minimum operating voltage for reading increases and the minimum operating voltage for writing decreases as temperature increases, thereby enabling the static memory to achieve better performance. In addition, this application does not require the addition of auxiliary circuits to improve the temperature effect of the minimum operating voltage of the static memory, and does not increase the chip area.

[0056] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0057] One embodiment of this application provides a method for adjusting the minimum operating voltage of a static memory, used to adjust the minimum operating voltage of the static memory. Figure 1 A flowchart of a method for adjusting the minimum operating voltage of a static memory provided in an embodiment of this application is shown below. Figure 1 As shown, the method for adjusting the minimum operating voltage of static memory includes:

[0058] Step S101: Under at least two predetermined temperature ranges, simulate and obtain the read static noise margin and write static noise margin of the static memory under at least two predetermined operating voltages, and obtain at least two read static noise margins and write static noise margins under each predetermined operating voltage.

[0059] Step S102: Obtain the first ratio of the median to the standard deviation of the read static noise tolerance for each predetermined operating voltage under each predetermined temperature range, and obtain the second ratio of the median to the standard deviation of the write static noise tolerance for each predetermined operating voltage under each predetermined temperature range.

[0060] Step S103: Perform linear fitting on all first ratios under each predetermined temperature range to obtain a first fitted line, and perform linear fitting on all second ratios under each predetermined temperature range to obtain a second fitted line.

[0061] Step S104: Determine whether the trends of the minimum operating voltage for reading and the minimum operating voltage for writing of the static memory with temperature meet the requirements based on all first fitted lines and all second fitted lines.

[0062] Step S105: If not, adjust the threshold voltage of at least one transistor in the static memory so that the minimum operating voltage for reading and the minimum operating voltage for writing change with temperature as required.

[0063] Specifically, in step S101, the predetermined temperature range, predetermined operating state, and at least two predetermined operating voltages can be determined first.

[0064] In some embodiments, the predetermined temperature range is typically a temperature range of interest to researchers or users. For example, researchers or users are typically interested in the performance of static memory at high, normal, and low temperatures. High temperatures could be, for example, 115°C to 135°C, normal temperatures could be, for example, 20°C to 40°C, and low temperatures could be, for example, -20°C to -50°C. Therefore, the predetermined temperature range can be at least one of 115°C to 135°C, 20°C to 40°C, and -20°C to -50°C. Static memory has multiple operating states, such as read and write states; therefore, the predetermined operating states can include read and / or write states. The predetermined operating voltage can be at least two of the static memory's rated operating voltage, ±10% of the static memory's rated operating voltage, and ±20% of the static memory's rated operating voltage.

[0065] Furthermore, within a predetermined temperature range and under predetermined operating conditions, the static noise margin (SNM) of the static memory is simulated and acquired at at least two predetermined operating voltages, and at least two SNM data are acquired for each predetermined operating voltage. In some embodiments, to improve data accuracy, the number of SNMs acquired for each predetermined operating voltage can be increased, for example, more than 1000 SNMs can be acquired for each predetermined operating voltage.

[0066] It is important to emphasize that the static noise margin obtained in this step is the static noise margin under a predetermined temperature range and a predetermined operating state. As explained above, the predetermined temperature range can be at least one of 115℃~135℃, 20℃~40℃, and -20℃~-50℃. The predetermined operating state can be a read state and / or a write state. In this case, the static noise margin can be the static noise margin of the static memory under the following conditions: 115℃~135℃ and read state; 20℃~40℃ and read state; -20℃~-50℃ and read state; 115℃~135℃ and write state; 20℃~40℃ and write state; and -20℃~-50℃ and write state. For ease of distinction, the static noise margin of static memory in the read state will be referred to as the read static noise margin (RSNM), and the static noise margin of static memory in the write state will be referred to as the write static noise margin (WSNM).

[0067] For example, assuming a predetermined temperature range of 20℃ to 40℃, predetermined operating states of read and write, and predetermined operating voltages of the static memory (SMemory), ±10% of the SMemory's rated operating voltage, and ±20% of the SMemory's rated operating voltage (a total of 5 different operating voltages), 1000 static noise margins are obtained for each predetermined operating voltage. In this case, simulating the SMemory's static noise margins at at least two predetermined operating voltages includes: within the 20℃ to 40℃ range, and when the SMemory is in read state, simulating the SMemory's read static noise margins at 5 different predetermined operating voltages, obtaining 1000 read static noise margins for each predetermined operating voltage, for a total of 5... 1000 read static noise margins were obtained. Simultaneously, within the temperature range of 20℃ to 40℃, and while the static memory was in write mode, the write static noise margins of the static memory were simulated and obtained at five different predetermined operating voltages. For each predetermined operating voltage, 1000 write static noise margins were obtained, for a total of five... 1000 write static noise tolerances.

[0068] In some embodiments, the simulation can be an Hspice circuit simulation, that is, within a predetermined temperature range and under predetermined operating conditions, at least two Monte Carlo results are obtained by Hspice simulation for the static noise margin of the static memory at each predetermined operating voltage.

[0069] In some embodiments, the predetermined operating state can be a read state or a write state. In this case, the read static noise tolerance or write static noise tolerance of the static memory under at least two predetermined operating voltages can be obtained separately in the read state or the write state.

[0070] Figure 2 This is a schematic diagram of the cell structure of a static memory provided in an embodiment of this application in the read state. Figure 2As shown, the static memory includes a first pull-up transistor PU1, a second pull-up transistor PU2, a first pull-down transistor PD1, a second pull-down transistor PD2, a first transmission gate transistor PG1, and a second transmission gate transistor PG2. The first and second transmission gate transistors PG1 and PG2 can be N-type transistors. The gates of the first and second transmission gate transistors PG1 and PG2 are connected to and controlled by the word line WL, which determines whether to select the cell structure. A latch formed by the first pull-up transistor PU1, the second pull-up transistor PU2, the first pull-down transistor PD1, and the second pull-down transistor PD2 is used to store bits. The bits are stored in the first storage node Q, and the complementary value of the bit is stored in the second storage node QB. The stored bits can be written to or read from the cell structure via the bit line BL and the complementary bit line BLB (bit-line bar, reverse bit line), where the bit line BL and the complementary bit line BLB can carry complementary bit line signals.

[0071] This unit structure is powered by a voltage V. DD Power supply: The sources of the first pull-up transistor PU1 and the second pull-up transistor PU2 are respectively connected to the power supply voltage V. DD The sources of the first pull-down transistor PD1 and the second pull-down transistor PD2 are grounded. The gates of the first pull-up transistor PU1 and the first pull-down transistor PD1 are connected to the drains of the second pull-up transistor PU2 and the second pull-down transistor PD2, forming a connection node as the first memory node Q. The gates of the second pull-up transistor PU2 and the second pull-down transistor PD2 are connected to the drains of the first pull-up transistor PU1 and the first pull-down transistor PD1, forming a connection node as the second memory node QB. The source / drain of the first transmission gate transistor PG1 is connected to the bit line BL, and the source / drain of the second transmission gate transistor PG2 is connected to the complementary bit line BLB.

[0072] Please continue reading. Figure 2 Assuming the first storage node Q stores 0 data and the second storage node QB stores 1 data, when the static memory is in read mode, BL / BLB=1 and WL=1. At this time, the potential difference between BL and BLB can be detected using the sensing amplifier SA to determine the data stored in the first storage node Q. The read current Iread flows to the first pull-down transistor PD1 and the second pull-down transistor PD2, and then to ground.

[0073] Figure 3 and Figure 4 This is a schematic diagram of the cell structure of a static memory provided in an embodiment of this application in the write state. Figure 3 and Figure 4As shown, for a write operation, assuming the data stored in the first storage node Q is 0 and needs to be changed to 1, then BL=1, BLB=0, WL=1. The first process is that the first pull-up transistor PU1 and the second pull-down transistor PD2 are turned off, and the second pull-up transistor PU2 and the first pull-down transistor PD1 are turned on. The second process is that the first pull-up transistor PU1 and the second pull-down transistor PD2 are turned on, and the second pull-up transistor PU2 and the first pull-down transistor PD1 are turned off.

[0074] Figure 5 This is a schematic diagram illustrating the acquisition of read static noise tolerance according to an embodiment of this application. Figure 5 As shown, the voltages of the second storage node QB and the first storage node Q are used as the x and y axes, respectively. The Beta ratio, obtained by dividing the saturation current of the pull-down transistor PD (including the first pull-down transistor PD1 or the second pull-down transistor PD2) by the saturation current of the transmission gate transistor PG (including the first transmission gate transistor PG1 or the second transmission gate transistor PG2), is plotted on the coordinate axis. Figure 5 The side length of the smallest rectangle drawn in the diagram is the static noise tolerance for reading.

[0075] Figure 6 This is a schematic diagram of the cell structure of a static memory provided in another embodiment of this application in the write state. Figure 7 This is a schematic diagram illustrating the acquisition of write static noise tolerance according to an embodiment of this application, as shown below. Figure 6 and Figure 7 As shown, for a write operation, assume that the first storage node Q stores 0 data and the second storage node QB stores 1 data, then BL=BLB=WL=V DD V SS =0V, allowing scanning of the first memory node Q and the second memory node QB. Using the complementary bit line BLB and the voltage of the first memory node Q / second memory node QB as the x and y axes respectively, the voltages of the first memory node Q / second memory node QB are plotted on the coordinate axes. Figure 7 The horizontal axis value corresponding to the point where the voltage curves of the first storage node Q and the second storage node QB overlap is the write static noise margin.

[0076] It should be noted that the methods for obtaining the read static noise tolerance and write static noise tolerance provided above are only examples. In some embodiments, other methods can also be used to obtain the read static noise tolerance and write static noise tolerance of the static memory, which will not be illustrated here.

[0077] Further, step S102 is executed to obtain the ratio of the median to the standard deviation (Stdev) of the static noise margin at each predetermined operating voltage. For example, the static noise margins of the static memory at five different predetermined operating voltages under read conditions at temperatures ranging from 20°C to 40°C were obtained above, with 1000 read static noise margins obtained for each predetermined operating voltage, for a total of 5... 1000 read static noise margins were obtained; simultaneously, under conditions of 20℃~40℃ and in write mode, the write static noise margins of the static memory were obtained at five different predetermined operating voltages, with 1000 write static noise margins obtained for each predetermined operating voltage, for a total of 5... 1000 write static noise margins are calculated. Next, the median and standard deviation of 1000 read static noise margins at each predetermined operating voltage are obtained, and a ratio is calculated. A total of 5 ratios are obtained for 5 predetermined operating voltages. Then, the median and standard deviation of the 1000 write static noise margins at each predetermined operating voltage are obtained, and a ratio is calculated. A total of 5 ratios are obtained for 5 predetermined operating voltages. For ease of distinction, the ratio of the median to standard deviation of the read static noise margin at each predetermined operating voltage is referred to as the first ratio, and the ratio of the median to standard deviation of the write static noise margin at each predetermined operating voltage is referred to as the second ratio. It should be noted that regardless of the number of bits in the static memory, the magnitude of the ratio is positively correlated with the yield of the static memory (the magnitudes of both the first and second ratios are positively correlated with the yield of the static memory). Therefore, the magnitude of the ratio can characterize the yield of the static memory; as long as the ratio remains unchanged, the yield of the static memory will not change.

[0078] For example, referring to Tables 1 and 2, Table 1 is a data example table of the first ratio (Sigma No.) and minimum read operating voltage (Read Vmin) for static memory with storage spaces of 2M and 64M respectively, and Table 2 is a data table of the second ratio (Sigma No.) and minimum write operating voltage (Write Vmin) for static memory with storage spaces of 2M and 64M respectively, and Table 2 is a data table of the second ratio and minimum write operating voltage (Write Vmin) for static memory with storage spaces of 2M and 64M respectively. The first ratio in Table 1 and the second ratio in Table 2 both correspond to a yield of 90%.

[0079] Table 1: First ratio of static memory with storage capacity of 2M and 64M, and data on minimum read operating voltage under multiple predetermined temperature ranges.

[0080]

[0081] Table 2: Second ratio of static memory with storage capacity of 2M and 64M, and data table of minimum write operating voltage under multiple predetermined temperature ranges.

[0082]

[0083] Step S103 is executed in which, specifically, all first ratios under each predetermined temperature range are linearly fitted to obtain a first fitted line (there is a corresponding first fitted line under each predetermined temperature range), and all second ratios under each predetermined temperature range are linearly fitted to obtain a second fitted line (there is a corresponding second fitted line under each predetermined temperature range). Both the first fitted line and the second fitted line are straight lines and can be described by a linear function (a linear function in one variable).

[0084] For example, at high temperature (125°C), normal temperature (25°C), and low temperature (-40°C), the read static noise tolerance of the static memory is simulated and obtained at five predetermined operating voltages (e.g., the rated operating voltage of the static memory, ±10% of the rated operating voltage, and ±20% of the rated operating voltage). Then, the first ratio of the median to the standard deviation of the read static noise tolerance at each predetermined operating voltage within each predetermined temperature range is obtained (there are five predetermined operating voltages for each predetermined temperature range, resulting in a total of five first ratios). Then, linear fitting is performed on the five first ratios at high temperature, the five first ratios at normal temperature, and the five first ratios at low temperature, respectively, to obtain the first fitting line corresponding to the high temperature (e.g., ...). Figure 8 The blue fitted line shown is RSNM_Sigma NO., and the first fitted line corresponding to room temperature is shown (e.g.). Figure 9 The blue fitted line shown (RSNM_Sigma NO.) and the first fitted line corresponding to low temperature (as shown) Figure 10 The blue fitted line shown is RSNM_Sigma NO.

[0085] At high temperatures (125℃, for example), normal temperatures (25℃, for example), and low temperatures (-40℃, for example), the write static noise margin of the static memory at five predetermined operating voltages was simulated and obtained. Then, the second ratio of the median to the standard deviation of the write static noise margin at each predetermined operating voltage within each predetermined temperature range was obtained (five predetermined operating voltages were obtained for each predetermined temperature range, resulting in five second ratios). Linear fitting was then performed on the five second ratios at high temperature, the five second ratios at normal temperature, and the five second ratios at low temperature, yielding the corresponding second fitting lines for high temperature (e.g., ...). Figure 8 The red fitted line shown is WM_Sigma NO., and the second fitted line corresponding to room temperature is (e.g.) Figure 9 The red fitted line shown (WM_Sigma NO.) and the second fitted line corresponding to low temperature (as shown) Figure 10 The red fitted line is shown (WM_Sigma NO.).

[0086] Step S104 is executed, determining the temperature variation trends of the minimum read and write operating voltages of the static memory based on all first and second fitted lines. Specifically, the temperature variation trend of the minimum read operating voltage can be determined based on the first fitted lines corresponding to all predetermined temperature ranges, and the temperature variation trend of the minimum write operating voltage can be determined based on the second fitted lines corresponding to all predetermined temperature ranges. Specifically, when the minimum read operating voltage increases with increasing temperature, and the minimum write operating voltage decreases with increasing temperature, the temperature variation trends of the minimum read and minimum write operating voltages of the static memory meet the requirements.

[0087] Figure 11 A graph showing the relationship between the minimum operating voltage (Read Vmin) and a first ratio (Sigma No.) of a static memory provided in an embodiment of this application under multiple predetermined temperature ranges. Figure 11 As shown, after obtaining the first fitted line for each preset temperature range, the first ratio is plotted on the ordinate and the minimum operating voltage for reading is plotted on the abscissa. By placing the first fitted lines for all preset temperature ranges on the same coordinate axis, a graph showing the relationship between the minimum operating voltage for reading and the first ratio (Sigma No.) at multiple preset temperatures is obtained. This graph is used to determine the trend of the minimum operating voltage for reading of the static memory with temperature. Specifically, at -40℃, the relationship curve between the minimum operating voltage for reading (Read Vmin) and the first ratio (Sigma No.) satisfies the formula... and ( Figure 11 (The green line in the diagram). At 25°C, the relationship between the minimum operating voltage (Read Vmin) and the first ratio (Sigma No.) satisfies the formula... and ( Figure 11 (The black line in the figure). At 125°C, the relationship curve between the minimum operating voltage (Read Vmin) and the first ratio (Sigma No.) satisfies the formula. and ( Figure 11(The red line in the diagram). When determining the minimum operating voltage's trend with temperature, one can first select any point on the vertical axis and draw an auxiliary line parallel to the horizontal axis with that point as the origin. The horizontal coordinate value of the intersection point of this auxiliary line and each first fitted line is the minimum operating voltage for reading the static memory under the corresponding preset temperature range and the current first ratio. Then, compare the corresponding minimum operating voltage for reading according to the temperature change trend. If the minimum operating voltage for reading also increases with increasing temperature, then it meets the requirements. Otherwise, it does not meet the requirements.

[0088] For example, when the preset temperature range is selected as 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature), three first fitting lines are obtained, including the first fitting line corresponding to the high temperature. Figure 11 The red line in the figure), the first fitted line corresponding to room temperature ( Figure 11 The black lines in the figure) and the first fitted line corresponding to low temperature ( Figure 11 (The green lines in the diagram) Place the three first fitting lines on the same coordinate axis. Then, with the selected point on the vertical axis as the origin, draw an auxiliary line parallel to the horizontal axis. The intersection of this auxiliary line with the first fitting line corresponding to high temperature is the minimum operating voltage for static memory at high temperature under the current first ratio. The intersection of the auxiliary line with the first fitting line corresponding to normal temperature is the minimum operating voltage for static memory at normal temperature under the current first ratio. The intersection of the auxiliary line with the first fitting line corresponding to low temperature is the minimum operating voltage for static memory at low temperature under the current first ratio. After obtaining the three intersection points, compare the horizontal axis values ​​of the corresponding intersection points in the order of low temperature, normal temperature, and high temperature. If the value increases with increasing temperature, it means that the minimum operating voltage for reading increases with increasing temperature, which meets the requirements; otherwise, it does not meet the requirements.

[0089] Figure 12 A graph showing the relationship between the minimum write operating voltage (Write Vmin) and the second ratio (Sigma No.) of a static memory provided in an embodiment of this application under multiple preset temperature ranges. Figure 12 As shown, after obtaining the second fitted line for each preset temperature range, the second ratio is plotted on the ordinate and the minimum write operating voltage on the abscissa. By placing the second fitted lines for all preset temperature ranges on the same coordinate axis, a relationship graph of the minimum write operating voltage and the second ratio (Sigma No.) of the static memory at multiple preset temperatures is obtained. This graph is used to determine the trend of the minimum write operating voltage of the static memory with temperature. Specifically, at -40℃, the relationship curve between the minimum write operating voltage (Write Vmin) and the second ratio (Sigma No.) satisfies the formula... and ( Figure 12(The green line in the diagram). At 25°C, the relationship between the minimum write operating voltage (Write Vmin) and the second ratio (Sigma No.) satisfies the formula... and ( Figure 12 (The black line in the figure). At 125°C, the relationship curve between the minimum write operating voltage (Write Vmin) and the second ratio (Sigma No.) satisfies the formula. and ( Figure 12 (The red line in the diagram). When determining the trend of minimum operating voltage with temperature, you can first select any point on the vertical axis, and draw an auxiliary line parallel to the horizontal axis with that point as the origin. The horizontal coordinate value of the intersection point of this auxiliary line and each second fitted line is the minimum operating voltage for writing static memory under the corresponding preset temperature range and the current second ratio. Then, compare the corresponding minimum operating voltage for writing according to the temperature change trend. If the minimum operating voltage for writing decreases as the temperature increases, it meets the requirements. Otherwise, it does not meet the requirements.

[0090] For example, when the preset temperature range is selected as 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature), three second fitting lines are obtained, including the second fitting line corresponding to the high temperature. Figure 12 (The red line in the diagram) and the second fitted line corresponding to room temperature. Figure 12 The black lines in the figure) and the second fitted line corresponding to low temperature ( Figure 12 (The green lines in the diagram) Place the three second fitting lines on the same coordinate axis. Then, with the selected point on the vertical axis as the origin, draw an auxiliary line parallel to the horizontal axis. The intersection of this auxiliary line with the second fitting line corresponding to high temperature is the minimum operating voltage for writing static memory at high temperature under the current second ratio. The intersection of the auxiliary line with the second fitting line corresponding to room temperature is the minimum operating voltage for writing static memory at room temperature under the current second ratio. The intersection of the auxiliary line with the second fitting line corresponding to low temperature is the minimum operating voltage for writing static memory at low temperature under the current second ratio. After obtaining the three intersection points, compare the horizontal axis values ​​of the corresponding intersection points in the order of low temperature, room temperature, and high temperature. If the value decreases as the temperature increases, it means that the minimum operating voltage for writing decreases as the temperature increases, which meets the requirements; otherwise, it does not meet the requirements.

[0091] Understandably, the above example demonstrates a situation where the minimum operating voltage for reading static memory meets the requirements as a function of temperature, but the minimum operating voltage for writing static memory does not.

[0092] In step S105, when it is determined that the minimum operating voltage for reading and writing of the static memory does not meet the requirements due to temperature variations, the minimum operating voltages for reading and writing can be adjusted by adjusting the threshold voltage of at least one transistor in the static memory. For example, the threshold voltage of one or more transistors can be adjusted according to actual conditions; for instance, the threshold voltage of one transistor can be adjusted, or the threshold voltages of two symmetrical transistors can be adjusted, without limitation. By adjusting the threshold voltage of the transistors, the temperature variation trend of the minimum operating voltage of the static memory is adjusted, so that the trend of the minimum operating voltage changing with temperature conforms to the physical mechanism that the minimum operating voltage for reading increases and the minimum operating voltage for writing decreases as temperature increases, thereby enabling the static memory to achieve better performance.

[0093] In one implementation, when adjusting the threshold voltage of a transistor, the threshold voltage can be adjusted by adjusting predetermined parameters of the transistor. Specifically, the predetermined parameters refer to all possible parameters that affect the transistor's threshold voltage, such as the flat-band voltage. Adjusting the transistor's threshold voltage by adjusting predetermined parameters is simple and easy to implement, and can improve adjustment accuracy.

[0094] In one implementation, Figure 13 A flowchart of a method for adjusting predetermined parameters of a transistor according to an embodiment of this application is shown below. Figure 13 As shown, it includes the following steps:

[0095] Step S201: Obtain a first relationship curve between the predetermined parameters of the transistor and the first ratio corresponding to the minimum operating voltage for each predetermined temperature range.

[0096] Step S202: Obtain a second relationship curve for the predetermined parameters of the transistor and the minimum operating voltage at the same second ratio for each predetermined temperature range.

[0097] Step S203: Adjust the predetermined parameters of the transistor according to all the first relationship curves and all the second relationship curves.

[0098] In step S201, a fixed first ratio can be determined first, and then a first relationship curve can be obtained between the predetermined parameters of the transistors and the minimum operating voltage at this first ratio for each predetermined temperature range. Specifically, since the magnitude of the first ratio is positively correlated with the yield of the static memory, the yield of the static memory can be determined first when determining the first ratio, and then the first ratio can be determined based on the yield. For example, it can be the first ratio corresponding to a yield of 90%. In one embodiment, the yield represented by the first ratio corresponding to the first relationship curve can be greater than or equal to 90%.

[0099] When performing step S201, the predetermined temperature range can be at least two of the following: 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature). Within each predetermined temperature range, the minimum operating voltage corresponding to the same first ratio for at least two predetermined parameters of the transistor is obtained, and a first relationship curve is fitted. This first relationship curve can be a linear fitting curve. To improve data accuracy, multiple predetermined parameters of the transistor corresponding to the same first ratio for the minimum operating voltage can be obtained, thereby increasing the accuracy of the first relationship curve. It should be noted that the transistor for which the first relationship curve is obtained in step S201 is the transistor that needs to be adjusted. For example, if there is one transistor that needs adjustment, the first relationship curve corresponding to the same first ratio for the predetermined parameters and the minimum operating voltage of that transistor is obtained; if there are two transistors that need adjustment, the first relationship curves corresponding to the same first ratio for the predetermined parameters and the minimum operating voltage of each of these two transistors are obtained respectively. That is, a corresponding first relationship curve is obtained for each transistor that needs adjustment.

[0100] In one embodiment, the step of obtaining a first relationship curve between predetermined parameters of a transistor and the minimum operating voltage at readout value corresponding to the same first ratio for each predetermined temperature range includes: obtaining minimum operating voltages at readout value corresponding to at least two different predetermined parameters of the transistor for the same first ratio within each predetermined temperature range, wherein the first ratios corresponding to the minimum operating voltages at readout value are all the same (e.g., all corresponding to a first ratio representing 90% yield), but each minimum operating voltage at readout value corresponds to a different predetermined parameter of the transistor. Next, a linear fit is performed on all minimum operating voltages at readout value corresponding to the same first ratio within each predetermined temperature range to obtain a first relationship curve. This first relationship curve can characterize the relationship between the predetermined parameters of the transistor and the minimum operating voltage at readout value under that first ratio.

[0101] Further, for example, when the predetermined temperature range is 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature), a first relationship curve is obtained between the predetermined parameters of the transistor at high temperature and the first ratio corresponding to the minimum operating voltage (e.g., ...). Figure 14 and Figure 15 The blue curve shown), the first relationship curve between the predetermined parameters of the transistor at room temperature and the minimum operating voltage at readout, corresponding to the same first ratio (as shown in the blue curve), Figure 16 and Figure 17 The blue curve shown), the first relationship curve between the predetermined parameters of the transistor at low temperature and the minimum operating voltage at readout, corresponding to the same first ratio (as shown in the blue curve), Figure 18 and Figure 19(The blue curve shown). Among them, the first relationship curve, where the predetermined parameters of the 2M transistor at high temperature correspond to the same first ratio as the minimum operating voltage, satisfies the formula... and (like Figure 14 (The blue curve shown). The first relationship curve between the predetermined parameters of the 64M transistor at high temperature and the minimum operating voltage corresponds to the same first ratio, satisfies the formula. and (like Figure 15 (The blue curve shown). The first relationship curve, which corresponds to the predetermined parameters of a 2M transistor at room temperature and the minimum operating voltage, satisfies the formula... and (like Figure 16 (The blue curve shown). The first relationship curve, which corresponds to the predetermined parameters of the 64M transistor at room temperature and the minimum operating voltage, satisfies the formula... and (like Figure 17 (The blue curve shown). The first relationship curve between the predetermined parameters of the 2M transistor at low temperature and the minimum operating voltage corresponds to the same first ratio, satisfies the formula. and (like Figure 18 (The blue curve shown). The first relationship curve between the predetermined parameters of the 64M transistor at low temperature and the minimum operating voltage corresponds to the same first ratio, satisfies the formula. and (like Figure 19 (The blue curve shown).

[0102] In step S202, a fixed second ratio can be determined first, and then a second relationship curve can be obtained between the predetermined parameters of the transistor and the minimum write operating voltage under this second ratio for each predetermined temperature range. Specifically, since the magnitude of the second ratio is positively correlated with the yield of the static memory, the yield of the static memory can be determined first when determining the second ratio, and then the second ratio can be determined based on the yield. For example, it can be the second ratio corresponding to a yield of 90%. The yield represented by the second ratio corresponding to the second relationship curve can be the same as the yield represented by the first ratio corresponding to the first relationship curve. In one embodiment, the yield represented by the second ratio corresponding to the second relationship curve is greater than or equal to 90%.

[0103] When performing step S202, the predetermined temperature range can be at least two of the following: 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature). Within each predetermined temperature range, the minimum write operating voltage corresponding to the same second ratio for at least two predetermined parameters of the transistor is obtained, and a second relationship curve is fitted. This second relationship curve can be a linear fitting curve. To improve data accuracy, multiple predetermined parameters of the transistor corresponding to the same second ratio can be obtained, thereby increasing the accuracy of the second relationship curve. It should be noted that the transistor for obtaining the second relationship curve in step S202 is the same as the transistor in step S201; that is, each transistor requiring adjustment obtains a corresponding first relationship curve and a second relationship curve.

[0104] In one embodiment, the step of obtaining a second relationship curve between predetermined parameters of a transistor and the minimum write operating voltage corresponding to the same second ratio in each predetermined temperature range includes: in each predetermined temperature range, obtaining at least two different predetermined parameters of the transistor corresponding to the same minimum write operating voltage, wherein the second ratios corresponding to the minimum write operating voltages are all the same (e.g., all corresponding to a second ratio representing 90% yield), but each minimum write operating voltage corresponds to a different predetermined parameter of the transistor. Next, linear fitting is performed on all minimum write operating voltages corresponding to the same second ratio in each predetermined temperature range to obtain a second relationship curve, which can characterize the relationship between the predetermined parameters of the transistor and the minimum write operating voltage under the second ratio.

[0105] Further, for example, when the predetermined temperature range is 115℃~135℃ (i.e., high temperature), 20℃~40℃ (i.e., normal temperature), and -20℃~-50℃ (i.e., low temperature), a second relationship curve is obtained between the predetermined parameters of the transistor at high temperature and the second ratio corresponding to the minimum operating voltage (e.g., ...). Figure 14 and Figure 15 The red curve shown), and the second relationship curve (as shown in the image) between the predetermined parameters of the transistor at room temperature and the minimum write operating voltage, corresponding to the same second ratio. Figure 16 and Figure 17 The red curve shown), the second relationship curve between the predetermined parameters of the transistor at low temperature and the minimum write operating voltage corresponding to the same second ratio (as shown in the red curve), and the second relationship curve (as shown in the red curve). Figure 18 and Figure 19 (The red curve shown). Among them, the second relationship curve, where the predetermined parameters of the 2M transistor at high temperature correspond to the same second ratio as the minimum write operating voltage, satisfies the formula... and (like Figure 14(The red curve shown). The second relationship curve, which corresponds to the same second ratio between the predetermined parameters of the 64M transistor at high temperature and the minimum write operating voltage, satisfies the formula. and (like Figure 15 (The red curve shown). The second relationship curve, which corresponds to the same second ratio between the predetermined parameters of a 2M transistor at room temperature and the minimum write operating voltage, satisfies the formula. and (like Figure 16 (The red curve shown). The second relationship curve, which corresponds to the same second ratio between the predetermined parameters of the 64M transistor at room temperature and the minimum write operating voltage, satisfies the formula. and (like Figure 17 (The red curve shown). The second relationship curve, which corresponds to the same second ratio between the predetermined parameters of the 2M transistor at low temperature and the minimum write operating voltage, satisfies the formula. and (like Figure 18 (The red curve shown). The second relationship curve, which corresponds to the same second ratio between the predetermined parameters of the 64M transistor at low temperature and the minimum write operating voltage, satisfies the formula. and (like Figure 19 (The red curve shown).

[0106] Execute step S203, such as Figure 20 As shown in Figure 21, a coordinate axis is established with the minimum operating voltage as the vertical axis and the predetermined parameters as the horizontal axis. All the first and second relationship curves of the transistor requiring adjustment are placed within this coordinate axis, resulting in a graph showing the relationship between the transistor's predetermined parameters and the minimum operating voltage. Curves with negative slopes represent the first relationship curves, and curves with positive slopes represent the second relationship curves. First and second relationship curves of the same color correspond to the same predetermined temperature range. At this point, there is one intersection point between the first and second relationship curves corresponding to the same predetermined temperature range, and the three predetermined temperature ranges have three intersection points. Figure 20 and Figure 21 The black dot in the image), the area between the edge intersections of the three intersections (such as the black dot in the image), Figure 20 and Figure 21 The region within the two red dashed lines in the diagram can be defined as the parameter range where transistor performance is relatively good. The region outside the area between the edge intersections (such as...) Figure 20 and Figure 21The area represented by the dashed ellipse in the figure can be identified as the parameter range where transistor performance is poor. When adjusting the predetermined parameters of the transistor, adjustments can be made according to the relationship between the predetermined parameters and the minimum operating voltage. By adjusting the predetermined parameters of the transistor to a more optimal range, the minimum operating voltage of the static memory can be affected, thereby regulating the trend of the minimum operating voltage with temperature and improving the performance of the transistor.

[0107] In one implementation, Figure 22 A flowchart of a method for adjusting predetermined parameters of a transistor provided in another embodiment of this application is shown below. Figure 22 As shown, it includes the following steps:

[0108] Step S301: Obtain the intersection point of the first relationship curve and the second relationship curve within the same predetermined temperature range.

[0109] Step S302: Obtain the edge intersections among all intersections. The edge intersections are the intersections with the maximum and minimum predetermined parameters.

[0110] Step S303: Adjust the predetermined parameters of the transistor to be between the predetermined parameters of the edge intersection.

[0111] If there is an intersection point between the first relationship curve and the second relationship curve within the same predetermined temperature range, then within at least two predetermined temperature ranges, there must be at least two intersection points between at least two first relationship curves and at least two second relationship curves. When performing step S301, the intersection points of the first and second relationship curves within the same predetermined temperature range can be obtained first. For example, the intersection point 1 between the first and second relationship curves at high temperature can be obtained, the intersection point 2 between the first and second relationship curves at room temperature can be obtained, and the intersection point 3 between the first and second relationship curves at low temperature can be obtained.

[0112] Next, step S302 is executed to determine the edge intersections among all intersections. The edge intersections are the intersections with the maximum and minimum predetermined parameters, that is, the intersections with the maximum and minimum horizontal coordinates. The two edge intersections can be distributed to the left and right in the horizontal coordinate direction.

[0113] Next, step S303 is executed, in which the predetermined parameters are adjusted according to the predetermined parameter values ​​corresponding to the edge intersections, so that the predetermined parameters of the transistor are adjusted to be between or overlap with the predetermined parameters of the edge intersections, so that the predetermined parameters of the transistor are within a better parameter range, thereby adjusting the trend of the minimum operating voltage of the transistor with temperature, and improving the performance of the transistor.

[0114] In one embodiment, when adjusting predetermined parameters of multiple transistors, each transistor acquires a corresponding first relationship curve and a second relationship curve, and the predetermined parameters of the transistor are adjusted according to the first relationship curve and the second relationship curve corresponding to the transistor.

[0115] Specifically, for each transistor, a relationship diagram between the corresponding predetermined parameters and the minimum operating voltage can be generated. Then, adjustments can be made according to the relationship diagram or sequentially. This can improve the adjustment accuracy and avoid adjustment errors caused by data overlap.

[0116] Furthermore, after adjusting the threshold voltage of at least one transistor in the static memory, it can be determined again whether the minimum operating voltage for reading and writing of the static memory changes with temperature as required. When the minimum operating voltage for reading and writing of the static memory changes with temperature as required, it indicates that the minimum operating voltage of the static memory has been adjusted in place.

[0117] In summary, this application provides a method for adjusting the minimum operating voltage of a static memory (SMC), comprising: simulating and obtaining read static noise margins and write static noise margins of the SMC at at least two predetermined operating voltages within at least two predetermined temperature ranges, wherein at least two read static noise margins and write static noise margins are obtained for each predetermined operating voltage; obtaining a first ratio of the median to the standard deviation of the read static noise margin for each predetermined operating voltage within each predetermined temperature range, and obtaining a second ratio of the median to the standard deviation of the write static noise margin for each predetermined operating voltage within each predetermined temperature range; performing linear fitting on all the first ratios within each predetermined temperature range to obtain a first fitting line, and performing linear fitting on all the second ratios within each predetermined temperature range to obtain a second fitting line; determining whether the trends of the minimum read operating voltage and the minimum write operating voltage of the SMC with temperature meet the requirements based on all the first fitting lines and all the second fitting lines; and, if not, adjusting the threshold voltage of at least one transistor in the SMC to make the trends of the minimum read operating voltage and the minimum write operating voltage with temperature meet the requirements. This application, on the one hand, obtains the minimum operating voltage for reading and writing through fitting, which reduces testing time and data processing complexity, and can also accurately determine the changing trend of the minimum operating voltage for reading and writing with temperature. On the other hand, by adjusting the threshold voltage of the transistor, the trend of the minimum operating voltage of the static memory with temperature is adjusted, so that the trend of the minimum operating voltage with temperature changes conforms to the physical mechanism that the minimum operating voltage for reading increases and the minimum operating voltage for writing decreases as temperature increases, thereby enabling the static memory to achieve better performance. In addition, this application does not require the addition of auxiliary circuits to improve the temperature effect of the minimum operating voltage of the static memory, and does not increase the chip area.

[0118] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0119] It should also be noted that although preferred embodiments have been disclosed above, these embodiments are not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application, or modify them into equivalent embodiments, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application, without departing from the content of the technical solutions of this application, shall still fall within the scope of protection of the technical solutions of this application.

[0120] It should also be understood that, unless otherwise specified or indicated, the terms “first,” “second,” “third,” etc., in the specification are used only to distinguish the various components, elements, and steps in the specification, and not to indicate the logical or sequential relationships between the various components, elements, and steps.

[0121] Furthermore, it should be recognized that the terminology described herein is used only to describe predetermined embodiments and is not intended to limit the scope of this application. It must be noted that the singular forms “a” and “an” as used herein include plural bases unless the context clearly indicates the opposite. For example, a reference to “a step” or “an apparatus” means a reference to one or more steps or apparatuses, and may include secondary steps and secondary apparatuses. All conjunctions used should be understood in the broadest sense. Also, the word “or” should be understood as having the definition of logical “or”, not logical “exclusive OR”, unless the context clearly indicates the opposite. Furthermore, implementations of the methods and / or devices in the embodiments of this application may include performing selected tasks manually, automatically, or in combination.

Claims

1. A method for adjusting the minimum operating voltage of a static memory, characterized in that, include: At at least two predetermined temperature ranges, the static noise margins for reading and writing of the static memory at at least two predetermined operating voltages are simulated and obtained respectively. At least two static noise margins for reading and writing are obtained at each predetermined operating voltage. Obtain a first ratio of the median to the standard deviation of the read static noise tolerance for each predetermined operating voltage within each predetermined temperature range, and obtain a second ratio of the median to the standard deviation of the write static noise tolerance for each predetermined operating voltage within each predetermined temperature range; A first fitting line is obtained by linearly fitting all the first ratios under each predetermined temperature range, and a second fitting line is obtained by linearly fitting all the second ratios under each predetermined temperature range. Based on all the first fitted lines and all the second fitted lines, determine whether the trends of the minimum read operating voltage and minimum write operating voltage of the static memory with temperature meet the requirements; and... If not, adjust the threshold voltage of at least one transistor in the static memory so that the temperature variation trends of the minimum read operating voltage and the minimum write operating voltage meet the requirements; When the minimum operating voltage for reading increases with temperature and the minimum operating voltage for writing decreases with temperature, the trends of the minimum operating voltage for reading and the minimum operating voltage for writing with temperature meet the requirements.

2. The method for adjusting the minimum operating voltage of a static memory according to claim 1, characterized in that, The threshold voltage of the transistor is adjusted by adjusting predetermined parameters, including the flat-band voltage.

3. The method for adjusting the minimum operating voltage of a static memory according to claim 2, characterized in that, The step of adjusting the predetermined parameters of the transistor includes: Obtain a first relationship curve for each predetermined temperature range, where the predetermined parameter of the transistor corresponds to the same first ratio as the minimum operating voltage. Obtain a second relationship curve for each predetermined temperature range, showing the predetermined parameter of the transistor and the minimum write operating voltage corresponding to the same second ratio; and, The predetermined parameters of the transistor are adjusted according to all the first relationship curves and all the second relationship curves.

4. The method for adjusting the minimum operating voltage of a static memory according to claim 3, characterized in that, When adjusting the predetermined parameters of the plurality of transistors, each transistor acquires the corresponding first relationship curve and second relationship curve, and adjusts the predetermined parameters of the transistor according to the first relationship curve and second relationship curve corresponding to the transistor.

5. The method for adjusting the minimum operating voltage of a static memory according to claim 3, characterized in that, The step of adjusting the predetermined parameters of the transistor based on all the first relationship curves and all the second relationship curves includes: Obtain the intersection point of the first relationship curve and the second relationship curve within the same predetermined temperature range; Obtain the edge intersections from all the intersections, where the edge intersections are the intersections with the maximum and minimum predetermined parameters; and, The predetermined parameters of the transistor are adjusted to be between the predetermined parameters of the edge intersection.

6. The method for adjusting the minimum operating voltage of a static memory according to claim 3, characterized in that, The step of obtaining a first relationship curve between the predetermined parameters of the transistor and the minimum operating voltage corresponding to the same first ratio for each predetermined temperature range includes: Within each predetermined temperature range, the minimum operating voltage for reading is obtained, corresponding to at least two different predetermined parameters of the transistor and the same first ratio. The first relationship curve is obtained by linearly fitting all the minimum operating voltages for reading under the same first ratio within each predetermined temperature range. And / or, the step of obtaining a second relationship curve for the predetermined parameter of the transistor and the minimum write operating voltage corresponding to the same second ratio within each predetermined temperature range includes: Within each predetermined temperature range, the minimum write operating voltage corresponding to the same second ratio for at least two different predetermined parameters of the transistor is obtained; The second relationship curve is obtained by linearly fitting all the minimum write operating voltages corresponding to the same second ratio within each predetermined temperature range.

7. The method for adjusting the minimum operating voltage of the static memory according to any one of claims 3 to 6, characterized in that, The magnitudes of the first ratio and the second ratio are positively correlated with the yield of the static memory, and the yield represented by the first ratio corresponding to the first relationship curve is the same as the yield represented by the second ratio corresponding to the second relationship curve.

8. The method for adjusting the minimum operating voltage of the static memory according to any one of claims 3 to 6, characterized in that, The magnitudes of the first ratio and the second ratio are positively correlated with the yield of the static memory. The yield represented by the first ratio corresponding to the first relationship curve and the yield represented by the second ratio corresponding to the second relationship curve are both greater than or equal to 90%.

9. The method for adjusting the minimum operating voltage of a static memory according to claim 1, characterized in that, The predetermined temperature range is at least two of 115℃~135℃, 20℃~40℃, and -20℃~-50℃; and / or, the predetermined operating voltage is at least two of the rated operating voltage of the static memory, ±10% of the rated operating voltage of the static memory, and ±20% of the rated operating voltage of the static memory.

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