Light emitting diode, preparation method and display device
By forming an uneven patterned surface on the substrate of the vertical LED chip and using low-cost electrode materials, the problems of complex electrode design and high cost are solved, thereby improving electrode thrust and packaging yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- QUANZHOU SANAN SEMICON TECH CO LTD
- Filing Date
- 2025-12-15
- Publication Date
- 2026-04-24
AI Technical Summary
The electrode design of existing vertical LED chips is complex and costly. The Au electrode has high thickness requirements, which leads to unstable wire bonding push force and reduces product packaging yield.
By forming an uneven patterned surface on a substrate, a first electrode is formed on it using a low-cost electrode material. Combined with a multilayer electrode structure, the fabrication process is simplified and the adhesion effect is enhanced.
Without compromising electrical performance, it significantly reduces production costs, increases electrode wire bonding push value, and enhances the yield and luminous efficiency of packaged products.
Smart Images
Figure CN121924906A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a light-emitting diode, a method for its fabrication, and a display device. Background Technology
[0002] A light-emitting diode (LED) is a semiconductor solid-state light-emitting device that uses a semiconductor PN junction as the light-emitting material. It can directly convert electrical energy into light energy and has advantages such as high luminous intensity, high efficiency, small size, and long lifespan. It is widely used in indicator lights, displays, backlights, and lighting. With the development of science and the progress of society, many industries in the market have put forward higher requirements for the brightness, luminous efficiency, and other performance characteristics of LEDs.
[0003] Vertically structured LED chips, with their electrodes arranged vertically, offer superior luminous efficiency and heat dissipation compared to traditional horizontally structured LEDs. However, the design and manufacturing processes of conventional vertical LED chips are complex. Furthermore, traditional vertical LED chips utilize Au electrodes, which typically require a thickness of 1.5 μm or more, leading to high manufacturing costs. Additionally, the significant dispersion in Au electrode push-force testing makes wire bonding prone to issues, reducing product packaging yield. Therefore, further optimization of the electrode design for vertical LED chips is urgently needed in this field. Summary of the Invention
[0004] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a light-emitting diode, a preparation method and a display device, which can effectively increase the wire bonding force of the electrode, while reducing the manufacturing cost of the electrode, which helps to improve the product packaging yield and save production costs.
[0005] To achieve the above and other related objectives, in a first aspect, this application provides a light-emitting diode, comprising: A substrate having a front side and a back side disposed opposite to each other; A semiconductor stack, located on one side of the front side of the substrate, includes a first semiconductor layer, an active layer and a second semiconductor layer stacked sequentially. The first semiconductor layer is located between the active layer and the substrate, and the second semiconductor layer has a patterned surface with unevenness on the side away from the active layer. The first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
[0006] Secondly, this application provides a method for fabricating a light-emitting diode, comprising the following steps: Provides substrates and patterned substrates; A semiconductor stack and a first bonding layer are sequentially formed on the front side of the patterned substrate. The semiconductor stack includes a second semiconductor layer, an active layer, and a first semiconductor layer stacked sequentially. A second bonding layer is formed on the front side of the substrate; The first bonding layer is bonded to the second bonding layer; The patterned substrate is peeled off to expose the uneven patterned surface of the second semiconductor layer; A first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
[0007] Thirdly, this application provides a display device, including a circuit board and a plurality of light-emitting elements fixed on the circuit board, wherein the light-emitting elements include any of the light-emitting diodes described in this application.
[0008] As described above, compared with the prior art, the light-emitting diode, manufacturing method, and display device provided in this application have at least the following beneficial technical effects: The light-emitting diode of this application includes a substrate, a semiconductor stack, and a first electrode. The first electrode is directly formed on the uneven patterned surface of the second semiconductor layer. The portion of the first electrode that contacts the second semiconductor layer can be made using a low-cost electrode material. Compared with the traditional Au electrode, this can save production costs without reducing electrical performance. Furthermore, the uneven patterned surface of the second semiconductor layer can enhance the adhesion between the first electrode and the second semiconductor layer, thereby increasing the wire bonding push value and helping to improve the yield of packaged products.
[0009] The fabrication method of this application is used to fabricate the aforementioned light-emitting diode, and the display device includes the aforementioned light-emitting diode, thus also having the aforementioned beneficial effects. Furthermore, in the fabrication method, after stripping the patterned substrate, the first electrode is directly formed on the uneven patterned surface of the second semiconductor layer, eliminating the need to form a flat area on the surface of the second semiconductor layer as required in the prior art. This simplifies the semiconductor process, improves production efficiency, and further reduces production costs. Attached Figure Description
[0010] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0011] Figure 1 The diagram shown is a schematic diagram of the structure of a light-emitting diode provided in Embodiment 1 of this application.
[0012] Figure 2 The diagram shown is a schematic diagram of the structure of the first electrode in a light-emitting diode provided in Embodiment 1 of this application.
[0013] Figures 3(a) to (c) show top view schematic diagrams of three different first electrodes in the light-emitting diode provided in Embodiment 1 of this application.
[0014] Figure 4 The diagram shown is a flowchart illustrating a method for fabricating a light-emitting diode according to Embodiment 2 of this application.
[0015] Figures 5(a) and 5(b) show schematic diagrams of the structures of two different patterned substrates in the preparation method provided in Embodiment 2 of this application.
[0016] Figure 6 The diagram shown is a schematic diagram of the structure of the second bonding layer formed on the substrate in the preparation method provided in Embodiment 2 of this application.
[0017] Figure 7 The diagram shown is a schematic diagram of the semiconductor stack formed on a patterned substrate in the preparation method provided in Embodiment 2 of this application.
[0018] Figure 8 The diagram shown is a schematic diagram of the structure of the contact layer formed in the preparation method provided in Embodiment 2 of this application.
[0019] Figure 9 The diagram shown is a schematic diagram of the structure in which the first barrier layer is formed in the preparation method provided in Embodiment 2 of this application.
[0020] Figure 10 The diagram shown is a schematic diagram of the structure of the mirror layer formed in the preparation method provided in Embodiment 2 of this application.
[0021] Figure 11 The diagram shown is a schematic diagram of the structure of the current spreading layer formed in the preparation method provided in Embodiment 2 of this application.
[0022] Figure 12 The diagram shown is a schematic diagram of the structure in which the second barrier layer and the first bonding layer are formed in the preparation method provided in Embodiment 2 of this application.
[0023] Figure 13 The diagram shows a schematic of the epitaxial protrusion of the second semiconductor on the side away from the active layer after the patterned substrate is peeled off in the preparation method provided in Embodiment 2 of this application.
[0024] Figure 14 The diagram shows a schematic of the epitaxial trench structure in the fabrication method provided in Embodiment 2 of this application, in which the patterned substrate is peeled off to expose the side of the second semiconductor away from the active layer.
[0025] Figure 15 The diagram shown is a schematic diagram of the structure forming the isolation groove in the preparation method provided in Embodiment 2 of this application.
[0026] Figure 16 The diagram shown is a schematic diagram of the structure of the insulating protective layer formed in the preparation method provided in Embodiment 2 of this application.
[0027] Figure 17 The diagram shown is a graphical representation of the insulating protective layer in the preparation method provided in Embodiment 2 of this application.
[0028] Explanation of reference numerals in the attached figures: 100. Substrate; 21. Semiconductor stack; 201. Isolation trench; 211. First semiconductor layer; 212. Active layer; 213. Second semiconductor layer; 2131. Epitaxial bump; 2132. Epitaxial trench; 22. Contact layer; 23. First barrier layer; 24. Mirror layer; 25. Current spreading layer; 26. Second barrier layer; 27. Bonding layer; 271. First bonding layer; 272. Second bonding layer; 281. First electrode; 2801. Pad; 2802. Extension; 2811. First conductive layer; 2812. Intermediate film layer; 2813. Second conductive layer; 282. Second electrode; 29. Insulating protective layer; 300. Patterned substrate. Detailed Implementation
[0029] To make the technical objectives, technical solutions, and technical effects of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with embodiments. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0030] Therefore, the following detailed description of embodiments of this application is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0031] In the description of this application, it should be noted that the terms "one embodiment," "some embodiments," "optional embodiments," and "example," etc., refer to specific features, structures, materials, or characteristics described in conjunction with implementation methods or examples, which are included in at least one implementation method or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same implementation method or example. Furthermore, the specific features, structures, materials, or characteristics described can be combined in any suitable manner in one or more implementation methods or examples.
[0032] To address the technical problems existing in the background art, in a first aspect, this embodiment provides a light-emitting diode (LED), which includes: A substrate having a front side and a back side disposed opposite to each other; A semiconductor stack, located on one side of the front side of the substrate, includes a first semiconductor layer, an active layer and a second semiconductor layer stacked sequentially. The first semiconductor layer is located between the active layer and the substrate, and the second semiconductor layer has a patterned surface with unevenness on the side away from the active layer. The first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
[0033] In the light-emitting diode of this embodiment, the first electrode is formed on the uneven patterned surface of the second semiconductor layer. The part of the first electrode that contacts the second semiconductor layer can be made using a low-cost electrode material. Compared with the traditional Au electrode, it can save production costs without reducing electrical performance. Furthermore, the uneven patterned surface of the second semiconductor layer can increase the light extraction rate and enhance the adhesion between the first electrode and the second semiconductor layer, thereby increasing the electrode wire bonding push value and helping to improve the yield and luminous efficiency of the packaged product.
[0034] Optionally, the second semiconductor layer has a plurality of epitaxial protrusions arranged in an array on the side away from the active layer, so that the side of the second semiconductor layer away from the active layer forms an uneven patterned surface.
[0035] Optionally, when viewed from above along the thickness direction of the substrate, the distance between two adjacent epitaxial bumps does not exceed 1 μm. By controlling the distance between two adjacent epitaxial bumps, a denser periodic pattern can be formed on the surface of the second semiconductor layer, thereby improving the light extraction efficiency of the device.
[0036] Optionally, the epitaxial protrusion has a tapered profile, with a base diameter of 0.1 μm to 2 μm and a height of 0.1 μm to 3 μm. By controlling the size of the epitaxial protrusion, it is possible to prevent a decrease in the adhesion between the first electrode and the second semiconductor layer due to size limitations, thereby reducing the electrode thrust value or causing other adverse effects on the device.
[0037] Optionally, a plurality of epitaxial trenches are formed on the side of the second semiconductor layer away from the active layer, so that the side of the second semiconductor layer away from the active layer forms an uneven patterned surface.
[0038] Optionally, when viewed from above along the thickness direction of the substrate, the distance between two adjacent epitaxial trenches does not exceed 1 μm. By controlling the distance between two adjacent epitaxial trenches, a denser periodic pattern can be formed on the surface of the second semiconductor layer to improve the light extraction rate.
[0039] Optionally, the epitaxial trench has a tapered profile, with a bottom diameter of 0.1 μm to 2 μm and a depth of 0.1 μm to 3 μm. By controlling the size of the epitaxial trench, it is possible to prevent a decrease in the adhesion between the first electrode and the second semiconductor layer due to size limitations, thereby reducing the electrode thrust value or causing other adverse effects on the device.
[0040] Optionally, the thickness of the first electrode is 3μm to 4μm. By controlling the thickness of the first electrode, the material used can be reduced and production costs can be saved while ensuring that electrical performance requirements are met.
[0041] Optionally, the first electrode includes a first conductive layer, a second conductive layer, and an intermediate film layer. The first conductive layer is formed on the patterned surface of the second semiconductor layer, and the intermediate film layer is located between the first conductive layer and the second conductive layer. The first conductive layer, formed on the uneven patterned surface of the second semiconductor layer, can be made using low-cost electrode materials, significantly reducing production costs. The intermediate film layer is used to adhere the first and second conductive layers respectively, making the first electrode a single unit to improve structural stability. The inclusion of the second conductive layer facilitates wire bonding and ensures effective interconnection.
[0042] Optionally, the thickness of the first conductive layer is not less than 3 μm. By controlling the thickness of the first conductive layer, the ohmic contact effect between the first conductive layer and the second semiconductor layer is ensured, and the adhesion between the electrode and the patterned surface is improved. When the first conductive layer uses a low-cost electrode material, the production cost can also be significantly reduced.
[0043] Optionally, the thickness of the second conductive layer does not exceed 1 μm. By making the second conductive layer thinner, it is possible to save production costs while facilitating wire bonding.
[0044] Optionally, the first electrode includes a pad and an extension connected to the pad. The pad is mainly used for wire bonding in subsequent processes such as chip packaging, and the extension can improve the uniformity of the electric field distribution, which is beneficial for the uniform diffusion of current.
[0045] Optionally, the light-emitting diode also includes: The second electrode is formed on the back side of the substrate and is electrically connected to the first semiconductor layer; A bonding layer is located between the semiconductor stack and the substrate; An insulating protective layer is formed on the side of the second semiconductor layer away from the active layer and covers the exposed sidewalls of the semiconductor stack.
[0046] The second electrode is used to realize the electrical lead-out of the first semiconductor layer. The bonding layer has good adhesion, which can realize a firm and stable bond and improve the reliability of the light-emitting diode. The insulating protective layer is used to protect the light-emitting diode from damage caused by external moisture, impurities and other factors, thereby improving the reliability of the light-emitting diode.
[0047] Secondly, this embodiment provides a method for fabricating a light-emitting diode, comprising the following steps: Provides substrates and patterned substrates; A semiconductor stack and a first bonding layer are sequentially formed on the front side of the patterned substrate. The semiconductor stack includes a second semiconductor layer, an active layer, and a first semiconductor layer stacked sequentially. A second bonding layer is formed on the front side of the substrate; The first bonding layer is bonded to the second bonding layer; The patterned substrate is peeled off to expose the uneven patterned surface of the second semiconductor layer; A first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
[0048] In this preparation method, after stripping the patterned substrate, the first electrode is formed directly on the uneven patterned surface of the second semiconductor layer, which eliminates the need to form a flat area on the surface of the second semiconductor layer as in the prior art. This simplifies the semiconductor process, improves production efficiency, and further saves production costs.
[0049] Optionally, after stripping the patterned substrate, the following steps are further included: The semiconductor stack is etched to form isolation trenches; An insulating protective layer is formed on the side of the second semiconductor layer away from the active layer, and the insulating protective layer covers the exposed sidewalls of the semiconductor stack. The insulating protective layer is etched to expose a portion of the patterned surface of the second semiconductor layer.
[0050] Isolation trenches are used to separate adjacent chips, thus spacing the semiconductor stacks in adjacent chips apart. An insulating protective layer is used to protect the light-emitting diode. The pattern of the first electrode is formed by patterning the insulating protective layer.
[0051] Thirdly, this embodiment provides a display device, including a circuit board and a plurality of light-emitting elements fixed on the circuit board, wherein the light-emitting elements include any of the light-emitting diodes described above in this embodiment.
[0052] To provide a more detailed explanation of the solutions in this application, the following embodiments are provided. It should be noted that the technical features and solutions in the following embodiments can be combined with each other without conflict.
[0053] Example 1 This embodiment provides a light-emitting diode, as shown in the reference. Figure 1 The system includes a substrate 100, a semiconductor stack 21, and a first electrode 281. The substrate 100 has a front side and a back side disposed opposite to each other. The semiconductor stack 21 is located on the front side of the substrate 100. The semiconductor stack 21 includes a first semiconductor layer 211, an active layer 212, and a second semiconductor layer 213 stacked sequentially. The first semiconductor layer 211 is located between the active layer 212 and the substrate 100. The side of the second semiconductor layer 213 away from the active layer 212 has an uneven patterned surface. The first electrode 281 is formed on the patterned surface of the second semiconductor layer 213 away from the active layer 212.
[0054] The substrate 100 is used to transfer the multilayer structure grown on the substrate. The material of the substrate 100 may include one or more of GaAs, Ge, Si, Cu, Mo, CuW, MoCu, and other suitable materials. Optionally, the substrate 100 is a conductive substrate and is made of a conductive material.
[0055] In this embodiment, the semiconductor stack 21 can be any semiconductor epitaxial stack capable of radiating light under voltage. Preferably, the semiconductor stack 21 is an AlGaInP-based epitaxial structure. In this embodiment, the first semiconductor layer 211 can be an N-type layer, and correspondingly, the second semiconductor layer 213 can be a P-type layer, or vice versa. This embodiment uses a P-type first semiconductor layer 211 and an N-type second semiconductor layer 213 as an example.
[0056] In an optional embodiment, the first semiconductor layer 211 can be a P-type AlInP layer, providing holes by doping with P-type impurities. The P-type impurities can be one or more of Mg, Zn, Ca, Sr, C, Ba, and other suitable P-type impurities. The second semiconductor layer 213 can be an N-type AlInP layer, providing electrons by doping with n-type impurities. The n-type impurities can be, for example, Si, Ge, Sn, Se, Te, and one or more of other suitable N-type impurities. The active layer 212 is a multiple quantum well layer, for example, a multiple quantum well layer formed of AlGaInP / AlInP. The thicknesses of the well layer and the barrier layer can be the same or different, depending on actual needs.
[0057] In this embodiment, the light-emitting surface of the light-emitting diode is formed on the side of the second semiconductor layer 213 away from the active layer 212. The side of the second semiconductor layer 213 away from the active layer 212 has an uneven, patterned surface, which helps to increase the light extraction rate and improve the luminous efficiency of the light-emitting diode. The first electrode 281 is formed on the uneven, patterned surface of the second semiconductor layer 213, which can increase the adhesion between the first electrode 281 and the second semiconductor layer 213, helping to improve the electrode thrust value and improve the yield of the packaged product.
[0058] In this embodiment, refer to Figure 13 and Figure 14 Viewed from above along the thickness direction of the substrate 100, the second semiconductor layer 213 has several periodic patterns on the side away from the active layer 212. The several periodic patterns are arranged in an array and formed by epitaxial protrusions 2131 or epitaxial trenches 2132, so that the side of the second semiconductor layer 213 away from the active layer 212 forms an uneven patterned surface. The epitaxial protrusions 2131 are protrusion structures and the epitaxial trenches 2132 are groove structures.
[0059] In an optional embodiment, refer to Figure 13 On the side of the second semiconductor layer 213 away from the active layer 212, a plurality of epitaxial protrusions 2131 are formed in an array. That is, the periodic pattern on the surface of the second semiconductor layer 213 is formed by the epitaxial protrusions 2131, so that the side of the second semiconductor layer 213 away from the active layer 212 forms an uneven patterned surface. The epitaxial protrusions 2131 on the surface of the second semiconductor layer 213 can be formed by growing on a substrate patterned with a groove structure, or by growing on the surface of the second semiconductor layer 213, or by other suitable methods.
[0060] In an optional embodiment, when viewed from above along the thickness direction of the substrate 100, two adjacent epitaxial protrusions 2131 can be spaced apart, or they can be adjacent to each other or connected to each other. Preferably, the distance between two adjacent epitaxial protrusions 2131 does not exceed 1 μm, so that a relatively dense uneven patterned surface is formed on the side of the second semiconductor layer 213 away from the active layer 212 by a plurality of arrayed epitaxial protrusions 2131, so as to increase the light extraction rate and improve the luminous efficiency.
[0061] In an optional embodiment, the epitaxial protrusion 2131 has a tapered profile, with the bottom surface of the tapered profile contacting the surface of the second semiconductor layer 213. The diameter of the bottom surface of the tapered profile is 0.1 μm to 2 μm, specifically, for example, 0.5 μm, 1 μm, 1.5 μm, 2 μm, or other suitable dimensions. The height of the tapered profile is 0.1 μm to 3 μm, specifically, for example, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, or other suitable dimensions. By controlling the size of the epitaxial protrusion 2131, good light extraction efficiency of the device can be ensured, and a better adhesion effect can be achieved between the first electrode 281 and the second semiconductor layer 213, while preventing adverse effects on the device and subsequent processes.
[0062] In an optional embodiment, refer to Figure 14 On the side of the second semiconductor layer 213 away from the active layer 212, a plurality of epitaxial trenches 2132 are formed in an array. That is, the periodic pattern on the surface of the second semiconductor layer 213 is formed by the epitaxial trenches 2132, so that the side of the second semiconductor away from the active layer 212 forms an uneven patterned surface. The epitaxial trenches 2132 on the surface of the second semiconductor layer 213 can be formed by growing on a substrate patterned with a raised structure, or by etching on the surface of the second semiconductor layer 213, or by other suitable methods.
[0063] In an optional embodiment, when viewed from above along the thickness direction of the substrate 100, two adjacent epitaxial trenches 2132 can be spaced apart, or they can be adjacent to each other or connected to each other. Preferably, the distance between two adjacent epitaxial trenches 2132 does not exceed 1 μm, so that a relatively dense uneven patterned surface is formed on the side of the second semiconductor layer 213 away from the active layer 212 by a plurality of arrayed epitaxial trenches 2132, so as to increase the light extraction rate and improve the light extraction efficiency.
[0064] In an optional embodiment, the epitaxial trench 2132 has a tapered profile. The bottom surface of the tapered profile of the epitaxial trench 2132 is flush with the surface of the second semiconductor layer 213 away from the active layer 212, and its cone angle is located within the second semiconductor layer 213. The diameter of the bottom surface of the tapered profile of the epitaxial trench 2132 is 0.1μm to 2μm, specifically, it can be 0.5μm, 1μm, 1.5μm, 2μm or other suitable dimensions. The height of the tapered profile of the epitaxial trench 2132 is 0.1μm to 3μm, specifically, it can be 0.5μm, 1μm, 1.5μm, 2μm, 2.5μm, 3μm or other suitable dimensions. By controlling the epitaxial trench 2132 to have suitable dimensions, it is possible to ensure that the device has good light extraction efficiency and to achieve a better adhesion effect between the first electrode 281 and the second semiconductor layer 213, while preventing adverse effects on the device and subsequent processes.
[0065] In this embodiment, refer to Figure 2 The first electrode 281 includes a first conductive layer 2811, a second conductive layer 2813, and an intermediate film layer 2812. The first conductive layer 2811 is formed on the patterned surface of the second semiconductor layer 213 away from the active layer 212. The intermediate film layer 2812 is located between the first conductive layer 2811 and the second conductive layer 2813, and is used to adhere the first conductive layer 2811 and the second conductive layer 2813, thereby improving structural stability. The first conductive layer 2811 and the second conductive layer 2813 can be made of the same material or different materials. Preferably, the first conductive layer 2811 and the second conductive layer 2813 are made of different materials. The first conductive layer 2811 is used to reduce costs, and the second conductive layer 2813 is used to facilitate subsequent wire bonding operations.
[0066] In this embodiment, the thickness of the first electrode 281 is 3μm to 4μm, specifically, it can be 3μm, 3.2μm, 3.5μm, 3.8μm, 4μm, or other suitable dimensions. By controlling the thickness of the first electrode 281 to be suitable, the use of materials is reduced and production costs are saved while ensuring that electrical performance requirements are met.
[0067] In an optional embodiment, the material of the first conductive layer 2811 includes a conductive material. Preferably, the material of the first conductive layer 2811 is Al. An ohmic contact is formed between the first conductive layer 2811 and the second semiconductor layer 213. The thickness of the first conductive layer 2811 is not less than 3 μm, specifically, it can be 3 μm, 3.2 μm, 3.4 μm, 3.6 μm or other suitable dimensions. Compared with the Au electrode in conventional technology, the use of a low-cost electrode material to form a thicker first conductive layer 2811 can significantly reduce production costs, ensure the ohmic contact effect between the first conductive layer 2811 and the second semiconductor layer 213, improve the adhesion between the electrode and the patterned surface, and further enhance the light extraction efficiency of the light-emitting diode by using a high-reflectivity metal material such as Al.
[0068] In an optional embodiment, the intermediate film layer 2812 is made of a conductive material. Preferably, the material of the intermediate film layer 2812 includes one or more of Ti, Pt, Ni, Cr, and other suitable conductive adhesion metal materials. Using a conductive adhesion metal material to form the intermediate film layer 2812 can achieve a better adhesion effect between the intermediate film layer 2811 and the second conductive layer 2813, thereby improving structural stability.
[0069] In an optional embodiment, the material of the second conductive layer 2813 includes a conductive material. Preferably, the material of the second conductive layer 2813 can be Au, and the thickness of the second conductive layer 2813 is no greater than 1 μm, specifically, it can be 1 μm, 0.8 μm, 0.5 μm, or other suitable dimensions. Using a material with good conductivity and solderability to form a thinner second conductive layer 2813 can reduce production costs while facilitating subsequent wire bonding processes. Furthermore, the material of the second conductive layer 2813 can also be Cu, which can further reduce production costs.
[0070] In the prior art, when the surface of the second semiconductor layer 213 away from the active layer 212 is a flat surface or a roughened semiconductor surface, an electrode layer can be directly formed on its surface. However, when a semiconductor stack 21 is grown using a patterned substrate 300, to prevent adverse effects on subsequent wiring and bonding processes, it is usually necessary to planarize a portion of the uneven surface of the second semiconductor layer 213 away from the active layer 212 before forming an electrode layer in the flat area. In this embodiment, by controlling the periodic size and structural size of the periodic pattern on the surface of the second semiconductor layer 213, and utilizing the multilayer structure of the first electrode 281, adverse effects on subsequent wiring and bonding processes can be effectively prevented. Simultaneously, the adhesion between the first electrode 281 and the second semiconductor layer 213 can be enhanced, and production costs can be saved.
[0071] Through experimental testing of the light-emitting diodes of this embodiment, the results show that compared with the Au electrodes of the same size in the prior art, using the solution of this embodiment can increase the electrode thrust value of the first electrode 281 from about 62 N to about 70 N to about 82 N to about 94 N without reducing the electrical performance. That is, using the solution of this embodiment can increase the electrode thrust value by more than 30%.
[0072] In an alternative embodiment, referring to FIGS. 3(a) to 3(c), the first electrode 281 includes a pad 2801 and an extension 2802 connected to the pad 2801. The extension 2802 extends from the pad 2801 to other areas of the light-emitting surface to improve the current diffusion effect and uniformity on the side of the second semiconductor layer 213. Further, when viewed from above in the thickness direction of the substrate 100, the extension 2802 may include a first extension 2802 having a mouth-shaped structure and a plurality of second extensions 2802 having a strip-shaped structure. The combination manner of the first extension 2802 and the second extensions 2802 may be set according to actual needs. For example, they may form a structure such as a mu-shaped structure, a rectangle-shaped structure or other suitable structures. This embodiment is not limited thereto.
[0073] In this embodiment, referring to Figure 1 , the light-emitting diode further includes a second electrode 282. The second electrode 282 is formed on the back surface of the substrate 100 and is electrically connected to the first semiconductor layer 211 to realize the electrical lead-out of the light-emitting diode. The material of the second electrode 282 may include one or more of Au or other suitable materials.
[0074] In this embodiment, the light-emitting diode may further include a contact layer 22. The contact layer 22 is formed on the side of the first semiconductor layer 211 away from the active layer 212 and covers the surface of the first semiconductor layer 211. The material of the contact layer 22 may be a transparent conductive material, including but not limited to indium tin oxide (ITO), IZO, and one or more of other suitable materials. The contact layer 22 may be a single-layer structure, or may also be a multi-layer structure formed by combining multiple materials. The contact layer 22 can reduce the resistance, make the current evenly distributed throughout the first semiconductor layer 211, and prevent aggregation near the electrode.
[0075] In this embodiment, the light-emitting diode may further include a first barrier layer 23. The first barrier layer 23 is formed on the side of the contact layer 22 away from the first semiconductor layer 211, covering a portion of the surface of the contact layer 22. Viewed from above along the thickness direction of the substrate 100, the projection area of the first electrode 281 is located within the projection area of the first barrier layer 23, which can prevent current congestion effect below the first electrode 281 and improve the current diffusion effect. The material of the first barrier layer 23 is a transparent insulating material with good light transmittance. Optionally, the material of the first barrier layer 23 includes one or more of MgF2, SiO2, Al2O3, TiO2, Si3N4, or other suitable materials. Specifically, the material of the first barrier layer 23 may be, for example, SiO2.
[0076] In this embodiment, the light-emitting diode also includes an isolation trench 201, which is used to separate the semiconductor stack 21 between adjacent chips. When viewed from above along the thickness direction of the substrate 100, the projection area of the isolation trench 201 is located within the projection area of the first barrier layer 23. The isolation trench 201 penetrates the semiconductor stack 21 and the contact layer 22 and stays on the surface of the first barrier layer 23. The first barrier layer 23 can play a blocking role when etching to form the isolation trench 201.
[0077] In this embodiment, the light-emitting diode may further include a reflective mirror layer 24. The reflective mirror layer 24 is formed on the side of the contact layer 22 away from the first semiconductor layer 211 and covers part of the contact layer 22 and part of the first barrier layer 23. Optionally, when viewed from above along the thickness direction of the substrate 100, the projection area of the reflective mirror layer 24 does not overlap with the projection area of the isolation trench 201, which can effectively reduce or prevent the occurrence of scratches or cracks in the reflective mirror layer. The material of the reflective mirror layer 24 is preferably a highly reflective metal material such as Ag or Al. The reflective mirror layer 24 can form a mirror reflection, reflecting the light radiated by the semiconductor stack 21, and can also form a total internal reflection structure with the first barrier layer 23, further enhancing the light reflection effect and improving the light extraction efficiency of the light-emitting diode.
[0078] In this embodiment, the light-emitting diode may further include a current spreading layer 25, which is formed on the surface of the reflector layer 24, completely covering the sidewalls of the reflector layer 24 and the surface away from the contact layer 22. This current spreading layer 25 enhances current diffusion, improves the uniformity of current distribution, and protects the metal film layer of the reflector layer 24. The material of the current spreading layer 25 is one or more of the following metals: Ti, Pt, Au, Cr, TiW, etc.
[0079] In this embodiment, the light-emitting diode may further include a second barrier layer 26, which is formed on the surface of the current spreading layer 25 to prevent the bonding layer 27 from undergoing eutectic alloying with the current spreading layer 25. The material of the second barrier layer 26 may be one or more of TiW, Pt, Ti, and other suitable materials. The second barrier layer 26 may be a single-layer structure or a multilayer structure formed by combining multiple materials.
[0080] In this embodiment, the light-emitting diode may further include a bonding layer 27, which is located between the second barrier layer 26 and the substrate 100, and is connected to both the second barrier layer 26 and the substrate 100, thereby enabling the stacked structure to be firmly and stably bonded to the substrate 100 and improving the reliability of the light-emitting diode. The material of the bonding layer 27 may be at least one of Au, Sn, AuSn, NiSn and their alloys, and one or more other suitable materials.
[0081] In this embodiment, the light-emitting diode may further include an insulating protective layer 29. The insulating protective layer 29 is formed on the side of the second semiconductor layer 213 away from the active layer 212 and covers the exposed sidewalls of the semiconductor stack 21. It is used to protect the light-emitting diode from damage caused by external moisture, impurities and other factors, and improve the reliability of the light-emitting diode. The material of the insulating protective layer 29 may be one or a combination of SiO2, Si3N4, Al2O3, TiO2, ZnO and other suitable materials.
[0082] Example 2 This embodiment provides a method for fabricating a light-emitting diode (LED), used to fabricate any type of LED described in this application, referring to... Figure 4 The preparation method includes steps S1 to S6, specifically including the following steps: S1. Provide a substrate 100 and a patterned substrate 300; S2. A semiconductor stack 21 and a first bonding layer 271 are sequentially formed on the front side of the patterned substrate 300. The semiconductor stack 21 includes a second semiconductor layer 213, an active layer 212 and a first semiconductor layer 211 stacked sequentially. S3. A second bonding layer 272 is formed on the front side of the substrate 100; S4. Bond the first bonding layer 271 to the second bonding layer 272; S5. Strip the patterned substrate 300 to expose the uneven patterned surface of the second semiconductor layer 213; S6. A first electrode 281 is formed on the patterned surface of the second semiconductor layer 213 on the side away from the active layer 212.
[0083] This fabrication method is used to fabricate any of the light-emitting diodes described in this application, and therefore also has the beneficial effects of Embodiment 1. Furthermore, after stripping the patterned substrate 300, this fabrication method can directly form the first electrode 281 on the uneven patterned surface of the second semiconductor layer 213, eliminating the need to form a flat region on the surface of the second semiconductor layer 213 before forming the first electrode 281, as is required in the prior art. This simplifies the semiconductor process, improves production efficiency, and further reduces production costs.
[0084] In step S1, refer to Figures 5(a), 5(b) and... Figure 6 The substrate 100 can be a conductive substrate. The patterned substrate 300 has a front side and a back side that are disposed opposite to each other. The front side of the patterned substrate 300 has an array of patterned structures. The patterned structure can be a groove structure or a protrusion structure. The patterned substrate 300 can be a patterned silicon carbide substrate, a sapphire substrate, a silicon substrate or a substrate made of other suitable materials. Preferably, this embodiment uses a patterned sapphire substrate.
[0085] In step S2, refer to Figure 7 A second semiconductor layer 213, an active layer 212, and a first semiconductor layer 211 can be sequentially formed on the front side of the patterned substrate 300 using chemical vapor deposition or other suitable processes to grow and form a semiconductor stack 21.
[0086] In an optional embodiment, refer to Figures 8 to 12 The light-emitting diode further includes a contact layer 22, a first barrier layer 23, a reflector layer 24, a current spreading layer 25, and a second barrier layer 26. Before forming the first bonding layer 271 in step S2, the following steps are included: sequentially forming the contact layer 22, the first barrier layer 23, the reflector layer 24, the current spreading layer 25, and the second barrier layer 26 on the side of the first semiconductor away from the active layer 212. The first bonding layer 271 is formed on the surface of the second barrier layer 26. The material of the first bonding layer 271 can be at least one of Au, Sn, AuSn, NiSn and their alloys, and one or more other suitable materials.
[0087] Among them, reference Figure 9 In the step of forming the first barrier layer 23, after the first barrier layer 23 is formed on the surface of the contact layer 22, the first barrier layer 23 can be patterned to make the first barrier layer 23 cover a portion of the surface of the contact layer 22; refer to Figure 10 In the step of forming the mirror layer 24, the mirror layer 24 is formed on the surface of the contact layer 22, and the mirror layer 24 covers a portion of the surface of the contact layer 22 and a portion of the surface of the first barrier layer 23; see reference Figure 11In the step of forming the current spreading layer 25, the current spreading layer 25 is formed on the surface of the mirror layer 24, and the current spreading layer 25 covers the sidewall of the mirror layer 24 and the surface away from the contact layer 22.
[0088] In step S3, refer to Figure 6 The second bonding layer 272 can be made of the same material as the first bonding layer 271. The second bonding layer 272 is used to bond with the first bonding layer 271 to transfer the stacked structure formed on the patterned substrate 300 to the substrate 100. The specific materials and dimensions of the first bonding layer 271 and the second bonding layer 272 can be set according to actual needs.
[0089] In step S4, refer to Figure 13 and Figure 14 A bonding process can be used to bond the first bonding layer 271 to the second bonding layer 272, so that the two are eutectic bonded, thereby transferring the stacked structure on the patterned substrate 300 to the substrate 100. Among them, the first bonding layer 271 and the second bonding layer 272 are bonded together to form a bonding layer 27.
[0090] In step S5, laser lift-off (LLO) or other suitable processes can be used to peel off the patterned substrate 300, exposing the uneven patterned surface of the second semiconductor layer 213, one layer away from the active layer 212. The patterned surface of the second semiconductor layer 213 is complementary to the patterned structure of the patterned substrate 300 surface. Specifically, refer to... Figure 13 When the periodic patterned structure of the patterned substrate 300 is a groove structure, the patterned surface of the second semiconductor layer 213 is formed by a plurality of epitaxial protrusions 2131 arranged in an array, referring to... Figure 14 When the patterned structure of the patterned substrate 300 is a raised structure, the patterned surface of the second semiconductor is formed by a plurality of epitaxial trenches 2132 arranged in an array.
[0091] In an optional embodiment, refer to Figure 15 After performing step S5 to remove the patterned substrate 300, the process further includes the following step: etching the semiconductor stack 21 to form an isolation trench 201. The isolation trench 201 separates the semiconductor stacks 21 between adjacent chips, achieving electrical insulation between different semiconductor stacks 21 in adjacent chips. Optionally, the light-emitting diode also includes a contact layer 22 and a first barrier layer 23. In the step of etching the semiconductor stack 21, the semiconductor stack 21 is patterned and etched to form the isolation trench 201, wherein the isolation trench 201 penetrates the semiconductor stack 21 and the contact layer 22, and exposes the first barrier layer 23.
[0092] In an optional embodiment, refer to Figure 16After performing step S5 to remove the patterned substrate 300, the process further includes the following steps: forming an insulating protective layer 29 on the side of the second semiconductor layer 213 away from the active layer 212, and covering the exposed sidewalls of the semiconductor stack 21 with the insulating protective layer 29. Further, the insulating protective layer 29 covers the surface of the second semiconductor layer 213 away from the active layer 212, as well as the sidewalls and bottom surface of the isolation trench 201.
[0093] In an optional embodiment, refer to Figure 17 After performing step S5 to remove the patterned substrate 300, the process further includes the following step: patterning the insulating protective layer 29 to expose a portion of the patterned surface of the second semiconductor layer 213 for subsequent formation of the first electrode 281. The insulating protective layer 29 can be patterned and etched using a self-aligned process to form the pattern of the first electrode 281.
[0094] In an optional embodiment, the light-emitting diode further includes a second electrode 282. After performing step S5 to peel off the patterned substrate 300, the step further includes forming the second electrode 282 on the side of the substrate 100 away from the bonding layer 27. The material of the second electrode 282 can be Au or one or more other suitable materials. Further, a back gold layer can be formed on the back side of the substrate 100 as the second electrode 282.
[0095] In step S6, refer to Figure 1 The first electrode 281 can be formed on the patterned surface of the second semiconductor layer 213 using a vapor deposition process or other suitable process. The first electrode 281 can be a multilayer structure, including a first conductive layer 2811, a second conductive layer 2813 and an intermediate film layer 2812. Performing step S6 to form the first electrode 281 may include the following steps: sequentially forming the first conductive layer 2811, the intermediate film layer 2812 and the second conductive layer 2813 on the side of the second semiconductor layer 213 away from the active layer 212.
[0096] In an optional embodiment, in the step of forming the first conductive layer 2811, the material of the first conductive layer 2811 is preferably Al, and the thickness of the first conductive layer 2811 is not less than 3μm, which helps to reduce production costs and improve the light extraction efficiency of the light-emitting diode; and to form an ohmic contact between the first conductive layer 2811 and the second semiconductor layer 213 to improve the electrical performance of the device.
[0097] In an optional embodiment, in the step of forming the intermediate film layer 2812, the material of the intermediate film layer 2812 is preferably one or a combination of conductive adhesion metal materials such as Ti, Pt, Ni, and Cr.
[0098] In an optional embodiment, in the step of forming the second conductive layer 2813, the material of the second conductive layer 2813 is preferably Au, and the thickness of the second conductive layer 2813 is not greater than 1 μm, so as to facilitate the subsequent wire bonding process and reduce production costs; the material of the second conductive layer 2813 can also be Cu, which can further reduce production costs.
[0099] In an optional embodiment, the thickness of the first electrode 281 is 3μm to 4μm, which can ensure that the electrical performance requirements are met while reducing the amount of material used, thereby saving production costs.
[0100] Since the side of the second semiconductor layer 213 away from the active layer 212 has an uneven patterned surface, and the first electrode 281 also has an uneven patterned surface, by controlling the structural size and period of the periodic pattern on the surface of the second semiconductor layer 213, and by utilizing the multi-layer structure of the first electrode 281, it is possible to effectively prevent adverse effects on subsequent wiring and soldering processes, while enhancing the adhesion between the first electrode 281 and the second semiconductor layer 213, improving the light extraction efficiency of the light-emitting diode, and reducing the production cost of the device.
[0101] Example 3 This embodiment provides a display device, including a circuit board and one or more light-emitting elements fixed on the circuit board. The light-emitting elements include any one of the light-emitting diodes in Embodiment 1 or Embodiment 2, and also have the above-mentioned technical effects.
[0102] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify, alter, or combine the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.
Claims
1. A light-emitting diode, characterized in that, include: A substrate having a front side and a back side disposed opposite to each other; A semiconductor stack, located on one side of the front side of the substrate, includes a first semiconductor layer, an active layer and a second semiconductor layer stacked sequentially. The first semiconductor layer is located between the active layer and the substrate, and the second semiconductor layer has a patterned surface with unevenness on the side away from the active layer. The first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
2. The light-emitting diode according to claim 1, characterized in that, The second semiconductor layer has a plurality of epitaxial protrusions arranged in an array on the side away from the active layer, so that the side of the second semiconductor layer away from the active layer forms an uneven patterned surface.
3. The light-emitting diode according to claim 2, characterized in that, Viewed from above along the thickness direction of the substrate, the distance between two adjacent epitaxial protrusions does not exceed 1 μm.
4. The light-emitting diode according to claim 2, characterized in that, The extended protrusion has a tapered profile, with a bottom diameter of 0.1μm to 2μm and a height of 0.1μm to 3μm.
5. The light-emitting diode according to claim 1, characterized in that, The second semiconductor layer has a plurality of epitaxial trenches arranged in an array on the side away from the active layer, so that the side of the second semiconductor layer away from the active layer forms an uneven patterned surface.
6. The light-emitting diode according to claim 5, characterized in that, Viewed from above along the thickness direction of the substrate, the distance between two adjacent epitaxial trenches does not exceed 1 μm.
7. The light-emitting diode according to claim 5, characterized in that, The epitaxial groove has a tapered profile, with a bottom diameter of 0.1μm to 2μm and a depth of 0.1μm to 3μm.
8. The light-emitting diode according to claim 1, characterized in that, The thickness of the first electrode is 3μm~4μm.
9. The light-emitting diode according to claim 1, characterized in that, The first electrode includes a first conductive layer, a second conductive layer, and an intermediate film layer. The first conductive layer is formed on the patterned surface of the second semiconductor layer, and the intermediate film layer is located between the first conductive layer and the second conductive layer.
10. The light-emitting diode according to claim 9, characterized in that, The thickness of the first conductive layer is not less than 3 μm.
11. The light-emitting diode according to claim 9, characterized in that, The thickness of the second conductive layer does not exceed 1 μm.
12. The light-emitting diode according to claim 1, characterized in that, The first electrode includes a pad and an extension connected to the pad.
13. The light-emitting diode according to claim 1, characterized in that, Also includes: The second electrode is formed on the back side of the substrate and is electrically connected to the first semiconductor layer; A bonding layer is located between the semiconductor stack and the substrate; An insulating protective layer is formed on the side of the second semiconductor layer away from the active layer and covers the exposed sidewalls of the semiconductor stack.
14. A method for fabricating a light-emitting diode, characterized in that, Includes the following steps: Provides substrates and patterned substrates; A semiconductor stack and a first bonding layer are sequentially formed on the front side of the patterned substrate. The semiconductor stack includes a second semiconductor layer, an active layer, and a first semiconductor layer stacked sequentially. A second bonding layer is formed on the front side of the substrate; The first bonding layer is bonded to the second bonding layer; The patterned substrate is peeled off to expose the uneven patterned surface of the second semiconductor layer; A first electrode is formed on the patterned surface of the second semiconductor layer on the side away from the active layer.
15. The method for fabricating a light-emitting diode according to claim 14, characterized in that, After stripping the patterned substrate, the following steps are also included: The semiconductor stack is etched to form isolation trenches; An insulating protective layer is formed on the side of the second semiconductor layer away from the active layer, and the insulating protective layer covers the exposed sidewalls of the semiconductor stack. The insulating protective layer is etched to expose a portion of the patterned surface of the second semiconductor layer.
16. A display device, characterized in that, It includes a circuit board and a plurality of light-emitting elements fixed on the circuit board, wherein the light-emitting elements include light-emitting diodes as described in any one of claims 1 to 13.