Display substrate and display device

Abstract

A display substrate and a display device, comprising a color film substrate (001), the color film substrate (001) comprising a first common electrode (104); the array substrate (002) is arranged opposite to the color film substrate (001), the array substrate (002) comprises a substrate (201), a second common electrode (202) and a pixel electrode (203), the second common electrode (202) is located on the side, facing the color film substrate (001), of the substrate (201), the pixel electrode (203) is located on the side, away from the substrate (201), of the layer where the second common electrode (202) is located, the pixel electrode (203) comprises a plurality of domain areas, the pixel electrode (203) is provided with first slits in the domain areas, and the first slits are located in the domain areas. And the orthographic projection of the first slit on the substrate (201) and the orthographic projection of the second common electrode (202) on the substrate (201) are mutually overlapped.

Description

Display substrate and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] Thin Film Transistor Liquid Crystal Displays (TFT-LCDs) feature compact size, low power consumption, high image quality, zero radiation, and portability. They have experienced rapid development in recent years, gradually replacing traditional cathode ray tube (CRT) displays and dominating the current flat-panel display market. Currently, TFT-LCDs are widely used in a variety of large, medium, and small-sized products, encompassing nearly every major electronic product in today's information society, including LCD TVs, high-definition digital TVs, computers (desktop and laptop), mobile phones, tablets, navigation systems, in-car displays, projection displays, camcorders, digital cameras, electronic watches, calculators, electronic instruments, meters, public displays, and virtual displays.

[0003] Summary of the Invention

[0004] The display substrate and display device provided by the present disclosure are specifically described as follows:

[0005] In one aspect, an embodiment of the present disclosure provides a display substrate, comprising:

[0006] A color filter substrate, wherein the color filter substrate comprises a first common electrode;

[0007] An array substrate is arranged opposite to the color filter substrate, and includes a base substrate, a second common electrode located on a side of the base substrate facing the color filter substrate, and a pixel electrode located on a layer where the second common electrode is located and away from the base substrate, wherein the pixel electrode includes a plurality of domains, and the pixel electrode is provided with a first slit in the domain, and the orthographic projection of the first slit on the base substrate overlaps with the orthographic projection of the second common electrode on the base substrate.

[0008] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the array substrate further includes a plurality of gate lines extending along the first direction and arranged along the second direction;

[0009] The pixel electrode includes a plurality of pixel electrode groups, and the same pixel electrode group includes a first pixel electrode and a second pixel electrode located on both sides of the gate line; wherein,

[0010] The first pixel electrode includes a first domain area, a second domain area, a third domain area and a fourth domain area, the second domain area is located between the first domain area and the gate line, and the fourth domain area is located between the third domain area and the gate line;

[0011] The second pixel electrode includes a fifth domain region, a sixth domain region, a seventh domain region and an eighth domain region. The fifth domain region is located between the sixth domain region and the gate line, and the seventh domain region is located between the eighth domain region and the gate line.

[0012] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the first slit widths in the first domain region, the second domain region, the third domain region, the fourth domain region, the fifth domain region, the sixth domain region, the seventh domain region, and the eighth domain region are substantially the same.

[0013] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the first slit widths in the first domain area, the third domain area, the fifth domain area, and the seventh domain area are approximately the same, the first slit widths in the second domain area, the fourth domain area, the sixth domain area, and the eighth domain area are approximately the same, and the first slit width in the first domain area is different from the first slit width in the second domain area.

[0014] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the first slit width of the first domain area is greater than the first slit width of the second domain area.

[0015] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the first slit width of the first domain area is smaller than the first slit width of the second domain area.

[0016] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the base substrate includes sub-pixel areas of different colors arranged in an array, the first pixel electrode and the second pixel electrode are located in the sub-pixel areas, and the structures of the first pixel electrodes of at least some of the sub-pixel areas of different colors are the same, and the structures of the second pixel electrodes of at least some of the sub-pixel areas of different colors are the same.

[0017] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the sub-pixel area includes a red sub-pixel area and a green sub-pixel area, and the structures of the first pixel electrodes of the red sub-pixel area and the green sub-pixel area are the same, and the structures of the second pixel electrodes of the red sub-pixel area and the green sub-pixel area are the same.

[0018] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the sub-pixel area also includes a blue sub-pixel area, the structure of the first pixel electrode in the blue sub-pixel area is the same as the structure of the first pixel electrode in the red sub-pixel area, and the structure of the second pixel electrode in the blue sub-pixel area is the same as the structure of the second pixel electrode in the red sub-pixel area.

[0019] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the sub-pixel area also includes a blue sub-pixel area, the structure of the first pixel electrode in the blue sub-pixel area is different from the structure of the first pixel electrode in the red sub-pixel area, and the structure of the second pixel electrode in the blue sub-pixel area is different from the structure of the second pixel electrode in the red sub-pixel area.

[0020] In some embodiments, in the display substrate provided by the embodiments of the present disclosure, in the red sub-pixel region and the green sub-pixel region: the first slit widths of the first domain region, the third domain region, the fifth domain region, and the seventh domain region are smaller than the first slit widths of the second domain region, the fourth domain region, the sixth domain region, and the eighth domain region;

[0021] In the blue sub-pixel area: the first slit widths of the first domain area, the third domain area, the fifth domain area, and the seventh domain area are greater than the first slit widths of the second domain area, the fourth domain area, the sixth domain area, and the eighth domain area.

[0022] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the second common electrode is a block electrode in the domain area.

[0023] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the second common electrode includes a second slit located in the domain area, and the orthographic projection of the second slit on the base substrate is staggered with the orthographic projection of the first slit on the base substrate.

[0024] In some embodiments, in the display substrate provided by the embodiments of the present disclosure, the pixel electrode includes strip electrodes alternately arranged with the first slits in the domain area;

[0025] The orthographic projection of the second slit on the base substrate substantially coincides with the orthographic projection of the strip electrode on the base substrate.

[0026] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, the array substrate further includes a pixel circuit, and the pixel circuit is coupled to the pixel electrode group;

[0027] The second common electrode includes a hollow structure between the first pixel electrode and the second pixel electrode, and the orthographic projection of the pixel circuit on the base substrate is located within the orthographic projection of the hollow structure on the base substrate.

[0028] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the array substrate further includes a transfer electrode arranged on the same layer as the second common electrode, the transfer electrode couples the pixel electrode and the pixel circuit, and the orthographic projection of the transfer electrode on the base substrate is located within the orthographic projection of the hollow structure on the base substrate.

[0029] On the other hand, an embodiment of the present disclosure provides a display device, including the above-mentioned display substrate provided by an embodiment of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIG1 is a schematic structural diagram of a display substrate provided by an embodiment of the present disclosure;

[0031] FIG2 is a schematic structural diagram of an array substrate provided in an embodiment of the present disclosure;

[0032] FIG3 is a schematic structural diagram of a layer where pixel electrodes are located in the array substrate shown in FIG2 ;

[0033] FIG4 is a schematic structural diagram of a layer where via holes are located in an array substrate provided by an embodiment of the present disclosure;

[0034] FIG5 is a schematic structural diagram of a layer where the second common electrode is located in the array substrate shown in FIG2 ;

[0035] FIG6 is a schematic structural diagram of a layer where data lines are located in an array substrate provided by an embodiment of the present disclosure;

[0036] FIG7 is a schematic structural diagram of an active layer in an array substrate provided by an embodiment of the present disclosure;

[0037] FIG8 is a schematic structural diagram of a layer where gate lines are located in an array substrate provided by an embodiment of the present disclosure;

[0038] FIG9 is a gamma curve diagram provided by an embodiment of the present disclosure;

[0039] FIG10 is a transmittance comparison diagram provided by an embodiment of the present disclosure;

[0040] FIG11 is a schematic diagram of another structure of an array substrate provided in an embodiment of the present disclosure;

[0041] FIG12 is a schematic structural diagram of a layer where the second common electrode is located in the array substrate shown in FIG11 ;

[0042] FIG13 is a schematic structural diagram of a layer where pixel electrodes are located in the array substrate shown in FIG11 ;

[0043] FIG14 is a schematic diagram of another structure of an array substrate provided in an embodiment of the present disclosure;

[0044] FIG15 is a schematic structural diagram of a layer where pixel electrodes are located in the array substrate shown in FIG14 ;

[0045] FIG16 is a schematic diagram of another structure of an array substrate provided in an embodiment of the present disclosure;

[0046] FIG17 is a schematic structural diagram of a layer where pixel electrodes are located in the array substrate shown in FIG16 ;

[0047] FIG18 is another gamma curve diagram provided by an embodiment of the present disclosure;

[0048] FIG19 is a schematic diagram of a structure of a pixel electrode and a second common electrode in a domain region provided by an embodiment of the present disclosure;

[0049] FIG20 is a schematic diagram of another structure of a pixel electrode and a second common electrode in a domain region provided by an embodiment of the present disclosure;

[0050] FIG21 is a schematic diagram of another structure of a pixel electrode and a second common electrode in a domain region provided by an embodiment of the present disclosure;

[0051] FIG22 is a schematic diagram of another structure of a pixel electrode and a second common electrode in a domain region provided by an embodiment of the present disclosure;

[0052] FIG23 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0053] To further clarify the objectives, technical solutions, and advantages of the embodiments of the present disclosure, the technical solutions of the embodiments of the present disclosure will be described below in conjunction with the accompanying drawings. It should be noted that, to further clarify the objectives, technical solutions, and advantages of the embodiments of the present disclosure, the technical solutions of the embodiments of the present disclosure will be described below in conjunction with the accompanying drawings. It should be noted that in the accompanying drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. Example embodiments are described in this disclosure with reference to cross-sectional views that are schematic representations of idealized embodiments. As such, deviations from the shapes of the figures as a result of, for example, manufacturing techniques and / or tolerances are to be expected. Therefore, the embodiments described in this disclosure should not be construed as limited to the specific shapes of the regions shown in this disclosure, but rather include deviations in shape resulting from, for example, manufacturing. For example, a region illustrated or described as flat may typically have rough and / or nonlinear features; sharp corners illustrated may be rounded, etc. Therefore, the regions shown in the figures are schematic in nature, and their sizes and shapes are not intended to depict the precise shapes of the regions or reflect true scale. They are intended solely to illustrate the present disclosure. The same or similar reference numerals throughout the text represent the same or similar elements or elements having the same or similar functions. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of known functions and known components.

[0054] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar terms used in the present disclosure and the claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Inside", "outside", "upper", "lower" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0055] In the following description, when an element or layer is referred to as being “on” or “connected to” another element or layer, the element or layer may be directly on, directly connected to, the other element or layer, or there may be intermediate elements or intermediate layers. When an element or layer is referred to as being “disposed on one side of” another element or layer, the element or layer may be directly on, directly connected to, the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as being “directly on” or “directly connected to” another element or layer, there are no intermediate elements or intermediate layers. The term “and / or” includes any and all combinations of one or more of the associated listed items.

[0056] When a vertical alignment (VA) liquid crystal display is not powered on, the long axes of its liquid crystal molecules are arranged perpendicular to the surface of the display panel. Compared with other liquid crystal displays, VA mode liquid crystal displays generally have advantages such as high contrast ratio (CR) and wide viewing angle.

[0057] However, LCD color shift is a common problem, and VA color shift is viewing angle dependent. As the viewing angle changes, pixel brightness changes, gamma shifts, and LCD displays experience color shift. Specifically, the transmittance formula for VA displays is: Where T represents the transmittance of the liquid crystal, φ represents the angle between the viewing angle and the long axis of the liquid crystal (the pre-tilt angle of the liquid crystal), Δn represents the birefringence difference of the liquid crystal, d represents the thickness of the liquid crystal, and λ represents the wavelength of the incident light. According to the above transmittance formula, when the angle φ between the viewing angle and the long axis of the liquid crystal is 45°, the above transmittance formula is simplified to The only factor that affects the VA transmittance is the △nd value of the liquid crystal. When the observer stands on the left or right side and looks at the screen from the side, the angle φ formed by the line of sight and the long axis of the liquid crystal gradually changes, and the △nd value of the liquid crystal changes in turn, and the brightness also changes accordingly. Therefore, there is a color cast when the observer looks at the screen from the side.

[0058] In order to at least improve the above-mentioned technical problems existing in the related art, an embodiment of the present disclosure provides a display substrate. FIG1 is a schematic structural diagram of the display substrate, FIG2 is a schematic structural diagram of an array substrate included in the display substrate, and FIG3 to FIG8 are schematic structural diagrams of each single film layer of the array substrate shown in FIG2. As can be seen from FIG1 to FIG8, the display substrate provided by the present disclosure includes:

[0059] Color filter substrate 001, color filter substrate 001 may include a base 101, a black matrix 102, color resists 103 (including but not limited to red color resist r, green color resist g, and blue color resist b) sequentially arranged on the base 101, a first common electrode 104, a first alignment film 105, etc. Optionally, the first common electrode 104 is a planar electrode located in the display area AA; in some embodiments, to shield the display image from the influence of the external electric field, a shielding electrode may be further provided on a side of the base 101 away from the layer where the black matrix 102 is located; in some embodiments, the color resist 103 may also be provided on the array substrate 002, which is not limited here;

[0060] The array substrate 002 is arranged opposite to the color filter substrate 001. The array substrate 002 may include a base substrate 201, a second common electrode 202 located on the side of the base substrate 201 facing the color filter substrate 001, and a pixel electrode 203 located on the layer where the second common electrode 202 is located and away from the base substrate 201. The pixel electrode 203 includes a plurality of domains (e.g., the first domain ① to the eighth domain ⑧). The pixel electrode 203 has a first slit 2031 in the domain (e.g., the first domain ① to the eighth domain ⑧). The first slit The orthographic projection of 2031 on the base substrate 201 overlaps with the orthographic projection of the second common electrode 202 on the base substrate 201. For example, the orthographic projection of the first slit 2031 on the base substrate 201 is located within the orthographic projection of the second common electrode 202 on the base substrate 201. Optionally, the materials of the first common electrode 104, the second common electrode 202, and the pixel electrode 203 can be transparent conductive materials, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), etc.

[0061] FIG9 is a gamma curve diagram provided by the present disclosure. In FIG9 , REF_0° represents the front-view gamma curve, and REF_60° represents the side-view gamma curve of the related art. 1_60°, 2_60°, and 3_60° correspond to the gamma curves of the display substrate including the array substrates shown in FIG2 , FIG11 , and FIG14 , respectively. In the related art, the second common electrode 202 and the pixel electrode 203 are both block-shaped electrodes within the domain region. As shown in FIG9 , the side-view gamma curve REF_60° of the related art is significantly offset compared to the front-view gamma curve REF_0°, and the REF_60° gamma curve exhibits a significant abrupt change near L600, resulting in a noticeable color shift. In the display substrate provided in the embodiment of the present disclosure, by setting the pixel electrode 203 as a slit electrode including a first slit 2031 in the domain area, and setting the first slit 2031 and the orthographic projection of the second common electrode 202 to overlap with each other, the side viewing angle gamma curves 1_60°, 2_60°, and 3_60° can be less offset than the front viewing angle gamma curve REF_0°, and / or the side viewing angle curves 1_60°, 2_60°, and 3_60° transition can be smoother (that is, the curves do not have obvious convexity or concavity), ensuring better balance of low, medium and high grayscales, no sudden changes, and better color deviation improvement effect.

[0062] In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in FIG. 2 , FIG. 3 and FIG. 8 , the array substrate 002 further includes a plurality of gate lines 204 extending along the first direction X and arranged along the second direction Y;

[0063] The pixel electrode 203 includes a plurality of pixel electrode groups Px, and the same pixel electrode group Px includes a first pixel electrode P1 and a second pixel electrode P2 located on both sides of the gate line 204; wherein,

[0064] The first pixel electrode P1 includes a first domain region ①, a second domain region ②, a third domain region ③ and a fourth domain region ④. The second domain region ② is located between the first domain region ① and the gate line 204, and the fourth domain region ④ is located between the third domain region ③ and the gate line 204.

[0065] The second pixel electrode P2 includes a fifth domain region ⑤, a sixth domain region ⑥, a seventh domain region ⑦ and an eighth domain region ⑧. The fifth domain region ⑤ is located between the sixth domain region ⑥ and the gate line 204 , and the seventh domain region ⑦ is located between the eighth domain region ⑧ and the gate line 204 .

[0066] In some embodiments, as shown in Figure 1, array substrate 002 may further include a second alignment film 205. The pretilt angles of the liquid crystal molecules corresponding to first domain ① through eighth domain ⑧ in liquid crystal layer 003 may be determined jointly by first alignment film 105 and second alignment film 205. Alternatively, UV2A technology can achieve a state where all liquid crystal molecules are tilted in a designed direction through the alignment film. However, due to the orthogonal vertical alignment, UV2A technology can cause dark swastika-shaped patterns to appear in the pixel electrode 203 region, resulting in reduced transmittance of the liquid crystal display.

[0067] In the present disclosure, when the liquid crystal display is in the white state, the voltage of the second common electrode 202 and the voltage of the pixel electrode 203 generate an electric field in the liquid crystal layer 003. The second common electrode 202 at the first slit 2031 induces the liquid crystal molecules in the light area where the first slit 2031 is located to align in an orderly manner, thereby achieving controllable liquid crystal molecules and improving transmittance. Figure 10 is a transmittance (Tr.%) comparison chart provided by the embodiments of the present disclosure. In Figure 10, REF represents the transmittance of the related art, and 1 to 3 correspond to the relative transmittance of the display substrate including the array substrate shown in Figures 2, 11, and 14, respectively. As can be seen from Figure 10, compared with the related art REF, the transmittance values ​​of embodiments 1 to 3 of the present disclosure can be improved by 13.0%, 5.8%, and 3.0%, respectively.

[0068] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, as shown in Figures 2 and 3, the widths of the first slits 2031 in the first domain area ①, the second domain area ②, the third domain area ③, the fourth domain area ④, the fifth domain area ⑤, the sixth domain area ⑥, the seventh domain area ⑦, and the eighth domain area ⑧ can be approximately the same.

[0069] It should be noted that in the embodiments provided in the present disclosure, due to the limitations of process conditions or the influence of other factors such as measurement, "approximately the same" may be completely equivalent, or there may be some deviations (such as ±0.05 deviations). Therefore, as long as the "approximately the same" relationship between related features meets the error allowance, it falls within the scope of protection of the present disclosure.

[0070] In some embodiments, in the display substrate provided by the embodiments of the present disclosure, as shown in Figures 11, 13, and 15, the first slits 2031 in the first domain ①, the third domain ③, the fifth domain ⑤, and the seventh domain ⑦ have approximately the same width, while the first slits 2031 in the second domain ②, the fourth domain ④, the sixth domain ⑥, and the eighth domain ⑧ have approximately the same width. Furthermore, the width of the first slit 2031 in the first domain ① differs from the width of the first slit 2031 in the second domain ②. For example, in Figures 11 and 13, the width of the first slit 2031 in the first domain ① is greater than the width of the first slit 2031 in the second domain ②; and in Figures 14 and 15, the width of the first slit 2031 in the first domain ① is less than the width of the first slit 2031 in the second domain ②. As shown in Figures 9 and 10, the above arrangement can improve color shift while also increasing transmittance to varying degrees.

[0071] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, as shown in Figures 2, 3, 11, 13 to 17, the base substrate 201 includes sub-pixel areas of different colors arranged in an array (for example, red sub-pixel area R, green sub-pixel area G, blue sub-pixel area B, etc.), the first pixel electrode P1 and the second pixel electrode P2 are located in the sub-pixel area (for example, red sub-pixel area R, green sub-pixel area G, blue sub-pixel area B, etc.), and the structure of the first pixel electrode P1 of at least some of the sub-pixel areas of different colors (for example, red sub-pixel area R, green sub-pixel area G) is the same, and the structure of the second pixel electrode P2 of at least some of the sub-pixel areas of different colors (for example, red sub-pixel area R, green sub-pixel area G) is the same.

[0072] For example, in Figures 2, 3, 11, 13 to 17, the structures of the first pixel electrodes P1 in the red sub-pixel region R and the green sub-pixel region G are the same, and the structures of the second pixel electrodes P2 in the red sub-pixel region R and the green sub-pixel region G are the same; in Figures 2, 3, 11, 13 to 15, the structure of the first pixel electrode P1 in the blue sub-pixel region B is the same as the structure of the first pixel electrode P1 in the red sub-pixel region R, and the structure of the second pixel electrode P2 in the blue sub-pixel region B is the same as the structure of the second pixel electrode P2 in the red sub-pixel region R; in Figures 16 and 17, the structure of the first pixel electrode P1 in the blue sub-pixel region B is different from the structure of the first pixel electrode P1 in the red sub-pixel region R, and the structure of the second pixel electrode P2 in the blue sub-pixel region B is different from the structure of the second pixel electrode P2 in the red sub-pixel region R.

[0073] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, the display effect can be controlled by the differentiated design of the RGB gamma curve. For example, as shown in Figures 16 and 17, in the red sub-pixel area R and the green sub-pixel area G: the width of the first slit 2031 of the first domain area ①, the third domain area ③, the fifth domain area ⑤, and the seventh domain area ⑦ is smaller than the width of the first slit 2031 of the second domain area ②, the fourth domain area ④, the sixth domain area ⑥, and the eighth domain area ⑧; in the blue sub-pixel area B: the width of the first slit 2031 of the first domain area ①, the third domain area ③, the fifth domain area ⑤, and the seventh domain area ⑦ is larger than the width of the first slit 2031 of the second domain area ②, the fourth domain area ④, the sixth domain area ⑥, and the eighth domain area ⑧.

[0074] Figure 18 shows another gamma curve diagram provided by an embodiment of the present disclosure. In Figure 18, REF_0° represents the front-view gamma curve, REF_60° represents the side-view gamma curve of the related art, and G_60°, B_60°, and R_60° correspond to the gamma curves of the three RGB sub-pixels in the display substrate including the array substrate shown in Figure 16. As shown in Figure 18, compared to the side-view gamma curve REF_60° of the related art, the side-view gamma curves R_60° and G_60° of the RG sub-pixels of the present disclosure are significantly offset from the front-view gamma curve REF_0°, while the side-view gamma curve B_60° of the B sub-pixel is less offset from the front-view gamma curve REF_0°. Therefore, when viewed from the side, the RGB primary color ratio is B>G>R, resulting in a bluer LCD display that better meets customer needs.

[0075] In some embodiments, in the above-mentioned display substrate provided in the embodiments of the present disclosure, as shown in Figures 11 to 17, the second common electrode 202 can be a block electrode in the domain area (for example, the first domain area ① to the eighth domain area ⑧), and the pixel electrode 203 is a slit electrode with uneven width of the first slit 2031. The design of the pixel electrode 203 refers to the above content and will not be repeated here.

[0076] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, as shown in Figures 2, 3, 5, 19 to 22, the second common electrode 202 includes a second slit 2021 located in a domain area (for example, the first domain area ① to the eighth domain area ⑧), and the orthographic projection of the second slit 2021 on the base substrate 201 is staggered with the orthographic projection of the first slit 2031 on the base substrate 201; optionally, in Figures 19 and 20, the orthographic projection of the second slit 2021 on the base substrate 201 is completely staggered with the orthographic projection of the first slit 2031 on the base substrate 201; in Figures 21 and 22, the orthographic projection of the second slit 2021 on the base substrate 201 is partially staggered with the orthographic projection of the first slit 2031 on the base substrate 201.

[0077] Optionally, as shown in Figure 19, the pixel electrode 203 includes a first strip electrode 2032 arranged alternately with the first slit 2031 in the domain area (for example, the first domain area ① to the eighth domain area ⑧), and the second common electrode 202 includes a second strip electrode 2022 arranged alternately with the second slit 2021 in the domain area (for example, the first domain area ① to the eighth domain area ⑧), and the orthographic projection of the second slit 2021 on the base substrate 201 can roughly coincide with the orthographic projection of the first strip electrode 2032 on the base substrate 201, and the orthographic projection of the first slit 2031 on the base substrate 201 can roughly coincide with the orthographic projection of the second strip electrode 2022 on the base substrate 201; in other words, in the domain area (for example, the first domain area ① to the eighth domain area ⑧), the pattern of the second common electrode 202 and the pattern of the pixel electrode 203 can be complementary. In some embodiments, as shown in FIG20 , the orthographic projection of the second slit 2021 on the base substrate 201 may be located within the orthographic projection of the first strip electrode 2032 on the base substrate 201, and the orthographic projection of the first slit 2031 on the base substrate 201 may be located within the orthographic projection of the second strip electrode 2022 on the base substrate 201; or as shown in FIG21 , the orthographic projection of the second slit 2021 on the base substrate 201 may cover the orthographic projection of the first strip electrode 2032 on the base substrate 201, and the orthographic projection of the first slit 2031 on the base substrate 201 may cover the orthographic projection of the second strip electrode 2022 on the base substrate 201; or as shown in FIG22 , the orthographic projection of the second slit 2021 on the base substrate 201 partially overlaps with the orthographic projection of the first strip electrode 2032 on the base substrate 201, and the orthographic projection of the first slit 2031 on the base substrate 201 partially overlaps with the orthographic projection of the second strip electrode 2022 on the base substrate 201.

[0078] It should be noted that in the embodiments provided in the present disclosure, due to the limitations of process conditions or the influence of other factors such as measurement, the "rough overlap" may be exactly overlapped, or there may be some deviations (for example, a deviation of ±2μm). Therefore, as long as the "rough overlap" relationship between related features meets the error allowance, it falls within the scope of protection of the present disclosure.

[0079] In some embodiments, as shown in FIG3 , the first strip electrodes 2032 of the pixel electrode 203 may be electrically connected to each other at the four edges of the pixel electrode 203 and in the middle region of the pixel electrode 203. As shown in FIG5 , the second strip electrodes 2022 of the second common electrode 202 are disconnected from each other on one side near the hollow structure 203; and the second strip electrodes 2022 of the second common electrode 202 are electrically connected to each other on the other three sides outside the hollow structure 203 and in the middle region of the second common electrode 202.

[0080] In some embodiments, in the above-mentioned display substrate provided by the embodiments of the present disclosure, as shown in Figures 2 to 8 and Figures 11 to 17, the array substrate 002 further includes a pixel circuit 205, and the pixel circuit 205 is coupled to the pixel electrode group Px, that is, the first pixel electrode P1 and the second pixel electrode P2 of the same pixel electrode group Px are electrically connected to the same pixel circuit 205; optionally, the pixel circuit 205 includes a first transistor T1, a second transistor T2 and a third transistor T3, wherein the gate g1 of the first transistor T1, the gate g2 of the second transistor T2 and the gate g3 of the third transistor T3 are multiplexed and integrally arranged with the gate line 204, the first electrode s1 of the first transistor T1 and the first electrode s2 of the second transistor T2 are multiplexed and integrally arranged with the data line 206, the first electrode s3 of the third transistor T3 and the second electrode d2 of the second transistor T2 are multiplexed and coupled to the second pixel electrode P2, and the first transistor The second electrode d1 of T1 is coupled to the first pixel electrode P1, and the second electrode d3 of the third transistor T3 is integrally arranged with the discharge line 207; optionally, the second electrode d1 of the first transistor T1 is coupled to the switching electrode 209 through the first via hole h1, and the switching electrode 209 is further coupled to the first pixel electrode P1 through the first via hole h1, the first via hole h1 penetrates the first insulating layer 208 and the second insulating layer 210 at the second electrode d1 of the first transistor T1, and the first via hole h1 penetrates the first insulating layer 208 at the first pixel electrode P1; the first electrode S3 of the third transistor T3 is coupled to the switching electrode 209 through the second via hole h2, and the switching electrode 209 is further coupled to the second pixel electrode P2 through the second via hole h2, the second via hole h2 penetrates the first insulating layer 208 and the second insulating layer 210 at the first electrode S3 of the third transistor T3, and the second via hole h2 penetrates the first insulating layer 208 at the second pixel electrode P2.

[0081] In some embodiments, the first common electrode 104 and the first pixel electrode P1 form a first liquid crystal capacitor Cpx1 in the bright pixel area, and the first common electrode 104 and the second pixel electrode P2 form a second liquid crystal capacitor Cpx2 in the dark pixel area. When the gate line 204 provides a scan voltage, the data voltage from the data line 206 can be applied to the first pixel electrode P1 and the second pixel electrode P2 respectively through the first transistor T1 and the second transistor T2, so that the electric field between the first pixel electrode P1 and the first common electrode 104 can drive the corresponding liquid crystal molecules in the bright pixel area to rotate, and the electric field between the second pixel electrode P2 and the first common electrode 104 can drive the corresponding liquid crystal molecules in the bright pixel area to rotate. The electric field can drive the corresponding liquid crystal molecules in the dark pixel area to rotate; at the same time, the third transistor T3 is turned on and shares the data voltage from the data line 206 with the second transistor T2 to realize discharge to the second pixel electrode P2; ultimately, the voltage difference between the pixel voltage of the first pixel electrode P1 and the common voltage is greater than the voltage difference between the pixel voltage of the second pixel electrode P2 and the common voltage, so that the brightness of the area where the first pixel electrode P1 is located is greater than the brightness of the area where the second pixel electrode P2 is located, thereby adopting a method of combining a smaller number of domains (for example, 4 domains) with a voltage difference drive orientation to achieve a liquid crystal display effect with more domains (for example, 8 domains).

[0082] In some embodiments, considering that the first transistor T1 and the second transistor T2 are used to charge the first pixel electrode P1 and the second pixel electrode P2, respectively, to ensure synchronous and rapid charging of the first pixel electrode P1 and the second pixel electrode P2, the channel width-to-length ratio of the first transistor T1 and the channel width-to-length ratio of the second transistor T2 can be set to be substantially the same (i.e., the same or within the error range caused by factors such as manufacturing and measurement). In some embodiments, the width-to-length ratio of the active layer a1 of the first transistor T1 and the width-to-length ratio of the active layer a2 of the second transistor T2 can be the same. The third transistor T3 is used for discharge and only needs to have a discharge function. Therefore, the channel width-to-length ratio of the third transistor T3 can be smaller than the channel width-to-length ratio of the first transistor T1. Specifically, the width-to-length ratio of the active layer a3 of the third transistor T3 is smaller than the width-to-length ratio of the active layer a1 of the first transistor T1. In addition, due to the smaller channel width-to-length ratio of the third transistor T3, the third transistor T3 occupies less wiring space, which is more conducive to improving the aperture ratio.

[0083] In some embodiments, the transistors included in the pixel circuit 205 of the present disclosure may be P-type transistors or N-type transistors. The transistors may be bottom-gate transistors, top-gate transistors, or dual-gate transistors, without limitation. The first electrode of the transistor may be a source electrode, and the second electrode may be a drain electrode, or the first electrode of the transistor may be a drain electrode, and the second electrode may be a source electrode. The material of the active layer of the transistor may be amorphous silicon (a-Si), polycrystalline silicon (poly), or an oxide (e.g., indium gallium zinc oxide (IGZO)).

[0084] In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in Figures 2, 5, 11, and 12, the second common electrode 202 includes a hollow structure 2023, and the orthographic projection of the pixel circuit 205 on the base substrate 201 is located within the orthographic projection of the hollow structure 2023 on the base substrate 201. This prevents the second common electrode 202 from interfering with the pixel circuit 205, thereby ensuring the stability of the performance of the pixel circuit 205. Optionally, the orthographic projection of the pixel circuit 205 on the base substrate 201 may also partially overlap with the orthographic projection of the hollow structure 2023 on the base substrate 201.

[0085] In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in Figures 5 and 11, the transfer electrode 209 can be provided in the same layer and material as the second common electrode 202, and the orthographic projection of the transfer electrode 209 on the base substrate 201 is located within the orthographic projection of the hollow structure 2023 on the base substrate 201. In the present disclosure, "same layer" refers to a layer structure formed by a single patterning process using the same film forming process to form a film layer for producing a specific pattern, and then using the same mask. That is, a single patterning process corresponds to a mask (also known as a photomask). Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous, and these specific patterns may be at the same height or have the same thickness, or at different heights or have different thicknesses. Based on this, by setting the transfer electrode 209 coupling the pixel electrode 203 and the pixel circuit 205 to be in the same layer as the second common electrode 202, the number of masking times can be reduced, production efficiency can be improved, and the number of film layers can be reduced, which is conducive to the lightweight design of the product. In addition, the switching electrode 209 is located in the hollow structure 2023 of the second common electrode 202 , thereby preventing the second common electrode 202 from being short-circuited with the pixel electrode 203 and the pixel circuit 205 .

[0086] In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in Figures 2, 4, 5, and 8, the array substrate 002 may further include a first common electrode line 211 and a second common electrode line 212 provided in the same layer and material as the gate line 204. Optionally, the first common electrode line 211 is electrically connected to the second common electrode 202 on the side of the gate line 204 facing the first pixel electrode P1 via a third via hole h3 penetrating the first insulating layer 208, and the second common electrode line 212 is electrically connected to the second common electrode 202 on the side of the gate line 204 facing the second pixel electrode P2 via a fourth via hole h4 penetrating the first insulating layer 208. Other essential components of the display substrate are well understood by those skilled in the art and are not described in detail herein and should not be construed as limiting the present disclosure.

[0087] Based on the same inventive concept, an embodiment of the present disclosure provides a display device, as shown in FIG23 , comprising the above-mentioned display panel PNL provided in an embodiment of the present disclosure, and a backlight module BLU located on the light incident side of the display panel PNL. The backlight module BLU can be a direct-type backlight module or an edge-type backlight module. Optionally, the edge-type backlight module may include a light bar, a stacked reflective sheet, a light guide plate, a diffuser, a prism group, etc., and the light bar is located on one side of the thickness direction of the light guide plate. The direct-type backlight module may include a matrix light source, a reflective sheet, a diffuser, and a brightening film stacked on the light-emitting side of the matrix light source, etc., and the reflective sheet includes an opening arranged opposite to the position of each lamp bead in the matrix light source. The lamp beads in the light bar and the lamp beads in the matrix light source may be light-emitting devices (LEDs), such as quantum dot light-emitting devices.

[0088] In some embodiments, the lamp beads can also be micro light-emitting devices (such as Mini LED, Micro LED), etc. Submillimeter or even micron-scale micro light-emitting devices are self-luminous devices like organic light-emitting devices (OLED). Like organic light-emitting devices, they have a series of advantages such as high brightness, ultra-low latency, and ultra-large viewing angle. And because the light emission of inorganic light-emitting devices is based on metal semiconductors with more stable properties and lower resistance, compared with organic light-emitting devices based on organic matter, they have the advantages of lower power consumption, greater resistance to high and low temperatures, and longer service life. And when the micro light-emitting device is used as a backlight source, it can achieve a more precise dynamic backlight effect. While effectively improving the brightness and contrast of the screen, it can also solve the glare phenomenon caused by traditional dynamic backlight between the bright and dark areas of the screen, thereby optimizing the visual experience.

[0089] In some embodiments, the above-mentioned display device provided in the embodiments of the present disclosure may be: a display, a projector, a 3D printer, a virtual reality device, a mobile phone, a tablet computer, a television, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness wristband, a personal digital assistant, or any other product or component with a display function. Optionally, the display device provided in the present disclosure includes, but is not limited to, components such as a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, and a control chip. Optionally, the control chip is a central processing unit, a digital signal processor, a system-on-chip (SoC), etc. For example, the control chip may further include a memory, a power module, etc., and realize power supply and signal input and output functions through additionally provided wires, signal lines, etc. For example, the control chip may further include hardware circuits and computer executable code, etc. The hardware circuit may include conventional very large scale integration (VLSI) circuits or gate arrays and existing semiconductors or other discrete components such as logic chips and transistors; the hardware circuit may also include field programmable gate arrays, programmable array logic, programmable logic devices, etc. In addition, the above structure does not constitute a limitation on the above display device provided in the embodiment of the present disclosure. In other words, the above display device provided in the embodiment of the present disclosure may include more or fewer of the above components, or a combination of certain components, or different component arrangements.

[0090] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0091] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if such changes and modifications of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include such changes and modifications.

Claims

1. A display substrate, wherein: include: A color filter substrate, wherein the color filter substrate comprises a first common electrode; An array substrate is arranged opposite to the color filter substrate, and includes a base substrate, a second common electrode located on a side of the base substrate facing the color filter substrate, and a pixel electrode located on a layer where the second common electrode is located and away from the base substrate, wherein the pixel electrode includes a plurality of domains, and the pixel electrode is provided with a first slit in the domain, and the orthographic projection of the first slit on the base substrate overlaps with the orthographic projection of the second common electrode on the base substrate.

2. The display substrate according to claim 1, wherein: The array substrate further includes a plurality of gate lines extending along the first direction and arranged along the second direction; The pixel electrode includes a plurality of pixel electrode groups, and the same pixel electrode group includes a first pixel electrode and a second pixel electrode located on both sides of the gate line; wherein, The first pixel electrode includes a first domain area, a second domain area, a third domain area and a fourth domain area, the second domain area is located between the first domain area and the gate line, and the fourth domain area is located between the third domain area and the gate line; The second pixel electrode includes a fifth domain region, a sixth domain region, a seventh domain region and an eighth domain region. The fifth domain region is located between the sixth domain region and the gate line, and the seventh domain region is located between the eighth domain region and the gate line.

3. The display substrate according to claim 2, wherein: The first slit widths in the first domain, the second domain, the third domain, the fourth domain, the fifth domain, the sixth domain, the seventh domain, and the eighth domain are substantially the same.

4. The display substrate according to claim 2, wherein: The first slit widths in the first domain, the third domain, the fifth domain, and the seventh domain are approximately the same, the first slit widths in the second domain, the fourth domain, the sixth domain, and the eighth domain are approximately the same, and the first slit width in the first domain is different from the first slit width in the second domain.

5. The display substrate according to claim 4, wherein: The first slit width of the first domain is greater than the first slit width of the second domain.

6. The display substrate according to claim 4, wherein: The first slit width of the first domain is smaller than the first slit width of the second domain.

7. The display substrate according to any one of claims 2 to 6, wherein: The base substrate includes sub-pixel areas of different colors arranged in an array, the first pixel electrode and the second pixel electrode are located in the sub-pixel areas, and the structures of the first pixel electrodes of at least some of the sub-pixel areas of different colors are the same, and the structures of the second pixel electrodes of at least some of the sub-pixel areas of different colors are the same.

8. The display substrate according to claim 7, wherein: The sub-pixel area includes a red sub-pixel area and a green sub-pixel area. The first pixel electrodes in the red sub-pixel area and the green sub-pixel area have the same structure. The second pixel electrodes in the red sub-pixel area and the green sub-pixel area have the same structure.

9. The display substrate according to claim 8, wherein: The sub-pixel area also includes a blue sub-pixel area, the structure of the first pixel electrode in the blue sub-pixel area is the same as the structure of the first pixel electrode in the red sub-pixel area, and the structure of the second pixel electrode in the blue sub-pixel area is the same as the structure of the second pixel electrode in the red sub-pixel area.

10. The display substrate according to claim 8, wherein: The sub-pixel area also includes a blue sub-pixel area. The structure of the first pixel electrode in the blue sub-pixel area is different from the structure of the first pixel electrode in the red sub-pixel area. The structure of the second pixel electrode in the blue sub-pixel area is different from the structure of the second pixel electrode in the red sub-pixel area.

11. The display substrate according to claim 10, wherein: In the red sub-pixel region and the green sub-pixel region, the first slit widths of the first domain region, the third domain region, the fifth domain region, and the seventh domain region are smaller than the first slit widths of the second domain region, the fourth domain region, the sixth domain region, and the eighth domain region; In the blue sub-pixel area: the first slit width of the first domain area, the third domain area, the fifth domain area, and the seventh domain area is greater than the first slit width of the second domain area, the fourth domain area, the first slit width of the sixth domain and the eighth domain.

12. The display substrate according to any one of claims 1 to 11, wherein: The second common electrode is a block electrode in the domain area.

13. The display substrate according to any one of claims 1 to 11, wherein: The second common electrode includes a second slit located in the domain region, and an orthographic projection of the second slit on the base substrate is staggered with an orthographic projection of the first slit on the base substrate.

14. The display substrate according to claim 13, wherein: The pixel electrode includes strip electrodes alternately arranged with the first slits in the domain area; The orthographic projection of the second slit on the base substrate substantially coincides with the orthographic projection of the strip electrode on the base substrate.

15. The display substrate according to any one of claims 2 to 11, wherein: The array substrate further includes a pixel circuit coupled to the pixel electrode group; The second common electrode includes a hollow structure between the first pixel electrode and the second pixel electrode, and the orthographic projection of the pixel circuit on the base substrate is located within the orthographic projection of the hollow structure on the base substrate.

16. The display substrate according to claim 15, wherein: The array substrate further includes a switching electrode provided on the same layer as the second common electrode, the switching electrode coupling the pixel electrode and the pixel circuit, and an orthographic projection of the switching electrode on the base substrate being within an orthographic projection of the hollow structure on the base substrate.

17. A display device, wherein: The display substrate comprises the display substrate according to any one of claims 1 to 16.

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