Three-dimensional stacked chip with closed-loop layered microfluid temperature control structure and closed-loop temperature control method

Abstract

The invention relates to a three-dimensional stacked chip with a closed-loop layered microfluid temperature control structure and a closed-loop temperature control method. The three-dimensional stacked chip comprises a multi-layer chip stacked structure, an embedded microfluid network, a distributed temperature sensing system, a mixed through silicon via interconnection array and an intelligent control unit. Through adoption of a sensing-heat dissipation-interconnection integrated periodic array architecture, functional cooperation of temperature sensing, fluid heat dissipation and vertical interconnection is realized. The distributed temperature sensing system monitors the temperature of each area of the chip in real time through a PN junction diode array, the intelligent control unit generates a regulation and control instruction based on a layered and zoned control algorithm, and precise flow regulation is conducted on each layer of micro-channels through independently controlled micro-valves and variable-rate micro-pumps. According to the system, a complete closed-loop control framework from sensing, decision making to execution is constructed, the limitation of a traditional heat dissipation scheme in the aspects of dynamic response and management precision is broken through, intelligent fine temperature control of the three-dimensional stacked chips is achieved, and the heat dissipation efficiency and operation reliability of the chips are remarkably improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor packaging and integrated circuit thermal management technology, specifically relating to a three-dimensional stacked chip intelligent temperature control system and method with dynamic sensing and precise control functions. Background Technology

[0002] Three-dimensional stacking technology is considered one of the key pathways to continue the evolution of Moore's Law; however, its development faces severe thermal management challenges. Due to the significantly increased power density resulting from the vertical integration of multi-layer chips, and the extended heat dissipation path and increased thermal resistance from intermediate layer devices to the package shell, localized high-temperature areas are difficult to eliminate effectively. Currently used external heat dissipation methods, including heat sinks, vapor chambers, and package-level liquid cooling, are essentially global uniform heat dissipation strategies, lacking the ability to finely control the temperature distribution within the stacked structure.

[0003] While existing research has attempted to integrate microfluidic structures within chips to improve heat dissipation efficiency, several key technical bottlenecks remain. First, the spatially independent layout of temperature sensing units and cooling actuators leads to significant delays in system thermal response, making it difficult to construct an effective dynamic closed-loop control mechanism. Furthermore, the lack of coordinated optimization in the layout design of heat dissipation structures such as microfluidics and thermal vias with electrical interconnect vias results in prominent coupling interference between the thermal, electrical, and current multi-physics fields. This not only affects heat transfer efficiency but may also lead to device performance degradation and decreased reliability due to thermal stress concentration or electromagnetic interference. Second, the granularity of existing temperature control systems remains limited to the chip or layer scale, failing to achieve precise location and on-demand heat dissipation of sub-regional hotspots, thus failing to meet the dynamic management requirements of high-performance computing chips for non-uniform thermal fields.

[0004] Therefore, there is an urgent need in this field for a sophisticated dynamic thermal management solution that can achieve integrated sensing and execution, and coordinated thermal-electrical-fluid design within a three-dimensional stacked chip. Summary of the Invention

[0005] This invention aims to overcome the technical limitations of existing three-dimensional stacked chip heat dissipation solutions, such as separation of sensing and execution, insufficient thermal management accuracy, and inability to cope with dynamic thermal loads. It proposes a closed-loop temperature control system with real-time sensing, intelligent decision-making, and precise execution capabilities.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A three-dimensional stacked chip intelligent temperature control system mainly consists of a multi-layer chip stacked structure, an embedded microfluidic network, a distributed temperature sensing system, a hybrid through-silicon via (TSV) interconnect array, and an intelligent control unit. The multi-layer chip stacked structure includes a package housing, a coolant inlet, a coolant outlet, and chip layers. The embedded microfluidic network encompasses a microfluidic substrate, microvalves, and waveform microchannels. The distributed temperature sensing system consists of multiple PN junction diodes. The hybrid TSV interconnect array includes electrical TSVs and thermal management TSVs (TTSVs), forming a hybrid TSV cluster. The intelligent control unit includes a digital sensor hub, signal conditioning and analog-to-digital conversion circuits, a decision-making and control center, a water pump, and valve controllers. Its innovation lies in adopting an integrated sensing-heat dissipation-interconnection cyclic array architecture, achieving collaborative management and closed-loop control of multiple physical fields through modular design.

[0007] Furthermore, the packaging shell encapsulates the entire three-dimensional stacked chip, with coolant flowing in from the coolant inlet and out from the coolant outlet. The chip layer serves as the main functional area and heat-generating area of ​​the chip.

[0008] Furthermore, the waveform microchannel is mainly etched on the microchannel substrate, and the micro valve controls the flow rate by adjusting the opening of the coolant flowing into the microchannel valve.

[0009] To further explain, multiple PN junction diodes constitute a distributed temperature sensing module, which can detect the temperature of the microchannels on both sides of the diodes and transmit temperature information.

[0010] To elaborate further, the electrical TSV enables electrical interconnection between different chip layers, while the TTSV is used to construct a vertically enhanced thermal conductivity path. The TTSV is filled with a diamond-metal composite material, preferably a copper-diamond composite material or a silver-diamond composite material, wherein the volume fraction of diamond particles is 50% to 80%, in order to achieve synergistic optimization of high thermal conductivity and low coefficient of thermal expansion. The electrical TSV and TTSV together constitute a hybrid TSV cluster.

[0011] Furthermore, it is pointed out that the digital sensor hub can collect signals transmitted by PN junction diodes and transmit the signals to signal conditioning and analog-to-digital conversion circuits. The signal conditioning and analog-to-digital conversion circuits convert the signals into signals that can be recognized by the decision-making and control center. The decision-making and control center adjusts the heat dissipation strategy and intensity based on the acquired information and transmits the signals to the water pump and valve controllers. The water pump and valve controllers adjust their own power and valve opening according to the signals.

[0012] A heat dissipation process for a three-dimensional stacked chip with a closed-loop layered microfluidic temperature control structure includes the following steps: Step 1: The chip starts working and generates heat, creating hotspots in different areas. The system uses a built-in periodic sensor network to capture the heat distribution inside the chip in real time. Step 2: When a hotspot is detected, the signal is transmitted to the control center via an integrated pathway; Step 3: After calculation, the central actuator instructs the corresponding execution mechanism to enhance the flow rate in the local microchannel of the hot spot. As the coolant flows through the wavy microchannel in this area, it efficiently removes heat, thereby achieving rapid and precise cooling. The entire process is completed automatically within an extremely short control cycle, forming a highly adaptive, low-latency dynamic closed loop.

[0013] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention leverages an integrated periodic array design to achieve functional synergy between temperature sensing, fluid cooling, and vertical interconnection, effectively avoiding the hotspot problem caused by the concentration of functional modules in traditional designs. Employing a hierarchical and zoned control strategy, it achieves fine-grained thermal management at the sub-region level, enabling rapid response to microscopic hotspots generated by specific computing units. The intelligent closed-loop control architecture of the system transforms passive cooling into proactive predictive thermal management, significantly improving the heat dissipation efficiency and operational reliability of the 3D stacked chip, providing an innovative solution for thermal management of high-performance computing chips.

[0014] In summary, this invention breaks through the technical bottlenecks of traditional heat dissipation solutions in terms of dynamic response, management accuracy, and system integration, and provides an effective technical approach for achieving high-efficiency and high-reliability thermal management of three-dimensional stacked chips. Attached Figure Description

[0015] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is a three-dimensional schematic diagram of the overall architecture of the system of the present invention, showing the main relationships between chip stacking, external casing, liquid circuit connection and TSV.

[0016] Figure 2 The planar layout details of the single-layer microchannel substrate in this invention are clearly shown, illustrating the periodic alternating arrangement of the wavy microchannels, distributed temperature sensing modules, and hybrid TSV clusters, and demonstrating the interrelationships between the various control units.

[0017] Figure 3 This is a schematic diagram of the closed-loop control logic and signal flow of the present invention. Detailed Implementation

[0018] The following description, in conjunction with the accompanying drawings, details a preferred embodiment of the present invention.

[0019] See Figure 1 This system comprises a three-dimensional stacked chipset encapsulated in a housing 1. The housing has a coolant inlet 2 and an outlet 3. The coolant, driven by a variable-rate micropump, enters the system through the coolant inlet 2 and is distributed to the microfluidic network inside the chips via independent microvalves 6 on each layer.

[0020] See Figure 2 Taking one of the microchannel substrates as an example, its core is the integrated periodic array. A wavy microchannel 10 is fabricated on the substrate. Between the two microchannel regions, distributed temperature sensing modules 9 and hybrid TSV clusters 11 are alternately arranged. Sensing module 9 consists of multiple miniature PN junction diodes and is responsible for collecting the temperature of its region. In the hybrid TSV cluster 11, TTSV8 and electrical TSV9 are arranged in a one-to-one interval. All sensing modules are connected to a digital sensor hub via on-chip metal wires, and data is uploaded via the hub through the I2C bus protocol.

[0021] Reference Figure 3The control system operation logic flowchart shown below illustrates the specific implementation process of this invention. After power-on, the system first executes an initialization program, setting the micro-pump and micro-valves at each layer to a preset safe operating state, and then enters a continuously running main control loop. Within each control cycle, the system collects real-time temperature data using a temperature sensor array distributed across each layer of the chip, and constructs a three-dimensional thermal distribution map of the chip's interior based on this data. This thermal distribution map is transmitted to the decision control unit for layered and zoned analysis. For each independent sensing area, the system compares its temperature value with a preset target temperature range: when an area is identified as overheated, the opening of the corresponding micro-valve is increased to improve coolant flow; when an area is detected as undercooled, the valve opening is appropriately reduced to achieve energy-saving operation; if the temperature is within the normal range, the current state is maintained. After completing independent adjustment decisions for all areas, the system further evaluates the overall thermal load. If it is determined that the total chip power consumption has increased significantly, the operating power of the micro-pump is simultaneously increased to ensure sufficient total system flow; if the thermal load remains stable, the pump's current power level is maintained. Subsequently, the control system converts the generated adjustment commands into specific PWM control signals, driving the corresponding micro-valve actuators and micro-pumps respectively. Throughout the control process, independent fault monitoring modules operate in parallel, continuously monitoring whether the temperature exceeds the safety threshold and whether the flow rate is abnormal. Once a fault symptom is detected, the system immediately exits the normal control flow and executes a preset safety protection procedure, including fully opening all microvalves, adjusting the pump power to maximum, and triggering an alarm mechanism. Regardless of whether normal adjustment is completed or the safety procedure is executed, the system returns to the starting point of the main control loop after a short delay, thus forming a complete closed-loop control system with continuous perception, dynamic decision-making, and precise execution, achieving intelligent and precise control of the temperature field of the three-dimensional stacked chip.

[0022] The decision-making and control center employs a high-performance microcontroller (MCU), whose internally programmed hierarchical and partitioned control algorithm executes the following steps at fixed intervals (e.g., 1ms): reading all sensor data; analyzing layer by layer to locate specific areas where the temperature exceeds a preset threshold; calculating the required increase in PWM duty cycle for the corresponding micro-valve based on the severity and range of the over-temperature; and simultaneously assessing the overall system thermal load to determine whether to increase the power of the micro-pump. Subsequently, a new PWM signal is sent to the corresponding micro-valve and pump, immediately adjusting the coolant flow rate. Example

[0023] A three-dimensional stacked chip intelligent temperature control system mainly consists of a multi-layer chip stacked structure, an embedded microfluidic network, a distributed temperature sensing system, a hybrid through-silicon via (TSV) interconnect array, and an intelligent control unit. After power-on, each functional module of the chip executes an initialization program. Coolant is pumped into the coolant inlet by a water pump, then reaches the storage tank, flows through micro-valve into each layer of microchannels, then into the drainage tank, and finally flows out through the coolant outlet. Electrical TSVs enable electrical interconnection between different chip layers, while TTSVs are used to transfer heat between different chip layers. PN junction diodes continuously collect the temperature of the microchannels on both sides and transmit the temperature information via a digital sensor hub to a signal conditioning and analog-to-digital conversion circuit, which then transmits it to the decision-making and control center. Based on the acquired information, the decision-making and control center adjusts the heat dissipation intensity and sends signals to the water pump and valve controller to regulate their operating power and the opening and closing degree of the valves.

[0024] During continuous chip operation, a localized hotspot forms in the upper left portion of the second-layer chip, exceeding the normal temperature threshold, causing the temperature of the surrounding microchannels to gradually rise. When the surrounding PN junction diodes detect this temperature exceeding the threshold, the signal is transmitted via the digital sensor hub to the signal conditioning and analog-to-digital conversion circuit, and then to the decision and control center. After signal processing, the control center determines that this area requires enhanced heat dissipation and sends a signal to the water pump. The water pump increases its operating power, pumping more coolant into the chip from the coolant inlet. Simultaneously, the valve controller receives a signal and controls the micro-valve in the upper left portion of the second-layer chip to increase its opening, further increasing the amount of coolant flowing into the microchannels in that area. When the temperature in this area gradually drops to the normal range, the decision and control center sends a signal to adjust the water pump and restore the micro-valve in that area to its initial state.

[0025] The chip continues to operate. The PN junction diode detects that the microchannel temperature in the middle region of the third layer is too low. This signal is transmitted via the digital sensor hub and converted into a signal recognizable by the signal conditioning and analog-to-digital conversion circuit. The decision-making and control center receives and processes the signal, controlling the water pump to reduce its operating power, pumping in less coolant. Simultaneously, it sends a signal to the valve controller, which in turn controls the micro-valve in the middle region of the third layer to reduce its opening, further decreasing the amount of coolant flowing in. When the PN junction diode detects that the temperature in this region has returned to normal, the decision-making and control center sends a signal to gradually increase the water pump power, and the valve opening gradually returns to its normal size.

[0026] The entire system continuously adjusts the heat dissipation scheme according to the above logic to achieve intelligent temperature regulation of the entire chip.

Claims

1. A three-dimensional stacked chip with a closed-loop layered microfluidic temperature control structure, characterized in that: It is realized by combining a multi-layer chip stack structure, an embedded microfluidic network, a distributed temperature sensing system, a hybrid through-silicon via (TSV) interconnect array and an intelligent control unit. The multi-layer chip stack structure includes a package housing (1), a coolant inlet (2), a coolant outlet (3) and a chip layer (4). The embedded microfluidic network covers a microfluidic substrate (5), a micro valve (6) and a waveform microchannel (10). The distributed temperature sensing system is composed of multiple PN junction diodes (9). The hybrid TSV interconnect array includes an electrical TSV (7) and a thermal management TSV (TTSV) (8). The electrical TSV (7) and TTSV (8) form a hybrid TSV cluster (11). The intelligent control unit includes a digital sensor hub (12), a signal conditioning and analog-to-digital conversion circuit (13), a decision and control center (14), a water pump (15) and a valve controller (16).

2. The three-dimensional stacked chip according to claim 1, characterized in that: The TTSV is filled with a diamond-metal composite material, wherein the volume fraction of diamond particles is between 50% and 80%.

3. The three-dimensional stacked chip according to claim 2, characterized in that: The composite material is a copper-diamond composite material or a silver-diamond composite material.

4. The three-dimensional stacked chip according to claim 1, characterized in that: The waveform microchannel is a wave-shaped structure etched on the microchannel substrate; the microvalve is set at the inlet of each layer of microchannel for independently adjusting the coolant flow rate.

5. The three-dimensional stacked chip according to claim 1, characterized in that: The PN junction diodes are arranged between adjacent microchannels, and their outputs are connected to the digital sensor hub via metal wires.

6. The three-dimensional stacked chip according to claim 1, characterized in that: The decision-making and control center is a microcontroller, whose built-in algorithm periodically executes the following steps: collecting full chip temperature data and constructing a three-dimensional thermal distribution map, identifying temperature regions exceeding preset thresholds, and calculating the corresponding PWM control amount of the micro-valve and the power adjustment command of the micro-pump.

7. The three-dimensional stacked chip according to claim 1, characterized in that: The intelligent control unit also includes a fault monitoring module, which is used to trigger a safety protection program when abnormal temperature or flow is detected.

8. The three-dimensional stacked chip according to claim 1, characterized in that, In the hybrid TSV cluster, electrical TSVs and TTSVs are arranged at a 1:1 interval to form a periodic thermal-electrical synergistic interconnection structure.

9. A closed-loop temperature control method based on the three-dimensional stacked chip according to any one of claims 1 to 7, characterized in that: The chip temperature field is acquired in real time using a distributed temperature sensor array; hot spots are identified and located based on a hierarchical and zoned control strategy; the opening degree of the micro valves and the power of the system micro pumps at the corresponding levels of the hot spots are adjusted independently to change the local coolant flow rate; and the control parameters are dynamically adjusted based on temperature feedback to achieve closed-loop temperature control.

10. The method according to claim 9, characterized in that: When the temperature exceeds the safety threshold, a fault protection process is executed, which involves opening all valves, maximizing pump power, and triggering an alarm.

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