Virtual fault domain isolation and recovery method suitable for Lingqu interconnection system

By introducing a virtual fault domain isolation mechanism on the IO interconnect chip of the Lingqu Interconnect system, the system risk caused by third-party chip anomalies is resolved, fault domain isolation and recovery are realized, and the stability and reliability of the system are ensured.

CN122019244AActive Publication Date: 2026-05-12SHANGHAI FANGYI WANQIANG MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202610500076.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-16
Publication Date
2026-05-12
Estimated Expiration
2046-04-16

AI Technical Summary

Technical Problem

In the existing Lingqu Interconnection system, when a third-party chip experiences anomalies such as partial reset, power failure, or controller failure after being connected, it is prone to risks such as transaction suspension, credit blockage, and disruption of sorting relationships, leading to system stability and reliability issues.

Method used

A virtual fault domain isolation mechanism is introduced on the IO interconnect chip. By switching the state machine to QUIESCE mode, a transaction shadow table is established to classify and process incomplete transactions. After the fault is recovered, the task is replayed to avoid a chain reaction.

Benefits of technology

It effectively reduces the impact of faults on the interconnection system, achieves risk isolation and recovery, and ensures the stability and reliability of the system.

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Abstract

The invention relates to the technical field of chip interconnection, in particular to a virtual fault domain isolation and recovery method suitable for a Lingqu interconnection system, which comprises the following steps: when a fault event occurs, a state machine is switched to a QUIESCE mode, and a transaction shadow table is maintained; carrying out classification processing on the uncompleted transactions in the transaction shadow table, and monitoring the state of the access object; and after reconnection, task replay is carried out according to the transaction shadow table, and the state machine is switched back to the ACTIVE state. In order to solve the problem that in the prior art, a third-party node with a fault in a Lingqu interconnection system is prone to causing chain reaction, an isolation mechanism is added to an IO interconnection chip used for being connected to a third-party chip, a state machine of a fault domain is switched to a QUIESCE mode, a transaction shadow table of an uncompleted transaction is established, and the transaction shadow table of the uncompleted transaction is obtained. According to the method and the system, the IO interconnection chip performs proxy processing on part of transactions after the access object is recovered, so that faults of other equipment in the interconnection system are prevented from being caused in a fault reconnection stage, and replaying is performed after the access object is recovered, thereby realizing risk isolation and recovery processes.
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