Industrial control mainboard, power supply control method, equipment and storage medium

Abstract

This application discloses an industrial control motherboard, a power supply control method, a device, and a storage medium, relating to the field of Power over Ethernet (PoE) technology. The industrial control motherboard includes a PCIe slot electrically connected to a target power supply network card, a boost circuit, a power supply control circuit, and a jumper circuit connected between the boost circuit and the PCIe slot. The power supply control circuit is configured to, when the PoE network card is connected to the PCIe slot, configure the jumper circuit to PoE state, so as to provide PoE voltage to the PoE network card connected to the PCIe slot through the power supply pin of the jumper circuit; or, when a standard device network card is connected to the PCIe slot, switch the jumper circuit from PoE state to a preset electrically floating state, so as to disconnect the power supply pin from the PCIe slot, thereby realizing low-cost, high-reliability, flexible configuration and expansion applications.

Description

Technical Field

[0001] This application relates to the field of Power over Ethernet (PoE) technology, and more particularly to an industrial control motherboard, a power supply control method, a device, and a storage medium. Background Technology

[0002] With the rapid development of machine vision and industrial automation technologies, PoE (Power over Ethernet) technology is increasingly widely used in industrial control motherboards, especially in scenarios involving centralized power supply and data transmission for multiple network cameras, sensors, and IoT devices. PoE can significantly simplify cabling and improve system integration.

[0003] Currently, to enable industrial motherboards to support multiple PoE devices, a common solution is to integrate a complete PSE (Power Sourcing Equipment) circuit within a PCIe (Peripheral Component Interconnect Express) expansion card. This involves boosting the 12V power from the motherboard's PCIe slot within the card to provide a PoE-compliant 44-57V supply. However, this design, integrating the complete PSE power supply circuit within the PCIe device card, has significant technical limitations in practical applications. Firstly, this solution requires arranging a high-voltage boost circuit, a PSE boost control chip, and corresponding filtering and protection components within the limited area of ​​the expansion card. This significantly increases hardware costs, leads to complex circuit layouts and challenging heat dissipation design, and impacts the long-term reliability of the system. Secondly, due to the power supply capabilities and pin definitions of the PCIe slot, these dedicated PoE network cards are typically incompatible with other standard PCIe devices, restricting the expansion flexibility of industrial motherboards and making it difficult to flexibly switch or expand hardware devices with different functions according to actual application needs.

[0004] Therefore, while taking into account the universality and expansion flexibility of PCIe slots, how to achieve low-cost, high-reliability, and scalable PoE network ports has become an urgent technical problem to be solved. Summary of the Invention

[0005] The main objective of this application is to provide an industrial control motherboard, power supply control method, device, and storage medium, which aims to achieve a low-cost, high-reliability, scalable PoE network port while taking into account the universality and expansion flexibility of PCIe slots.

[0006] To achieve the above objectives, this application provides an industrial control motherboard, the industrial control motherboard comprising:

[0007] The PCIe slot is electrically connected to the target power supply network card, which can be either a Power over Ethernet network card or a standard device network card.

[0008] A boost circuit, configured to convert the input power supply voltage into an Ethernet power supply voltage compatible with the Ethernet power supply network card;

[0009] A jumper circuit is connected between the boost circuit and the PCIe slot;

[0010] A power supply control circuit, electrically connected to the jumper circuit, is configured to configure the jumper circuit to Ethernet power supply mode when the Ethernet power supply network card is connected to the PCIe slot, so as to provide the Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot through the power supply pin of the jumper circuit; or...

[0011] When the standard network card is connected to the PCIe slot, the jumper circuit switches from the Ethernet power supply state to a preset electrical floating state to disconnect the power supply pin from the PCIe slot.

[0012] In one embodiment, the cap-jumping circuit includes a first cap-jumping interface socket and a second cap-jumping interface socket;

[0013] The first pin of the first jumper connector is electrically connected to the power output terminal of the boost circuit, the second pin of the first jumper connector is electrically connected to the preset sixth local area network port, the third and fourth pins of the first jumper connector are electrically connected to the PCIe slot respectively, and the fifth and sixth pins of the first jumper connector are respectively left empty.

[0014] The first pin of the second jumper connector is electrically connected to a preset seventh LAN port, the second pin of the second jumper connector is electrically connected to a preset eighth LAN port, the third and fourth pins of the second jumper connector are electrically connected to the PCIe slot, and the fifth and sixth pins of the second jumper connector are respectively left empty. The power supply pins include the third and fourth pins of the first jumper connector and the third and fourth pins of the second jumper connector.

[0015] In one embodiment, the pin combination of the PCIe slot for connecting the power supply pins includes pins A5, A6, A7, and A8.

[0016] The A5 pin is electrically connected to the third pin of the first jump cap connector, the A6 pin is electrically connected to the fourth pin of the first jump cap connector, the A7 pin is electrically connected to the third pin of the second jump cap connector, and the A8 pin is electrically connected to the fourth pin of the second jump cap connector.

[0017] In one embodiment, the boost circuit includes a voltage conversion unit, a feedback control unit, an enable control unit, and a fuse unit;

[0018] The input terminal of the voltage conversion unit is electrically connected to the power input terminal and the input terminal of the fuse unit, respectively. The feedback terminal of the voltage conversion unit is electrically connected to the feedback control unit. The control terminal of the voltage conversion unit is electrically connected to the enable control unit. The output terminal of the fuse unit is electrically connected to the trip cap circuit.

[0019] In one embodiment, the voltage conversion unit includes a boost control chip, an inductor, a switching transistor, a packaged diode, a rectifier diode, a first resistor, a second resistor, a first capacitor, and a second capacitor;

[0020] The input terminal of the boost control chip is electrically connected to the power input terminal, the first terminal of the inductor, the first terminal of the first capacitor, and the first terminal of the second capacitor, respectively. The second terminals of the first capacitor and the second terminals of the second capacitor are grounded.

[0021] The third terminal of the packaged diode is electrically connected to the second terminal of the inductor and the first terminal of the packaged diode, respectively, and the second terminal of the packaged diode is electrically connected to the input terminal of the fuse unit.

[0022] The gate drive terminal of the boost control chip is electrically connected to the cathode of the rectifier diode and the first terminal of the first resistor, respectively. The gate of the switching transistor is electrically connected to the anode of the rectifier diode and the second terminal of the first resistor, respectively. The first path terminal of the switching transistor is electrically connected to the first terminal of the packaged diode. The first terminal of the second resistor is electrically connected to the current detection terminal of the boost control chip and the second path terminal of the switching transistor, respectively. The second terminal of the second resistor is grounded.

[0023] In one embodiment, the feedback control unit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a third capacitor, a fourth capacitor, and a fifth capacitor;

[0024] The error amplification output terminal of the boost control chip is electrically connected to the first terminal of the third resistor and the first terminal of the third capacitor, respectively. The first terminal of the fourth capacitor is electrically connected to the second terminal of the third resistor and the first terminal of the third capacitor, respectively. The second terminal of the fourth capacitor is grounded.

[0025] The feedback terminal of the boost control chip is electrically connected to the first terminal of the fourth resistor, the first terminal of the fifth resistor, and the first terminal of the fifth capacitor, respectively. The second terminal of the fourth resistor is grounded. The first terminal of the sixth resistor is electrically connected to the second terminal of the fifth resistor and the second terminal of the fifth capacitor, respectively. The second terminal of the sixth resistor is electrically connected to the second terminal of the packaged diode.

[0026] In one embodiment, the enable control unit includes a seventh resistor and an eighth resistor;

[0027] The first end of the seventh resistor is connected between the first end of the second capacitor and the input end of the boost control chip. The second end of the seventh resistor is electrically connected to the enable end of the boost control chip and the first end of the eighth resistor. The second end of the eighth resistor is grounded.

[0028] Furthermore, this application also provides a power supply control method, which is applied to the industrial control motherboard described above, and the power supply control method includes:

[0029] After the target power supply network card is inserted into the PCIe slot, the network card type of the target power supply network card is determined by the power supply control circuit;

[0030] When the network interface card (NIC) is a Power over Ethernet (PoE) NIC, the jumper circuit is configured to PoE mode. The power supply pins of the jumper circuit are connected to the electrical connection between the boost circuit and the PCIe slot to provide the PoE voltage output by the boost circuit to the PoE NIC; or...

[0031] When the network card type is a standard device network card, the jumper circuit is switched from the Ethernet power supply state to a preset electrical floating state to disconnect the power supply pin from the PCIe slot.

[0032] In addition, this application also provides a machine vision device, which includes the industrial control motherboard described above, and an Ethernet power supply network card and / or a standard device network card connected to a hardware expansion motherboard of the industrial control motherboard.

[0033] In addition, this application also provides a computer-readable storage medium storing a power supply control program, which, when executed by a processor, implements the steps of the power supply control method described above.

[0034] To address the shortcomings of existing technologies that fully integrate the PSE power supply circuitry into the motherboard's PCIe (Peripheral Component Interconnect Express) expansion card, such as high hardware costs, complex circuit layout, difficult heat dissipation, and incompatibility with standard network cards due to PCIe slot pin definition limitations, resulting in poor expansion flexibility, this application proposes an industrial control motherboard. This motherboard includes a PCIe slot for connecting a target power supply network card, a boost circuit for converting the input power supply voltage to be compatible with the Ethernet power supply network card, a jumper circuit connected between the boost circuit and the PCIe slot, and a power supply control circuit electrically connected to the jumper circuit. The target power supply network card can be either an Ethernet power supply network card or a standard network card.

[0035] In other words, this application, by setting up a jumper circuit in conjunction with a power supply control circuit, configures the jumper circuit to Ethernet power supply mode when the power supply control circuit determines that an Ethernet power supply network card is inserted into the PCIe slot. The jumper circuit then provides Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot through its power supply pins. Conversely, when the power supply control circuit determines that a standard device network card is inserted into the PCIe slot, the jumper circuit switches from Ethernet power supply mode to a preset electrically floating state, disconnecting the power supply pins from the PCIe slot. This allows the power supply circuit of the Ethernet power supply network card to be completely independent of the hardware expansion card (i.e., the PCIe interface expansion card). This fundamentally eliminates the problems of increased cost, high layout complexity, and heat dissipation difficulties caused by arranging boost circuits in the limited space of a hardware expansion card, significantly reducing the cost of PoE (Power over Ethernet). This invention addresses the hardware cost and design hurdles of Ethernet (Power over Ethernet) network cards. Furthermore, by using jumper circuitry, it enables the reuse of previously unused JTAG (Boundary Scan Test) pins (such as pins A5, A6, A7, and A8) in PCIe slots. These JTAG pins are reconfigured from boundary scan test functions to high-voltage power supply channels. Without altering the physical structure of the standard PCIe slot, the same set of pins carries both standard signal transmission and PoE high-voltage power supply functions. This allows a single PCIe slot to flexibly switch between PoE power supply mode and standard PCIe device mode via a simple physical jumper circuit. This not only maintains the complete compatibility of the industrial motherboard with standard device cards but also provides a stable and reliable high-voltage power supply for dedicated Ethernet network cards. Ultimately, it achieves low-cost, high-reliability, and flexibly expandable multi-PoE network port applications, significantly improving the adaptability and system integration of industrial motherboards in various application scenarios. Attached Figure Description

[0036] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0037] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a structural block diagram of the first embodiment of the industrial control motherboard of this application;

[0039] Figure 2 This is a schematic diagram of the PCIe slot and jumper circuit involved in the embodiments of this application;

[0040] Figure 3 This is a circuit diagram of the industrial control motherboard and the Ethernet power supply network card involved in the embodiments of this application;

[0041] Figure 4 This is a circuit diagram of the industrial control motherboard and the standard equipment network card involved in the embodiments of this application;

[0042] Figure 5 This is a schematic diagram of the boost circuit involved in the embodiments of this application;

[0043] Figure 6 This is a schematic diagram of the power supply control circuit involved in the embodiments of this application;

[0044] Figure 7 This is a schematic diagram of the structure of the machine vision device involved in the embodiments of this application.

[0045] Explanation of icon numbers:

[0046] 100. Industrial control motherboard; 10. PCIe slot; 20. Boost circuit; 30. Jumper circuit; JPOE1. First jumper interface; JPOE2. Second jumper interface; 40. Power supply control circuit; 200. Target power supply network card; L1. Inductor; Q1. Switching transistor; D0. Packaged diode; D1. Rectifier diode; R1. First resistor; R2. Second resistor; R3. Third resistor; R4. Fourth resistor; R5. Fifth resistor; R6. Sixth resistor; R7. Seventh resistor; R8. Eighth resistor; C1. First capacitor; C2. Second capacitor; C3. Third capacitor; C4. Fourth capacitor; C5. Fifth capacitor; 1001. Processor; 1002. Communication bus; 1003. User interface; 1004. Network interface; 1005. Memory.

[0047] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0048] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0049] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0050] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0051] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0052] With the rapid development of machine vision and industrial automation technologies, PoE (Power over Ethernet) technology is increasingly widely used in industrial control motherboards, especially in scenarios involving centralized power supply and data transmission for multiple network cameras, sensors, and IoT devices. PoE can significantly simplify cabling and improve system integration.

[0053] Currently, to enable industrial motherboards to support multiple PoE devices, a common solution is to integrate a complete PSE (Power Sourcing Equipment) circuit within a PCIe (Peripheral Component Interconnect Express) expansion card. This involves boosting the 12V power from the motherboard's PCIe slot within the card to provide a PoE-compliant 44-57V supply. However, this design, integrating the complete PSE power supply circuit within the PCIe device card, has significant technical limitations in practical applications. Firstly, this solution requires arranging a high-voltage boost circuit, PSE boost control chip, and corresponding filtering and protection components within the limited area of ​​the expansion card. This significantly increases hardware costs, leads to complex circuit layouts and challenging heat dissipation design, and impacts the long-term reliability of the system. Secondly, due to the power supply capabilities and pin definitions of the PCIe slot, these dedicated PoE network cards are typically incompatible with other standard PCIe devices, restricting the expansion flexibility of industrial motherboards and making it difficult to flexibly switch or expand hardware devices with different functions according to actual application needs.

[0054] Therefore, while taking into account the universality and expansion flexibility of PCIe slots, how to achieve low-cost, high-reliability, and scalable PoE network ports has become an urgent technical problem to be solved.

[0055] To address the aforementioned technical deficiencies, this application provides an industrial control motherboard, a power supply control method, an apparatus, and a storage medium.

[0056] This application provides an industrial control motherboard, as shown in the embodiments below. Figure 1 As shown, Figure 1 This is a structural block diagram of the first embodiment of the industrial control motherboard of this application. The industrial control motherboard 100 provided in this application includes:

[0057] PCIe slot 10, which is electrically connected to target power network card 200, which can be either a Power over Ethernet network card or a standard device network card.

[0058] In this embodiment, the PCIe slot 10 is electrically connected to the target power supply network card 200, which can be either a Power over Ethernet (PoE) network card or a standard device network card. That is, by using the standard PCIe slot 10 as a hardware expansion interface, this application can fully utilize the high bandwidth transmission capability and wide market compatibility of the PCIe bus, enabling the same industrial control motherboard 100 to flexibly connect different types of expansion cards according to actual application needs. It supports dedicated PoE network cards to achieve multi-channel PoE functionality, and is also compatible with a large number of standard device cards on the market. This significantly improves the adaptability of the industrial control motherboard 100 in various application scenarios while ensuring system expansion flexibility.

[0059] It should be noted that PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. PCIe slot 10 is a standardized physical interface on the motherboard used to connect various expansion cards, featuring high transmission rates, good compatibility, and well-defined pins. The PCIe slot 10 configured in this application can adopt the standard PCIe x1, x4, x8, or x16 physical specifications; this application does not impose any restrictions, and it can be customized according to application requirements. Furthermore, the pin definitions of PCIe slot 10 conform to the standards and specifications defined by PCI-SIG, including differential signal pairs dedicated to data transmission, standard power supply pins (+12V, +3.3V), ground pins, and auxiliary pins for system management and testing (such as JTAG pins).

[0060] A Power over Ethernet (PoE) network interface card is a dedicated network interface card that supports PoE functionality. For example, the PoE network interface card described in this application is the power receiving device—it receives boosted high-voltage power (44V~57V) from the motherboard (via jumper circuit 30) through PCIe slot 10, and then outputs this power through the RJ-45 port of the PoE network interface card to downstream IP (Internet Protocol) cameras, wireless APs (Access Points), and IoT (Internet of Things) devices (PDs). The PoE network interface card itself does not contain high-voltage conversion circuitry; it only serves as an extension of the power supply channel and port expansion.

[0061] Standard network cards, also known as standard PCIe network cards, refer to conventional network interface cards that do not rely on special power supply functions of the motherboard and only use the standard power pins (+12V, +3.3V) of the PCIe slot 10 for power supply. Standard network cards include, but are not limited to, ordinary network cards, graphics cards, sound cards, capture cards, SATA expansion cards, USB expansion cards, and M.2 adapter cards.

[0062] The boost circuit 20 is configured to convert the input power supply voltage into an Ethernet power supply voltage compatible with the Ethernet power supply network card.

[0063] In this embodiment, the input power supply voltage is converted into an Ethernet power supply voltage compatible with the Ethernet power supply network card by the boost circuit 20. This application integrates the boost circuit 20 on the industrial control motherboard 100 instead of on a hardware expansion card, so that the boost circuit 20 can be laid out in the relatively spacious area of ​​the industrial control motherboard 100. This avoids the heat dissipation problems and layout complexity caused by stacking high-voltage circuits in a small expansion card. At the same time, through the motherboard stacking design and large-area copper foil heat dissipation, the power density and long-term operational reliability of the circuit are effectively improved, providing a stable and efficient power supply guarantee for the simultaneous power supply of multiple PoE network ports.

[0064] A jumper circuit 30 is connected between the boost circuit 20 and the PCIe slot 10.

[0065] In this embodiment, the jumper circuit 30 is connected between the boost circuit 20 and the PCIe slot 10. This application achieves reliable control over the on / off state of PoE high-voltage power supply at the physical level by using the jumper circuit 30. When PoE functionality needs to be activated, the jumper circuit 30 connects the output of the boost circuit 20 to preset pins (A5, A6, A7, and A8) of the PCIe slot 10. When compatibility with standard PCIe devices is required, the jumper disconnects this connection, leaving the preset pins of the PCIe slot 10 floating. This physical jumper-based switching method not only has extremely low cost but also provides absolute electrical isolation, completely avoiding the risk of high-voltage misconnection to standard PCIe devices. It also gives end users the flexibility to freely configure system functions according to actual needs, requiring no software configuration or additional tools—it's plug-and-play, greatly improving the product's usability and adaptability to various scenarios.

[0066] A power supply control circuit 40 is electrically connected to the jumper circuit 30. The power supply control circuit 40 is configured to configure the jumper circuit 30 to Ethernet power supply mode when the Ethernet power supply network card is connected to the PCIe slot 10, so as to provide the Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot 10 through the power supply pin of the jumper circuit 30; or, when the standard device network card is connected to the PCIe slot 10, the jumper circuit 30 is switched from the Ethernet power supply mode to a preset electrically floating mode to disconnect the power supply pin from the PCIe slot 10.

[0067] In this embodiment, the power supply control circuit 40 is electrically connected to the jumper circuit 30. When the Ethernet power supply network card is connected to the PCIe slot 10, the power supply control circuit 40 configures the jumper circuit 30 to Ethernet power supply mode, so as to provide Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot 10 through the power supply pin of the jumper circuit 30, so as to power downstream powered devices (such as IP cameras, wireless APs, etc.). When the standard device network card is connected to the PCIe slot 10, the power supply control circuit 40 switches the jumper circuit 30 from Ethernet power supply mode to a preset electrical floating state, so as to quickly disconnect the electrical connection between the power supply pin of the jumper circuit 30 and the PCIe slot 10, thereby making the JTAG pin of the PCIe slot 10 floating state, thus avoiding damage to the standard device network card by high voltage power supply. At the same time, the standard power supply pins (+12V, +3.3V) of the PCIe slot 10 provide the power required for the normal operation of the standard device network card.

[0068] Furthermore, in some other feasible embodiments, reference is made to... Figure 2 The jumper circuit 30 includes a first jumper interface socket JPOE1 and a second jumper interface socket JPOE2; the first pin of the first jumper interface socket JPOE1 is electrically connected to the power output terminal of the boost circuit 20, the second pin of the first jumper interface socket JPOE1 is electrically connected to a preset sixth local area network port, the third and fourth pins of the first jumper interface socket JPOE1 are respectively electrically connected to the PCIe slot 10, and the fifth and sixth pins of the first jumper interface socket JPOE1 are respectively left empty.

[0069] In this embodiment, the first pin of the first jumper connector JPOE1 is electrically connected to the power output terminal of the boost circuit 20 to introduce the PoE high-voltage power supply (i.e., the Ethernet power supply voltage adapted to the Ethernet power supply network card) after boost conversion. The second pin of the first jumper connector JPOE1 is electrically connected to the preset sixth LAN port to connect the sixth Ethernet power supply output. The third and fourth pins of the first jumper connector JPOE1 are electrically connected to the A5 and A6 pins of the PCIe slot 10, respectively. The fifth and sixth pins of the first jumper connector JPOE1 are left empty to form an electrical floating state in the corresponding configuration state.

[0070] It should be noted that the third and fourth pins of the first jumper connector JPOE1 can be understood as part of the power supply pins.

[0071] The first pin of the second jumper connector JPOE2 is electrically connected to a preset seventh LAN port, the second pin of the second jumper connector JPOE2 is electrically connected to a preset eighth LAN port, the third and fourth pins of the second jumper connector JPOE2 are electrically connected to the PCIe slot 10, and the fifth and sixth pins of the second jumper connector JPOE2 are left empty. The power supply pins include the third and fourth pins of the first jumper connector JPOE1 and the third and fourth pins of the second jumper connector JPOE2.

[0072] In this embodiment, the first pin of the second jumper connector JPOE2 is electrically connected to a preset seventh LAN port for connecting the seventh Ethernet power supply output; the second pin of the second jumper connector JPOE2 is electrically connected to a preset eighth LAN port for connecting the eighth Ethernet power supply output; the third and fourth pins of the second jumper connector JPOE2 are electrically connected to the A7 and A8 pins of the PCIe slot 10, respectively, and the fifth and sixth pins of the second jumper connector JPOE2 are left empty.

[0073] It should be noted that the third and fourth pins of the second jumper connector JPOE2 can be understood as another part of the power supply pins. That is, the power supply pins of the jumper circuit 30 include the third and fourth pins of the first jumper connector JPOE1, and the third and fourth pins of the second jumper connector JPOE2. Through the above pin configuration, the jumper circuit 30 can utilize two independent jumper connectors to respectively carry the original high-voltage power supply from the boost circuit 20 and the controlled power supply managed by the power supply control circuit 40, and realize the physical switching between the Ethernet power supply state and the electrically floating state by changing the insertion position of the jumper cap on different pin combinations (such as 1-3 / 2-4 or 3-5 / 4-6).

[0074] For example, refer to Figure 2 as well as Figure 3 When the industrial control motherboard 100 is connected to a dedicated PoE network card (i.e., Ethernet power supply network card), the first / second jumper interface on the industrial control motherboard 100 is configured with jumpers on pins 1-3 and 2-4, so that pins A5, A6, A7 and A8 of the PCIe slot 10 in the industrial control motherboard 100 are connected to the 48V boost power supply Vin and the power circuit Vout controlled by the 3-way power supply control circuit 40 (i.e., PSE controller), respectively. The dedicated PoE network card is inserted into the PCIe slot 10 through the gold finger circuit to establish an electrical connection with the industrial control motherboard 100, thereby realizing the PoE function of the network card.

[0075] Reference Figure 2 as well as Figure 4 When a standard PCIe device card (i.e., a standard network card) is connected to the industrial motherboard 100, the first / second jumper connector on the industrial motherboard 100 is configured with jumpers on pins (3-5) and (4-6), causing pins A5, A6, A7, and A8 of the PCIe slot 10 on the industrial motherboard 100 to be in a floating state. The standard PCIe device card is powered by the 12V / 3.3V supply from the industrial motherboard 100 and the standard PCIe signals connected to the motherboard, enabling the normal operation of the standard PCIe device card.

[0076] It should be noted that both the first jumper connector JPOE1 and the second jumper connector adopt a 2×3 dual-row six-pin specification with a standard pin pitch of 2.54mm, facilitating operation using common jumper caps. The preset sixth, seventh, and eighth LAN ports correspond to the multiple PoE network ports supported by the industrial control motherboard 100, and can be connected to the corresponding power supply pairs of the RJ-45 network interface in the actual circuit layout. Through the above jumper circuit 30 design, this application can achieve flexible configuration of multiple PoE power supplies at extremely low hardware cost, while ensuring reliable isolation between high-voltage power supply and standard PCIe devices.

[0077] Figure 3 as well as Figure 4 The PCH and MCU shown represent Platform Controller Hub (also known as Platform Controller Center) and Microcontroller Unit (also known as Microcontroller Unit) respectively.

[0078] Furthermore, in some feasible embodiments, reference is made to Figure 2The PCIe slot 10 has a pin combination for connecting the power supply pins, including pins A5, A6, A7, and A8. Pin A5 is electrically connected to the third pin of the first jumper connector JPOE1, pin A6 is electrically connected to the fourth pin of the first jumper connector JPOE1, pin A7 is electrically connected to the third pin of the second jumper connector JPOE2, and pin A8 is electrically connected to the fourth pin of the second jumper connector JPOE2.

[0079] In this embodiment, the JTAG pins (A5, A6, A7, and A8) in PCIe slot 10, originally used for boundary scan testing, are multiplexed as transmission channels for PoE high-voltage power supply. Pins A5 and A6 are connected to the power output of the boost circuit 20 via the first jumper connector JPOE1 to introduce initial high-voltage power supply before PSE control. Pins A7 and A8 are connected to the controlled output of the PSE control circuit via the second jumper connector JPOE2 to introduce PoE power supply after detection and hierarchical management. This pin allocation allows the four JTAG pins to carry two sets of power supply signals of different natures, laying the foundation for subsequent independent control of multiple PoE ports.

[0080] It should be noted that, according to the PCIe standard specification defined by PCI-SIG, pins A5, A6, A7, and A8 in PCIe slot 10 are typically idle or used only for boundary scan testing in standard PCIe devices, and do not participate in the normal power supply and communication of the device. This application utilizes this idle pin resource, and through the flexible configuration of the jumper circuit 30, it endows these pins with a completely new power supply function without changing the physical structure of PCIe slot 10, thereby realizing high-voltage power supply support for dedicated PoE network cards while maintaining full compatibility with standard PCIe device cards.

[0081] Furthermore, in some other feasible embodiments, the boost circuit 20 includes a voltage conversion unit, a feedback control unit, an enable control unit, and a fuse unit; the input terminal of the voltage conversion unit is electrically connected to the power input terminal and the input terminal of the fuse unit, respectively; the feedback terminal of the voltage conversion unit is electrically connected to the feedback control unit; the control terminal of the voltage conversion unit is electrically connected to the enable control unit; and the output terminal of the fuse unit is electrically connected to the jumper circuit 30.

[0082] In this embodiment, the input terminal of the voltage conversion unit is connected to the power input terminal (i.e., Figure 5The input terminals of the V12_24VIN and the fuse unit are electrically connected to obtain input power from the motherboard power supply and simultaneously deliver the input power to the fuse unit for protection. The feedback terminal of the voltage conversion unit is electrically connected to the feedback control unit to receive the output voltage sampling signal collected by the feedback control unit, so as to adjust the working state of the voltage conversion unit in real time. The control terminal of the voltage conversion unit is electrically connected to the enable control unit to receive the start or stop command issued by the enable control unit and control whether the voltage conversion unit is put into operation. The output terminal of the fuse unit is electrically connected to the jumper circuit 30 to deliver the stable PoE power supply voltage after overcurrent and overvoltage protection to the jumper circuit 30 for subsequent power supply switching.

[0083] Furthermore, in some feasible embodiments, reference is made to Figure 5 The voltage conversion unit includes a boost control chip, an inductor L1, a switching transistor Q1, a packaged diode D0, a rectifier diode D1, a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2. The input terminal of the boost control chip is electrically connected to the power input terminal, the first terminal of the inductor L1, the first terminal of the first capacitor C1, and the first terminal of the second capacitor C2, respectively. The second terminals of the first capacitor C1 and the second terminal of the second capacitor C2 are grounded. The third terminal of the packaged diode D0 is electrically connected to the second terminal of the inductor L1 and the first terminal of the packaged diode D0, respectively. The second terminal of the packaged diode D0 is electrically connected to the input terminal of the fuse unit; the gate drive terminal of the boost control chip is electrically connected to the cathode of the rectifier diode D1 and the first terminal of the first resistor R1, respectively; the gate of the switch Q1 is electrically connected to the anode of the rectifier diode D1 and the second terminal of the first resistor R1, respectively; the first path terminal of the switch Q1 is electrically connected to the first terminal of the packaged diode D0; the first terminal of the second resistor R2 is electrically connected to the current detection terminal of the boost control chip and the second path terminal of the switch Q1, respectively; and the second terminal of the second resistor R2 is grounded.

[0084] In this embodiment, the input terminal of the boost control chip is electrically connected to the power input terminal, the first terminal of inductor L1, the first terminal of first capacitor C1, and the first terminal of second capacitor C2, respectively, for receiving and filtering the input power. The second terminals of first capacitor C1 and second capacitor C2 are grounded to form an input filter network to suppress power ripple. The third terminal of packaged diode D0 is electrically connected to the second terminal of inductor L1 and the first terminal of packaged diode D0, and the second terminal of packaged diode D0 is electrically connected to the input terminal of fuse unit, forming the main path for power conversion. The gate drive terminal of the boost control chip is electrically connected to the cathode of rectifier diode D1 and the first terminal of first resistor R1, respectively, for outputting PWM drive signals. The gate of switching transistor Q1 is electrically connected to the anode of rectifier diode D1 and the second terminal of first resistor R1, respectively. The first path terminal of switching transistor Q1 is electrically connected to the first terminal of packaged diode D0. The first terminal of second resistor R2 is electrically connected to the current detection terminal of boost control chip and the second path terminal of switching transistor Q1, respectively. The second terminal of second resistor R2 is grounded to realize peak current detection and current limiting protection.

[0085] It should be noted that the boost control chip model can be MP3910GK, or it can be customized according to application requirements. This application does not impose any restrictions here.

[0086] Furthermore, in some other feasible embodiments, reference is made to... Figure 5 The feedback control unit includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5. The error amplification output terminal of the boost control chip is electrically connected to the first terminal of the third resistor R3 and the first terminal of the third capacitor C3, respectively. The first terminal of the fourth capacitor C4 is electrically connected to the second terminal of the third resistor R3 and the first terminal of the third capacitor C3, respectively. The second terminal of the fourth capacitor C4 is grounded. The feedback terminal of the boost control chip is electrically connected to the first terminal of the fourth resistor R4, the first terminal of the fifth resistor R5, and the first terminal of the fifth capacitor C5, respectively. The second terminal of the fourth resistor R4 is grounded. The first terminal of the sixth resistor R6 is electrically connected to the second terminal of the fifth resistor R5 and the second terminal of the fifth capacitor C5, respectively. The second terminal of the sixth resistor R6 is electrically connected to the second terminal of the packaged diode D0.

[0087] In this embodiment, the error amplification output terminal of the boost control chip is electrically connected to the first terminal of the third resistor R3 and the first terminal of the third capacitor C3, respectively, for outputting an error amplification signal. The first terminal of the fourth capacitor C4 is electrically connected to the second terminal of the third resistor R3 and the first terminal of the third capacitor C3, respectively, and the second terminal of the fourth capacitor C4 is grounded. Together with the third resistor R3 and the third capacitor C3, they form a loop compensation network to optimize the stability and transient response of the control loop. The feedback terminal of the boost control chip is electrically connected to the first terminal of the fourth resistor R4, the first terminal of the fifth resistor R5, and the first terminal of the fifth capacitor C5, respectively, for receiving the sampling signal of the output voltage. The second terminal of the fourth resistor R4 is grounded. The first terminal of the sixth resistor R6 is electrically connected to the second terminal of the fifth resistor R5 and the second terminal of the fifth capacitor C5, respectively, and the second terminal of the sixth resistor R6 is electrically connected to the second terminal of the packaged diode D0, forming a precision resistor voltage divider network. This network samples the output voltage in real time and compares it with an internal reference to achieve precise voltage regulation.

[0088] Furthermore, in some feasible embodiments, reference is made to Figure 5 The enable control unit includes a seventh resistor R7 and an eighth resistor R8; the first end of the seventh resistor R7 is connected between the first end of the second capacitor C2 and the input end of the boost control chip, the second end of the seventh resistor R7 is electrically connected to the enable end of the boost control chip and the first end of the eighth resistor R8, and the second end of the eighth resistor R8 is grounded.

[0089] In this embodiment, the first terminal of the seventh resistor R7 is connected between the first terminal of the second capacitor C2 and the input terminal of the boost control chip, and is used to obtain an enable control signal from the input power supply. The second terminal of the seventh resistor R7 is electrically connected to the enable terminal of the boost control chip and the first terminal of the eighth resistor R8. The second terminal of the eighth resistor R8 is grounded, forming a resistor voltage divider network with the seventh resistor R7 to provide a suitable operating level for the enable terminal. When the external control signal is high, the voltage at the enable terminal is higher than the chip's startup threshold, and the boost control chip starts working. When the external control signal is low or floating, the voltage at the enable terminal is pulled low to ground, and the boost control chip is turned off, realizing on-demand power supply and energy-saving control.

[0090] In summary, this application, by setting up a jumper circuit 30 in conjunction with a power supply control circuit 40, configures the jumper circuit 30 to Ethernet power supply mode when the power supply control circuit 40 determines that an Ethernet power supply network card is inserted into the PCIe slot 10. This provides Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot 10 through the power supply pins of the jumper circuit 30. Conversely, when the power supply control circuit 40 determines that a standard device network card is inserted into the PCIe slot 10, it switches the jumper circuit 30 from Ethernet power supply mode to a preset electrically floating state, disconnecting the power supply pins from the PCIe slot 10. This allows the power supply circuit of the Ethernet power supply network card to be completely independent of the hardware expansion card (i.e., the PCIe interface expansion card). This fundamentally eliminates the problems of increased cost, high layout complexity, and heat dissipation difficulties caused by arranging the boost circuit 20 in the limited space of the hardware expansion card, significantly reducing the power supply voltage of PoE (Power over Ethernet). This invention addresses the hardware cost and design hurdles of Ethernet (Power over Ethernet) network cards. Furthermore, by using jumper circuit 30, it enables the reuse of previously idle JTAG (Boundary Scan Test) pins (such as pins A5, A6, A7, and A8) in PCIe slot 10, reconfiguring them from boundary scan test functions to high-voltage power supply channels. Without altering the physical structure of the standard PCIe slot 10, it utilizes the same set of pins to carry both standard signal transmission and PoE high-voltage power supply. This allows a single PCIe slot 10 to flexibly switch between PoE power supply mode and standard PCIe device mode via simple physical jumper circuit 30. This not only maintains the complete compatibility of the industrial control motherboard 100 with standard device cards but also provides stable and reliable high-voltage power supply for dedicated Ethernet network cards. Ultimately, it achieves low-cost, high-reliability, and flexibly expandable multi-channel PoE network port applications, significantly improving the adaptability and system integration of the industrial control motherboard 100 in various application scenarios.

[0091] Furthermore, based on the first embodiment of the industrial control motherboard of this application, a second embodiment of the power supply control method for the industrial control motherboard of this application is proposed.

[0092] The power supply control method for the industrial control motherboard of this application is applied to the industrial control motherboard described above. The power supply control method for the industrial control motherboard of this application is executed by the terminal device (e.g., machine vision device) applied to the industrial control motherboard. The control method of this application includes the following implementation steps S10 to S30.

[0093] Step S10: After inserting the target power supply network card into the PCIe slot, the network card type of the target power supply network card is determined by the power supply control circuit.

[0094] In this embodiment, when a user inserts a target power supply network card (which may be an Ethernet power supply network card or a standard device network card) into a PCIe slot, the power supply control circuit (i.e., the PSE controller) detects the voltage level of a specific pin on the PCIe slot and communicates with the main control module of the industrial control motherboard (i.e., the main control module of the industrial control motherboard). Figures 3 to 4 The PCH / MCU communication shown obtains the network card type of the target power supply network card, thereby accurately distinguishing whether the inserted target power supply network card is a dedicated Ethernet power supply network card that requires PoE power.

[0095] It should be noted that the circuit structure of the power supply control circuit is based on... Figure 6 As shown.

[0096] Step S20: When the network card type is a Power over Ethernet (PoE) network card, configure the jumper circuit to PoE state, and connect the power supply pin of the jumper circuit to the electrical connection between the boost circuit and the PCIe slot to provide the PoE network card with the PoE voltage output by the boost circuit; or, when the network card type is a standard device network card, switch the jumper circuit from the PoE state to a preset electrically floating state to disconnect the power supply pin from the PCIe slot.

[0097] In this embodiment, when the power supply control circuit identifies the inserted network card as a Power over Ethernet (PoE) network card, it sends a PoE control signal to the jumper circuit, causing the jumper circuit to switch to PoE mode. In this PoE mode, the power supply pins of the jumper circuit (e.g., contacts connected to the JTAG pins of the PCIe slot) are connected to the output of the boost circuit, thereby supplying the PoE power supply voltage (typically 44V~57V) compliant with the IEEE 802.3 standard generated by the boost circuit to the PoE network card via preset pins of the PCIe slot (e.g., A5, A6, A7, A8), providing operating power and external power supply capability for the PoE network card. Conversely, when the power supply control circuit identifies the inserted network card as a standard device (e.g., a standard gigabit network card, graphics card, etc.), it sends a standard network card control signal to the jumper circuit, causing the jumper circuit to switch to a preset electrically floating state. In this electrically suspended state, the electrical connection between the power supply pin of the jumper circuit and the boost circuit and PCIe slot is completely disconnected, and the JTAG pin of the PCIe slot is in a high-impedance suspended state, thereby ensuring that the standard device network card obtains its working power only through the standard +12V / +3.3V power supply pin of the PCIe slot, avoiding damage to it caused by high-voltage PoE power supply.

[0098] This application achieves intelligent identification and automatic power supply mode adaptation for different types of network interface cards (NICs) through the above steps. This ensures both the high-voltage power supply requirements of Power over Ethernet (PoE) NICs and complete compatibility with standard PCIe devices, improving system security and ease of use. Furthermore, the physical switching method of the jumper circuit is simple and reliable, requiring no complex software configuration, lowering the user's operational threshold and enhancing the product's market adaptability.

[0099] In addition, this application also provides a machine vision device. Please refer to... Figure 7 , Figure 7 This is a schematic diagram of the machine vision device involved in the embodiments of this application. Specifically, the machine vision device in the embodiments of this application may be a device for a locally operating control method.

[0100] The machine vision device includes the industrial control motherboard described above, and an Ethernet power supply network card and / or a standard device network card connected to a hardware expansion motherboard of the industrial control motherboard. In addition, the machine vision device may also include a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, it implements the steps of the power supply control method described above.

[0101] like Figure 7 As shown, the machine vision device in this embodiment may include: an industrial control motherboard, a processor 1001 (e.g., a CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen and an input unit, such as a keyboard. Optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (e.g., a Wi-Fi interface).

[0102] The memory 1005 is disposed on the main body of the machine vision device. The memory 1005 stores a program that performs corresponding operations when executed by the processor 1001. The memory 1005 is also used to store parameters used by the machine vision device. The memory 1005 can be a high-speed RAM or a stable, non-volatile memory, such as a disk drive. Optionally, the memory 1005 can also be a storage device independent of the aforementioned processor 1001.

[0103] Those skilled in the art will understand that Figure 7 The machine vision device structure shown does not constitute a limitation on the machine vision device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0104] like Figure 7 As shown, the memory 1005, which serves as a storage medium, may include an operating system, a network communication module, a user interface module, and a power supply control program.

[0105] exist Figure 7 In the machine vision device shown, the processor 1001 can be used to call the power supply control program stored in the memory 1005 and execute the steps of the power supply control method as described above.

[0106] In addition, this application also provides a computer-readable storage medium storing a power supply control program, which, when executed by a processor, implements the steps of the power supply control method described above.

[0107] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0108] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0109] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a machine vision device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0110] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. An industrial control motherboard, characterized by, The industrial control motherboard includes: The PCIe slot is electrically connected to the target power supply network card, which can be either a Power over Ethernet network card or a standard device network card. A boost circuit, configured to convert the input power supply voltage into an Ethernet power supply voltage compatible with the Ethernet power supply network card; A jumper circuit is connected between the boost circuit and the PCIe slot; A power supply control circuit, electrically connected to the jumper circuit, is configured to configure the jumper circuit to Ethernet power supply mode when the Ethernet power supply network card is connected to the PCIe slot, so as to provide the Ethernet power supply voltage to the Ethernet power supply network card connected to the PCIe slot through the power supply pin of the jumper circuit; or... When the standard network card is connected to the PCIe slot, the jumper circuit is switched from the Ethernet power supply state to a preset electrical floating state to disconnect the power supply pin from the PCIe slot. In this embodiment, the JTAG pins in the PCIe slot, originally used for boundary scan testing, are multiplexed as a transmission channel for PoE high-voltage power supply. The JTAG pins include pins A5, A6, A7, and A8. Pins A5 and A6 are connected to the power output terminal of the boost circuit via the first jumper interface in the jumper circuit, and pins A7 and A8 are connected to the controlled output terminal of the PSE control circuit via the second jumper interface in the jumper circuit. The power supply control circuit is configured to detect the voltage level of a specific pin on the PCIe slot when the target power supply network card is inserted into the PCIe slot, and communicate with the main control module of the industrial control motherboard to obtain the network card type of the target power supply network card. When the network card type is a Power over Ethernet (PoE) network card, the jumper circuit is configured to PoE state, and the power supply pin of the jumper circuit is connected to the electrical connection between the boost circuit and the PCIe slot to provide the PoE network card with the PoE voltage output by the boost circuit; or, when the network card type is a standard device network card, the jumper circuit is switched from the PoE state to a preset electrically floating state to disconnect the power supply pin from the PCIe slot.

2. The industrial control motherboard as described in claim 1, characterized in that, The cap changer circuit includes a first cap changer interface socket and a second cap changer interface socket; The first pin of the first jumper connector is electrically connected to the power output terminal of the boost circuit, the second pin of the first jumper connector is electrically connected to the preset sixth local area network port, the third and fourth pins of the first jumper connector are electrically connected to the PCIe slot respectively, and the fifth and sixth pins of the first jumper connector are respectively left empty. The first pin of the second jumper connector is electrically connected to a preset seventh LAN port, the second pin of the second jumper connector is electrically connected to a preset eighth LAN port, the third and fourth pins of the second jumper connector are electrically connected to the PCIe slot, and the fifth and sixth pins of the second jumper connector are respectively left empty. The power supply pins include the third and fourth pins of the first jumper connector and the third and fourth pins of the second jumper connector.

3. The industrial control motherboard as described in claim 2, characterized in that, The pin combination used by the PCIe slot to connect the power supply pins includes pins A5, A6, A7, and A8. The A5 pin is electrically connected to the third pin of the first jump cap connector, the A6 pin is electrically connected to the fourth pin of the first jump cap connector, the A7 pin is electrically connected to the third pin of the second jump cap connector, and the A8 pin is electrically connected to the fourth pin of the second jump cap connector.

4. The industrial control motherboard as described in claim 1, characterized in that, The boost circuit includes a voltage conversion unit, a feedback control unit, an enable control unit, and a fuse unit; The input terminal of the voltage conversion unit is electrically connected to the power input terminal and the input terminal of the fuse unit, respectively. The feedback terminal of the voltage conversion unit is electrically connected to the feedback control unit. The control terminal of the voltage conversion unit is electrically connected to the enable control unit. The output terminal of the fuse unit is electrically connected to the trip cap circuit.

5. The industrial control motherboard as described in claim 4, characterized in that, The voltage conversion unit includes a boost control chip, an inductor, a switching transistor, a packaged diode, a rectifier diode, a first resistor, a second resistor, a first capacitor, and a second capacitor; The input terminal of the boost control chip is electrically connected to the power input terminal, the first terminal of the inductor, the first terminal of the first capacitor, and the first terminal of the second capacitor, respectively. The second terminals of the first capacitor and the second terminals of the second capacitor are grounded. The third terminal of the packaged diode is electrically connected to the second terminal of the inductor and the first terminal of the packaged diode, respectively, and the second terminal of the packaged diode is electrically connected to the input terminal of the fuse unit. The gate drive terminal of the boost control chip is electrically connected to the cathode of the rectifier diode and the first terminal of the first resistor, respectively. The gate of the switching transistor is electrically connected to the anode of the rectifier diode and the second terminal of the first resistor, respectively. The first path terminal of the switching transistor is electrically connected to the first terminal of the packaged diode. The first terminal of the second resistor is electrically connected to the current detection terminal of the boost control chip and the second path terminal of the switching transistor, respectively. The second terminal of the second resistor is grounded.

6. The industrial control motherboard as described in claim 5, characterized in that, The feedback control unit includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a third capacitor, a fourth capacitor, and a fifth capacitor; The error amplification output terminal of the boost control chip is electrically connected to the first terminal of the third resistor and the first terminal of the third capacitor, respectively. The first terminal of the fourth capacitor is electrically connected to the second terminal of the third resistor and the first terminal of the third capacitor, respectively. The second terminal of the fourth capacitor is grounded. The feedback terminal of the boost control chip is electrically connected to the first terminal of the fourth resistor, the first terminal of the fifth resistor, and the first terminal of the fifth capacitor, respectively. The second terminal of the fourth resistor is grounded. The first terminal of the sixth resistor is electrically connected to the second terminal of the fifth resistor and the second terminal of the fifth capacitor, respectively. The second terminal of the sixth resistor is electrically connected to the second terminal of the packaged diode.

7. The industrial control motherboard as described in claim 5, characterized in that, The enabling control unit includes a seventh resistor and an eighth resistor; The first end of the seventh resistor is connected between the first end of the second capacitor and the input end of the boost control chip. The second end of the seventh resistor is electrically connected to the enable end of the boost control chip and the first end of the eighth resistor. The second end of the eighth resistor is grounded.

8. A power supply control method, characterized in that, The power supply control method is applied to the industrial control motherboard according to any one of claims 1 to 7, and the power supply control method includes: After the target power supply network card is inserted into the PCIe slot, the network card type of the target power supply network card is determined by the power supply control circuit; When the network interface card (NIC) is a Power over Ethernet (PoE) NIC, the jumper circuit is configured to PoE mode. The power supply pins of the jumper circuit are connected to the electrical connection between the boost circuit and the PCIe slot to provide the PoE voltage output by the boost circuit to the PoE NIC; or... When the network card type is a standard device network card, the jumper circuit is switched from the Ethernet power supply state to a preset electrical floating state to disconnect the power supply pin from the PCIe slot.

9. A machine vision device, characterized in that, The machine vision device includes an industrial control motherboard as described in any one of claims 1 to 7, and an Ethernet power supply network card and / or a standard device network card connected to a hardware expansion motherboard of the industrial control motherboard.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a power supply control program, which, when executed by a processor, implements the steps of the power supply control method as described in claim 8.

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