Slave ordered response method and system based on RS485 bus

By using timers and listening mechanisms in the RS485 bus system, the slave response time is dynamically adjusted, which solves the conflict problem in the RS485 bus initialization phase, achieves efficient and reliable slave response, and supports large-scale slave networks.

CN122053285APending Publication Date: 2026-05-15FOSHAN SMARTSUN AUTO LIGHTING TECHNOIOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
FOSHAN SMARTSUN AUTO LIGHTING TECHNOIOGY CO LTD
Filing Date
2026-01-30
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

The existing RS485 bus is prone to bus conflicts when multiple slave devices respond during the system initialization phase, leading to data transmission errors. The existing random delay method has a high probability of conflict and low efficiency when there are many slave devices, making it difficult to support large-scale networks.

Method used

By configuring a microcontroller in the slave device, a timer is used to initialize and listen for bus activity. The timer is dynamically reset to avoid conflicts and ensure orderly responses. The random value range of the timer is 5-10 milliseconds, and hardware or software timer configuration is supported.

Benefits of technology

It significantly reduces the probability of bus collisions caused by multiple slave responses, enables orderly and serial responses from slaves, improves the success rate and efficiency of system initialization, and supports the connection of more slave devices.

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Abstract

The invention discloses a slave ordered response method and system based on an RS485 bus. (1) the host broadcasts an equipment scanning instruction to the bus; (2) after each slave on the bus receives the scanning instruction, respectively initializing and starting a timer, and setting the initial timeout time of the timer as a random value; (3) during the operation period of the timer, each slave continuously monitors data activity on the bus; (4) if a certain slave monitors any data byte on the bus before the timer of the slave is overtime, the timer of the slave is reset immediately, so that the slave starts timing again; and (5) if the timer of a certain slave machine is successfully overtime and the bus is in an idle state at the overtime moment, the slave machine obtains the right to use the bus and sends response data to the host machine. The method is particularly suitable for slave equipment scanning and address allocation in a system initialization stage, can support connection of more slaves, and improves the stability and expansibility of the system.
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Description

Technical Field

[0001] This invention relates to the field of industrial communication network technology, specifically to a communication method based on RS485 bus, and more particularly to a slave-ordered response method and system that can effectively avoid conflicts among multiple slaves competing for bus usage rights during the system initialization phase. Background Technology

[0002] The RS485 bus has been widely used in industrial automation, intelligent instruments, and security systems due to its advantages such as simple structure, low cost, strong anti-interference capability, and long transmission distance. The RS485 standard specifies that its network uses a half-duplex, differential transmission mode. At any given time, only one transmitting unit (device) is allowed to send data to the bus, while all other units are in receiving mode. If two or more devices attempt to send data at the same time, a "bus collision" will occur, leading to data transmission errors and communication failure.

[0003] Therefore, communication systems based on the RS485 bus must employ a strict bus access control mechanism. Currently, the most common mode is "one master, many slaves" token-based communication. This means that a master actively polls each slave device, and only the slave device that obtains a "token" (i.e., is addressed by the master) has the right to respond within a specified time period, thus avoiding conflicts.

[0004] However, before this master-slave mode can be established, the system requires an initialization process to identify and configure all slave devices in the network. Typically, the master broadcasts a "device scan command," requesting all slave devices to report their own information (such as serial number, detection parameters, etc.) so that the master can assign a unique logical address to each slave device based on this information. It is precisely in this scan-response phase that bus conflicts are highly likely to occur, as all slave devices attempt to respond to the broadcast command without being aware of each other's presence or transmission time.

[0005] Existing technologies typically employ a "random delayed response" method to attempt to solve this problem. That is, each slave device, upon receiving a scan command, does not immediately respond but waits for a randomly generated time (e.g., a random value within the range of 1-100 milliseconds). The slave device with the shortest delay time gains bus access and sends data first. This method is effective when the number of slave devices is small (e.g., less than 10). However, as the number of slave devices increases, the distribution of the random delay value may become too concentrated, resulting in very similar delay times for multiple slave devices. If the first slave device's data transmission duration (e.g., 20ms) is longer than the delay time difference between subsequent slave devices (e.g., only 1ms), subsequent slave devices will still start transmitting before the previous slave device has finished transmitting, causing unavoidable data frame overlap and collisions, leading to scan failure or extremely low efficiency.

[0006] In summary, existing random delay methods suffer from technical drawbacks such as low reliability and limited capacity to accommodate a limited number of slave devices, and urgently need improvement. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to provide a slave ordered response method and system based on RS485 bus, which significantly reduces the probability of bus conflict in multi-slave response, realizes ordered and serial response of slaves, thereby improving the success rate and efficiency of system initialization and supporting the connection of larger-scale slave networks.

[0008] To solve the above-mentioned technical problems, the technical solution of the present invention is: a slave ordered response method based on an RS485 bus, the method comprising the following steps: (1) The host broadcasts a device scan command to the bus; (2) After receiving the scan command, each slave device on the bus initializes and starts a timer, and the initial timeout of the timer is set to a random value; (3) During the operation of the timer, each slave device continuously listens for data activity on the bus; (4) If a slave device detects any data byte on the bus before its timer expires, it immediately resets its timer to restart the timing process; (5) If the timer of a slave device successfully times out and the bus is idle at the time of the timeout, the slave device obtains the right to use the bus and sends response data to the master.

[0009] As an improvement, the range of the random value is less than the complete transmission duration of the response data.

[0010] As an improvement, the random value ranges from 5 milliseconds to 10 milliseconds. The specific duration can be adjusted by the developer according to their actual needs.

[0011] As an improvement, the timer can be a software timer or a hardware timer, and its timing period is configurable.

[0012] As an improvement, after the host assigns a unique address code to each slave device based on the received response data, the system enters a token-based master-slave communication mode based on the address code.

[0013] The present invention also provides an RS485 bus communication system for implementing the above method, comprising a master unit and multiple slave units connected via an RS485 bus. Each slave unit is internally configured with a microcontroller, the microcontroller being programmed to execute the steps of the above-described ordered response method.

[0014] The beneficial effects of this invention compared to the prior art are: 1. High reliability: Through the dynamic avoidance mechanism of "listen and reset", physical layer conflicts caused by overlapping data frame transmission times are fundamentally avoided, ensuring that every response data packet can be sent completely and correctly. 2. High scalability: Because the probability of collision is reduced to an extremely low level, this invention can support a much larger number of slave devices than the traditional random delay method, which significantly improves the scale and scalability of the system. 3. Simple to implement and low cost: This invention does not require any additional hardware costs. It only requires the implementation of timer management and bus status listening logic in the microcontroller software of the slave device, making it easy to upgrade and modify existing products. Attached Figure Description

[0015] Figure 1 This is a system block diagram.

[0016] Figure 2 Flowchart of RS485 data transmission program.

[0017] Figure 3 This is a flowchart of the RS485 data interrupt receiving program. Detailed Implementation

[0018] The present invention will now be further described with reference to the accompanying drawings.

[0019] like Figure 1 As shown, a communication system based on an RS485 bus includes a master unit and multiple slave units, which are connected together via an RS485 bus.

[0020] like Figure 2 , 3 As shown, a slave-based ordered response method based on an RS485 bus includes the following steps: (1) The host broadcasts a device scan command to the bus; (2) After receiving the scan command, each slave device on the bus initializes and starts a timer. The initial timeout of the timer is set to a random value. The timer is a software timer or a hardware timer, and its timing period is configurable. The random value ranges from 5 milliseconds to 10 milliseconds. (3) During the operation of the timer, each slave device continuously listens for data activity on the bus; (4) If a slave device detects any data byte on the bus before its timer expires, it immediately resets its timer to restart the timing process; (5) If the timer of a slave device successfully times out and the bus is idle at the time of the timeout, the slave device obtains the right to use the bus and sends response data to the master.

[0021] Example of effect comparison: Assume the random delays of the three slave devices are 5ms, 6ms, and 7ms respectively, and the acknowledgment packet transmission takes 20ms. Slave 1 starts transmitting at t=5ms. Slave 2, at t=6ms, although its timer expires, starts transmitting randomly because slave 1 is still transmitting (the bus is occupied). This results in data collisions between t=6ms and t=20ms. The same applies to slave 3.

[0022] In the same scenario, slave device 1 starts transmitting at t=5ms. Slave device 2's timer originally expired at t=6ms, but between t=5ms and t=6ms, it detected data bytes being transmitted by slave device 1 and immediately reset its timer. Each time it detects one byte of data, it triggers a timer reset. During the 20ms transmission period of slave device 1, slave device 2 will be triggered to reset its timer several times (assuming the last detection triggers a new reset delay of 8ms). Similarly, slave device 3 also resets its timer at t=5ms (assuming the last detection triggers a new reset delay of 9ms). Slave device 1 finishes transmitting at t=25ms. Afterwards, the bus becomes idle, and slave device 2's timer expires at t=25ms + 8ms = 33ms. At this point, the bus is idle, so slave device 2 starts transmitting. During slave device 2's transmission period, slave device 3 will continuously detect data and reset its timer until slave device 2 finishes transmitting, at which point it gains bus access and begins transmitting at t=53ms. The entire process was orderly and without any conflicts.

Claims

1. A slave-ordered response method based on an RS485 bus, characterized in that, The method includes the following steps: (1) The host broadcasts a device scan command to the bus; (2) After receiving the scan command, each slave device on the bus initializes and starts a timer, and the initial timeout of the timer is set to a random value; (3) During the operation of the timer, each slave device continuously listens for data activity on the bus; (4) If a slave device detects any data byte on the bus before its timer expires, it immediately resets its timer to restart the timing process; (5) If the timer of a slave device successfully times out and the bus is idle at the time of the timeout, the slave device obtains the right to use the bus and sends response data to the master.

2. The slave-based ordered response method based on RS485 bus according to claim 1, characterized in that, The range of the random value is less than the complete transmission duration of the response data.

3. The slave-based ordered response method based on RS485 bus according to claim 2, characterized in that, The random value ranges from 5 milliseconds to 10 milliseconds.

4. The slave-based ordered response method based on RS485 bus according to claim 1, characterized in that, The timer can be a software timer or a hardware timer, and its timing period is configurable.

5. The slave-based ordered response method based on RS485 bus according to claim 1, characterized in that, After the host assigns a unique address code to each slave device based on the received response data, the system enters a token-based master-slave communication mode based on the address code.

6. An RS485 bus communication system implementing the method as described in any one of claims 1 to 5, characterized in that, The system includes: One host; Multiple slave devices are connected to the master device via an RS485 bus; Each slave device is equipped with a microcontroller, the microcontroller being programmed to perform the method steps of any one of claims 1 to 5.