Display device

Abstract

A display device is disclosed. The display device includes a structure in which an insulating layer is disposed between a planarization layer and a pixel electrode and includes an opening overlapping a portion of the pixel electrode, and a raised insulating layer is disposed between the planarization layer and the pixel electrode, overlaps the opening of the insulating layer and has an island shape, thereby providing a wide viewing angle with uniform brightness.

Description

Technical Field

[0001] This disclosure relates to electronic devices, and more specifically, to display panels including at least one bent or curved edge to provide a visually smooth appearance, thereby providing aesthetic satisfaction and enhancing screen immersion, and display devices including the display panel. Background Technology

[0002] In today's information society, display devices used to present images or visual information to users are becoming increasingly important. The demand for such display devices has led to advancements in display technology, and various types of display devices have been developed and are widely used, such as liquid crystal displays (LCDs), plasma displays, quantum dot displays, organic light-emitting displays (e.g., OLEDs), and inorganic light-emitting displays.

[0003] In particular, recent progress has been made in developing flexible display devices as next-generation display devices, which can display images even when bent or folded like paper. Flexible display devices can include unbreakable display devices with high durability achieved by using plastic thin-film transistor substrates instead of glass, bendable display devices that can be bent without breaking, rollable display devices, foldable display devices, and so on. These flexible display devices offer advantages in space utilization, internal design, and overall aesthetics, and can be used in a wide variety of applications.

[0004] The description provided in the Background section should not be assumed to be prior art simply because it is mentioned in or associated with the description in the Background section. The Background section may include information describing one or more aspects of the subject matter art, and the description in this section does not limit this disclosure. Summary of the Invention

[0005] The inventors have recognized that in related technologies, display devices including bent areas can be designed with a central portion having a flat shape and one or more sides that allow the display device to bend and include one or more corners. In this design, when the display device bends, one or more sides can bend into a curved shape, so when a user views the display device from in front of it, the viewing angle of the image presented by the display device may exceed acceptable quality. In this case, the user can notice a reduction in brightness of the displayed image on one or more sides. Therefore, the user can identify a significant brightness difference between the flat portion in the central portion and the bent portion on one or more sides. To address these problems, a display device according to the independent claim is provided. Further embodiments are described in the dependent claims. One or more aspects of this disclosure can provide a display device including at least one bent or curved edge to provide a visually smooth appearance, thereby providing aesthetic satisfaction and enhancing screen immersion.

[0006] One or more aspects of this disclosure can provide a display device having a structure in which pixel electrodes are disposed on a raised insulating layer, such that light emitted from a light-emitting element is guided at various angles by the protrusions or bends of the raised insulating layer, thereby significantly increasing the viewing angle.

[0007] One or more aspects of this disclosure may provide a display device having a structure in which the pixel electrode includes at least one inclined portion corresponding to the configuration of the insulating layer, such that light emitted from the light-emitting element is directed to the outside without being completely reflected into the interior of the display panel, thereby enabling the brightness of the display panel to be improved.

[0008] One or more aspects of this disclosure may provide a display device having a structure in which the display device includes a flat central region and at least one bent or curved edge region, thereby enabling a user to see an image or visual information without perceiving a brightness difference between the flat central region and at least one bent or curved edge region.

[0009] One or more aspects of this disclosure may provide a display device having a structure in which the display device includes a bent region located in at least one of its edges, and the display device is configured to gradually increase the viewing angle as a user moves away from the center region of the display panel in the bent region, thereby enabling the user to perceive uniform brightness in the bent region.

[0010] One or more aspects of this disclosure may provide a display device having a structure that directs light that is completely reflected into the interior of the display panel to the exterior and provides high brightness with low power.

[0011] The problems or needs to be addressed in this disclosure are not limited to those described above, and other problems or needs will become apparent to those skilled in the art from the following description.

[0012] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, comprising: a substrate including a flat region and a bent region; a planarization layer disposed on the substrate; a first pixel electrode located in the flat region and disposed in a pixel electrode layer disposed on the planarization layer; a second pixel electrode located in the bent region and disposed in a pixel electrode layer disposed on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including a first opening overlapping a portion of the first pixel electrode and a second opening overlapping a portion of the second pixel electrode; at least one first raised insulating layer disposed on the planarization layer, positioned in an island shape in the first opening, and having a raised shape; and at least one second raised insulating layer disposed on the planarization layer, positioned in an island shape in the second opening, and having a raised shape. In one or more aspects, the first pixel electrode may include a first curved surface disposed in the first opening along the upper surface of at least one first raised insulating layer, and the second pixel electrode may include a second curved surface disposed in the second opening along the upper surface of at least one second raised insulating layer. In one or more aspects, the area of ​​the lower surface of at least one second raised insulating layer may be greater than the area of ​​the lower surface of at least one first raised insulating layer.

[0013] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, comprising: a substrate having a plurality of sub-pixels disposed thereon; a plurality of main light-emitting regions overlapping the plurality of sub-pixels; and a plurality of sub-light-emitting regions surrounding the plurality of main light-emitting regions, wherein at least one diffuse light-emitting region is included in each of the plurality of main light-emitting regions. In one or more aspects, the diffuse light-emitting region may enable light emitted therefrom to have a light emission angle not perpendicular to the substrate.

[0014] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, the display device comprising: a substrate; a planarization layer disposed on the substrate; a pixel electrode disposed in a pixel electrode layer located on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including an opening overlapping the pixel electrode; and at least one first protruding insulating layer disposed between the planarization layer and the pixel electrode, located in the opening in an island shape, and having a protruding shape.

[0015] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, the display panel comprising: a substrate including a flat region and a bent region; a planarization layer disposed on the substrate; a first pixel electrode located in the flat region and disposed in a pixel electrode layer disposed on the planarization layer; a second pixel electrode located in the bent region and disposed in a pixel electrode layer disposed on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including a first opening overlapping a portion of the first pixel electrode and a second opening overlapping a portion of the second pixel electrode; at least one first raised insulating layer disposed on the planarization layer, positioned in an island shape in the first opening, and having a raised shape; and at least one second raised insulating layer disposed on the planarization layer, positioned in an island shape in the second opening, and having a raised shape. In one or more aspects, the first pixel electrode may include a first curved surface disposed in the first opening along the upper surface of at least one first raised insulating layer, and the second pixel electrode may include a second curved surface disposed in the second opening along the upper surface of at least one second raised insulating layer. In one or more aspects, the area of ​​the lower surface of at least one second raised insulating layer may be greater than the area of ​​the lower surface of at least one first raised insulating layer.

[0016] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, the display panel comprising: a substrate having a plurality of sub-pixels disposed thereon; a plurality of main light-emitting regions overlapping the plurality of sub-pixels; and a plurality of sub-light-emitting regions surrounding the plurality of main light-emitting regions, wherein at least one diffuse light-emitting region is included in each of the plurality of main light-emitting regions. In one or more aspects, the diffuse light-emitting region may enable light emitted therefrom to have a light emission angle not perpendicular to the substrate.

[0017] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, the display panel comprising: a substrate; a planarization layer disposed on the substrate; a pixel electrode disposed in a pixel electrode layer located on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including an opening overlapping the pixel electrode; and at least one first protruding insulating layer disposed between the planarization layer and the pixel electrode, situated in the opening in an island shape, and having a protruding shape.

[0018] According to one or more aspects of this disclosure, a display device may be provided that includes at least one curved edge to provide a visually smooth appearance, thereby providing aesthetic satisfaction and enhancing screen immersion.

[0019] According to one or more aspects of this disclosure, a display device can be provided having a structure in which pixel electrodes are disposed on a raised insulating layer, such that light emitted from a light-emitting element is guided at various angles by the protrusions or bends of the raised insulating layer, thereby significantly increasing the viewing angle.

[0020] According to one or more aspects of this disclosure, a display device can be provided having a structure in which the pixel electrode includes at least one inclined portion corresponding to the configuration of the insulating layer, such that light emitted from the light-emitting element is directed to the outside without being completely reflected into the interior of the display panel, thereby enabling the brightness of the display panel to be improved.

[0021] According to one or more aspects of this disclosure, a display device may be provided having a structure in which the display device includes a flat central region and at least one bent or curved edge region, thereby enabling a user to see an image or visual information without perceiving a brightness difference between the flat central region and at least one bent or curved edge region.

[0022] According to one or more aspects of this disclosure, a display device may be provided having a structure in which the display device includes a bent region located in at least one of its edges, and the display device is configured to gradually increase the viewing angle as a user moves away from the center region of the display panel in the bent region, thereby enabling the user to perceive uniform brightness in the bent region.

[0023] According to one or more aspects of this disclosure, a display device may be provided having a structure that directs light that is completely reflected into the interior of the display panel to the exterior and provides high brightness with low power.

[0024] The effects or advantages of the exemplary embodiments described herein are not limited to those described above, and other effects or advantages will become apparent to those skilled in the art from the following description.

[0025] Postscript:

[0026] Appendix 1. A display device (100) comprising:

[0027] A substrate (111) comprising a flat region (FA) and a bent region (BA);

[0028] A planarization layer (440) is disposed on the substrate (111);

[0029] The first pixel electrode (PE1) is located in the flat region (FA) and disposed in a pixel electrode layer located on the planarization layer (440);

[0030] The second pixel electrode (PE2) is located in the bending region (BA) and disposed in the pixel electrode layer located on the planarization layer (440);

[0031] An insulating layer (500) is disposed between the planarization layer (440) and the pixel electrode layer, and includes a first opening overlapping a portion of the first pixel electrode (PE1) and a second opening overlapping a portion of the second pixel electrode (PE2);

[0032] At least one first raised insulating layer (510a), said at least one first raised insulating layer (510a) is disposed on the planarization layer (440), located in the first opening in an island shape, and having a raised shape; and

[0033] At least one second raised insulating layer (510b) is disposed on the planarization layer (440), positioned in an island shape within the second opening, and having a raised shape.

[0034] The first pixel electrode (PE1) includes a first curved portion (511a) disposed in the first opening along the upper surface of the at least one first raised insulating layer (510a), and the second pixel electrode (PE2) includes a second curved portion (511b) disposed in the second opening along the upper surface of the at least one second raised insulating layer (510b).

[0035] The area of ​​the lower surface of the at least one second raised insulating layer (510b) is greater than the area of ​​the lower surface of the at least one first raised insulating layer (510a).

[0036] Appendix 2. The display device (100) according to Appendix 1, wherein the first pixel electrode (PE1) includes a first inclined portion extending along the side surface of the insulating layer (500) in the first opening, and

[0037] The second pixel electrode (PE2) includes a second inclined portion extending along the side surface of the insulating layer (500) in the second opening.

[0038] Appendix 3. According to Appendix 2, the display device (100) further includes: a dam (450) disposed on the first pixel electrode (PE1) and the second pixel electrode (PE2).

[0039] The embankment (450) includes:

[0040] A first dike opening, which overlaps with the first inclined portion and the second inclined portion, and is located within the first opening; and

[0041] The second dike opening is located within the second opening.

[0042] Note 4. The display device (100) according to any one of Notes 1 to 3, wherein the insulating layer (500) comprises the same material as the planarization layer (440).

[0043] Note 5. The display device (100) according to any one of Notes 1 to 3, wherein the at least one first raised insulating layer (510a) and the at least one second raised insulating layer (510b) comprise the same material as the planarization layer (440).

[0044] Note 6. The display device (100) according to any one of Notes 1 to 3, wherein the height of the insulating layer (500) is greater than the height (h1, h2) of each of the at least one first raised insulating layer (510a) and the at least one second raised insulating layer (510b).

[0045] Note 7. The display device (100) according to any one of Notes 1 to 3, wherein the surface area of ​​the upper surface of the at least one first raised insulating layer (510a) is smaller than the surface area of ​​the upper surface of the at least one second raised insulating layer (510b).

[0046] Note 8. The display device (100) according to any one of Notes 1 to 3, wherein the height (h1) of the at least one first raised insulating layer (510a) is less than the height (h2) of the at least one second raised insulating layer (510b).

[0047] Note 9. The display device (100) according to any one of Notes 1 to 3, wherein the at least one first raised insulating layer (510a) overlaps with the first pixel electrode (PE1), and the at least one second raised insulating layer (510b) overlaps with the second pixel electrode (PE2).

[0048] Note 10. The display device (100) according to any one of Notes 1 to 3, the display device (100) further includes:

[0049] A third pixel electrode, the third pixel electrode being disposed in the flat region (FA); and

[0050] At least one third raised insulating layer (510c) overlaps with the third pixel electrode.

[0051] The colors of the light emitted from the light-emitting layer on the first pixel electrode and the light emitted from the light-emitting layer on the third pixel electrode are different from each other, and

[0052] The number of the at least one first raised insulating layer (510) and the number of the at least one third raised insulating layer (510c) are different from each other.

[0053] Appendix 11. The display device (100) according to Appendix 10, wherein the color of the light emitted from the light-emitting layer (green ELO) on the first pixel electrode is green, and the color of the light emitted from the light-emitting layer (red ELO, blue ELO) on the third pixel electrode is red or blue, and

[0054] The number of the at least one first raised insulating layer (510a) is greater than the number of the at least one third raised insulating layer (510c).

[0055] Appendix 12. The display device (100) according to Appendix 10, wherein the color of the light emitted from the light-emitting layer (blue ELO) on the first pixel electrode (PE1) is blue, and the color of the light emitted from the light-emitting layer (red ELO) on the third pixel electrode is red, and

[0056] The number of the at least one first raised insulating layer (510a) is greater than the number of the at least one third raised insulating layer (510c).

[0057] Note 13. The display device (100) according to any one of Notes 1 to 3 further includes:

[0058] A fourth pixel electrode, wherein the fourth pixel electrode is disposed in the bent region (BA) and spaced apart from the second pixel electrode (PE2); and

[0059] At least one fourth raised insulating layer (510d) overlaps with the fourth pixel electrode.

[0060] The dimensions of the at least one second raised insulating layer (510b) are different from the dimensions of the at least one fourth raised insulating layer (510d).

[0061] Note 14. The display device (100) according to Note 13, wherein the size of the at least one second raised insulating layer (510b) is smaller than the size of the at least one fourth raised insulating layer (510d).

[0062] Note 15. The display device (100) according to Note 14, wherein each of the at least one second raised insulating layer (510b) and the at least one fourth raised insulating layer (510d) has an elliptical shape, and

[0063] The length of the major axis of the at least one second raised insulating layer (510b) is less than the length of the major axis of the at least one fourth raised insulating layer (510d).

[0064] Note 16. The display device (100) according to any one of Notes 1 to 3, wherein the total area of ​​the at least one second raised insulating layer (510b) disposed in the bent region (BA) is greater than the total area of ​​the at least one first raised insulating layer (510a) disposed in the flat region (FA).

[0065] Note 17. The display device (100) according to any one of Notes 1 to 3, wherein the viewing angle of the bent region (BA) is greater than the viewing angle of the flat region (FA).

[0066] Note 18. The display device (100) according to any one of Notes 1 to 3, the display device (100) further includes:

[0067] An encapsulation layer (460) is disposed on the first pixel electrode (PE1) and the second pixel electrode (PE2); and

[0068] A color filter layer is disposed on the encapsulation layer (460).

[0069] In this embodiment, at least a portion of each of the plurality of color filters (480) included in the color filter layer overlaps with the at least one first raised insulating layer (510a) or the at least one second raised insulating layer (510b).

[0070] Appendix 19. A display device (100) comprising:

[0071] A substrate (111) having a plurality of sub-pixels (SPs) disposed thereon;

[0072] Multiple main light-emitting regions (E-E') overlap with the multiple sub-pixels (SP);

[0073] Multiple sub-light-emitting regions (F-F') surround the multiple main light-emitting regions (E-E').

[0074] Each of the plurality of main emitting regions (E-E') includes at least one diffuse emitting region, and

[0075] The light emitted from the at least one diffuse light-emitting region has a light emission angle that is not perpendicular to the substrate (111).

[0076] Note 20. The display device (100) according to Note 19 further includes:

[0077] A pixel electrode (PE) overlapping at least one of the plurality of main light-emitting regions (E-E') and at least one of the plurality of sub-light-emitting regions (F-F'); and

[0078] At least one raised insulating layer (510) is provided, wherein the at least one raised insulating layer (510) is configured such that the at least one raised insulating layer (510) overlaps with the at least one diffuse light-emitting region on the lower surface of the pixel electrode (PE).

[0079] The pixel electrode (PE) includes a tilted portion (501) in at least one of the plurality of sub-light-emitting regions (F-F').

[0080] Appendix 21. A display device (100) comprising:

[0081] substrate(111);

[0082] A planarization layer (440) is disposed on the substrate (111);

[0083] A pixel electrode (PE0) is disposed in a pixel electrode layer located on the planarization layer (440);

[0084] An insulating layer (500) is disposed between the planarization layer (440) and the pixel electrode layer, and includes an opening overlapping the pixel electrode (PEO); and

[0085] At least one raised insulating layer (510) is disposed between the planarization layer (440) and the pixel electrode (PE0), located in the opening in an island shape, and having a raised shape.

[0086] Note 22. The display device (100) according to Note 21,

[0087] The pixel electrode (PE0) includes a first pixel electrode, a second pixel electrode, and a third pixel electrode.

[0088] The at least one raised insulating layer (510) includes at least one first raised insulating layer disposed on the first pixel electrode, at least one second raised insulating layer disposed on the second pixel electrode, and at least one third raised insulating layer disposed on the third pixel electrode.

[0089] Note 23. The display device (100) according to Note 22, wherein the number of the at least one third raised insulating layer is greater than the number of the at least one first raised insulating layer and less than the number of the at least one second raised insulating layer.

[0090] Note 24. The display device (100) according to Note 23, wherein the first pixel electrode is a red pixel electrode, the second pixel electrode is a green pixel electrode, and the third pixel electrode is a blue pixel electrode.

[0091] Note 25. The display device (100) according to Note 23, wherein the number of the at least one third raised insulating layer is greater than the number of the at least one first raised insulating layer, and the number of the at least one second raised insulating layer is greater than the number of the at least one third raised insulating layer and the number of the at least one first raised insulating layer.

[0092] Note 26. The display device (100) according to Note 24 further includes one or two or more data lines separated from the at least one raised insulating layer (510) by the planarization layer (440).

[0093] Wherein, one or two or more data lines overlap with at least one of the at least one first raised insulating layer and the at least one second raised insulating layer, and no data lines overlap with the at least one third raised insulating layer.

[0094] Note 27. The display device (100) according to Note 24 further includes a source-drain electrode pattern (422) disposed in the planarization layer (440) and separated from the at least one raised insulating layer (510).

[0095] The source-drain electrode pattern (422) overlaps with at least one of the at least one first raised insulating layer, the at least one second raised insulating layer, and the at least one third raised insulating layer. Attached Figure Description

[0096] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this disclosure. The drawings illustrate various aspects of this disclosure and, together with the description, serve to explain the principles of this disclosure. In the drawings:

[0097] Figure 1 The system configuration of an example display device according to various aspects of this disclosure is shown;

[0098] Figure 2 This is a perspective view of an example display panel according to various aspects of this disclosure;

[0099] Figure 3 An example circuit of a sub-pixel included in a display device according to various aspects of the present disclosure is shown;

[0100] Figure 4 yes Figure 2 Example cross-sectional view of region A in the middle;

[0101] Figure 5 yes Figure 2 Another example cross-sectional view of region A in the middle;

[0102] Figure 6 yes Figure 2 Example floor plan of area A in the middle;

[0103] Figure 7 Example cross-sectional views of flat and bent areas in a display panel according to various aspects of this disclosure are shown.

[0104] Figure 8 This is an example floor plan of a display panel according to various aspects of this disclosure;

[0105] Figure 9 It is set according to the various aspects of this disclosure. Figure 8 An example plan view of the zeroth pixel in a flat area of ​​the display panel;

[0106] Figure 10 It is set according to the various aspects of this disclosure. Figure 8 An example plan view of the first pixel in the first folded area of ​​the display panel;

[0107] Figure 11 Based on all aspects of this disclosure Figure 8 Example cross-sectional view of the display panel along line X-X';

[0108] Figure 12 It is set according to the various aspects of this disclosure. Figure 8 Another example plan view of the first pixel in the first folded area of ​​the display panel;

[0109] Figure 13 It is set according to the various aspects of this disclosure. Figure 8 An example plan view of the second pixel in the second folded area of ​​the display panel;

[0110] Figure 14 It is set according to the various aspects of this disclosure. Figure 8 An example plan view of the sixth pixel in the sixth fold area of ​​the display panel;

[0111] Figure 15 Based on all aspects of this disclosure Figure 8 Another example cross-sectional view of the display panel along line X-X';

[0112] Figure 16 This is an example graph showing how the brightness on the side or edge of a display panel according to various aspects of this disclosure varies with respect to the brightness in the vertical direction of the display panel relative to the diameter of the raised insulating layer.

[0113] Figure 17 This is an example graph showing the amount of light emitted per current relative to the x-value of green in the CIE color coordinates measured in the display panel, in each case according to various aspects of this disclosure;

[0114] Figure 18 This is an example graph showing the luminance efficiency of the display panel at a 60° viewing angle in each case according to various aspects of this disclosure;

[0115] Figure 19 This is a table illustrating example configurations of insulating layers and raised insulating layers respectively disposed in flat and bent regions according to various aspects of this disclosure; and

[0116] Figure 20 This is a table showing the number and diameter of the raised insulating layers disposed on the red subpixel according to various aspects of this disclosure, as well as the associated fill factor.

[0117] Throughout the accompanying drawings and detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and descriptions of these elements may be exaggerated. Detailed Implementation

[0118] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. The described progression of processing steps and / or operations is illustrative; however, the order of steps and / or operations is not limited to that described herein and can be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The names of the various elements used in the following explanation may have been chosen merely for convenience in drafting the specification and may therefore differ from the names used in actual products.

[0119] In the following description of examples or embodiments of this disclosure, reference will be made to the accompanying drawings, which illustrate specific examples or embodiments that can be implemented, and wherein the same reference numerals or designations may be used to denote the same or similar components, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of this disclosure, detailed descriptions of well-known functions and components incorporated herein will be omitted where it is determined that such detailed descriptions may make the subject matter of some embodiments of this disclosure considerably unclear. Terms such as “comprising,” “having,” “including,” “containing,” “constituting,” “made of,” “formed by,” “composed of”, and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0120] The shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, quantities, etc., of the elements shown in the accompanying drawings used to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements.

[0121] The dimensions of the various components shown in the accompanying drawings, including size and thickness, are shown for ease of description, and this disclosure is not limited to the size and thickness of the components shown. However, it should be noted that the relative dimensions of the components shown in the various accompanying drawings, including relative size, position, and thickness, are part of this disclosure.

[0122] The word “example” is used to indicate that something is presented as an example or illustration. “Aspect” refers to an example aspect. “Implementation,” “example,” “aspect,” etc., should not be construed as superior to or best of other implementations. Unless otherwise stated, implementation, example, example implementation, aspect, etc., can refer to one or more implementations, one or more examples, one or more example implementations, one or more aspects, etc. Furthermore, the word “can” encompasses all the meanings of the word “able to.”

[0123] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of this disclosure. Each of these terms is not used to define the nature, order, sequence, or number of elements, but only to distinguish the corresponding element from other elements.

[0124] When referring to the first element and the second element as "connected or joined," "in contact or overlapping," etc., it should be interpreted as meaning that not only can the first element be "directly connected or joined" or "directly in contact or overlapping" with the second element, but also that a third element can be "inserted" between the first and second elements, or that the first and second elements can be "connected or joined," "in contact or overlapping," etc., with a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or joined," "in contact or overlapping," etc., with each other.

[0125] When describing positional relationships, such as using terms like "on," "above," "above," "below," "below," "next to," "under," "near," "close to," "adjacent to," "on the side," or "near," one or more other components may be located between the two components, unless more restrictive terms such as "immediately," "directly," or "right next to" are used. For example, if one element or layer is positioned "on" another element or layer, a third element or layer may be inserted in between. Furthermore, the terms "left," "right," "top," "bottom," "down," "up," "upper," and "lower" refer to any frame of reference.

[0126] It should be understood that, in addition to the orientations shown in the figures, spatial relative terms can also include different orientations of elements in use or operation. For example, if an element in the figure is inverted, an element described as "below" or "beneath" other elements or features would be oriented as "above" other elements or features. Therefore, the example term "below" can include both below and above orientations. Similarly, the example terms "above" or "above" can include both "above" and "below" orientations.

[0127] When describing temporal relationships, for example, when using terms such as "after," "following," "next," and "before" to describe the temporal relationship of events, there may be cases where events are not consecutive, unless "immediately following" or "directly" is used.

[0128] Furthermore, when describing any size, relative dimensions, etc., it should be assumed that the numerical values ​​or corresponding information of the component or feature (e.g., level, range, etc.) include tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external shocks, noise, etc.), even if no relevant description is specified. Additionally, the term "may" fully encompasses all the meanings of the term "able to".

[0129] The term "at least one" should be understood to include all possible combinations that can be suggested from one or more related projects. For example, "at least one of the first, second, or third projects" can mean each of the first, second, or third projects, and can also mean all possible combinations that can be suggested from two or more of the first, second, and third projects.

[0130] As used herein, the term "device" can refer to a display device that includes a display panel and a driver for driving the display panel. Examples of display devices may include light-emitting elements, etc. Additionally, examples of devices may include laptops, televisions, computer monitors, automotive devices, wearable devices, and automotive equipment devices, as well as assemblies of electronic devices (or equipment) or assemblies (or devices) that include light-emitting elements, etc., as complete products or end products, such as mobile electronic devices like smartphones or tablets, but embodiments of this disclosure are not limited thereto.

[0131] Features of the various embodiments of this disclosure may be partially or wholly adhered to or combined with each other, and may be interlocked and operated in various technical ways, and the embodiments may be performed independently or in association with each other.

[0132] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It will be further understood that terms, such as those defined in commonly used dictionaries, shall be interpreted as having a meaning consistent with, for example, their meaning in the context of the relevant art, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0133] In this disclosure, for ease of description, the source electrode and the drain electrode are distinguished from each other. However, the source electrode and the drain electrode are used interchangeably. A source electrode can be a drain electrode, and a drain electrode can be a source electrode. Furthermore, a source electrode in any aspect of this disclosure can be a drain electrode in another aspect of this disclosure, and a drain electrode in any aspect of this disclosure can be a source electrode in another aspect of this disclosure.

[0134] In the specification, when adding reference numerals to elements in each figure, care should be taken to ensure that, whenever possible, the same reference numerals used to denote the element in other figures are used for that element. Furthermore, for ease of description, the scale of the constituent elements shown in the figures may differ from the actual scale. That is, the scale of the constituent elements shown in the figures should not be interpreted as the same as the scale shown in the figures.

[0135] In the following, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0136] Figure 1 An example system configuration of a display device 100 according to various aspects of this disclosure is shown.

[0137] Reference Figure 1 In one or more example embodiments, the display device 100 may include a display panel 110 and a display driving circuit as elements for displaying images. The display driving circuit may be a circuit for driving the display panel 110 and includes a data driving circuit 120, a gating driving circuit 130, a touch sensing circuit (not shown), a display controller 140, and other circuit components.

[0138] The display panel 110 may include a substrate 111 and a plurality of sub-pixels SP disposed on the substrate 111.

[0139] The substrate 111 may be formed of an insulating material or a flexible material, but is not limited thereto. For example, the substrate may include a flexible polymer film. For example, the flexible polymer film may be made of any of the following: polyimide (PI), polyethylene terephthalate (PET), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polycarbonate (PC), polyethersulfone (PES), polyaryl ester (PAR), polysulfone (PSF), cyclic olefin copolymer (COC), triacetyl cellulose (TAC), polyvinyl alcohol (PVA), and polystyrene (PS). For example, the substrate may include a transparent polyimide material, and this disclosure is not limited thereto.

[0140] The substrate 111 of the display panel 110 may include a display area DA that allows an image to be displayed and a non-display area NDA located outside the display area DA. The non-display area NDA may be an area where no image is displayed, and may be defined in the edge portion of the display panel to surround part or all of the display area DA. The non-display area NDA may be an area adjacent to the display area DA. Further, the non-display area NDA may be an area disposed adjacent to the display area DA and configured to surround the display area DA. However, this disclosure is not limited thereto.

[0141] The display area DA can also be called the display region, and multiple sub-pixels SP used to display images can be set in the display area DA. The non-display area NDA can also be called the non-display region and may include the pad area PA.

[0142] In one or more aspects, the non-display area NDA of the display panel 110 may have a very small area compared to the display area DA. Hereinafter, the non-display area NDA may also be referred to as a “border” or “border area.” For example, the non-display area NDA may include a first non-display area located outside the display area DA along a first direction, a second non-display area located outside the display area DA along a second direction, a third non-display area located outside the display area DA along a direction opposite to the first direction, and a fourth non-display area located outside the display area DA along a direction opposite to the second direction.

[0143] The first non-display area, one of the first to fourth non-display areas, may include a pad area connected to or bonded to one or more driving circuits. Compared to the first non-display area, the second to fourth non-display areas may have a very small size.

[0144] In one or more aspects, the boundary region between the display area DA and the non-display area NDA can be bent, so that the non-display area NDA can be located below the display area DA. In this implementation, when a user views the display device 100 in front of them, all or most of the non-display area NDA may be invisible to the user. For example, the first non-display area may include a bent region. As the bent region is bent, the first non-display area may be invisible in front of the display device 100.

[0145] Various types of signal lines for driving multiple sub-pixels SP can be provided on the substrate 111 of the display panel 110.

[0146] In one or more aspects, the display device 100 may be a liquid crystal display device, a self-emissive display device that emits light from the display panel 110 itself, etc. In the example where the display device 100 is a self-emissive display device, each of the plurality of sub-pixels SP included in the display device 100 may include a light-emitting element, such as an organic light-emitting diode, an inorganic light-emitting diode, a quantum dot light-emitting diode, a micro light-emitting diode, a mini light-emitting diode, etc.

[0147] Each of the plurality of sub-pixels SP can emit light with a different wavelength from each other. For example, the plurality of sub-pixels SP may include red sub-pixels, green sub-pixels, and blue sub-pixels, wherein the red, green, and blue sub-pixels may be arranged in a repeating manner. Alternatively, the plurality of sub-pixels SP may include red, green, blue, and white sub-pixels, wherein the red, green, blue, and white sub-pixels may be arranged in a repeating manner, or the red, green, blue, and white sub-pixels may be arranged in a quadrilateral pattern. For example, the red, blue, and green sub-pixels may be arranged sequentially along the row direction, or the red, blue, green, and white sub-pixels may be arranged sequentially along the row direction. However, in embodiments of this disclosure, the color type, arrangement type, and arrangement order of the sub-pixels are not limited and can be configured in various forms according to light-emitting characteristics, device lifetime, and device specifications.

[0148] Furthermore, depending on their light-emitting characteristics, sub-pixels can have different light-emitting areas. For example, a sub-pixel that emits light of a different color than the blue sub-pixel can have a different light-emitting area than the blue sub-pixel. For example, red, blue, and green sub-pixels, or red, blue, white, and green sub-pixels, can each have different light-emitting areas.

[0149] In one or more aspects, the display device 100 may be an organic light-emitting display device, wherein an organic light-emitting diode (OLED) is used to realize the light-emitting element. In one or more aspects, the display device 100 may be an inorganic light-emitting display device, wherein a light-emitting diode based on an inorganic material is used to realize the light-emitting element. In one or more aspects, the display device 100 may be a quantum dot display device, wherein a quantum dot, as a self-emissive semiconductor crystal, is used to realize the light-emitting element.

[0150] The structure of each of the plurality of sub-pixels SP can depend on the type of display device 100. For example, when the display device 100 is a self-emissive display device that includes self-emissive sub-pixels SP, each sub-pixel SP may include a self-emissive light-emitting element, one or more transistors and one or more capacitors.

[0151] One or more transistors may be thin-film transistors (TFTs), and the active layer of a thin-film transistor TFT may be formed of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon, but is not limited thereto.

[0152] Oxide semiconductor materials offer excellent leakage current prevention and relatively low manufacturing costs. Oxide semiconductors can be made from metal oxides such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti), or combinations of metals and their oxides such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), or titanium (Ti). Specifically, oxide semiconductors can include, but are not limited to, zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO).

[0153] Polycrystalline semiconductor materials exhibit high mobility due to the fast movement speed of charge carriers such as electrons and holes, resulting in low energy consumption and excellent reliability. Polycrystalline semiconductors can be made of polycrystalline silicon (poly-Si), but are not limited to this.

[0154] Amorphous semiconductor materials can be made of amorphous silicon (a-Si), but are not limited to this.

[0155] The various types of signal lines disposed on the substrate 111 may include, for example, multiple data lines DL for carrying data signals (which may be referred to as data voltage or image signals), multiple gating lines GL for carrying gating signals (which may be referred to as scan signals), etc.

[0156] In one or more aspects, multiple data lines DL and multiple gating lines GL may intersect each other. Each of the multiple data lines DL may be configured to extend along a first direction, and each of the multiple gating lines GL may be configured to extend along a second direction. For example, the first direction may be a column direction, and the second direction may be a row direction. In another example, the first direction may be a row direction, and the second direction may be a column direction. In the following discussion, for ease of illustration only, an example in which the first direction is a column direction and the second direction is a row direction may be provided. Furthermore, for ease of illustration, an example in which each of the multiple data lines DL is set along a column direction and each of the multiple gating lines GL is set along a row direction may be provided. However, the aspects of this disclosure are not limited thereto.

[0157] The data driving circuit 120 can be a circuit used to drive multiple data lines DL, and can output data signals to multiple data lines DL.

[0158] The data drive circuit 120 can receive digital image data DATA from the controller 140, convert the received image data DATA into analog data signals, and output the converted data signals to multiple data lines DL.

[0159] In one or more aspects, the data driving circuit 120 may be connected to the display panel 110 via tape automatic bonding (TAB) technology, or to conductive pads such as bonding pads of the display panel 110 via chip-on-glass (COG) technology or chip-on-panel (COP) technology, or to the display panel 110 via chip-on-film (COF) technology. However, the aspects of this disclosure are not limited thereto.

[0160] The data driving circuit 120 may be disposed in and / or electrically connected to only one side or only one edge (e.g., the upper or lower part) of the display panel 110, but is not limited thereto. In one or more aspects, depending on the driving scheme, panel design, etc., the data driving circuit 120 may be disposed in and / or electrically connected to at least two of the two sides or two edges (e.g., the upper and lower parts) or four sides or four edges (e.g., the upper, lower, left and right parts) of the display panel 110, but is not limited thereto.

[0161] The data driving circuit 120 can be connected to the outside of the display area DA of the display panel 110, located outside the display area DA of the display panel 110, or located on the periphery of the display area DA of the display panel 110, or it can be set in the display area DA of the display panel 110.

[0162] The gating drive circuit 130 can be a circuit used to drive multiple gating lines GL, and can output gating signals to multiple gating lines GL.

[0163] The gating drive circuit 130 can receive various types of gating drive control signals GCS, and also receives a first gating voltage corresponding to the on-level voltage and a second gating voltage corresponding to the off-level voltage. Therefore, the gating drive circuit 130 can generate gating signals and supply the generated gating signals to multiple gating lines GL.

[0164] In one or more aspects, the gating drive circuit 130 included in the display device 100 may be embedded in the display panel 110 using in-panel gating (GIP) technology. However, the aspects of this disclosure are not limited thereto. In an example where the gating drive circuit 130 is implemented using in-panel gating (GIP) technology, the gating drive circuit 130 may be disposed on the substrate 111 of the display panel 110 during the manufacturing process of the display panel 110 or the display device 100.

[0165] For example, the gating drive circuit 130 can be set in the non-display area NDA of the display panel 110.

[0166] In one or more aspects, the gating drive circuit 130 may be disposed in the display area DA of the display panel 110. In this implementation, for example, the gating drive circuit 130 may be disposed in and / or electrically connected to the first area (e.g., the left or right area) of the display area DA of the display panel 110, but is not limited thereto. In another example, the gating drive circuit 130 may be disposed in and / or electrically connected to the first area (e.g., the left or right area) and the second area (e.g., the right or left area) of the display area DA of the display panel 110, but is not limited thereto.

[0167] In this article, the gating drive circuit 130 embedded in the display panel 110 using in-panel gating (GIP) technology can also be referred to as an "in-panel gating circuit".

[0168] The touch sensing circuit can be connected to multiple touch sensing lines via routing lines. The touch sensing circuit can be a circuit that drives multiple touch sensing lines and can output touch sensing signals to multiple touch sensing lines.

[0169] The controller 140 may be a device configured to control the data drive circuit 120 and the gating drive circuit 130, and may control the drive timing for multiple data lines DL and the drive timing for multiple gating lines GL.

[0170] The controller 140 can supply a data control signal DCS to the data drive circuit 120 to control the data drive circuit 120, and supply a gating control signal GCS to the gating drive circuit 130 to control the gating drive circuit 130.

[0171] The controller 140 can receive image data input from the host system 150 and supply image data DATA that can be read by the data drive circuit 120 based on the input image data.

[0172] The controller 140 can be configured to connect to various processors, such as microprocessors, mobile processors, application processors, etc., depending on the device installed therein.

[0173] The controller 140 can be implemented in a component separate from the data drive circuit 120, or integrated with the data drive circuit 120, such that the controller 140 and the data drive circuit 120 can be implemented in a single integrated circuit.

[0174] Controller 140 may be a timing controller used in typical display technologies, or a control device / apparatus capable of performing other control functions in addition to the typical functions of a timing controller. In one or more embodiments, controller 140 may be one or more other control circuits, or circuits or components in a control device / apparatus, different from a timing controller. Controller 140 may be implemented using various circuits or electronic components such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), processors, etc. However, aspects of this disclosure are not limited thereto.

[0175] The controller 140 can be mounted on a printed circuit board, flexible printed circuit, etc., and can be electrically connected to the data drive circuit 120 and the gating drive circuit 130 through the printed circuit board, flexible printed circuit, etc.

[0176] The controller 140 can send signals to and receive signals from the data drive circuit 120 via one or more predetermined interfaces. For example, such interfaces may include a Low Voltage Differential Signaling (LVDS) interface, an Embedded Point-to-Point Clock Interface (EPI), a Serial Peripheral Interface (SPI), etc. However, this disclosure is not limited thereto.

[0177] The display device 100 may also include a power supply circuit for supplying various types of power to the display driving circuit and / or touch sensing circuit.

[0178] In one or more aspects, the display device 100 may be a mobile terminal such as a smartphone, tablet computer, etc., or a monitor, television (TV), etc. Such a device can be configured in various types, sizes, and shapes. The display device 100 according to various aspects of this disclosure is not limited thereto, and may include various types, sizes, and shapes configured to display information or images. The display device according to various aspects of this disclosure can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, stretchable devices, bending devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbooks, workstations, navigation devices, car navigation devices, vehicle display devices, vehicle equipment, cinema equipment, cinema display equipment, televisions, wallpaper devices, signage devices, gaming devices, laptops, monitors, cameras, camcorders, and home appliances, etc.

[0179] In one or more aspects, the display panel 110 may have four edges, and each of the four edges may have a curved or bent surface.

[0180] Figure 2 This is an example perspective view of the display panel 110 according to various aspects of this disclosure.

[0181] Reference Figure 2 In one or more example embodiments, the display panel 110 may have four sides (or edges), and each of the four sides (or edges) may have a curved surface or a bent surface. A side (or edge) having a curved surface may be referred to as a bent (or curved) side (or edge).

[0182] Reference Figure 2 The display panel 110 may have a flat region FA and a bent region BA, and the bent region BA may be formed such that a predetermined curvature is applied from the edge of the flat region FA of the display panel 110 to the bent region BA. The curvature may extend to the non-display region NDA, but this disclosure is not limited thereto. The bent region BA may be formed by bending the edge region of the display panel 110 with physical force.

[0183] As described above, the display area DA may include a flat area FA and a curved area BA, the curvature of which is applied from the flat area FA to the edge of the display panel 110.

[0184] Because the display panel 110 includes four curved (or bent) sides (or edges), the display panel 110 can provide the advantages of improved durability and enhanced resistance to external impacts.

[0185] Furthermore, the curved edges of the bent area BA provide a visually smooth appearance, thus offering users aesthetic satisfaction. Additionally, when the edges or sides of the display panel 110 are bent, the display panel 110 can provide the advantage or effect of reducing the sense of separation between the flat area FA and the bent area BA, and enhancing screen immersion.

[0186] Figure 3 An example circuit of a sub-pixel SP included in a display device 100 according to various aspects of the present disclosure is shown.

[0187] Reference Figure 3 In an example where the display device 100 is a self-emissive display device, each of the plurality of sub-pixels SP disposed on the substrate 111 may include a light-emitting element ED and a sub-pixel circuit SPC for driving the light-emitting element ED.

[0188] Reference Figure 3The subpixel circuit SPC may include a plurality of transistors for driving the light-emitting element ED and at least one capacitor, but various aspects of this disclosure are not limited to this particular structure. The subpixel circuit SPC can drive the light-emitting element ED by supplying a drive current to the light-emitting element ED at predetermined timings. The light-emitting element ED can emit light by being driven by the drive current.

[0189] The multiple transistors may include a driving transistor DT for driving the light-emitting element ED and a scanning transistor ST configured to be turned on or off by the scanning signal SC.

[0190] The driving transistor DT can supply driving current to the light-emitting element ED.

[0191] The scanning transistor ST can be configured to control the electrical state of the corresponding node in the sub-pixel circuit SPC, or to control the state or operation of the driving transistor DT.

[0192] At least one capacitor may include a storage capacitor Cst, which is configured to maintain a constant voltage during a display frame or during a specific period of a display frame.

[0193] To drive at least one sub-pixel SP, at least one data signal VDATA, which is an image signal, and at least one scan signal SC, which is a gating signal, can be applied to the sub-pixel SP. Furthermore, a common pixel driving voltage, including a first common driving voltage VDD and a second common driving voltage VSS, can be applied to the sub-pixel SP.

[0194] The light-emitting element (ED) may include a pixel electrode (PE), an intermediate layer (light-emitting layer) (EL), and a common electrode (CE). The intermediate layer (EL) may be disposed between the pixel electrode (PE) and the common electrode (CE).

[0195] For example, a pixel electrode PE can be an electrode disposed in each sub-pixel SP, and a common electrode CE can be an electrode commonly disposed in all or some of the multiple sub-pixels SP. For example, the pixel electrode PE can be an anode electrode, and the common electrode CE can be a cathode electrode. In another example, the pixel electrode PE can be a cathode electrode, and the common electrode CE can be an anode electrode. In the following discussion, for ease of illustration, an example in which the pixel electrode PE is an anode electrode and the common electrode CE is a cathode electrode may be provided.

[0196] In an example where the light-emitting element ED is an organic light-emitting diode (OLED), the intermediate layer EL may include a light-emitting layer EML, a first common intermediate layer COM1 located between the pixel electrode PE and the light-emitting layer EML, and a second common intermediate layer COM2 located between the light-emitting layer EML and the common electrode CE. The layer including the first common intermediate layer COM1 and the second common intermediate layer COM2 can be referred to as the common intermediate layer EL_COM. Although Figure 3 Only one light-emitting layer (EML) is shown in the diagram, but this disclosure is not limited thereto. For example, a cascaded structure including multiple light-emitting layers (EMLs) can be employed.

[0197] The Emissive Layer (EML) can be set in each subpixel (SP), and the common intermediate layer (EL_COM) can be set publicly across multiple subpixel (SP).

[0198] The E-layer (EML) can be set in each luminescent region, and the common intermediate layer (EL_COM) can be set across multiple luminescent regions and multiple non-luminescent regions.

[0199] For example, the first common intermediate layer COM1 may include a hole injection layer (HIL), an electron blocking layer (EBL), a hole transport layer (HTL), and / or the like, but the scope of this disclosure is not limited thereto. The second common intermediate layer COM2 may include an electron transport layer (ETL), a hole blocking layer (HBL), an electron injection layer (EIL), etc., but the scope of this disclosure is not limited thereto.

[0200] The hole injection layer can inject holes from the pixel electrode PE into the hole transport layer, and the hole transport layer can transport holes to the light-emitting layer EML. The electron injection layer can inject electrons from the common electrode CE into the electron transport layer, and the electron transport layer can transport electrons to the light-emitting layer EML.

[0201] For example, the common electrode CE can be electrically connected to the second common driving voltage line VSSL (also referred to as the base voltage line VSSL). The second common driving voltage VSS can be applied to the common electrode CE through the second common driving voltage line VSSL. The pixel electrode PE can be directly or indirectly (via another transistor) electrically connected to the first node N1 of the corresponding driving transistor DT of each sub-pixel SP. In this document, the second common driving voltage VSS can also be referred to as the base voltage, low voltage, or low supply voltage, and the second common driving voltage line VSSL can also be referred to as the base voltage line, low voltage line, or low supply voltage line.

[0202] Each light-emitting element (ED) can be configured by overlapping the pixel electrode (PE), the light-emitting layer (EML) in the intermediate EL layer, and the common electrode (CE). A corresponding light-emitting region can be formed by each ED. For example, the corresponding light-emitting region of each ED may include the area where the pixel electrode (PE), the light-emitting layer (EML) in the intermediate EL layer, and the common electrode (CE) overlap.

[0203] In one or more aspects, the light-emitting element ED can be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), a quantum dot (QD) light-emitting element, a micro light-emitting diode, a mini light-emitting diode, etc., but the aspects of this disclosure are not limited thereto. For example, in an example where the light-emitting element ED is an organic light-emitting diode OLED, the intermediate layer EL of the light-emitting element ED can be a layer comprising organic material.

[0204] Reference Figure 2 The driving transistor DT can be a transistor configured to supply drive current to the light-emitting element ED. The driving transistor DT can be connected between the first common drive voltage line VDDL and the light-emitting element ED.

[0205] The driving transistor DT may include a first node N1, a second node N2, and a third node N3. The first node N1 may be electrically connected to the light-emitting element ED. The data signal VDATA may be applied to the second node N2. The first common driving voltage VDD, transmitted through the first common driving voltage line VDDL, may be applied to the third node N3.

[0206] The second node N2 can be the gate node of the driving transistor DT or a node corresponding to the gate node of the driving transistor DT; the first node N1 can be the source node or drain node of the driving transistor DT or a node corresponding to the source node or drain node of the driving transistor DT; and the third node N3 can be the drain node or source node of the driving transistor DT or a node corresponding to the drain node or source node of the driving transistor DT. In the following discussion, for ease of illustration only, examples are provided based on the first node N1, the second node N2, and the third node N3 of the driving transistor DT being the source node, the gate node, and the drain node, respectively. However, aspects of this disclosure are not limited thereto.

[0207] Figure 3 The scanning transistor ST included in the sub-pixel circuit SPC shown can be a switching transistor, which allows the data signal VDATA, which is the image signal, to be supplied to the second node N2, which is the gate node of the driving transistor DT.

[0208] The scan transistor ST can be turned on or off by a scan signal SC, which is a type of gating signal applied through a scan line SCL (a type of gating line GL), and controls the electrical connection between the second node N2 of the driving transistor DT and the data line DL. The drain or source electrode of the scan transistor ST can be electrically connected to the data line DL. The source or drain electrode of the scan transistor ST can be electrically connected to the second node N2 of the driving transistor DT. The gate electrode of the scan transistor ST can be electrically connected to the scan line SCL.

[0209] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DT. The storage capacitor Cst can include a first capacitor electrode electrically connected to the first node N1 of the driving transistor DT or corresponding to the first node N1 of the driving transistor DT, and a second capacitor electrode electrically connected to the second node N2 of the driving transistor DT or corresponding to the second node N2 of the driving transistor DT.

[0210] The storage capacitor Cst can be an external capacitor intentionally designed to be located or disposed outside the driving transistor DT, and thus different from an internal capacitor such as a parasitic capacitor (e.g., Cgs, Cgd, etc.) that can be formed between the first node N1 and the second node N2 of the driving transistor DT. However, the aspects of this disclosure are not limited thereto.

[0211] Each of the driving transistor DT and the scanning transistor ST can be an n-type transistor or a p-type transistor.

[0212] The display panel 110 may have a top-emitting structure or a bottom-emitting structure.

[0213] In the example where the display panel 110 has a top-emitting structure, at least a portion of the sub-pixel circuit SPC can overlap with at least a portion of the light-emitting element ED in the vertical direction. In this configuration, the area or size of the corresponding light-emitting region can be increased, and consequently, the corresponding aperture ratio can be increased.

[0214] In the example of the display panel 110 having a bottom light-emitting structure, the sub-pixel circuit SPC may not overlap with the light-emitting element ED in the vertical direction.

[0215] like Figure 3 As shown, the sub-pixel circuit SPC may include two transistors (2T: DT and ST) and a capacitor (1C: Cst) (which may be referred to as "2T1C structure"), and in some implementations, it may also include one or more transistors or one or more capacitors.

[0216] For example, the sub-pixel circuit SPC can have an 8T1C structure including 8 transistors and 1 capacitor. In another example, the sub-pixel circuit SPC can have a 6T2C structure including 6 transistors and 2 capacitors. In yet another example, the sub-pixel circuit SPC can have a 7T1C structure including 7 transistors and 1 capacitor. However, the exemplary embodiments of this disclosure are not limited to such specific structures.

[0217] The type and number of gating signals supplied to the sub-pixel SP, and / or the type and number of gating lines connected to the sub-pixel SP, can vary depending on the structure of the corresponding sub-pixel circuit SPC. Furthermore, the type and number of common pixel driving voltages supplied to the sub-pixel SP can vary depending on the structure of the corresponding sub-pixel circuit SPC.

[0218] Figure 4 yes Figure 2 Example cross-sectional view of region A in the middle.

[0219] Figure 2 The area A shown can be a display area DA that includes a light-emitting area EA and a sub-pixel SP.

[0220] Reference Figure 4 Describe the stacking configuration of display panel 110.

[0221] Reference Figure 4 The substrate 111 may include a first substrate 401, an interlayer insulating layer 402, and a second substrate 403. The interlayer insulating layer 402 may be located between the first substrate 401 and the second substrate 403. Because the substrate 111 includes the first substrate 401, the interlayer insulating layer 402, and the second substrate 403, the display panel 110 can provide the advantage of preventing moisture penetration. For example, the first substrate 401 and the second substrate 403 may be polyimide (PI) substrates. The first substrate 401 may be referred to as the main PI substrate, and the second substrate 403 may be referred to as the auxiliary PI substrate.

[0222] Reference Figure 4 Various types of patterns (ACT1, SD1, GATE1), various types of insulating layers (411, 412a, 412b, 413, 414, 415, 430), and various types of metal patterns (TM1, GM, ML1, ML2) for forming one or more transistors such as driving transistors DRT can be disposed on the substrate SUB.

[0223] Reference Figure 4A multi-buffer layer 411 can be disposed on the second substrate 403, and a first active buffer layer 412a can be disposed on the multi-buffer layer 411. For example, the first active buffer layer 412a can be formed by a single layer or multiple layers of inorganic film. For example, the single-layer inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multi-layer inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film, and one or more layers of amorphous silicon (a-Si), but the exemplary embodiments of this disclosure are not limited thereto. Depending on the structure or characteristics of the display device, the first active buffer layer 412a may not be included.

[0224] The first metal layer ML1 and the second metal layer ML2 may be disposed on the first active buffer layer 412a. In one or more aspects, the first metal layer ML1 and the second metal layer ML2 may be a light-shielding layer LS for light shielding.

[0225] The second active buffer layer 412b can be disposed on the first metal layer ML1 and the second metal layer ML2. For example, the second active buffer layer 412b can be formed by a single layer or multiple layers of inorganic film. For example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multiple layers of inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si), but the exemplary embodiments of this disclosure are not limited thereto. The first active layer ACT1 of the driving transistor DRT can be disposed on the second active buffer layer 412b.

[0226] A first gate insulating layer 413 may be provided such that the first gate insulating layer 413 covers the first active layer ACT1. For example, the first gate insulating layer 413 may be formed by a single layer or multiple layers of inorganic film. For example, the single layer of inorganic film may be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multiple layers of inorganic film may be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si), but the exemplary embodiments of this disclosure are not limited thereto.

[0227] The first gate electrode GATE1 of the driving transistor DRT may be disposed on the first gate insulating layer 413. In one or more aspects, in addition to the first gate electrode GATE1 of the driving transistor DRT, at least one gate material layer GM may be disposed on the first gate insulating layer 413 at a location different from the location where the driving transistor DRT is disposed.

[0228] A first interlayer insulating layer 414 can be disposed on the first gate electrode GATE1 and the gate material layer GM, such that the first interlayer insulating layer 414 covers the first gate electrode GATE1 and the gate material layer GM. For example, the first interlayer insulating layer 414 can be formed by a single layer or multiple layers of inorganic film. For example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multiple layers of inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si), but the exemplary embodiments of this disclosure are not limited thereto. A metal pattern TM1 can be disposed on the first interlayer insulating layer 414. The metal pattern TM1 can be located at a location different from the location where the driving transistor DRT is disposed. A second interlayer insulating layer 415 can be disposed on the metal pattern TM1 located on the first interlayer insulating layer 414, such that the second interlayer insulating layer 415 covers the metal pattern TM1. For example, the second interlayer insulating layer 415 can be formed by a single layer or multiple layers of inorganic films. For example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, while the multiple layers of inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si), but the exemplary embodiments of this disclosure are not limited thereto.

[0229] Two first source-drain electrode patterns 421 can be disposed on the second interlayer insulating layer 415. One of the two first source-drain electrode patterns 421 can be the source node of the driving transistor DRT, and the other of the two first source-drain electrode patterns 421 can be the drain node of the driving transistor DRT. The two first source-drain electrode patterns 421 can be electrically connected to the first side and the second side of the first active layer ACT1, respectively, through contact holes of the second interlayer insulating layer 415, the first interlayer insulating layer 414, and the first gate insulating layer 413.

[0230] The portion where the first active layer ACT1 overlaps with the first gate electrode GATE1 can be referred to as the channel region. One of the two first source-drain electrode patterns 421 can be connected to the first side of the channel region of the first active layer ACT1, and the other of the two first source-drain electrode patterns 421 can be connected to the second side of the channel region of the first active layer ACT1.

[0231] The passivation layer 430 can be disposed on the two first source-drain electrode patterns 421, such that the passivation layer 430 covers the two first source-drain electrode patterns 421. A planarization layer 440 (not shown) can be disposed on the passivation layer 430. The planarization layer 440 may include a first planarization layer 441 and a second planarization layer 442.

[0232] For example, the first planarization layer 441 may be disposed on the passivation layer 430. For example, the first planarization layer 441 may include an organic insulating material, and the organic insulating material may include acrylic resin or photosensitive polyimide, but is not limited thereto.

[0233] The second source-drain electrode pattern 422 can be disposed on the first planarization layer 441. The second source-drain electrode pattern 422 can be connected to one of the two first source-drain electrode patterns 421 (corresponding to) through the contact holes of the first planarization layer 441. Figure 3 The second node N2 of the driving transistor DRT in the sub-pixel SP.

[0234] The second planarization layer 442 may be disposed on the second source-drain electrode pattern 422, such that the second planarization layer 442 covers the second source-drain electrode pattern 422. For example, the second planarization layer 442 may include an organic insulating material, and the organic insulating material may include acrylic resin or photosensitive polyimide, but is not limited thereto. The configuration from the multi-buffer layer 411 to the second planarization layer 442 may be collectively referred to as the circuit layer CL, wherein the configuration from the first planarization layer 441 to the second planarization layer 442 may be referred to as the circuit connection region 6100. Furthermore, the region from the cathode electrode CE to the third encapsulation layer 463 may be referred to as the common region 6700, but is not limited thereto.

[0235] The light-emitting element ED of the sub-pixel SP can be set on the second planarization layer 442.

[0236] In an example stacked configuration of the light-emitting element ED, the anode electrode PE can be disposed on the second planarization layer 442. Figure 4 The anode electrode PE can represent Figure 3 The pixel electrode PE. The anode electrode PE can be electrically connected to the second source-drain electrode pattern 422 through the contact holes of the second planarization layer 442.

[0237] The dam 450 can be disposed on the anode electrode PE such that the dam 450 covers a portion of the anode electrode PE. The portion of the dam 450 corresponding to the light-emitting area EA of the sub-pixel SP can be open.

[0238] According to this disclosure, the dam 450 can be disposed in each of a plurality of sub-pixels. The dam 450 can be formed of an opaque material (e.g., black) to prevent light interference between adjacent pixels. In this case, the dam 450 may include, but is not limited to, a light-shielding material composed of at least one of colored pigments, organic black, or carbon.

[0239] For example, the dam 450 may comprise an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), or the dam 450 may be formed of a black resin. Furthermore, the dam 450 may be formed of an organic layer such as an acrylic-based material, an epoxy-based material, a phenolic-based material, a polyamide-based material, or a polyimide-based material. However, this disclosure is not limited thereto.

[0240] A portion of the anode electrode PE can be exposed through the opening (open portion) of the embankment 450. The light-emitting layer EL can be disposed on one or more side surfaces of the embankment 450 and in the opening (open portion) of the embankment 450. All or at least a portion of the light-emitting layer EL can be located between adjacent embankments 450. Figure 4 The luminescent layer EL can represent Figure 3 The light-emitting layer EML.

[0241] In the opening at 450° of the embankment, the light-emitting layer EL can contact the anode electrode PE. The cathode electrode CE can be disposed on the light-emitting layer EL. Figure 4 The cathode electrode CE can represent Figure 3 The common electrode CE.

[0242] A light-emitting element (ED) can be formed by including an anode electrode (PE), a light-emitting layer (EL), and a cathode electrode (CE). The light-emitting layer (EL) may include a layer of organic material.

[0243] Reference Figure 4 Since the circuit elements in each sub-pixel SP (e.g., light-emitting elements such as organic light-emitting diodes (OLEDs) that include organic materials) may be susceptible to damage from external moisture or oxygen, an encapsulation layer 460 (not shown) may be provided in the display panel 110 to prevent external moisture or oxygen from penetrating into the circuit elements (e.g., light-emitting elements EDs).

[0244] The encapsulation layer 460 can be configured in various shapes or shapes to prevent the light-emitting element (ED) from contacting moisture or oxygen. For example, the encapsulation layer 460 may comprise two or more layers, with one or more organic layers and one or more inorganic layers alternately stacked, but this disclosure is not limited thereto. The encapsulation layer 460 may have a single-layer stack or a multi-layer stack. For example, the encapsulation layer may comprise a first inorganic encapsulation layer, a first organic encapsulation layer, and a second inorganic encapsulation layer stacked sequentially. Alternatively, the encapsulation layer may comprise a first inorganic encapsulation layer, a first organic encapsulation layer, a second inorganic encapsulation layer, a second organic encapsulation layer, and a third inorganic encapsulation layer stacked sequentially.

[0245] The first, second, and third inorganic encapsulation layers can be used to block the penetration of moisture or oxygen. The first, second, and third inorganic encapsulation layers can be made of inorganic materials, such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlOx). However, this disclosure is not limited thereto.

[0246] A first organic encapsulation layer is disposed between a first inorganic encapsulation layer and a second inorganic encapsulation layer, and a second organic encapsulation layer is disposed between the second and third inorganic encapsulation layers. The first and second organic encapsulation layers may each have a greater thickness than each of the first, second, and third inorganic encapsulation layers to adsorb or block particles that may be generated during the manufacturing process of the display device. The first and second organic encapsulation layers may fill cracks that may form in the first and second inorganic encapsulation layers. The first and second organic encapsulation layers can planarize the upper portions of the first and second inorganic encapsulation layers by respectively covering particles on the first and second inorganic encapsulation layers. For example, the first organic encapsulation layer can planarize the upper portion of the first inorganic encapsulation layer by covering particles on the first inorganic encapsulation layer. For example, the second organic encapsulation layer can planarize the upper portion of the second inorganic encapsulation layer by covering particles on the second inorganic encapsulation layer. The first and second organic encapsulation layers may be made of organic materials, and for example, epoxy polymers, acrylic polymers, etc., may be used. However, this disclosure is not limited thereto.

[0247] Furthermore, the encapsulation layer is not limited to three or five layers. For example, it can include n layers of alternating inorganic and organic encapsulation layers (where n is an integer greater than 3).

[0248] In one or more aspects, such as Figure 4 As shown, the encapsulation layer 460 may include a first encapsulation layer 461, a second encapsulation layer 462, and a third encapsulation layer 463.

[0249] For example, the first encapsulation layer 461 and the third encapsulation layer 463 can be inorganic layers, and the second encapsulation layer 462 can be an organic layer. Among the first encapsulation layer 461, the second encapsulation layer 462 and the third encapsulation layer 463, the second encapsulation layer 462 can be the thickest and is used as a planarization layer.

[0250] A first encapsulation layer 461 may be disposed on the cathode electrode CE. The first encapsulation layer 461 may include an inorganic insulating material that can be deposited by low-temperature deposition. For example, the first encapsulation layer 461 may include, but is not limited to, silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), etc. Because the first encapsulation layer 461 is deposited in a low-temperature atmosphere, it can prevent damage to the light-emitting layer EL, which includes organic materials susceptible to high-temperature atmospheres, during the deposition process.

[0251] The second encapsulation layer 462 may have an area or size smaller than the first encapsulation layer 461. For example, the second encapsulation layer 462 may be configured to expose both ends or both edges of the first encapsulation layer 461. When the display device 100 is bent or folded, the second encapsulation layer 462 can serve as a buffer layer to relieve stress between corresponding layers and also to enhance planarization performance. For example, the second encapsulation layer 462 may comprise an organic insulating material such as acrylic resin, epoxy resin, polyimide, polyethylene, silicon carbide (SiOC), etc. The second encapsulation layer 462 may be formed, for example, by inkjet technology.

[0252] A third encapsulation layer 463 may be disposed on a substrate 111 on which a second encapsulation layer 462 is disposed, such that the third encapsulation layer 463 covers the corresponding upper and side surfaces of the second encapsulation layer 462 and the first encapsulation layer 461. The third encapsulation layer 463 may be used to minimize or block external moisture or oxygen from penetrating into the first encapsulation layer 461, which contains inorganic materials, and the second encapsulation layer 462, which contains organic materials. For example, the third encapsulation layer 463 may include inorganic insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), and aluminum oxide (Al2O3).

[0253] At least one color filter 480 may be disposed on the third encapsulation layer 463. The color filter 480 may be configured to overlap with the light-emitting element ED. A black matrix 470 may be disposed between the color filters 480 and / or between the third encapsulation layer 463 and the color filters 480.

[0254] In the example where color filter 480 is set in display panel 110, multiple light-emitting elements (EDs) can emit light of the same color. For example, when color filter 480 is set, multiple light-emitting elements (EDs) can emit the same white light. In another example, multiple light-emitting elements (EDs) can emit the same blue light.

[0255] For example, color filter 480 may include a red color filter, a green color filter, and a blue color filter. However, aspects of this disclosure are not limited to these specific examples.

[0256] Touch sensing lines (not shown) may be located between encapsulation layer 460 and color filter 480. Touch sensing lines may define a grid structure, with one or more subpixels arranged in the opening region of the grid structure.

[0257] Furthermore, light generated from the light-emitting layer EL of the light-emitting element ED can be emitted along various paths. (See reference...) Figure 4 Light generated from the luminescent layer EL of the light-emitting element ED can pass through the encapsulation layer 460 and the color filter 480 and exit from the display panel 110. However, due to the difference in refractive index between the layers, some light generated from the luminescent layer EL may be trapped inside the dike 450 or the encapsulation layer 460 by total internal reflection. This situation leads to reduced emission efficiency and hinders the display panel 110 from providing uniform brightness quality to the user.

[0258] Furthermore, as the angle with respect to the direction perpendicular to the substrate 111 increases, some light emitted in directions different from the direction perpendicular to the substrate 111 may be more difficult to exit from the display panel 110 due to total internal reflection, resulting in a narrower viewing angle.

[0259] For example, light generated from the light-emitting layer EL can circulate inside the display panel 110 through internal total internal reflection, which may reduce the brightness of the display panel 110 and narrow the viewing angle.

[0260] According to one or more exemplary embodiments of this disclosure, the problems of narrowing viewing angle and reduced brightness can be solved by providing an insulating layer 500 and a raised insulating layer 510 between the second planarization layer 442 and the pixel electrode PE.

[0261] Figure 5 yes Figure 2 Another example cross-sectional view of region A in the middle.

[0262] For ease of explanation, Figure 5 Only the stack configuration disposed on the second planarization layer 442 is shown, and the stack configuration disposed below the second planarization layer 442 can be related to... Figure 4 The corresponding stack configurations in the cross-sectional diagrams are the same.

[0263] Reference Figure 5 The insulating layer 500 and the raised insulating layer 510 may be disposed between the pixel electrode PE and the second planarization layer 442. The insulating layer 500 may include the same material as the second planarization layer 442. The raised insulating layer 510 may include the same material as the second planarization layer 442. For example, the insulating layer 500 and the raised insulating layer 510 may include the same organic material as the second planarization layer 442, but this disclosure is not limited thereto.

[0264] The stacked configuration set on the pixel electrode PE can be with Figure 4 The stacked configuration is the same in the cross-sectional view. That is, the light-emitting layer EL can be disposed on the pixel electrode PE. The cathode electrode CE can be disposed on the light-emitting layer EL. The encapsulation layer 460 can be disposed on the cathode electrode CE. At least one color filter 480 can be disposed on the third encapsulation layer 460. The black matrix 470 can be disposed between the color filters 480 and / or between the third encapsulation layer 463 and the color filters 480.

[0265] In one or more aspects, the color filter 480 may overlap with the light-emitting area EA. The color filter 480 may overlap with the raised insulating layer 510 disposed in the light-emitting area EA. The touch sensing line may not overlap with the raised insulating layer 510 (although not shown in the figure).

[0266] Reference Figure 5 The area indicated by line E-E' can be corresponding to Figure 4 The light-emitting region EA is shown. A raised insulating layer 510 may be disposed in region E-E'. For example, the raised insulating layer 510 may be disposed to overlap with the light-emitting region EA.

[0267] Reference Figure 5 The insulating layer 500 can be configured such that it does not overlap with the light-emitting region EA. For example, the insulating layer 500 can have an opening that overlaps with the light-emitting region EA. The opening of the insulating layer 500 overlapping with the light-emitting region EA can be... Figure 5 The areas indicated by the line E-E' shown overlap.

[0268] The raised insulating layer 510 can be disposed in the opening of the insulating layer 500. The raised insulating layer 510 can be configured in various shapes. For example, the raised insulating layer 510 can be configured in shapes such as circular, elliptical, polygonal, etc. In one or more aspects, the raised insulating layer 510 can have an island shape. Figure 5 An example is shown in which the raised insulating layer 510 is configured to be circular, so that light generated from the light-emitting layer EL can be uniformly directed in all directions. However, the aspects of this disclosure are not limited thereto.

[0269] The insulating layer 500 may have a certain height, such that the pixel electrode PE may include an inclined portion 501 with an inclined surface. The raised insulating layer 510 may have a height less than that of the insulating layer 500. The inclined portion 501 of the pixel electrode PE may be disposed in an opening of the insulating layer 500 and may overlap with the opening of the insulating layer 500.

[0270] Since the pixel electrode PE is disposed on the insulating layer 500 and the raised insulating layer 510, the pixel electrode PE may include an inclined portion 501 and a raised portion or a bent portion 511 having a raised surface or a bent surface formed along the curvature of the insulating layer 500 and the raised insulating layer 510.

[0271] Since the pixel electrode PE is arranged along the curve of the insulating layer 500, the pixel electrode PE may include a tilted portion 501. Some light generated from the light-emitting layer EL can move in a direction at an angle to the substrate 111 of the display panel 110 (which may be referred to as the "lateral direction"), rather than in a direction perpendicular to the substrate 111 (which may be referred to as the "vertical direction"). Some of the light moving in the lateral direction can be reflected by the tilted portion 501 of the pixel electrode PE formed along the insulating layer 500 and then guided, for example, in path LP3, to exit from the display panel 110.

[0272] Since the pixel electrode PE includes the inclined portion 501, the embankment 450 provided on the pixel electrode PE can be configured to overlap with the inclined portion 501 of the pixel electrode PE. The embankment 450 can be configured to overlap with the portion of the pixel electrode PE including the inclined portion 501, and includes an embankment opening that overlaps with the light-emitting region EA.

[0273] Since the pixel electrode PE is disposed along the curve of the raised insulating layer 510, the pixel electrode PE may include a protrusion or a bend 511. Some of the light generated from the light-emitting layer EL may, for example, move laterally along another path LP1.

[0274] For example, because the insulating layer 500 causes the pixel electrode PE to include a tilted portion 501, some of the light generated from the light-emitting layer EL, which is completely reflected by the dam portion 450, can be guided to exit from the display panel 110. Therefore, the display panel 110 can provide the effect or advantage of increasing the brightness of the display panel 110.

[0275] Furthermore, since the raised insulating layer 510 causes the pixel electrode PE to include a raised portion or a bent portion 511, light can be emitted or guided by the raised portion or the bent portion 511 at various angles. Therefore, the display panel 110 can provide the effect or advantage of increased viewing angle.

[0276] Figure 6 yes Figure 2 Example floor plan of area A in the middle.

[0277] Figure 6 The floor plan shown is in contrast to Figure 5 The plan view that matches the stacked configuration of the cross-sectional view shown.

[0278] Reference Figure 5 and Figure 6Region E-E' can be a region corresponding to the light-emitting region EA, in which the light-emitting layer EL is set to overlap with the pixel electrode PE and the cathode electrode CE.

[0279] The raised insulating layer 510 can be disposed in the light-emitting area EA. Figure 6 An example is shown with four raised insulating layers 510 disposed in the light-emitting region EA, but this is merely an illustrative example and aspects of this disclosure are not limited thereto. (Refer to above) Figure 5 The raised insulating layer 510 can be disposed between the pixel electrode PE and the second planarization layer 442.

[0280] Reference Figure 5 and Figure 6 Regions F-F' can be regions corresponding to the tilted portion 501 of the pixel electrode PE. Regions F-F' can emit ring-shaped light surrounding the light-emitting region EA by reflecting light from the tilted portion 501 of the pixel electrode PE. Therefore, regions E-E' can be called the main light-emitting region, and regions F-F' can be called the sub-light-emitting region. Thus, low-brightness or non-light-emitting regions F'-E exist between the sub-light-emitting region and the main light-emitting region. Furthermore, since light diffuses and emits in various directions in the region where the raised insulating layer 510 is provided, the region overlapping with the raised insulating layer 510 can be called a diffuse light-emitting region.

[0281] In one or more aspects, the raised insulating layer 510 may be disposed over the entire display area DA, including the flat area FA and the bent area BA. In one or more aspects, the raised insulating layer 510 may be formed in different shapes in the flat area FA and the bent area BA.

[0282] Figure 7 Example cross-sectional views of the flat area FA and the bent area BA of the display panel 110 according to various aspects of this disclosure are shown.

[0283] Reference Figure 5 and Figure 7 , Figure 5 The insulating layer 500 and the raised insulating layer 510 shown can be disposed in the flat region FA and the bent region BA.

[0284] In one or more aspects, the raised insulating layer 510 may be formed in different shapes in the flat region FA and the bent region BA.

[0285] Reference Figure 7 The raised insulating layer 510a disposed in the flat region FA can be configured to have a first height h1 and a first width w1. The raised insulating layer 510b disposed in the bent region BA can be configured to have a second height h2 and a second width w2.

[0286] In one or more aspects, the second height h2 of the raised insulating layer 510b disposed in the bending region BA may be greater than the first height h1 of the raised insulating layer 510a disposed in the flat region FA. In one or more aspects, the second width w2 of the raised insulating layer 510b disposed in the bending region BA may be greater than the first width w1 of the raised insulating layer 510a disposed in the flat region FA.

[0287] Because the size of the raised insulating layer 510b disposed in the bending region BA is larger than the size of the raised insulating layer 510a disposed in the flat region FA, the area of ​​the upper surface of the raised portion or bent portion 511b of the second pixel electrode PE2 in the bending region BA can be larger than the area of ​​the upper surface of the raised portion or bent portion 511a of the first pixel electrode PE1 in the flat region FA. In one or more aspects, the area of ​​the lower surface of the raised insulating layer 510b disposed in the bending region BA can be larger than the area of ​​the lower surface of the raised insulating layer 510a disposed in the flat region FA.

[0288] Because the area of ​​the protrusion or bend 511b of the second pixel electrode PE2 in the bent region BA is larger than the area of ​​the protrusion or bend 511a of the first pixel electrode PE1 in the flat region FA, the light emitted from the light-emitting layer EL is diffused more in the bent region BA than in the flat region FA. For example, because more light is emitted in the bent region BA in a direction different from the vertical direction, the display panel 110 can provide the effect or advantage of increased viewing angle in the bent region BA compared to the flat region FA.

[0289] Therefore, even when the display panel 110 has four curved or bent sides resulting in curved or bent edges, this configuration can result in a wider viewing angle in the bent area BA than in the flat area FA, so that the display panel 110 can provide an effect or advantage that allows the user to recognize the image displayed on the display panel 110 without any sense of difference due to the brightness difference between the bent area BA and the flat area FA.

[0290] Figure 8 This is an example floor plan of the display panel 110 according to various aspects of this disclosure.

[0291] Reference Figure 8 The display panel 110 may include a flat area FA and a curved area BA, and the curved area BA may be formed such that a predetermined curvature is applied from the edge of the flat area FA to the curved area BA. Both the flat area FA and the curved area BA may be included in the display area DA. The non-display area NDA may be located outside or on the periphery of the display area DA.

[0292] The bending area BA may include a first bending area BA1 located at the upper edge of the display panel 110 in the vertical direction in the plan view. The bending area BA may include a second bending area BA2 located at the right edge of the display panel 110 in the horizontal direction in the plan view. The bending area BA may include a third bending area BA3 located at the lower edge of the display panel 110 in the vertical direction in the plan view. The bending area BA may include a fourth bending area BA4 located at the left edge of the display panel 110 in the horizontal direction in the plan view.

[0293] In one or more aspects, the bending region BA may include a fifth bending region BA5 located between the first bending region BA1 and the second bending region BA2. The bending region BA may include a sixth bending region BA6 located between the second bending region BA2 and the third bending region BA3. The bending region BA may include a seventh bending region BA7 located between the third bending region BA3 and the fourth bending region BA4. The bending region BA may include an eighth bending region BA8 located between the fourth bending region BA4 and the first bending region BA1.

[0294] The corresponding raised insulating layers 510 provided in the first to eighth bending regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7 and BA8) can have various shapes.

[0295] The total area of ​​the raised insulating layers 510 disposed in the bending regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7, and BA8) can be greater than the total area of ​​the raised insulating layers 510 disposed in the flat region FA. For example, the total area of ​​one or more raised insulating layers 510 disposed in any one or more pixels (e.g., Pixel1, Pixel2, Pixel3, Pixel4, Pixel5, Pixel6, Pixel7, and / or Pixel8) in the bending regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7, and / or BA8) can be greater than the total area of ​​the raised insulating layers disposed in any pixel Pixel0 in the flat region FA.

[0296] As described above, when the display panel 110 includes at least one raised insulating layer 510, the display panel 110 can provide the effect or advantage of increasing the viewing angle in the area where the raised insulating layer 510 is provided. Since the total area of ​​one or more raised insulating layers 510 of any one or more pixels (e.g., Pixel1 and Pixel2, Pixel3, Pixel4, Pixel5, Pixel6, Pixel7 and / or Pixel8) included in the bent regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7 and / or BA8) is greater than the total area of ​​the raised insulating layers of any pixel Pixel0 included in the flat region FA, the effect of increasing the viewing angle in the bent regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7 and / or BA8) can become relatively greater. Therefore, the viewing angle of the bent regions (BA1, BA2, BA3, BA4, BA5, BA6, BA7 and / or BA8) can be greater than the viewing angle of the flat region FA.

[0297] Figure 9 It is set according to the various aspects of this disclosure. Figure 8 Example plan view of the zeroth pixel Pixel0 in the flat area FA of the display panel 110.

[0298] Reference Figure 9 Any zeroth pixel Pixel0 disposed in the flat area FA of the display panel 110 may include a zeroth red pixel electrode (red PE0), a zeroth green pixel electrode (green PE0), and a zeroth blue pixel electrode (blue PE0).

[0299] The zeroth red emitting layer (red EL0) can be disposed on the zeroth red pixel electrode (red PE0). The zeroth green emitting layer (green EL0) can be disposed on the zeroth green pixel electrode (green PE0). The zeroth blue emitting layer (blue EL0) can be disposed on the zeroth blue pixel electrode (blue PE0).

[0300] Red light can be emitted in areas where a zeroth red emitting layer (red EL0) is set. Green light can be emitted in areas where a zeroth green emitting layer (green EL0) is set. Blue light can be emitted in areas where a zeroth blue emitting layer (blue EL0) is set.

[0301] Understandable. Figure 9 The diagram shows the configuration in which the raised insulating layer 510 is disposed on the lower surface of each pixel electrode (red PE0, green PE0 and blue PE0).

[0302] Reference Figure 9Three raised insulating layers 510 may be disposed on the lower surface of the zeroth red pixel electrode (red PE0). Nine raised insulating layers 510 may be disposed on the lower surface of the zeroth green pixel electrode (green PE0). Six raised insulating layers 510 may be disposed on the lower surface of the zeroth blue pixel electrode (blue PE0). For example, the number of raised insulating layers 510 may vary depending on the color of the light emitted from the zeroth pixel Pixel0.

[0303] However, the number of raised insulating layers 510 disposed on the lower surface of each pixel electrode (red PE0, green PE0, and / or blue PE0) is not limited to this. The number of raised insulating layers 510 disposed on the lower surface of the zeroth red pixel electrode (red PE0) is not limited to three, the number of raised insulating layers 510 disposed on the lower surface of the zeroth green pixel electrode (green PE0) is not limited to nine, and the number of raised insulating layers 510 disposed on the lower surface of the zeroth blue pixel electrode (blue PE0) is not limited to six. It should be noted that the number of raised insulating layers 510 can be set differently depending on the area of ​​the raised insulating layers 510, the distance between the raised insulating layers 510, and / or the area of ​​the pixel electrode PE.

[0304] In one or more aspects, the width of each raised insulating layer 510 disposed in the zeroth pixel Pixel0 may be approximately 3 μm, but is not limited thereto. In an example where the raised insulating layer 510 is circular, the width of the raised insulating layer 510 may represent the diameter of the raised insulating layer 510. In examples where the raised insulating layer 510 is of other shapes, the width of the raised insulating layer 510 may represent the maximum width of the raised insulating layer 510 in one direction.

[0305] In one or more aspects, although Figure 9 As not shown, two or more data lines (e.g., four data lines) can be connected to... Figure 9 The pixel Pixel0 shown overlaps. In one example implementation, one of the overlapping data lines can be... Figure 9 The raised insulating layer 510 arranged on the left column of the green pixel electrode (Green PE0) shown in the figure. Figure 9 The raised insulating layer 510 on the left side of the red pixel electrode (Red PE0) shown completely or partially overlaps with the raised insulating layer 510 on the blue pixel electrode (Blue PE0). No data lines can overlap with the raised insulating layer 510 on the blue pixel electrode (Blue PE0).

[0306] In one example implementation, the data line may be positioned on the second interlayer insulation layer 415 and separated from the raised insulation layer 510 by the first planarization layer 441 and the second planarization layer 442. In this configuration, even if a data line only partially overlaps with one or more raised insulation layers 510, it will not adversely affect the shape of the overlapping raised insulation layers.

[0307] Even if the zeroth pixel PE0 is arranged in the flat area FA, the relative arrangement of the data lines with respect to the raised insulating layer 510 can be applied to any one of the first pixel electrodes PE1 to the eighth pixel electrodes PE8 arranged in the bent areas BA1 to BA8.

[0308] In one or more implementations, although Figure 4 and Figure 5 As not shown, the second source-drain electrode pattern 422 may overlap with one or more raised insulating layers 510. In one example embodiment, the second source-drain electrode pattern 422 may overlap only with... Figure 9 The blue pixel electrode shown has some raised insulating layers 510 arranged on the blue PE0 (e.g., Figure 9 The upper and lower raised insulating layers 510 shown overlap. Alternatively, the second source-drain electrode pattern 422 may not overlap with any raised insulating layer 510 disposed on the blue pixel electrode blue PE0. Alternatively, the second source-drain electrode pattern 422 may overlap with... Figure 9 The raised insulating layers 510 arranged on the red pixel electrode red PE0 shown overlap. Alternatively, the second source-drain electrode pattern 422 can be... Figure 9 The green pixel electrode shown has some raised insulating layers 510 arranged on the green PE0 (e.g., Figure 9 The raised insulating layers 510 arranged in the middle row of the raised insulating layers 510 arranged on the green pixel electrode green PE0 shown overlap.

[0309] Figure 10 It is set according to the various aspects of this disclosure. Figure 8 An example plan view of the first pixel Pixel1 in the first bent area BA1 of the display panel 110.

[0310] Reference Figure 10 and Figure 9 Apart from the configuration of the raised insulating layer 510, the structure of the first pixel Pixel1 disposed in the first bending region BA1 can be the same as the structure of the zero pixel Pixel0 disposed in the flat region FA.

[0311] For example, any first pixel Pixel1 disposed in the first bent area BA1 of the display panel 110 may include a first red pixel electrode (red PE1), a first green pixel electrode (green PE1), and a first blue pixel electrode (blue PE1).

[0312] A first red light-emitting layer (red EL1) may be disposed on a first red pixel electrode (red PE1). A first green light-emitting layer (green EL1) may be disposed on a first green pixel electrode (green PE1). A first blue light-emitting layer (blue EL1) may be disposed on a first blue pixel electrode (blue PE1).

[0313] Red light can be emitted in the area where the first red emitting layer (red EL1) is provided. Green light can be emitted in the area where the first green emitting layer (green EL1) is provided. Blue light can be emitted in the area where the first blue emitting layer (blue EL1) is provided.

[0314] Understandable. Figure 10 The diagram shows the configuration in which the raised insulating layer 510 is disposed on the lower surface of each pixel electrode (red PE1, green PE1 and blue PE1).

[0315] Reference Figure 10 Three raised insulating layers 510 may be disposed on the lower surface of the first red pixel electrode (red PE1). Nine raised insulating layers 510 may be disposed on the lower surface of the first green pixel electrode (green PE1). Six raised insulating layers 510 may be disposed on the lower surface of the first blue pixel electrode (blue PE1). For example, the number of raised insulating layers 510 may vary depending on the color of the light emitted from the first pixel Pixel1.

[0316] However, the number of raised insulating layers 510 disposed on the lower surface of each pixel electrode (red PE1, green PE1, and / or blue PE1) is not limited to this. The number of raised insulating layers 510 disposed on the lower surface of the first red pixel electrode (red PE1) is not limited to three, the number of raised insulating layers 510 disposed on the lower surface of the first green pixel electrode (green PE1) is not limited to nine, and the number of raised insulating layers 510 disposed on the lower surface of the first blue pixel electrode (blue PE1) is not limited to six. It should be noted that the number of raised insulating layers 510 can be set differently depending on the area of ​​the raised insulating layers 510, the distance between the raised insulating layers 510, and / or the area of ​​the pixel electrode PE.

[0317] In one or more aspects, as many raised insulating layers 510 as possible can be provided in the bending region BA, including the first bending region BA1, within the range that can meet design and process requirements. In one or more aspects, the number of raised insulating layers 510 provided in the bending region BA, the distance between the raised insulating layers 510, and the area of ​​the pixel electrode PE can be adjusted to provide a wide viewing angle according to the curvature of the bending region BA.

[0318] In one or more aspects, the width of each raised insulating layer 510 disposed in the first pixel Pixel1 may be approximately 5 μm, but is not limited thereto. In an example where the raised insulating layer 510 is circular, the width of the raised insulating layer 510 may represent the diameter of the raised insulating layer 510. In examples where the raised insulating layer 510 is of other shapes, the width of the raised insulating layer 510 may represent the maximum width of the raised insulating layer 510 in one direction.

[0319] Reference Figure 9 and Figure 10 In one or more aspects, the width of each raised insulating layer 510 disposed in the flat region FA may be about 3 μm, and the width of each raised insulating layer 510 disposed in the first bending region BA1 may be about 5 μm. For example, the width of the raised insulating layer 510 disposed in the bending region BA may be greater than the width of the raised insulating layer 510 disposed in the flat region FA.

[0320] In one or more aspects, Figure 10 The structure of the first pixel Pixel1 of the first bending region BA1 shown can be the same as the structure of the second pixel Pixel2 of the second bending region BA2, the third pixel Pixel3 of the third bending region BA3, the fourth pixel Pixel4 of the fourth bending region BA4, the fifth pixel Pixel5 of the fifth bending region BA5, the sixth pixel Pixel6 of the sixth bending region BA6, the seventh pixel Pixel7 of the seventh bending region BA7, and the eighth pixel Pixel8 of the eighth bending region BA8.

[0321] In this way, since the width of each raised insulating layer 510 disposed in the bending region BA is greater than the width of each raised insulating layer 510 disposed in the flat region FA, the display panel 110 can provide the effect or advantage of relatively widening the viewing angle in the bending region BA compared to the viewing angle in the flat region FA. Therefore, the display panel 110 can provide the effect or advantage of reducing the perceived separation between the flat region FA and the bending region BA.

[0322] In one or more aspects, the width of each raised insulating layer 510 disposed in the flat region FA and the width of each raised insulating layer 510 disposed in the bending region BA may be different from each other, and the corresponding widths of the raised insulating layers disposed in the bending region BA may be different from each other.

[0323] Figure 11 Based on all aspects of this disclosure Figure 8 An example cross-sectional view of the display panel 110 along line X-X'.

[0324] Figure 11 The configuration of the cross-section along line X-X' in the display panel 110 shown can be compared with... Figure 4 The configurations are the same. For ease of explanation, Figure 11 This shows a simplified stack configuration where some layers or elements are omitted.

[0325] The flat area FA of the display panel 110 may include a first raised insulating layer 510a. The bent area BA of the display panel 110 may include a second raised insulating layer 510b, a third raised insulating layer 510c, a fourth raised insulating layer 510d, and a fifth raised insulating layer 510e. The second raised insulating layer 510b may be disposed at a distance farther from the center of the display panel 110 than the first raised insulating layer 510a. The third raised insulating layer 510c may be disposed at a distance farther from the center of the display panel 110 than the second raised insulating layer 510b. The fourth raised insulating layer 510d may be disposed at a distance farther from the center of the display panel 110 than the third raised insulating layer 510c. The fifth raised insulating layer 510e may be disposed at a distance farther from the center of the display panel 110 than the fourth raised insulating layer 510d.

[0326] It should be noted that Figure 11 The cross-sectional view of the display panel 110 shown, including the raised insulating layer 510, may not be based on the actual scale of the display panel 110. For ease of explanation, Figure 11 This shows a configuration similar to that of the actual display panel.

[0327] The width of the first raised insulating layer 510a disposed in the flat region FA can be approximately 3 μm. The width of the second raised insulating layer 510b disposed in the bent region BA can be greater than the width of the first raised insulating layer 510a. For example, the width of the second raised insulating layer 510b can be approximately 3.5 μm.

[0328] The width of the third raised insulating layer 510c disposed in the bending region BA can be greater than the width of the second raised insulating layer 510b. For example, the width of the third raised insulating layer 510c can be approximately 4 μm.

[0329] The width of the fourth raised insulating layer 510d disposed in the bending region BA can be greater than the width of the third raised insulating layer 510c. For example, the width of the fourth raised insulating layer 510d can be approximately 4.5 μm.

[0330] The width of the fifth raised insulating layer 510e disposed in the bending region BA can be greater than the width of the fourth raised insulating layer 510d. For example, the width of the fifth raised insulating layer 510e can be approximately 5 μm.

[0331] For example, as the distance from the center of the display panel 110 increases, the width of the raised insulating layer 510 disposed in the bending region BA can become larger.

[0332] Since a predetermined curvature is applied to the bending region BA of the display panel 110, the angle between the bending region BA and the viewing surface from which the user views the image may increase with increasing distance from the center of the display panel 110. Therefore, the width of the raised insulating layer 510 provided in the bending region BA can be designed to increase with increasing distance from the center of the display panel 110, thereby resulting in a gradual increase in the corresponding viewing angle.

[0333] Therefore, even in the bending area BA, the display panel 110 can provide the effect or advantage of maintaining uniform image quality.

[0334] In one or more aspects, the corresponding shapes of the raised insulating layer 510 can be designed differently so that the user can perceive image quality uniformly as the distance from the center of the display panel 110 increases in the bending region BA.

[0335] Figure 12 It is set according to the various aspects of this disclosure. Figure 8 Another example plan view of the first pixel Pixel1 in the first folded area BA1 of the display panel 110.

[0336] Reference Figure 12 Apart from the configuration of the raised insulating layer 510, the structure of the first pixel Pixel1 in the first bent region BA1 of the display panel 110 can be the same as the structure of the zero pixel Pixel0 in the aforementioned flat region FA.

[0337] For example, any first pixel Pixel1 disposed in the first bent area BA1 of the display panel 110 may include a first red pixel electrode (red PE1), a first green pixel electrode (green PE1), and a first blue pixel electrode (blue PE1).

[0338] A first red light-emitting layer (red EL1) may be disposed on a first red pixel electrode (red PE1). A first green light-emitting layer (green EL1) may be disposed on a first green pixel electrode (green PE1). A first blue light-emitting layer (blue EL1) may be disposed on a first blue pixel electrode (blue PE1).

[0339] Red light can be emitted in the area where the first red emitting layer (red EL1) is provided. Green light can be emitted in the area where the first green emitting layer (green EL1) is provided. Blue light can be emitted in the area where the first blue emitting layer (blue EL1) is provided.

[0340] Understandable. Figure 12 The diagram shows the configuration in which the raised insulating layer 510 is disposed on the lower surface of each pixel electrode (red PE1, green PE1 and blue PE1).

[0341] Reference Figure 12 Three raised insulating layers 510 may be disposed on the lower surface of the first red pixel electrode (red PE1). Nine raised insulating layers 510 may be disposed on the lower surface of the first green pixel electrode (green PE1). Six raised insulating layers 510 may be disposed on the lower surface of the first blue pixel electrode (blue PE1). For example, the number of raised insulating layers 510 may vary depending on the color of the light emitted from the first pixel Pixel1.

[0342] However, the number of raised insulating layers 510 disposed on the lower surface of each pixel electrode (red PE1, green PE1, and / or blue PE1) is not limited to this. The number of raised insulating layers 510 disposed on the lower surface of the first red pixel electrode (red PE1) is not limited to three, the number of raised insulating layers 510 disposed on the lower surface of the first green pixel electrode (green PE1) is not limited to nine, and the number of raised insulating layers 510 disposed on the lower surface of the first blue pixel electrode (blue PE1) is not limited to six. It should be noted that the number of raised insulating layers 510 can be set differently depending on the area of ​​the raised insulating layers 510, the distance between the raised insulating layers 510, and the area of ​​the pixel electrode PE.

[0343] The raised insulating layer 510 disposed in the first pixel Pixel1 can be elliptical in shape. For example, based on the front surface of the display panel 110, the raised insulating layer 510 can have an elliptical shape with its major axis in the horizontal direction and its minor axis in the vertical direction.

[0344] Figure 12 The structure of the first pixel Pixel1 in the first bending region BA1 shown can be applied essentially equivalently to... Figure 8The third pixel Pixel3 of the third bend region BA3 in the structure of the bend region BA shown.

[0345] Since each raised insulating layer 510 in the first pixel Pixel1 of the first bending region BA1 has an elliptical shape with its major axis in the horizontal direction, the display panel 110 can provide the effect or advantage of increasing the viewing angle in the vertical direction compared to having a circular shape.

[0346] The shape of the raised insulating layer 510 disposed in the first pixel Pixel1 of the first bending region BA1 can be the same as the shape of the raised insulating layer 510 disposed in the third pixel Pixel3 of the third bending region BA3.

[0347] In one or more aspects, in order to provide a user with a curved area BA of a display panel 110 configured with uniform brightness by increasing the viewing angle in the horizontal direction, the second curved area BA2 and the fourth curved area BA4 may be designed to have a long axis located in the vertical direction.

[0348] Figure 13 It is set according to the various aspects of this disclosure. Figure 8 Example plan view of the second pixel Pixel2 in the second folded area BA2 of the display panel 110.

[0349] In addition to the configuration of the raised insulating layer 510 in the second bending region BA2, Figure 13 The configuration of the second pixel Pixel2 shown can be compared with... Figure 12 The configuration of the first pixel, Pixel1, is the same as shown. Figure 13 The structure of the second pixel Pixel2 shown can be applied essentially the same way. Figure 8 The fourth pixel Pixel4 of the fourth bend region BA4 in the structure of the bend region BA shown.

[0350] It should be noted that, with Figure 12 Compared to the first pixel Pixel1, which includes a raised insulating layer 510 with its long axis in the horizontal direction to improve the viewing angle in the vertical direction, the second pixel Pixel2 may include a raised insulating layer 510 with its long axis in the vertical direction to improve the viewing angle in the horizontal direction.

[0351] Figure 14 It is set according to the various aspects of this disclosure. Figure 8 Example plan view of the sixth pixel Pixel6 in the sixth bend region BA6 of the display panel 110.

[0352] In addition to the configuration of the raised insulating layer 510 set in the sixth pixel of the Pixel 6, Figure 14 The sixth pixel configuration shown can be compared with... Figure 13 The second pixel shown is configured the same as Pixel2. Figure 14 The structure of the sixth pixel, Pixel 6, shown can be applied essentially equivalently to... Figure 8 The eighth pixel Pixel8 of the eighth bend region BA8 in the structure of the bend region BA shown.

[0353] It should be noted that, with Figure 13 Compared to the second pixel Pixel 2, which includes a raised insulating layer 510 with its long axis in the vertical direction to improve the viewing angle in the horizontal direction, the sixth pixel Pixel 6 may include a raised insulating layer 510 having its long axis in the diagonal direction that is the direction perpendicular to the center of the display panel 110 in order to increase the viewing angle in the direction parallel to the direction connected to the center of the display panel 110.

[0354] In one or more aspects, set Figure 12 , Figure 13 and Figure 14 The elliptical-shaped raised insulating layer 510 in the bending area BA shown can be set in different shapes and / or patterns depending on the distance from the center of the display panel 110.

[0355] Figure 15 Based on all aspects of this disclosure Figure 8 Another example cross-sectional view of the display panel 110 along line X-X'.

[0356] Figure 15 The configuration of the cross-section along line X-X' in the display panel 110 shown can be compared with... Figure 4 The configurations are the same. For ease of explanation, Figure 15 A simplified stack configuration is shown, in which some layers or elements are omitted.

[0357] The flat area FA of the display panel 110 may include a first raised insulating layer 510a. The bent area BA of the display panel 110 may include a second raised insulating layer 510b, a third raised insulating layer 510c, a fourth raised insulating layer 510d, and a fifth raised insulating layer 510e. The second raised insulating layer 510b may be disposed at a distance farther from the center of the display panel 110 than the first raised insulating layer 510a. The third raised insulating layer 510c may be disposed at a distance farther from the center of the display panel 110 than the second raised insulating layer 510b. The fourth raised insulating layer 510d may be disposed at a distance farther from the center of the display panel 110 than the third raised insulating layer 510c. The fifth raised insulating layer 510e may be disposed at a distance farther from the center of the display panel 110 than the fourth raised insulating layer 510d.

[0358] It should be noted that Figure 15 The cross-sectional view of the display panel 110 shown, including the raised insulating layer 510, may not be based on the actual scale of the display panel 110. For ease of explanation, Figure 15 This shows a configuration similar to that of the actual display panel.

[0359] The first raised insulating layer 510a disposed in the flat area FA can have a circular shape. The second raised insulating layer 510b disposed in the bent area BA can have an elliptical shape with its major axis located in a direction parallel to the edge of the display panel 110.

[0360] The third raised insulating layer 510c disposed in the bending region BA may have an elliptical shape with its major axis located in a direction parallel to the edge of the display panel 110. In one or more aspects, the length of the major axis of the third raised insulating layer 510c may be greater than the length of the major axis of the second raised insulating layer 510b.

[0361] The fourth raised insulating layer 510d disposed in the bending region BA may have an elliptical shape with its major axis located in a direction parallel to the edge of the display panel 110. In one or more aspects, the length of the major axis of the fourth raised insulating layer 510d may be greater than the length of the major axis of the third raised insulating layer 510c.

[0362] The fifth raised insulating layer 510e disposed in the bending region BA may have an elliptical shape with its major axis located in a direction parallel to the edge of the display panel 110. In one or more aspects, the length of the major axis of the fifth raised insulating layer 510e may be greater than the length of the major axis of the fourth raised insulating layer 510d.

[0363] For example, the width of the raised insulating layer 510 provided in the bending region BA can have an elliptical shape in which the length of the major axis of the raised insulating layer 510 increases with the distance from the center of the display panel 110.

[0364] Because a predetermined curvature is applied to the bending region BA of the display panel 110, the angle between the bending region BA and the viewing surface from which the user views the image may increase with increasing distance from the center of the display panel 110. To address this issue, the raised insulating layer 510 disposed in the bending region BA is designed to have an elliptical shape, and the length of the major axis of the raised insulating layer 510 is designed to increase with increasing distance from the center of the display panel 110, thus allowing the viewing angle of the display panel 110 to gradually increase.

[0365] Therefore, even in the bending area BA, the display panel 110 can provide the effect or advantage of maintaining uniform image quality.

[0366] Figure 16 This is an example graph illustrating how the brightness on the side or edge of the display panel 110 according to various aspects of this disclosure varies with respect to the brightness in the vertical direction of the display panel 110 relative to the diameter of the raised insulating layer.

[0367] Figure 16 The x-axis of the graph shown can represent the width of the raised insulating layer 510. When the raised insulating layer 510 has a circular shape, the width of the raised insulating layer 510 can have the same meaning as the diameter.

[0368] Figure 16 The y-axis of the graph shown can represent the brightness measured at the side or edge of the display panel 110 relative to the vertical direction of the display panel 110 (which can be referred to as the front brightness). For example, when the y-axis value is 50%, it can represent 50% of the front brightness.

[0369] Reference Figure 16 The brightness measured at a viewing angle of 45° with respect to the center of the display panel 110 can be approximately 45% of the front brightness measured when the raised insulating layer 510 is not provided (i.e., when the diameter of the raised insulating layer 510 is 0 μm).

[0370] Reference Figure 16 The brightness measured at a 45° viewing angle with respect to the center of the display panel 110 can increase with the increase of the diameter of the raised insulating layer 510. For example, when the diameter of the raised insulating layer 510 is 5 μm, the corresponding brightness can be about 50% of the front brightness.

[0371] Reference Figure 16 The brightness measured at a viewing angle of 60° with respect to the center of the display panel 110 can be approximately 25% of the front brightness measured when the raised insulating layer 510 is not provided (i.e., when the diameter of the raised insulating layer 510 is 0 μm).

[0372] Reference Figure 16 The brightness measured at a viewing angle of 60° with respect to the center of the display panel 110 can increase with the increase of the diameter of the raised insulating layer 510. For example, when the diameter of the raised insulating layer 510 is 5 μm, the corresponding brightness can be about 33% of the front brightness.

[0373] Reference Figure 16 As shown in the graph, the viewing angle increases in the area where the raised insulating layer 510 is provided, and the effect of increasing the viewing angle is further enhanced as the diameter or width of the raised insulating layer 510 increases.

[0374] Figure 17This is an example graph showing the amount of light emitted per current relative to the x-value of green in the CIE color coordinates measured in the display panel 110, according to various aspects of this disclosure, in each case.

[0375] Figure 17 The x-axis of the graph shown represents the green x-coordinate value in the CIE color coordinate system, and the y-axis represents the light intensity per current, which can be expressed as candela per ampere (cd / A).

[0376] Reference Figure 17 The diagram shows the light intensity relative to the CIE color coordinates for the following conditions: a reference case where neither an insulating layer 500 nor a raised insulating layer 510 is provided in the display panel 110; a first case (Case 1) where no insulating layer 500 is provided in the display panel 110 but at least one raised insulating layer 510 is provided; and a second case (Case 2) where both an insulating layer 500 and at least one raised insulating layer 510 are provided in the display panel 110.

[0377] In the baseline case Ref, where neither the insulating layer 500 nor the raised insulating layer 510 is provided, the luminous flux per current of green light can be approximately 150 cd / A to 160 cd / A.

[0378] In Case 1, where no insulating layer 500 is provided in the display panel 110 but at least one raised insulating layer 510 is provided, the luminous intensity of green light per current can be approximately 140 cd / A to 150 cd / A.

[0379] In Case 2, where at least one insulating layer 500 and at least one raised insulating layer 510 are provided in the display panel 110, the luminous intensity per current of green light can be approximately 165 cd / A to 180 cd / A.

[0380] Since the raised insulating layer 510 diffuses the light emitted from the corresponding light-emitting layer instead of widening the viewing angle, the amount of light measured in the first case (Case 1) with only the raised insulating layer 510 provided may be reduced compared to the reference case (Ref) without the raised insulating layer 510.

[0381] Conversely, compared to the baseline case Ref, the amount of light measured in the second case Case 2, which includes both a raised insulating layer 510 configured to widen the viewing angle and an insulating layer 500 configured to prevent light generated from the light-emitting layer EL from being completely reflected inside the display panel 110 and to increase brightness, may be increased.

[0382] Figure 18 This is an example graph showing the luminance efficiency of the display panel 110 at a 60° viewing angle in each case according to various aspects of this disclosure.

[0383] Reference Figure 18 The reference case Ref can represent the luminance efficiency of a display panel 110 without either an insulating layer 500 or a raised insulating layer 510 at a 60° viewing angle. The first case, Case 1, can represent the luminance efficiency of a display panel 110 without an insulating layer 500 but with at least one raised insulating layer 510 at a 60° viewing angle. The second case, Case 2, can represent the luminance efficiency of a display panel 110 with both at least one insulating layer 500 and at least one raised insulating layer 510 at a 60° viewing angle.

[0384] Reference Figure 18 Compared to the baseline case Ref, which has neither insulating layer 500 nor raised insulating layer 510, and the first case Case 1, which only has raised insulating layer 510, the luminous efficiency observed at a 60° viewing angle in the second case Case 2, which has both insulating layer 500 and raised insulating layer 510, may be the highest.

[0385] Reference Figure 18 Because at least one insulating layer 500 is provided, the display panel 110 can provide the effect or advantage of increasing the amount of light by preventing light from being completely reflected into the display panel 110, and because at least one raised insulating layer 510 is provided, light can be diffused, thereby providing a wider viewing angle.

[0386] Figure 19 This is a table showing example configurations of insulating layer 500 and raised insulating layer 510 respectively disposed in flat region FA and bent region BA according to various aspects of this disclosure.

[0387] In the flat region FA, the angle (α) between the insulating layer 500 and the second planarization layer 442 (e.g., the second planarization layer 442 in the above figures) can be 60°. The thickness (b) of the insulating layer 500 disposed in the flat region FA can be 2 μm to 3 μm. For example, the thickness (b) of the insulating layer 500 can have the same meaning as the height of the insulating layer 500.

[0388] In the bending region BA, the angle (α) between the insulating layer 500 and the second planarization layer 442 can be 40°. The height (b) of the insulating layer 500 in the bending region BA can be 2 μm to 3 μm.

[0389] To provide the user with uniform image quality in the curved area BA, increasing the viewing angle through the insulating layer 500 rather than increasing brightness can provide the best effect. Therefore, the angle between the insulating layer 500 and the second planarization layer 442 can be set to a small value.

[0390] The diameter (c) of the raised insulating layer 510 disposed in the flat region FA can be 3 μm. The thickness (d) of the raised insulating layer 510 disposed in the flat region FA can be 0.8 μm. In the flat region FA, the angle (e) between the raised insulating layer 510 and the planarization layer 442 can be 30° to 40°.

[0391] The diameter (c) of the raised insulating layer 510 disposed in the bending region BA can be 5 μm. The thickness (d) of the raised insulating layer 510 disposed in the bending region BA can be 1.2 μm. In the bending region BA, the angle (e) between the raised insulating layer 510 and the planarization layer 442 can be 40° to 50°.

[0392] To provide a uniform image quality to the user between the flat region FA and the curved region BA, the diameter (c), thickness (d), and angle (e) of the raised insulating layer 510 disposed in the curved region BA can be set to larger values ​​than those of the raised insulating layer 510 disposed in the flat region FA. This allows for a wider viewing angle in the curved region BA, thus the display device 100 can provide the effect or advantage of solving the problem of image quality degradation caused by the curvature in the curved region BA.

[0393] In the example implementation, the angles on opposite sides of the raised insulating layer can be different (e.g., they can differ by 1° to 5°). For example, the angle α1 on the first side of the raised insulating layer is greater than the angle α2 on the opposite side of the raised insulating layer.

[0394] Figure 20 This is a table showing the number and diameter of the raised insulating layers 510 disposed on the red subpixel according to various aspects of this disclosure, as well as the associated fill factor.

[0395] The fill factor shown in the table can be a value obtained by dividing the area of ​​the raised insulating layer 510 disposed in the light-emitting element ED by the light-emitting area formed by the light-emitting element ED. The light-emitting region can have the same meaning as the light-emitting region EA. The fill factor can increase as the area of ​​the raised insulating layer 510 overlapping with the light-emitting region increases.

[0396] Reference Figure 20 As shown in the table, the fill factor can increase with the increase of the number of raised insulating layers provided in the sub-pixel SP. Furthermore, the fill factor can increase with the increase of the diameter of the raised insulating layer 510 provided in the sub-pixel SP.

[0397] Based on the characteristics of the raised insulating layer 510 described above, as the area, height, angle, etc., increase relative to the diameter of the raised insulating layer 510, the display panel can provide the effect or advantage of increasing the fill factor and increasing the viewing angle. Therefore, the shape of the raised insulating layer 510 can be adjusted so that the fill factor in the bent region BA can be greater than the fill factor in the flat region FA.

[0398] The display device according to the exemplary embodiments described herein can be described as follows.

[0399] According to one or more exemplary embodiments described herein, a display device may be provided, comprising: a substrate including a flat region and a bent region; a planarization layer disposed on the substrate; a first pixel electrode located in the flat region and disposed in a pixel electrode layer disposed on the planarization layer; a second pixel electrode located in the bent region and disposed in a pixel electrode layer disposed on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including a first opening overlapping a portion of the first pixel electrode and a second opening overlapping a portion of the second pixel electrode; at least one first raised insulating layer disposed on the planarization layer, positioned in an island shape within the first opening, and having a raised shape; and at least one second raised insulating layer disposed on the planarization layer, positioned in an island shape within the second opening, and having a raised shape. In one or more aspects, the first pixel electrode may include a first bent portion disposed in the first opening along the upper surface of at least one first raised insulating layer, and the second pixel electrode may include a second bent portion disposed in the second opening along the upper surface of at least one second raised insulating layer. In one or more aspects, in a plan view, the area of ​​the lower surface of at least one second raised insulating layer may be greater than the area of ​​the lower surface of at least one first raised insulating layer.

[0400] In one or more aspects, the area of ​​the lower surface of at least one second raised insulating layer may be greater than the area of ​​the lower surface of at least one first raised insulating layer.

[0401] In one or more aspects, the first pixel electrode may include a first inclined portion extending along the side surface of the insulating layer in the first opening, and the second pixel electrode may include a second inclined portion extending along the side surface of the insulating layer in the second opening.

[0402] In one or more aspects, the display device may further include: a dam portion disposed on a first pixel electrode and a second pixel electrode. In one or more aspects, the dam portion may include: a first dam portion opening overlapping with a first inclined portion and a second inclined portion and located in the first opening; and a second dam portion opening located in the second opening.

[0403] In one or more aspects, the insulating layer may include the same material as the planarization layer.

[0404] In one or more aspects, at least one first raised insulating layer and at least one second raised insulating layer may comprise the same material as the planarization layer.

[0405] In one or more aspects, the height of the insulating layer may be greater than the height of at least one first raised insulating layer and at least one second raised insulating layer.

[0406] In one or more aspects, the surface area of ​​the upper surface of at least one first raised insulating layer may be less than the surface area of ​​the upper surface of at least one second raised insulating layer.

[0407] In one or more aspects, the height of at least one first raised insulating layer may be less than the height of at least one second raised insulating layer.

[0408] In one or more aspects, at least one first raised insulating layer may overlap with a first pixel electrode, and at least one second raised insulating layer may overlap with a second pixel electrode.

[0409] In one or more aspects, the display device may further include: a third pixel electrode disposed in a flat region; and at least one third raised insulating layer overlapping the third pixel electrode. In one or more aspects, the color of light emitted from the light-emitting layer on the first pixel electrode and the color of light emitted from the light-emitting layer on the third pixel electrode may be different from each other, and the number of at least one first raised insulating layer (e.g., one or more first raised insulating layers) and the number of at least one third raised insulating layer (e.g., one or more third raised insulating layers) may be different from each other.

[0410] In one or more aspects, the color of light emitted from the light-emitting layer on the first pixel electrode may be green, and the color of light emitted from the light-emitting layer on the third pixel electrode may be red or blue. In one or more aspects, the number of at least one first raised insulating layer (e.g., one or more first raised insulating layers) may be greater than the number of at least one third raised insulating layer (e.g., one or more third raised insulating layers).

[0411] In one or more aspects, the color of light emitted from the light-emitting layer on the first pixel electrode may be blue, and the color of light emitted from the light-emitting layer on the third pixel electrode may be red. In one or more aspects, the number of at least one first raised insulating layer (e.g., one or more first raised insulating layers) may be greater than the number of at least one third raised insulating layer (e.g., one or more third raised insulating layers).

[0412] In one or more aspects, the display device may further include: a fourth pixel electrode disposed in the bending region and spaced apart from the second pixel electrode; and at least one fourth raised insulating layer overlapping the fourth pixel electrode. In one or more aspects, the size of the at least one second raised insulating layer may be different from the size of the at least one fourth raised insulating layer.

[0413] In one or more aspects, the size of at least one second raised insulating layer may be smaller than the size of at least one fourth raised insulating layer.

[0414] In one or more aspects, each of at least one second raised insulating layer and at least one fourth raised insulating layer may have an elliptical shape, and the length of the major axis of at least one second raised insulating layer may be less than the length of the major axis of at least one fourth raised insulating layer.

[0415] In one or more aspects, the total area of ​​at least one second raised insulating layer disposed in the bending region may be greater than the total area of ​​at least one first raised insulating layer disposed in the flat region.

[0416] In one or more aspects, the viewing angle of a curved region can be greater than that of a flat region.

[0417] In one or more aspects, the display device may further include: an encapsulation layer disposed on the first pixel electrode and the second pixel electrode; and a color filter layer disposed on the encapsulation layer. In one or more aspects, at least a portion of each of the plurality of color filters included in the color filter layer may overlap with the first raised insulating layer or the second raised insulating layer.

[0418] According to one or more exemplary embodiments described herein, a display device can be provided, comprising: a substrate having a plurality of sub-pixels disposed thereon; a plurality of main light-emitting regions overlapping the plurality of sub-pixels; a plurality of sub-light-emitting regions surrounding the plurality of main light-emitting regions; wherein at least one diffuse light-emitting region is included in each of the plurality of main light-emitting regions. In one or more aspects, light emitted from at least one diffuse light-emitting region may have a light emission angle not perpendicular to the substrate.

[0419] In one or more aspects, the display device may further include: a pixel electrode overlapping at least one of a plurality of main light-emitting regions and at least one of a plurality of sub-light-emitting regions; and at least one raised insulating layer configured such that the at least one raised insulating layer overlaps at least one diffuse light-emitting region located on the lower surface of the pixel electrode. In one or more aspects, the pixel electrode may further include a tilted portion located in at least one of the plurality of sub-light-emitting regions.

[0420] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, the display device comprising: a substrate; a planarization layer disposed on the substrate; a pixel electrode disposed in a pixel electrode layer located on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including an opening overlapping the pixel electrode; and at least one raised insulating layer disposed between the planarization layer and the pixel electrode, located in the opening in an island shape, and having a raised shape.

[0421] In one or more aspects, the pixel electrode includes a first pixel electrode, a second pixel electrode, and a third pixel electrode, and at least one raised insulating layer (510) includes at least one first raised insulating layer disposed on the first pixel electrode, at least one second raised insulating layer disposed on the second pixel electrode, and at least one third raised insulating layer disposed on the third pixel electrode.

[0422] In one or more aspects, the number of at least one third raised insulating layer is greater than the number of at least one first raised insulating layer and less than the number of at least one second raised insulating layer.

[0423] In one or more aspects, the first pixel electrode is a red pixel electrode, the second pixel electrode is a green pixel electrode and the third pixel electrode is a blue pixel electrode.

[0424] In one or more aspects, the number of at least one third raised insulating layer is 6, the number of at least one first raised insulating layer is 3, and the number of at least one second raised insulating layer is 9.

[0425] In one or more aspects, the display device further includes one or two or more data lines separated from the raised insulating layer by a planarization layer, the one or two or more data lines overlapping with at least one of at least a first raised insulating layer and at least one second raised insulating layer, and no data lines overlapping with at least one third raised insulating layer.

[0426] In one or more aspects, the display device further includes a source-drain electrode pattern disposed in a planarization layer and separated from at least one raised insulating layer, the source-drain electrode pattern overlapping at least one of at least one first raised insulating layer, at least one second raised insulating layer and at least one third raised insulating layer.

[0427] According to one or more exemplary embodiments of this disclosure, a display panel can be provided, the display panel comprising: a substrate including a flat region and a bent region; a planarization layer disposed on the substrate; a first pixel electrode located in the flat region and disposed in a pixel electrode layer disposed on the planarization layer; a second pixel electrode located in the bent region and disposed in a pixel electrode layer disposed on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including a first opening overlapping a portion of the first pixel electrode and a second opening overlapping a portion of the second pixel electrode; at least one first raised insulating layer disposed on the planarization layer, island-shaped in the first opening, and having a raised shape; and at least one second raised insulating layer disposed on the planarization layer, island-shaped in the second opening, and having a raised shape. In one or more aspects, the first pixel electrode may include a first curved surface disposed in the first opening along the upper surface of at least one first raised insulating layer, and the second pixel electrode may include a second curved surface disposed along the upper surface of at least one second raised insulating layer in the second opening. In one or more aspects, the area of ​​the lower surface of at least one second raised insulating layer may be greater than the area of ​​the lower surface of at least one first raised insulating layer.

[0428] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, the display panel comprising: a substrate having a plurality of sub-pixels disposed thereon; a plurality of main light-emitting regions overlapping the plurality of sub-pixels; and a plurality of sub-light-emitting regions surrounding the plurality of main light-emitting regions, wherein at least one diffuse light-emitting region is included in each of the plurality of main light-emitting regions. In one or more aspects, the diffuse light-emitting region may enable light emitted therefrom to have a light emission angle not perpendicular to the substrate.

[0429] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, the display panel comprising: a substrate; a planarization layer disposed on the substrate; a pixel electrode disposed in a pixel electrode layer located on the planarization layer; an insulating layer disposed between the planarization layer and the pixel electrode layer, and including an opening overlapping the pixel electrode; and at least one first protruding insulating layer disposed between the planarization layer and the pixel electrode, situated in the opening in an island shape, and having a protruding shape.

[0430] Although exemplary embodiments of this disclosure have been disclosed above, those skilled in the art will understand that various modifications and changes can be made to this disclosure without departing from the scope and spirit of this disclosure as described in the appended claims.

[0431] Cross-reference to related applications

[0432] This application claims priority and benefit to Korean Patent Application No. 10-2024-0161243, filed on November 13, 2024, the entire contents of which are hereby expressly incorporated herein for all purposes.

Claims

1. A display device (100), the display device (100) comprising: A substrate (111) comprising a flat region (FA) and a bent region (BA); A planarization layer (440) is disposed on the substrate (111); The first pixel electrode (PE1) is located in the flat region (FA) and disposed in a pixel electrode layer located on the planarization layer (440); The second pixel electrode (PE2) is located in the bending region (BA) and disposed in the pixel electrode layer located on the planarization layer (440); An insulating layer (500) is disposed between the planarization layer (440) and the pixel electrode layer, and includes a first opening overlapping a portion of the first pixel electrode (PE1) and a second opening overlapping a portion of the second pixel electrode (PE2); At least one first raised insulating layer (510a) is disposed on the planarization layer (440), located in the first opening in an island shape, and having a raised shape; as well as At least one second raised insulating layer (510b) is disposed on the planarization layer (440), positioned in an island shape within the second opening, and having a raised shape. The first pixel electrode (PE1) includes a first curved portion (511a) disposed in the first opening along the upper surface of the at least one first raised insulating layer (510a), and the second pixel electrode (PE2) includes a second curved portion (511b) disposed in the second opening along the upper surface of the at least one second raised insulating layer (510b). The area of ​​the lower surface of the at least one second raised insulating layer (510b) is greater than the area of ​​the lower surface of the at least one first raised insulating layer (510a).

2. The display device (100) according to claim 1, wherein, The first pixel electrode (PE1) includes a first inclined portion extending along the side surface of the insulating layer (500) in the first opening, and The second pixel electrode (PE2) includes a second inclined portion extending along the side surface of the insulating layer (500) in the second opening.

3. The display device (100) according to claim 2, further comprising: A dam (450) is disposed on the first pixel electrode (PE1) and the second pixel electrode (PE2). The embankment (450) includes: A first dike opening, which overlaps with the first inclined portion and the second inclined portion, and is located within the first opening; and The second dike opening is located within the second opening.

4. The display device (100) according to any one of claims 1 to 3, wherein, The insulating layer (500) comprises the same material as the planarization layer (440).

5. The display device (100) according to any one of claims 1 to 3, wherein, The at least one first raised insulating layer (510a) and the at least one second raised insulating layer (510b) comprise the same material as the planarization layer (440).

6. The display device (100) according to any one of claims 1 to 3, wherein, The height of the insulating layer (500) is greater than the height (h1, h2) of each of the at least one first raised insulating layer (510a) and the at least one second raised insulating layer (510b).

7. The display device (100) according to any one of claims 1 to 3, wherein, The surface area of ​​the upper surface of the at least one first raised insulating layer (510a) is smaller than the surface area of ​​the upper surface of the at least one second raised insulating layer (510b).

8. The display device (100) according to any one of claims 1 to 3, wherein, The height (h1) of the at least one first raised insulating layer (510a) is less than the height (h2) of the at least one second raised insulating layer (510b).

9. A display device (100), the display device (100) comprising: A substrate (111) having a plurality of sub-pixels (SPs) disposed thereon; Multiple main light-emitting regions (E-E') overlap with the multiple sub-pixels (SP); Multiple sub-light-emitting regions (F-F') surround the multiple main light-emitting regions (E-E'). Each of the plurality of main emitting regions (E-E') includes at least one diffuse emitting region, and The light emitted from the at least one diffuse luminescent region has a luminescence angle that is not perpendicular to the substrate (111).

10. A display device (100) comprising: substrate(111); A planarization layer (440) is disposed on the substrate (111); A pixel electrode (PE0) is disposed in a pixel electrode layer located on the planarization layer (440); An insulating layer (500) is disposed between the planarization layer (440) and the pixel electrode layer, and includes an opening overlapping the pixel electrode (PEO); as well as At least one raised insulating layer (510) is disposed between the planarization layer (440) and the pixel electrode (PE0), located in the opening in an island shape, and having a raised shape.

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