Complete machine hardware control architecture
By adopting a single-level centralized hardware platform in the lithography machine and constructing a star topology network, point-to-point direct communication is achieved, which solves the problems of communication latency and low data exchange efficiency in the lithography machine control architecture, improves the synchronization accuracy of multi-axis motion and system response speed, and reduces system complexity and maintenance costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- INST OF OPTICS & ELECTRONICS CHINESE ACAD OF SCI
- Filing Date
- 2026-02-13
- Publication Date
- 2026-05-19
AI Technical Summary
The existing lithography machine control architecture suffers from uncertain communication latency, low data exchange efficiency, and high system complexity, making it difficult to meet the high precision and high throughput requirements of nanoscale processing.
It adopts a highly integrated single-level centralized hardware platform, and constructs a star topology network through industrial control computers, switches and hardware embedded real-time operating systems to realize point-to-point direct communication, simplify the network structure and improve data exchange efficiency and system response speed.
Achieving sub-millisecond deterministic communication improves the multi-axis motion synchronization accuracy and control bandwidth of the lithography machine, reduces system complexity and maintenance costs, and ensures long-term reliability and flexibility.
Smart Images

Figure CN122063984A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor manufacturing equipment control technology, and more specifically to a complete hardware control architecture. Background Technology
[0002] As a core piece of equipment in integrated circuit manufacturing, the performance of a lithography machine directly determines the process level and yield of the central processing unit. With the continuous advancement of integrated circuit process nodes towards the nanometer scale and even smaller dimensions, near-limit requirements are placed on the overlay accuracy, yield, and operational stability of lithography machines. This presents unprecedented challenges to its overall hardware control architecture: it needs to synchronously coordinate dozens of subsystems, including illumination, workpiece stage, mask stage, alignment, focusing, and leveling, within an extremely short timeframe to complete ultra-high precision positioning, exposure, and measurement operations.
[0003] Existing high-end lithography machine control architectures mostly employ distributed control systems based on multi-level industrial networks or custom buses. These architectures typically distribute functions such as motion control, image processing, and logic scheduling across different dedicated controllers, which interact with each other via an upper-level management network for command and status communication. However, this hierarchical, distributed design has gradually revealed inherent limitations when dealing with the combined requirements of ultra-high precision and high throughput:
[0004] First, network latency is high and unpredictable. Multi-layer network switching and protocol conversion introduce significant communication delays, which are easily affected by fluctuations in network load, making them uncertain. This has become a major bottleneck for improving performance, especially for systems requiring synchronization errors of all axes within the sub-millisecond or even microsecond range.
[0005] Secondly, data exchange efficiency is low. The complex network hierarchy and distributed processing units mean that massive amounts of real-time sensor data (such as interferometers and image sensors) and control commands need to be forwarded back and forth between multiple nodes, making it difficult to achieve high-speed, parallel centralized processing and closed-loop feedback, thus limiting the improvement of system response speed and control bandwidth.
[0006] Secondly, the system is complex and has high integration costs. The large number of dedicated controllers and supporting network equipment not only increases the hardware complexity and physical space occupation of the system, but also makes system debugging, maintenance and upgrades, as well as collaborative optimization between different subsystems extremely difficult. Summary of the Invention
[0007] (a) Technical problems to be solved
[0008] To address the aforementioned issues, this disclosure provides a complete hardware control architecture. By replacing traditional multi-layered distributed networks with a highly integrated single-level centralized hardware platform, it fundamentally solves core challenges such as uncertain communication latency, low data exchange efficiency, and complex system integration. This architecture integrates high-speed process computation, deterministic real-time motion control, and full device interconnection functions onto a unified hardware foundation consisting of an industrial control computer, a switch, and a hardware-embedded real-time operating system. Its core lies in constructing a star-topology control network with the switch as the sole core. All subsystems are directly connected via high-speed point-to-point links, achieving sub-millisecond deterministic and ultra-low latency communication, and providing powerful centralized real-time processing and collaborative control capabilities.
[0009] (II) Technical Solution
[0010] To address the aforementioned technical problems, embodiments of this disclosure propose a complete machine hardware control architecture.
[0011] According to the first aspect of this disclosure, a complete machine hardware control architecture is provided, including: an industrial control computer, a switch, and a hardware embedded real-time operating system; wherein, the industrial control computer is connected to a 10 Gigabit Ethernet port of the switch via an onboard 10 Gigabit Ethernet port; the hardware embedded real-time operating system is connected to the switch via a small pluggable enhanced optical module interface; and the switch includes multiple adaptive gigabit Ethernet ports, adaptive 10 Gigabit Ethernet ports, and adaptive 10 Gigabit optical module interfaces for direct access to various functional subsystems of the complete machine.
[0012] In some exemplary embodiments, each functional subsystem, industrial control computer, and control platform carrying a hardware embedded real-time operating system are all terminal nodes, directly connected to the corresponding port of the switch through point-to-point links; no secondary switching or relay devices are set up in the network, and all control commands and data flows are exchanged and routed in one stop through the switch.
[0013] In some exemplary embodiments, the industrial computer's motherboard provides no fewer than seven full-size peripheral component interconnect high-speed expansion slots for installing professional graphics cards, image acquisition cards, motion control cards, and network expansion cards that provide small pluggable enhanced optical module interfaces.
[0014] In some exemplary embodiments, the small pluggable enhanced optical module interface provided by the network expansion card includes a first interface, a second interface and at least one third interface, wherein the first interface is connected to a switch, the second interface is connected to a control platform carrying a hardware embedded real-time operating system, and the third interface is used to connect to other high-speed subsystems.
[0015] In some exemplary embodiments, the switch has at least 20 adaptive gigabit Ethernet ports, at least 10 adaptive 10 gigabit Ethernet ports, and at least 4 adaptive 10 gigabit optical module interfaces.
[0016] In some exemplary embodiments, the hardware embedded real-time operating system is a VxWorks system or a Linux system, used to execute the multi-axis cooperative motion control algorithm of the workpiece stage.
[0017] In some exemplary embodiments, another onboard 10 Gigabit Ethernet port of the industrial computer is used to connect an external interferometer.
[0018] In some exemplary embodiments, the industrial computer is also provided with at least two universal serial bus ports and at least two display ports, which are led out to a remote control location via fiber optic extension devices.
[0019] In some exemplary embodiments, the base frequency of the central processing chip inside the industrial control computer is not less than 3.0 GHz, and the number of cores is not less than 8.
[0020] In some exemplary embodiments, the industrial computer adopts a sealed temperature-controlled chassis with a forced airflow design for heat dissipation, featuring an air inlet on the front panel and an exhaust on the rear panel.
[0021] (III) Beneficial Effects
[0022] As can be seen from the above technical solutions, the overall hardware control architecture provided by this disclosure has at least the following beneficial effects:
[0023] (1) By adopting a single-level star network topology with a single multi-rate optoelectronic hybrid core aggregation switch as the center and all subsystems and control units directly connected, this architecture realizes point-to-point direct communication between nodes, avoiding repeated routing and buffering delays of data between multiple levels of switches. This structure makes the internal communication path of the system highly simplified and determined, thereby enabling stable sub-millisecond (e.g., less than 1 millisecond) ultra-low latency, significantly improving the accuracy and reliability of multi-axis motion synchronization and real-time control in photolithography.
[0024] (2) By setting the embedded real-time operating system and the high-performance industrial control computer as the core processing units, and clearly defining their functional division of labor, the hardware embedded real-time operating system is used for multi-axis motion control and closed-loop adjustment, while the industrial control computer is responsible for process scheduling and non-real-time data processing. This architecture fully leverages the performance advantages of centralized computing while maintaining the deterministic nature of the system response. This design enables the real-time control loop to close with the shortest path, significantly improving the system response speed and control bandwidth, and providing a hardware foundation for complex trajectory planning and high dynamic precision control.
[0025] (3) This architecture replaces the numerous independent controllers and complex network devices in the traditional solution with a unified hardware platform, which not only reduces the number of system components and interconnection interfaces, but also reduces the difficulty of wiring and the cost of troubleshooting. In addition, the temperature-controlled chassis and forced-forward and rear-exhaust air cooling design adopted by the industrial computer ensure the temperature stability of the core computing unit under continuous high load conditions, further enhancing the reliability of the whole machine in long-term continuous operation.
[0026] (4) The industrial control computer motherboard provides ample high-speed expansion slots for interconnecting full-size peripheral components and clearly defines the slot allocation strategy for various functional cards (such as graphics cards, image acquisition cards, motion control cards, and high-speed optical module interface cards); the switch is also equipped with a rich variety and sufficient number of gigabit / 10-gigabit network ports and optical module interfaces. This design enables the system to flexibly adapt to different overall configurations or the access needs of subsequent new modules, which is beneficial to protecting user investment and supporting technology iteration. Attached Figure Description
[0027] The foregoing contents, as well as other objects, features, and advantages of this disclosure, will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:
[0028] Figure 1 This diagram schematically illustrates a hardware control architecture of an entire machine according to an embodiment of the present disclosure;
[0029] Figure 2 The diagram schematically illustrates an interface diagram of a complete machine hardware control architecture according to an embodiment of the present disclosure. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.
[0031] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.
[0032] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.
[0033] Figure 1 This diagram schematically illustrates a hardware control architecture of an entire machine according to an embodiment of the present disclosure; Figure 2The diagram schematically illustrates an interface diagram of a complete machine hardware control architecture according to an embodiment of the present disclosure.
[0034] like Figure 1 and Figure 2 As shown, the overall hardware control architecture according to this disclosure includes: an industrial control computer, a switch, and a hardware-embedded real-time operating system. The industrial control computer is connected to a 10 Gigabit Ethernet port of the switch via an onboard 10 Gigabit Ethernet port; the hardware-embedded real-time operating system is connected to the switch via a Small Form-Pluggable Enhanced Optical Module (SFP+) interface; the switch includes multiple adaptive Gigabit Ethernet ports, adaptive 10 Gigabit Ethernet ports, and adaptive 10 Gigabit optical module interfaces for direct access to various functional subsystems of the entire machine. All functional subsystems of the entire machine, the industrial control computer, and the control platform carrying the hardware-embedded real-time operating system are all terminal nodes, directly connected to the corresponding ports of the switch via point-to-point links; no secondary switching or relay devices are set up within the network, and all control commands and data flows are switched and routed in a one-stop manner through the switch.
[0035] This architecture completely eliminates the path complexity and buffered latency accumulation inherent in traditional multi-level distributed networks. This flat, point-to-point direct connection design ensures that the transmission paths for control commands and data streams are unique and shortest, guaranteeing deterministic communication latency. This provides a solid physical foundation for achieving and consistently maintaining a system-wide communication latency of less than 1 millisecond, fundamentally meeting the extreme requirements of micro-nano fabrication processes for high-precision synchronization of multiple systems. The industrial control computer and the embedded real-time operating system are connected to the same switch via independent high-speed paths, achieving physical and functional decoupling: the industrial control computer focuses on non-real-time tasks such as process scheduling and image processing; the embedded real-time operating system is used for hard real-time tasks such as multi-axis motion control and high-speed closed-loop algorithms. This division of labor allows the real-time control loop to close directly and quickly at the level closest to the execution unit, significantly improving the system's response speed, control bandwidth, and motion positioning accuracy, while ensuring ample computing resources for non-real-time task processing.
[0036] In the embodiments disclosed herein, the industrial PC serves as the main computing and control center of the system, responsible for executing non-real-time or soft real-time tasks such as process path planning, image processing, human-computer interaction, and system status monitoring. The industrial PC employs a sealed, temperature-controlled chassis with a forced airflow design for heat dissipation. The front panel of the chassis has air intake vents, and the rear panel has exhaust vents, which, together with the heatsink of the central processing chip inside the industrial PC, form an efficient heat dissipation path, ensuring a constant internal temperature under prolonged high-load operation and guaranteeing computational stability. The industrial PC is equipped with a multi-core high-performance central processing chip with a base frequency of no less than 3.0 GHz and no fewer than 8 cores to support parallel computing requirements. The motherboard of the industrial PC provides no fewer than seven full-size PCIe (PCIe) slots for installing professional graphics cards, image acquisition cards, motion control cards, and network expansion cards with SFP+ interfaces. The network expansion card provides SFP+ interfaces including a first interface, a second interface, and at least one third interface. The first interface connects to the switch, the second interface connects to the control platform carrying the hardware embedded real-time operating system, and the third interface is used to connect to other high-speed subsystems.
[0037] like Figure 2 As shown, the industrial PC's interface configuration further includes: at least two onboard 10 Gigabit Ethernet ports, one of which connects to the corresponding 10 Gigabit Ethernet port on the switch for data exchange with various subsystems; the other onboard 10 Gigabit Ethernet port is dedicated to connecting a high-precision interferometer to receive position measurement signals. In addition, the industrial PC is equipped with at least two Universal Serial Bus (USB) ports (e.g., USB 3.2 ports) and two DisplayPort (DP) ports, such as DP1.4 ports. These ports can be connected to the main control panel or a remote centralized control room via fiber optic extension devices, supporting both local and remote operation.
[0038] In the embodiments of this disclosure, the switch is a multi-rate optoelectronic hybrid core aggregation switch. Its ports are functionally allocated according to rate and media type. All ports of the switch (including adaptive gigabit Ethernet ports, adaptive 10 gigabit Ethernet ports, and adaptive 10 gigabit optical module interfaces) are on the same switching plane, forming a flat network topology. The specific configuration is as follows: There are no fewer than 20 adaptive gigabit Ethernet ports (10 / 100 / 1000 Mbps adaptive), used to connect subsystems with many control commands but relatively low data volumes and general real-time requirements, such as the lighting subsystem, alignment subsystem, mask transmission subsystem, and wafer transmission subsystem. There are no fewer than 10 adaptive 10 gigabit Ethernet ports (2.5G / 10G adaptive), used to connect subsystems with high data bandwidth requirements and strict real-time requirements, such as the focus detection system and the surface shape control system. There are no fewer than 4 adaptive 10 gigabit optical module interfaces, used to establish high-speed, interference-resistant fiber optic links. One adaptive 10 Gigabit optical module interface is connected to the corresponding SFP+ interface of the industrial control computer; one adaptive 10 Gigabit optical module interface is connected to the corresponding SFP+ interface of the hardware embedded real-time operating system; the remaining adaptive 10 Gigabit optical module interfaces are used to connect to subsystems or external devices that use fiber optic communication, such as ultra-large target cameras.
[0039] The switch port design supports line-speed forwarding and traffic priority management, ensuring that the entire system can complete all data exchanges through only one level of switching. This provides a key network foundation for achieving a communication latency of less than 1 millisecond, which not only simplifies the network structure but also improves the reliability and maintainability of the system.
[0040] In the embodiments of this disclosure, each functional subsystem of the entire machine, including the illumination subsystem, alignment subsystem, workpiece stage subsystem, wafer transmission subsystem, and focus detection system, is directly connected to the corresponding port of the switch (adaptive gigabit Ethernet port or adaptive 10 gigabit Ethernet port), forming a flat, single-level communication network. This structure ensures the shortest communication path between any two nodes and a communication latency of less than 1 millisecond. The workpiece stage subsystem is directly driven and controlled by a hardware-embedded real-time operating system to perform multi-axis coordinated motion and cooperate with the alignment subsystem to achieve secondary closed-loop precise positioning.
[0041] In the embodiments of this disclosure, a hardware-embedded real-time operating system constitutes the core of the overall real-time control. This system runs on a dedicated high-performance embedded hardware platform, employing a processor architecture with deterministic real-time scalability, such as the PowerPC series based on x86 architecture or the Cortex-A75 / A78 series processors based on ARM architecture. It often integrates an FPGA or a dedicated motion control coprocessor to execute high-frequency, highly deterministic logic and servo control algorithms. The system runs a rigorously tailored and time-deterministically optimized hardware-embedded real-time operating system (RTOS) kernel, such as VxWorks or a Linux system with the RT-Preempt patch, whose kernel scheduling mechanism ensures microsecond-level time accuracy for task execution. The hardware-embedded real-time operating system directly connects to the switch via its onboard 10 Gigabit optical module interface (such as SFP+ interface) and executes the following core real-time tasks at a high frequency (usually not less than 10 kHz): (1) Multi-axis ultra-high precision collaborative motion control: responsible for trajectory interpolation, servo drive and closed-loop control of multi-degree-of-freedom motion systems such as workpiece stage and mask stage; (2) High-speed real-time data acquisition and processing: directly obtains sensor data such as alignment and focusing from the switch, and runs closed-loop algorithms for detection processes such as fast alignment, leveling and focusing; (3) Whole machine hardware real-time event scheduling and synchronization: manages the strict timing of key events such as light source triggering, shutter control and motion-exposure synchronization. In addition, the hardware-embedded real-time operating system can also be directly connected to a corresponding optical interface of the industrial control computer through an independent dedicated SFP+ optical interface to form a high-speed point-to-point data channel independent of the backbone network, used to transmit the highest priority emergency control commands or large batches of real-time sensor data, further ensuring the real-time performance and reliability of control under extreme working conditions.
[0042] Those skilled in the art will understand that the features described in the various embodiments of this disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments of this disclosure can be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.
Claims
1. A complete machine hardware control architecture, characterized in that, include: Industrial control computers, switches, and hardware-embedded real-time operating systems; The industrial control computer is connected to a 10 Gigabit Ethernet port of the switch via an onboard 10 Gigabit Ethernet port. The hardware-embedded real-time operating system is connected to the switch via a small, pluggable, enhanced optical module interface; and The switch includes multiple adaptive gigabit Ethernet ports, adaptive 10 gigabit Ethernet ports, and adaptive 10 gigabit optical module interfaces, which are used to directly connect to various functional subsystems of the whole machine.
2. The overall hardware control architecture according to claim 1, characterized in that, Each functional subsystem, the industrial control computer, and the control platform carrying the hardware embedded real-time operating system all serve as terminal nodes, directly connecting to the corresponding ports of the switch via point-to-point links; no secondary switching or relay devices are set up within the network, and all control commands and data flows are exchanged and routed in one stop through the switch.
3. The overall hardware control architecture according to claim 1, characterized in that, The motherboard of the industrial computer provides no fewer than seven full-size high-speed expansion slots for peripheral component interconnection. These high-speed expansion slots are used to install professional graphics cards, image acquisition cards, motion control cards, and network expansion cards that provide small pluggable enhanced optical module interfaces.
4. The overall hardware control architecture according to claim 3, characterized in that, The network expansion card provides a small pluggable enhanced optical module interface including a first interface, a second interface, and at least one third interface. The first interface is connected to the switch, the second interface is connected to the control platform carrying the hardware embedded real-time operating system, and the third interface is used to connect to other high-speed subsystems.
5. The overall hardware control architecture according to claim 1, characterized in that, The switch shall have no fewer than 20 adaptive gigabit Ethernet ports, no fewer than 10 adaptive 10 gigabit Ethernet ports, and no fewer than 4 adaptive 10 gigabit optical module interfaces.
6. The overall hardware control architecture according to claim 1, characterized in that, The hardware embedded real-time operating system is a VxWorks system or a Linux system, used to execute the multi-axis cooperative motion control algorithm of the workpiece stage.
7. The overall hardware control architecture according to claim 1, characterized in that, Another onboard 10 Gigabit Ethernet port of the industrial computer is used to connect to an external interferometer.
8. The overall hardware control architecture according to claim 1, characterized in that, The industrial control computer is also equipped with at least two universal serial bus ports and at least two display ports, which are led out to a remote control location via fiber optic extension equipment.
9. The overall hardware control architecture according to claim 1, characterized in that, The central processing chip inside the industrial control computer has a base frequency of no less than 3.0 GHz and a core count of no less than 8.
10. The overall hardware control architecture according to claim 1, characterized in that, The industrial computer adopts a sealed temperature-controlled chassis. The chassis has a forced airflow design with a front-to-back airflow structure. The front panel of the chassis has an air inlet and the rear panel has an exhaust outlet.