Display device

Abstract

A display device is disclosed. The display device includes: a display area including a first display area including a plurality of first pixels and a second display area including at least one second pixel and at least one light transmitting portion; a peripheral area disposed around the display area; a data line including a first portion and a second portion spaced apart from each other in a predetermined direction, and the light transmitting portion being located between the first portion and the second portion; and a conductive pattern disposed at a different conductive layer from the data line. The conductive pattern includes a first pattern portion including a bypass portion that bypasses a periphery of the second display area in a plan view and is disposed in the first display area, and the first pattern portion includes a first end electrically connected to a first portion of the data line and a second end electrically connected to a second portion of the data line.

Description

[0001] This application is a divisional application of the invention patent application "Display Device" filed on February 25, 2021, with application number 202110211579.6. Technical Field

[0002] This disclosure relates to a display device. Background Technology

[0003] Display devices such as liquid crystal displays (“LCDs”) and organic light-emitting diode (“OLEDs”) displays include a display panel that includes a plurality of pixels capable of displaying images. Each pixel may include a pixel electrode for receiving data signals, and the pixel electrode may be connected to at least one transistor to receive data signals.

[0004] Various display devices with functions other than image display have been developed. Summary of the Invention

[0005] This disclosure aims to provide a display device having an optical component through which light can be transmitted, the display device ensuring sufficient area of ​​the light-transmitting portion and reducing parasitic capacitance and coupling between signal lines.

[0006] An embodiment provides a display device comprising: a display area including a first display area and a second display area, the first display area including a plurality of first pixels, the second display area including at least one second pixel and at least one light-transmitting portion; a peripheral area disposed around the display area; a data line including a first portion and a second portion spaced apart from each other in a predetermined direction, the at least one light-transmitting portion being located between the first portion and the second portion; and a conductive pattern disposed on a different conductive layer from the data line, wherein the conductive pattern includes a first pattern portion, the first pattern portion including a bypass portion that bypasses the periphery of the second display area in a plan view and is disposed in the first display area, and the first pattern portion including a first end electrically connected to the first portion of the data line and a second end electrically connected to the second portion of the data line.

[0007] In an exemplary embodiment, the display device may further include a first voltage line for transmitting a first voltage, wherein the first pattern portion may include a first vertical portion that overlaps with and extends along the first voltage line in a plan view.

[0008] In an exemplary embodiment, the conductive pattern may further include a second pattern portion disposed in the first display area and spaced apart from the first pattern portion.

[0009] In an exemplary embodiment, the second pattern portion may include a second vertical portion, which overlaps with and extends along the first voltage line in a plan view.

[0010] In an exemplary embodiment, the first pattern portion may further include a first horizontal portion extending from the first vertical portion in different directions from the first vertical portion, and the second pattern portion may further include a second horizontal portion extending from the second vertical portion in different directions from the second vertical portion.

[0011] In an exemplary embodiment, the display device may further include a second voltage line that intersects the first voltage line and transmits a second voltage, wherein the first horizontal portion and the second horizontal portion may be superimposed on the second voltage line in a plan view and may extend along the second voltage line.

[0012] In an exemplary embodiment, the second patterned portion may have a grid shape.

[0013] In an exemplary embodiment, the second patterned portion may receive a constant voltage.

[0014] In an exemplary embodiment, the peripheral region may include a first peripheral region and a second peripheral region facing each other, and the display area is located between the first peripheral region and the second peripheral region. A first end of the first pattern portion may be electrically connected to a first part of the data cable in the first peripheral region, and a second end of the first pattern portion may be electrically connected to a second part of the data cable in the second peripheral region.

[0015] In an exemplary embodiment, the peripheral region may include a first peripheral region and a second peripheral region facing each other, and the display area is located between the first peripheral region and the second peripheral region. A first end of the first pattern portion may be electrically connected to a first part of the data cable in the first display area disposed between the first peripheral region and the second display area, and a second end of the first pattern portion may be electrically connected to a second part of the data cable in the first display area disposed between the second peripheral region and the second display area.

[0016] In an exemplary embodiment, the length of the first pattern portion in the predetermined direction may be shorter than the length of the display area in the predetermined direction.

[0017] Another embodiment provides a display device comprising: a display area including a first display area and a second display area, the first display area including a plurality of first pixels, the second display area including at least one second pixel and at least one light-transmitting portion; a data line including a first portion and a second portion spaced apart from each other in a predetermined direction, wherein the at least one light-transmitting portion is located between the first portion and the second portion; and a conductive pattern disposed on a different conductive layer from the data line and disposed in the first display area, wherein the conductive pattern includes a first pattern portion and a second pattern portion spaced apart from each other, and a separation portion is located between the first pattern portion and the second pattern portion, the first pattern portion including a bypass portion disposed between the second pattern portion and the second display area, and the first pattern portion being electrically connected to the first portion and the second portion of the data line.

[0018] The display device may further include a first voltage line for transmitting a first voltage, and at least one of the first pattern portion and the second pattern portion may include a vertical portion that overlaps with and extends along the first voltage line in a plan view.

[0019] In an exemplary embodiment, at least one of the first pattern portion and the second pattern portion may further include a horizontal portion, which extends from the vertical portion in different directions from the vertical portion.

[0020] In an exemplary embodiment, the display device may further include a second voltage line that intersects the first voltage line and transmits a second voltage, and the horizontal portion may be superimposed on the second voltage line in a plan view and extend along the second voltage line.

[0021] In an exemplary embodiment, the second patterned portion may receive a constant voltage.

[0022] In an exemplary embodiment, the display device may further include a first peripheral region and a second peripheral region facing each other, and the display area is located between the first peripheral region and the second peripheral region. The first pattern portion may be electrically connected to a first portion of the data cable in the first peripheral region and may be electrically connected to a second portion of the data cable in the second peripheral region.

[0023] In an exemplary embodiment, the first pattern portion can be electrically connected to the first portion of the data cable in the first display area surrounding the first side of the second display area, and can be electrically connected to the second portion of the data cable in the first display area surrounding the second side of the second display area opposite to the first side.

[0024] Another embodiment provides a display device comprising: a display area including a first display area and a second display area, the first display area including a plurality of first pixels, the second display area including at least one second pixel and at least one light-transmitting portion; a data line including a first portion and a second portion spaced apart from each other in a predetermined direction, wherein the at least one light-transmitting portion is located between the first portion and the second portion; a first voltage line for transmitting a first voltage; and a conductive pattern disposed at a different conductive layer from the data line and the first voltage line, and disposed in the first display area, wherein the conductive pattern can be electrically connected to the first portion and the second portion of the data line, and the conductive pattern can include a portion superimposed on and extending along the first voltage line in a planar view.

[0025] In an exemplary embodiment, the display device may further include a second voltage line that intersects the first voltage line and transmits a second voltage, and the conductive pattern may further include a portion that overlaps with and extends along the second voltage line in a plan view.

[0026] According to an embodiment of the present invention, in a display device having an optical component through which light can be transmitted, it is possible to ensure a sufficient area of ​​the light-transmitting portion and reduce parasitic capacitance and coupling between signal lines. Attached Figure Description

[0027] Figure 1 A plan view of a display device according to an embodiment of the present invention is shown.

[0028] Figure 2 and Figure 3 A plan view of a display component representing a pixel in a portion of the display area of ​​a display device according to an embodiment of the present invention is shown.

[0029] Figure 4 A cross-sectional view of a display device according to an embodiment of the present invention is shown.

[0030] Figure 5 , Figure 6 and Figure 7 Plan views of a display device according to an embodiment of the present invention are shown respectively.

[0031] Figure 8 It shows Figure 7 The image shows a cross-sectional view around the contact holes of the display device.

[0032] Figure 9 and Figure 10 Plan views of the pixels of a display device according to an embodiment of the present invention are shown.

[0033] Figure 11 It shows along Figure 9The image shows a cross-sectional view of the display device taken along lines XIa-XIb.

[0034] Figure 12 It shows along Figure 9 The image shows a cross-sectional view of the display device taken along lines XIIa-XIIb.

[0035] Figure 13 , Figure 14 and Figure 15 Plan views of a display device according to another embodiment of the present invention are shown. Detailed Implementation

[0036] The invention will be described more fully below with reference to the accompanying drawings, in which embodiments of the invention are illustrated. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of this disclosure.

[0037] Components irrelevant to the description will be omitted in order to clearly describe this disclosure, and the same reference numerals will denote the same elements throughout the specification.

[0038] Furthermore, in the accompanying drawings, the dimensions and thicknesses of each element are shown arbitrarily for ease of description, and this disclosure is not necessarily limited to the dimensions and thicknesses of each element shown in the drawings. In the accompanying drawings, the thicknesses of layers, films, panels, regions, areas, etc., are exaggerated for clarity. In the accompanying drawings, the thicknesses of some layers and regions are exaggerated for ease of description.

[0039] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on said other element, or there may be intermediate elements present. Conversely, when an element is referred to as being "directly on" another element, there are no intermediate elements present. Furthermore, in the specification, the terms "on" or "above" refer to being disposed on or below a part of an object, and do not necessarily refer to being disposed on the upper side of the part of the object based on the direction of gravity.

[0040] Furthermore, unless explicitly stated otherwise, the word “contains” and its variations shall be understood to mean that the stated element is included, but not that any other element is excluded.

[0041] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, area, layer, or part from another. Therefore, without departing from the teaching herein, the first “element,” “component,” “area,” “layer,” or “part” discussed below may be referred to as a second element, component, area, layer, or part.

[0042] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms, which include “at least one.” “At least one” will not be construed as limited to “a” or “an.” “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0043] Furthermore, relative terms such as “below” or “bottom” and “above” or “top” may be used here to describe the relationship between one element and another shown in the figures. It will be understood that, in addition to the orientations depicted in the figures, relative terms are intended to encompass different orientations of the device. For example, if a device in one of the figures is flipped, an element described as being “below” the other element will subsequently be positioned on the “above” side of said other element. Thus, the exemplary term “below” can encompass both “below” and “above” orientations depending on the specific orientation of the figure. Similarly, if a device in one of the figures is flipped, an element described as being “below” or “under” the other element will subsequently be positioned “above” the other element. Thus, the exemplary terms “below” or “under” can encompass both “above” and “below” orientations.

[0044] Throughout this specification, a plan view refers to a view of a surface parallel to two intersecting directions (e.g., a first direction DR1 and a second direction DR2), and a sectional view refers to a view of a surface cut in a direction perpendicular to the surface parallel to the first direction DR1 and the second direction DR2 (e.g., a third direction DR3). Furthermore, unless otherwise stated, "overlapping with two component elements" means that the two component elements are stacked in a third direction DR3 (e.g., a direction perpendicular to the upper surface of the substrate).

[0045] First, refer to Figures 1 to 4 The structure of a display device according to an embodiment of the present invention is described.

[0046] Figure 1 A plan view of a display device according to an embodiment of the present invention is shown. Figure 2 and Figure 3 Plan views of display components representing pixels in a portion of the display area of ​​a display device according to an embodiment of the present invention are shown, and Figure 4 A cross-sectional view of a display device according to an embodiment of the present invention is shown.

[0047] Reference Figures 1 to 3 The display panel 1000 included in the display device according to the embodiment includes a display area DA for displaying images and a peripheral area PA disposed around the display area DA.

[0048] The display area DA may include a first display area DA1 and a second display area DA2. The second display area DA2 may have a smaller area than the first display area DA1. The first display area DA1 may be disposed on the second direction DR2 between the second display area DA2 and the peripheral area PA. That is, the second display area DA2 may be spaced apart from the peripheral area PA on the second direction DR2. Specifically, refer to... Figure 1 In the plan view, the first display area DA1 can be set between the second display area DA2 and the lower outer perimeter area PA. In the plan view, the first display area DA1 can also be set between the second display area DA2 and the upper outer perimeter area PA.

[0049] Figure 1 The second display area DA2 is shown to be substantially circular, but the invention is not limited thereto. In another exemplary embodiment, the second display area DA2 may have various shapes such as polygonal shapes.

[0050] The first display area DA1 may include a plurality of pixels PX. Each pixel PX may include a pixel circuit component containing at least one transistor and a display component having a pixel electrode connected to the pixel circuit component and capable of emitting light.

[0051] Figure 2 An exemplary illustration shows display components PB, PR, and PG included in a plurality of pixels PX disposed in a first display area DA1. For example, display component PB may emit blue light, display component PR may emit red light, and display component PG may emit green light. The colors represented by display components PB, PR, and PG are not limited thereto, and in another exemplary embodiment may be various combinations of primary colors. That is, the display device can display images having various combinations of colors represented by the different primary colors represented by the plurality of display components PB, PR, and PG.

[0052] The second display area DA2 may include at least one pixel PX and at least one light-transmitting portion LTA. (See reference...) Figure 3 The arrangement of pixels PX in the second display area DA2, excluding the light-transmitting portion LTA, can be the same as or similar to the arrangement of pixels PX in the first display area DA1. In some embodiments, the pixel arrangement of the second display area DA2 can differ from that of the first display area DA1. For example, the second display area DA2 may have a pixel arrangement structure for each RGB bar, while the first display area DA1 may have a pixel arrangement structure such as... Figure 2 The image shows a pentile (or "five-tile") structure for pixel arrangement. In an RGB bar pixel arrangement structure, the display component of each pixel PX can have a substantially rectangular shape, and pixels PX displaying the same color can be arranged in each pixel column, while pixel columns displaying different colors can be arranged alternately in the pixel row direction.

[0053] Pixel PX is not located in the light-transmitting section LTA. Light can pass through the light-transmitting section LTA and onto the third-direction DR3 of the display panel 1000. Figure 3 The illustration shows only two light-transmitting elements LTA in the second display area DA2, but the arrangement and number of light-transmitting elements LTA are not limited to this. For example, multiple light-transmitting elements LTA can be arranged in a substantially matrix form in the second display area DA2. In this case, pixels PX can also be disposed between adjacent light-transmitting elements LTA.

[0054] Circuit components, signal lines, voltage lines, and pads (or solder pads) can be located in the peripheral area PA. Figure 1 In the plan view, the drive circuit component 500 can be disposed in the lower peripheral region PA. The drive circuit component 500 can take various forms, such as at least one drive circuit chip, flexible printed circuit film, and printed circuit board.

[0055] Reference Figure 4 and Figures 1 to 3 A cross-sectional structure of the display device according to an embodiment is described together.

[0056] The display device according to an embodiment may include a display panel 1000 and at least one optical component 600 disposed below the display panel 1000. The optical component 600 may include a camera, a flash, a sensor, etc.

[0057] The optical component 600 can emit light through the light-transmitting portion LTA of the display panel 1000, or it can receive light incident through the light-transmitting portion LTA.

[0058] The display panel 1000 according to an embodiment may include an insulating substrate 110, wherein the first display area DA1 and the second display area DA2 are disposed on the substrate 110.

[0059] The buffer layer 111 can be disposed on the substrate 110. The buffer layer 111 can be omitted.

[0060] The active layer 130 may be disposed on the buffer layer 111. The active layer 130 may include semiconductor materials such as polysilicon and oxide semiconductors. The active layer 130 may include regions having different carrier concentrations from each other.

[0061] The insulating layer 141 can be disposed on the active layer 130, and the first conductive layer 150a can be disposed on the insulating layer 141.

[0062] The insulating layer 142 can be disposed on the first conductive layer 150a, and the second conductive layer 150b can be disposed on the insulating layer 142.

[0063] The insulating layer 143 can be disposed on the second conductive layer 150b, and the third conductive layer 170a can be disposed on the insulating layer 143.

[0064] The insulating layer 144 can be disposed on the third conductive layer 170a, and the fourth conductive layer 170b can be disposed on the insulating layer 144.

[0065] At least one of the first conductive layer 150a, the second conductive layer 150b, the third conductive layer 170a, and the fourth conductive layer 170b may include at least one of copper (Cu), aluminum (Al), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof, but the invention is not limited thereto.

[0066] The first conductive layer 150a, the second conductive layer 150b, the third conductive layer 170a, and the fourth conductive layer 170b can be patterned and electrically connected to each other to form the pixel circuit components of the pixel PX.

[0067] The insulating layer 145 can be disposed on the fourth conductive layer 170b, and the pixel electrode 191 can be disposed on the insulating layer 145.

[0068] At least one of the buffer layer 111, insulating layer 141, insulating layer 142, insulating layer 143, insulating layer 144, and insulating layer 145 comprises, for example, silicon nitride (SiN). x ) or silicon dioxide (SiO) x The insulating layer 145 may comprise inorganic insulating materials and / or organic insulating materials. In particular, the insulating layer 145 may comprise organic insulating materials such as polyacrylic resin or polyimide resin, and the upper surface of the insulating layer 145 may be substantially flat.

[0069] An insulating layer 350 may be disposed on the insulating layer 145 and the pixel electrode 191. The insulating layer 350 is also referred to as a pixel defining layer. The insulating layer 350 may define an opening disposed on the pixel electrode 191. The insulating layer 350 may include a pigment such as carbon black.

[0070] The light-emitting layer 370 may be disposed on the pixel electrode 191. The light-emitting layer 370 may include a portion disposed in an opening defined by the insulating layer 350. The light-emitting layer 370 may include an organic light-emitting material or an inorganic light-emitting material.

[0071] The common electrode 270 can be disposed on the light-emitting layer 370.

[0072] The pixel electrode 191, the light-emitting layer 370, and the common electrode 270 can together form a light-emitting diode (ED). The display component of a pixel PX may include a light-emitting diode (ED).

[0073] Here, the case where the display panel 1000 is a light-emitting display panel is described as an example, but the structure of the display panel 1000 is not limited to this. For example, the display panel 1000 may be a liquid crystal display panel, an electrophoretic display panel, or an electrowetting display panel. In addition, the display panel 1000 may be one of various display panels such as a micro LED display panel, a quantum dot light-emitting diode (“QLED”) display panel, and a quantum dot organic light-emitting diode (“QD-OLED”) display panel.

[0074] An encapsulation layer for protecting the light-emitting diode (ED) may also be disposed on the common electrode 270. The encapsulation layer may include alternately stacked inorganic and organic layers. In some embodiments, the encapsulation layer may include a substrate. The substrate 110 and the substrate of the encapsulation layer may include glass. In this case, the substrate 110 and the encapsulation layer can be bonded to each other by a sealant between them, thus sealing the gap between the encapsulation layer and the substrate 110.

[0075] Reference Figure 4 The light-transmitting portion LTA may not include the aforementioned pixel PX structure, i.e., pixel circuit components and display components. Layers through which light cannot be well transmitted (such as the first conductive layer 150a, the second conductive layer 150b, the third conductive layer 170a, and the fourth conductive layer 170b) may not be provided in the light-transmitting portion LTA. Figure 4 An example is shown in which only the buffer layer 111 is disposed in the light-transmitting portion LTA, but the invention is not limited thereto. In another exemplary embodiment, at least some of the other insulating layers 141, 142, 143, 144, 145, and 350 may be retained instead of being removed. Figure 4 Unlike the example, in yet another exemplary embodiment, the buffer layer 111 may also be removed from the light-transmitting portion LTA.

[0076] The optical component 600 located below the display panel 1000 can output light through the light-transmitting part LTA of the display panel 1000, or can receive light incident through the light-transmitting part LTA. Figure 4 The illustration shows an optical component 600 corresponding to a light-transmitting portion LTA, but the invention is not limited thereto. In another exemplary embodiment, the optical component 600 may be stacked with and correspond to multiple light-transmitting portions LTA.

[0077] In the following text, reference will be made to Figures 5 to 8 With the above Figures 1 to 4 The structure of the signal lines of the display device according to an embodiment of the present invention will be described together.

[0078] Figure 5 , Figure 6 and Figure 7 Plan views of a display device according to an embodiment of the present invention are shown respectively, and Figure 8 It shows Figure 7 The image shows a cross-sectional view around the contact holes of the display device.

[0079] Reference Figure 5 The display device according to an embodiment of the present invention may include the display panel 1000 as described above.

[0080] The display area DA may include multiple data lines 171. Each data line 171 may extend substantially in the second direction DR2 within the display area DA. The data lines 171 may extend in the plan view to the lower peripheral area PA and be electrically connected to the drive circuit component 500 to receive data signals.

[0081] Each data line 171 can be electrically connected to a transistor of an adjacent pixel circuit component to transmit data signals to the pixel circuit component.

[0082] The multiple data lines 171 may include: a first data line 171a, which neither intersects with nor overlaps with the second display area DA2 in the second direction DR2; a second data line 171b, which intersects with and overlaps with a portion of the second display area DA2 in the second direction DR2 or is adjacent to the second display area DA2; and a third data line 171c, which passes through the second display area DA2.

[0083] The first data line 171a may include a data line located on the left side of the second display area DA2 and a data line located on the right side of the second display area DA2. The first data line 171a may extend continuously in the first display area DA1 along the second direction DR2.

[0084] The second data line 171b may include a first portion 171b1 disposed below the second display area DA2 in the plan view and a second portion 171b2 disposed above the second display area DA2 in the plan view. The first portion 171b1 and the second portion 171b2 of the second data line 171b may be spaced apart in the second direction DR2. The extension lines of each of the corresponding first portion 171b1 and second portion 171b2 may be disposed on the same straight line.

[0085] like Figure 5 As shown, at least one of the first portion 171b1 and the second portion 171b2 of the second data line 171b may include a portion extending into the interior of the second display area DA2. A light-transmitting portion LTA may also be disposed between the first portion 171b1 and the second portion 171b2 of the second data line 171b. That is, the first portion 171b1 and the second portion 171b2 of the second data line 171b may be spaced apart from each other, with the light-transmitting portion LTA located therebetween.

[0086] The first portion 171b1 and the second portion 171b2 of the second data line 171b can be disposed on the same conductive layer on the substrate 110, and can comprise the same material. For example, the first portion 171b1 and the second portion 171b2 of the second data line 171b can be disposed on the substrate 110. Figure 4 The third conductive layer 170a of the embodiment shown in the figure.

[0087] The first part 171b1 of the second data line 171b can be electrically connected to another conductive layer through the opening 46 in the lower peripheral region PA, and the second part 171b2 of the second data line 171b can be electrically connected to another conductive layer through the opening 45 in the upper peripheral region PA.

[0088] The third data line 171c can extend continuously along the second direction DR2 through the second display area DA2. Although Figure 5 The example shown shows that there is one third data line 171c, but in another exemplary embodiment, there may be two or more third data lines 171c.

[0089] The first data line 171a and the third data line 171c can also be located at the third conductive layer 170a, just like the second data line 171b.

[0090] Reference Figure 6 The first display area DA1 may include a conductive pattern 180. The conductive pattern 180 may be patterned in the form of a grid.

[0091] The conductive pattern 180 may include a pattern portion 181 and a pattern portion 182.

[0092] The patterned portion 181 may include a vertical portion 181a extending substantially in the second direction DR2 and a horizontal portion 181b extending substantially in the first direction DR1. The vertical portion 181a and the horizontal portion 181b may be physically and electrically connected to each other and may receive a constant voltage together.

[0093] The pattern section 181 may be spaced apart from the second display area DA2.

[0094] The pattern portions 181 and 182, which are adjacent to each other, are spaced apart from each other, and the separation portions 80 and 81, which are the portions in which the conductive pattern 180 is removed, are located between the pattern portions 181 and 182, and the pattern portions 181 and 182 are electrically insulated from each other.

[0095] The patterned portion 182 may include a vertical portion 182a extending substantially in the second direction DR2 and a horizontal portion 182b extending substantially in the first direction DR1. The vertical portion 182a and the horizontal portion 182b may be physically and electrically connected to each other.

[0096] The pattern section 182 may include a bypass section DTP, which is disposed between the pattern section 181 and the second display area DA2 and bypasses the periphery of the second display area DA2 in the plan view (i.e., surrounds the periphery of the second display area DA2).

[0097] exist Figure 6 In the plan view, the patterned portion 182 can extend in the lower peripheral region PA to be electrically connected to the first portion 171b1 of the second data line 171b through the opening 46, and can also extend in the upper peripheral region PA to be electrically connected to the second portion 171b2 of the second data line 171b through the opening 45. One end of the patterned portion 182 can be electrically connected to the first portion 171b1 of the second data line 171b, and the other end of the patterned portion 182 can be electrically connected to the second portion 171b2 of the second data line 171b.

[0098] The conductive pattern 180 may further include a pattern portion 183 spaced apart from the pattern portions 181 and 182. The pattern portion 183 may include a vertical portion 183a extending substantially in the second direction DR2 and a horizontal portion 183b extending substantially in the first direction DR1. The vertical portion 183a and the horizontal portion 183b may be physically and electrically connected to each other and may receive a constant voltage together.

[0099] The adjacent pattern portions 182 and 183 are spaced apart from each other and electrically insulated from each other, with the separation portions 80 and 81 located therebetween.

[0100] The pattern section 183 may not be located in the second display area DA2.

[0101] The pattern portions 181, 182, and 183 of the conductive pattern 180 can be disposed on the same conductive layer on the substrate 110, and can comprise the same material. For example, the conductive pattern 180 can be disposed on the aforementioned... Figure 4 The fourth conductive layer 170b of the embodiment shown in the figure.

[0102] Figure 7 It shows Figure 5 The first part 171b1 and the second part 171b2 of the second data line 171b shown in the figure, together with Figure 6 A portion of the pattern section 182 is shown. In the pattern section 182, in... Figure 7 The horizontal portion 182b, which extends only from a vertical portion 182a and terminates at one end of the separation portion 80, is omitted.

[0103] Reference Figure 7 The bypass portion DTP of the pattern portion 182 may include a vertical portion 182a adjacent to the second display area DA2 and a pair of horizontal portions 182b extending from the upper and lower ends of the vertical portion 182a.

[0104] As described above, in the plan view, the first part 171b1 of the second data line 171b can be electrically connected to the pattern part 182 through the opening 46 in the lower peripheral region PA, and in the plan view, the second part 171b2 of the second data line 171b can be electrically connected to the pattern part 182 through the opening 45 in the upper peripheral region PA.

[0105] Reference Figure 8 Together with the above Figure 4 The first portion 171b1 and the second portion 171b2 of the second data line 171b can be disposed at the third conductive layer 170a on the insulating layer 143, and the insulating layer 144 can define the opening 46 disposed on the first portion 171b1 of the second data line 171b and the opening 45 disposed on the second portion 171b2 of the second data line 171b. The pattern portion 182 can be electrically connected to the second portion 171b2 and the first portion 171b1 of the second data line 171b through the corresponding openings 45 and 46.

[0106] The first part 171b1 of the second data line 171b can receive data signals from the drive circuit component 500, and it can transmit the data signals to... Figure 7 The pixels of the first display area DA1, which are located below the second display area DA2 in the plan view, are transmitted to the pixels located below the light-transmitting part LTA in the plan view among the pixels located in the second display area DA2.

[0107] exist Figure 7In the plan view, the second part 171b2 of the second data line 171b is disposed in the first display area DA1 located above the second display area DA2, but the second part 171b2 is spaced apart from the first part 171b1, and the light-transmitting part LTA is located between them. Therefore, the second part 171b2 does not need to directly receive data signals from the first part 171b1.

[0108] According to this embodiment, the pattern section 182 can be electrically connected to the first portion 171b1 of the second data line 171b in the lower peripheral region PA of the plan view to transmit data signals, and it can also be electrically connected to the second portion 171b2 of the second data line 171b in the upper peripheral region PA of the plan view via the bypass section DTP of the pattern section 182. Therefore, the second portion 171b2 of the second data line 171b can receive data signals from the first portion 171b1 of the second data line 171b or the drive circuit component 500 via the pattern section 182. Therefore, the data signals can also be transmitted to the pixel circuit components of the pixels in the first display area DA1 and the second display area DA2 connected to the second portion 171b2 of the second data line 171b.

[0109] When the data lines bypass the light-transmitting portion LTA in the second display area DA2, the area of ​​the light-transmitting portion LTA decreases due to the dense arrangement of data lines in the second display area DA2. Because a large number of data lines are densely arranged in a small area, undesirable variations in the data signal can occur due to coupling between the data lines. However, according to an embodiment of the present invention, since this problem does not exist, a sufficient area of ​​the light-transmitting portion LTA can be ensured, and since the data lines do not need to be densely arranged, the effects caused by coupling between the data lines can be reduced.

[0110] Reference Figure 6 Since pattern portion 181 and pattern portion 183 having a pattern similar to pattern portion 182 are provided in the first display area DA1, it is possible to prevent pattern portion 182 from being partially seen. In order to further prevent the conductive pattern 180 from being seen from the outside, the insulating layer 350 provided on the fourth conductive layer 170b may include a pigment such as carbon black.

[0111] Pattern section 181 and pattern section 183 can be subjected to a constant voltage to prevent them from floating. Therefore, since the voltage of other adjacent conductors can be prevented from being affected when the potential of pattern section 181 and pattern section 183 changes due to coupling with another adjacent conductor, the display characteristics of the display device can be prevented from deteriorating.

[0112] In some embodiments of the present invention, the horizontal portions 181b, 182b and 183b of the conductive pattern 180 may be omitted.

[0113] In the following text, reference will be made to Figures 9 to 12 With the above appendix Figure 1 The specific structure of the display device according to an embodiment of the present invention will be described below.

[0114] A plan view of pixels of a display device according to an embodiment of the present invention. Figure 9 The above is shown Figure 6 A detailed view of region AA; a plan view of the pixels of the display device according to an embodiment of the present invention. Figure 10 The above is shown Figure 6 A detailed view of area BB; Figure 11 It shows along Figure 9 The image shows a cross-sectional view of the display device taken along lines XIa-XIb. Figure 12 It shows along Figure 9 The image shows a cross-sectional view of the display device taken along lines XIIa-XIIb.

[0115] In addition to the structure of pattern section 181 and pattern section 182 Figure 9 The structure shown in the figure and Figure 10 The structures shown are identical to each other.

[0116] refer to Figures 9 to 12 Each pixel circuit component of the display device according to the embodiment may include a plurality of transistors T1, T2, T3, T4, T5, T6 and T7 and a capacitor Cst, and the display component may include a light-emitting diode ED.

[0117] The display device according to the embodiment may include a substrate 110, and a buffer layer 111 may be disposed on the substrate 110.

[0118] An active pattern 131, which is disposed in the same layer as the active layer 130 as described above and includes the same material as the active layer 130, may be disposed on the buffer layer 111.

[0119] The active pattern 131 includes channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, and 131g forming a channel for each of a plurality of transistors T1, T2, T3, T4, T5, T6, and T7 in a pixel circuit component, as well as conductive regions. The active pattern 131 can be bent to have various shapes.

[0120] The conductive region of the active pattern 131 is disposed on the corresponding side of each channel region 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f or 131g, and the conductive region of the active pattern 131 has a higher carrier concentration than the carrier concentration of the channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f or 131g. A pair of conductive regions disposed on the corresponding side of the channel region 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, or 131g of each transistor T1, T2, T3, T4, T5, T6, or T7 can be the source and drain regions of the corresponding transistor T1, T2, T3, T4, T5, T6, or T7.

[0121] The insulating layer 141 can be disposed on the active pattern 131, and the first conductive layer as described above can be disposed on the insulating layer 141.

[0122] The first conductive layer may include scan lines 151, 152, and 154 for transmitting scan signals, control line 153 for transmitting light emission control signals, and a drive gate electrode 155a. The scan lines 151, 152, and 154 and the control line 153 may extend substantially long in the first direction DR1 in a planar view.

[0123] The first transistor T1 in the plan view includes a channel region 131a of an active pattern 131, a source region 136a and a drain region 137a disposed on the opposite side of the channel region 131a, and a driving gate electrode 155a superimposed on the channel region 131a.

[0124] The second transistor T2, in the plan view, may include a channel region 131b of an active pattern 131, a source region 136b and a drain region 137b disposed on the opposite side of the channel region 131b, and a gate electrode 155b superimposed on the channel region 131b and being part of a scan line 151. The drain region 137b is connected to the source region 136a of the first transistor T1.

[0125] The third transistor T3 may include an upper third transistor T3_1 and a lower third transistor T3_2 that are adjacent to each other and connected to each other.

[0126] The upper third transistor T3_1 includes, in the plan view, a channel region 131c_1 superimposed on the scan line 151, a source region 136c_1 and a drain region 137c_1 on the opposite side of the channel region 131c_1, and a gate electrode 155c_1 superimposed on the channel region 131c_1 and being part of the protrusion of the scan line 151.

[0127] The lower third transistor T3_2, in the plan view, includes a channel region 131c_2 superimposed on the scan line 151, a source region 136c_2 and a drain region 137c_2 disposed on the opposite side of the channel region 131c_2, and a gate electrode 155c_2 superimposed on the channel region 131c_2 and being part of the scan line 151. The source region 136c_2 of the lower third transistor T3_2 is connected to the drain region 137a of the first transistor T1, and the drain region 137c_2 of the lower third transistor T3_2 is connected to the source region 136c_1 of the upper third transistor T3_1.

[0128] The fourth transistor T4 may include a left fourth transistor T4_1 and a right fourth transistor T4_2 that are adjacent to each other and connected to each other.

[0129] The fourth transistor T4_1 on the left, in the plan view, includes a channel region 131d_1 superimposed on scan line 152, a source region 136d_1 and a drain region 137d_1 disposed on the opposite side of the channel region 131d_1, and a gate electrode 155d_1 superimposed on the channel region 131d_1 and part of scan line 152. The drain region 137d_1 is connected to the drain region 137c_1 of the third transistor T3_1 above.

[0130] The right fourth transistor T4_2, in the plan view, includes a channel region 131d_2 superimposed on scan line 152, a source region 136d_2 and a drain region 137d_2 disposed on the opposite side of the channel region 131d_2, and a gate electrode 155d_2 superimposed on the channel region 131d_2 and part of scan line 152. The drain region 137d_2 is connected to the source region 136d_1 of the left fourth transistor T4_1.

[0131] The fifth transistor T5 may include a channel region 131e, a source region 136e and a drain region 137e disposed on opposite sides of the channel region 131e, and a gate electrode 155e superimposed on the channel region 131e and being part of a control line 153. The drain region 137e is connected to the source region 136a of the first transistor T1.

[0132] The sixth transistor T6 includes a channel region 131f, a source region 136f and a drain region 137f disposed on opposite sides of the channel region 131f, and a gate electrode 155f superimposed on the channel region 131f and part of the control line 153. The source region 136f is connected to the drain region 137a of the first transistor T1.

[0133] The seventh transistor T7 includes a channel region 131g, a source region 136g and a drain region 137g disposed on opposite sides of the channel region 131g, and a gate electrode 155g superimposed on the channel region 131g and part of the scan line 154. The source region 136g is connected to the drain region 137f of the sixth transistor T6.

[0134] The insulating layer 142 may be disposed on the first conductive layer, and the second conductive layer as described above may be disposed on the insulating layer 142.

[0135] The second conductive layer may include a storage line 156, an initialization voltage line 159, and a shielding pattern 158.

[0136] The storage line 156 and the initialization voltage line 159 can extend substantially long in the first direction DR1 in the plan view.

[0137] The storage line 156 may include an extension 157 disposed in each pixel circuit component.

[0138] The drive gate electrode 155a and the extension 157 of the storage line 156 can be stacked on top of each other with an insulating layer 142 located therebetween to form a capacitor Cst.

[0139] Initialization voltage line 159 can transmit initialization voltage.

[0140] In another exemplary embodiment, the shielding pattern 158 may be omitted.

[0141] The insulating layer 143 can be disposed on the second conductive layer.

[0142] Some or all of the insulating layers 141, 142 and 143 may be removed to define openings 61, 62, 63, 64, 65, 66, 67, 68 and 69.

[0143] The third conductive layer described above can be disposed on the insulating layer 143. The third conductive layer may include the data line 171 described above, the drive voltage line 172 capable of transmitting drive voltage, and the connecting members 174, 175, and 179.

[0144] Data line 171 and drive voltage line 172 can extend substantially long in the second direction DR2 in the plan view and intersect with multiple scan lines 151, 152 and 154, control line 153, initialization voltage line 159 and storage line 156.

[0145] Data line 171 can be electrically connected to the source region 136b of the second transistor T2 through opening 62.

[0146] The drive voltage line 172 can be electrically connected to the source region 136e of the fifth transistor T5 through the opening 67, and can be electrically connected to the extension 157 of the memory line 156 through the opening 68 to transmit the drive voltage to the extension 157. The drive voltage line 172 can be electrically connected to the shielding pattern 158 through the opening 66 to transmit the drive voltage to the shielding pattern 158.

[0147] The connecting member 174 can be electrically connected to the driving gate electrode 155a through the opening 61, and can be electrically connected to the drain region 137c_1 of the upper third transistor T3_1 and the drain region 137d_1 of the left fourth transistor T4_1 through the opening 63.

[0148] The connecting member 175 can be electrically connected to the initialization voltage line 159 through the opening 64, and can also be electrically connected to the source region 136d_2 of the right fourth transistor T4_2 and the drain region 137g of the seventh transistor T7 through the opening 65. Therefore, the initialization voltage can be applied to the source region 136d_2 of the right fourth transistor T4_2 and the drain region 137g of the seventh transistor T7 through the connecting member 175.

[0149] The connecting member 179 can be electrically connected to the drain region 137f of the sixth transistor T6 through the opening 69.

[0150] The insulating layer 144 can be disposed on the third conductive layer.

[0151] The fourth conductive layer described above can be disposed on the insulating layer 144. The conductive pattern 180 described above can be disposed on the fourth conductive layer. Figures 9 to 12 The diagram shows a horizontal portion 181b and a vertical portion 181a of a pattern portion 181 included in a conductive pattern 180, and a vertical portion 182a and a horizontal portion 182b included in a pattern portion 182.

[0152] Reference Figures 9 to 12 The vertical portions 181a and 182a of the conductive pattern 180 are superimposed on the driving voltage line 172 for transmitting the driving voltage in the plan view, and can extend along the driving voltage line 172. The horizontal portions 181b and 182b of the conductive pattern 180 are superimposed on the initialization voltage line 159 for transmitting the initialization voltage in the plan view, and can extend along the initialization voltage line 159. Therefore, the horizontal portions 181b and 182b of the conductive pattern 180, together with the vertical portions 181a and 182a and the adjacent conductive layer, form a parasitic capacitor, thereby preventing the coupling of signals or voltages that affect each other.

[0153] Specifically, due to crosstalk with adjacent signal lines, the horizontal portion 182b and vertical portion 182a of the patterned portion 182, which can transmit data signals, may alter the data signals or affect the voltage or signal of adjacent signal lines. However, according to this embodiment, since the horizontal portion 182b and vertical portion 182a of the patterned portion 182 are superimposed on the driving voltage line 172 or the initialization voltage line 159 that transmits a constant voltage, the electric field can be shielded, thereby preventing parasitic capacitance from occurring between them and the surrounding signal lines.

[0154] The pattern portions 181 and 183 of the conductive pattern 180 can receive and transmit driving voltage. The pattern portions 181 and 183 of the conductive pattern 180 can be electrically connected in the peripheral region PA to the voltage line transmitting the driving voltage. Therefore, as described above, since it is possible to prevent the voltage of other adjacent conductors from being affected when the potential of the pattern portions 181 and 183 changes due to coupling with another adjacent conductor, it is possible to prevent the display characteristics of the display device from deteriorating.

[0155] Insulating layer 145 may be disposed on the fourth conductive layer. Insulating layers 144 and 145 may define an opening 89 disposed on the connecting member 179.

[0156] As described above, the pixel electrode 191, the light-emitting layer 370, and the common electrode 270 can be sequentially disposed on the insulating layer 145. The pixel electrode 191, the light-emitting layer 370, and the common electrode 270 can together form a light-emitting diode (ED).

[0157] The pixel electrode 191 can be electrically connected to the connection member 179 through the opening 89 to receive voltage.

[0158] In a planar view, multiple pixel electrodes 191 can be arranged, for example, as described above. Figure 2 and Figure 3 The pentile matrix structure is shown in the figure.

[0159] In the following text, reference will be made to Figures 13 to 15 With the above appendix Figure 1 The present invention describes a display device according to another embodiment of the present invention.

[0160] Figure 13 , Figure 14 and Figure 15 Plan views of a display device according to an embodiment of the present invention are shown respectively.

[0161] The display device according to this embodiment and the display device according to the above embodiment (for example, Figure 5 and Figure 6 The display device shown in the embodiments is largely the same as that described above. Therefore, the differences from the embodiments described above will be mainly described.

[0162] Unlike the previous embodiment, in the plan view, the first portion 171b1 of the second data line 171b may not be electrically connected to the second portion 171b2 of the second data line 171b in the lower peripheral region PA. Instead, in this embodiment, the first portion 171b1 of the second data line 171b may be electrically connected to the conductive pattern 180 through the opening 48 in the first display region DA1 surrounding the lower side of the second display region DA2.

[0163] The second portion 171b2 of the second data line 171b can be electrically connected to the conductive pattern 180 through an opening 47 in the first display area DA1 surrounding the upper side of the second display area DA2. Alternatively, the second portion 171b2 of the second data line 171b can be electrically connected to the conductive pattern 180 through an opening in the peripheral area PA.

[0164] Specifically, refer to Figure 14 The conductive pattern 180 according to this embodiment may include a pattern portion 181 and a pattern portion 184.

[0165] As in the above embodiment, the patterned portion 181 may include a vertical portion 181a extending substantially in the second direction DR2 and a horizontal portion 181b extending substantially in the first direction DR1. The vertical portion 181a and the horizontal portion 181b may be physically and electrically connected to each other and may receive a constant voltage together.

[0166] The pattern section 181 may be spaced apart from the second display area DA2. The pattern section 181 may also be provided on the lower side of the second display area DA2 in a plan view.

[0167] The pattern portion 184 may include a vertical portion 184a extending substantially in the second direction DR2 and a horizontal portion 184b extending substantially in the first direction DR1. The vertical portion 184a and the horizontal portion 184b may be physically and electrically connected to each other.

[0168] Unlike the pattern portion 182 in the above embodiment, the pattern portion 184 may be provided only around the second display area DA2, and may include a bypass portion DTP provided between the pattern portion 181 and the second display area DA2 and bypassing the periphery of the second display area DA2.

[0169] The adjacent pattern portions 181 and 184 are spaced apart from each other and electrically insulated from each other, with the separating portions 80 and 81 located therebetween.

[0170] In this embodiment, the length of the pattern portion 184 in the second direction DR2 may be shorter than the length of the display area DA in the second direction DR2.

[0171] The pattern portion 184 can be electrically connected to the first portion 171b1 of the second data line 171b through an opening 48 in the first display area DA1 surrounding the lower side of the second display area DA2, and the pattern portion 184 can also extend in the plan view to the upper peripheral area PA to be electrically connected to the second portion 171b2 of the second data line 171b through an opening 47. One end of the pattern portion 184 can be electrically connected to the first portion 171b1 of the second data line 171b, and the other end of the pattern portion 184 can be electrically connected to the second portion 171b2 of the second data line 171b.

[0172] Figure 15 It shows Figure 13 The first part 171b1 and the second part 171b2 of the second data line 171b shown in the figure and Figure 14 A portion of the pattern section 184 is shown. In the pattern section 184, in... Figure 15 The horizontal portion 184b, which extends only to the vertical portion 184a and terminates at one end of the separation portion 80, is omitted.

[0173] Reference Figure 15 The bypass portion DTP of the pattern portion 184 may include a vertical portion 184a adjacent to the second display area DA2 and a pair of horizontal portions 184b extending from the upper and lower ends of the vertical portion 184a.

[0174] The first portion 171b1 of the second data line 171b can be electrically connected to the pattern section 184 through an opening 48 in the first display area DA1 surrounding the lower side of the second display area DA2. The second portion 171b2 of the second data line 171b can be electrically connected to the pattern section 184 through an opening 47 in the first display area DA1 surrounding the upper side of the second display area DA2.

[0175] The first part 171b1 of the second data line 171b can receive data signals from the drive circuit component 500, and can transmit the data signals to the pixels of the first display area DA1 located below the second display area DA2 in the plan view and the pixels located below the light-transmitting part LTA in the plan view among the pixels located in the second display area DA2.

[0176] exist Figure 15 In the plan view, the second part 171b2 of the second data line 171b is disposed in the first display area DA1 located above the second display area DA2. However, since the second part 171b2 is spaced apart from the first part 171b1 and the light-transmitting part LTA is located between them, the second part 171b2 cannot directly receive data signals from the first part 171b1.

[0177] According to this embodiment, the pattern section 184 can be electrically connected to the first portion 171b1 of the second data line 171b through an opening 48 in the first display area DA1 surrounding the lower side of the second display area DA2 to transmit data signals. The pattern section 184 can also be electrically connected to the second portion 171b2 of the second data line 171b through an opening 47 in the first display area DA1 surrounding the upper side of the second display area DA2 via a bypass section DTP of the pattern section 184. Therefore, the second portion 171b2 of the second data line 171b can receive data signals from the first portion 171b1 of the second data line 171b or the drive circuit component 500 through the pattern section 184. Thus, the data signals can be transmitted to the first display area DA1 and the pixel circuit components of the second display area DA2 connected to the second portion 171b2 of the second data line 171b.

[0178] According to the embodiment, since it is not necessary to densely arrange the data lines and instead bypass the second display area DA2, sufficient area of ​​the light-transmitting part LTA can be ensured, and the effects caused by coupling between the data lines can be reduced.

[0179] Reference Figure 14 Since pattern portion 181, which is similar to pattern portion 184, is provided in the first display area DA1, it is possible to prevent pattern portion 184 from being partially seen.

[0180] The pattern section 181 can be subjected to a constant voltage to prevent it from floating. Therefore, since the voltage of another adjacent conductor can be prevented from being affected when the potential of the pattern section 181 changes through coupling with another conductor adjacent to the pattern section 181, the display characteristics of the display device can be prevented from deteriorating.

[0181] While the invention has been described in conjunction with what is now considered to be practical embodiments, it will be understood that the invention is not limited to the disclosed embodiments, but rather, the invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

[0182] <Label Explanation> 45, 46, 47, 48, 61, 62, 63, 64, 65, 66, 67, 68, 69: Open 80, 81: Separation section 110: Base 111: Buffer layer; 130: Active layer 131: Active Pattern 141, 142, 143, 144, 145, 350: Insulation layer 150a, 150b, 170a, 170b: Conductive layers 151, 152, 154: Scan lines 153: Control line; 156: Storage line 159: Initialization voltage line; 171: Data line 172: Drive voltage line; 180: Conductive pattern 181, 182, 183, 184: Pattern Section 181a, 182a, 183a, 184a: Vertical part 181b, 182b, 183b, 184b: Horizontal section 191: Pixel electrode; 270: Common electrode 370: Light-emitting layer; 500: Driving circuit components 600: Optical components; 1000: Display panel DA1, DA2, DA: Display area; LTA: Transmitting part.

Claims

1. A display device, the display device comprising: The display area includes a first area and a second area. The first area includes a plurality of first light-emitting diodes of a plurality of first pixels. The second area is surrounded by the first area and includes a plurality of second light-emitting diodes of a plurality of second pixels. The peripheral area is located outside the display area; A data cable includes a first part and a second part spaced apart from each other. In a plan view, the first part and the second part are opposite to each other and the second part is located between the first part and the second part. The first part and the second part are electrically connected to each other. as well as Conductive wires, in the first region, Wherein, the virtual extension line of the first part and the virtual extension line of the second part are on the same straight line, and The first portion of the data cable is electrically connected to the conductive wire at a first contact area in the peripheral region.

2. The display device according to claim 1, further comprising: The drive circuit component is electrically connected to the data line. The distance between the driving circuit component and the first contact area is greater than the distance between the driving circuit component and the second area.

3. The display device according to claim 2, wherein, The second portion of the data cable is electrically connected to the conductive wire at the second contact area in the display area.

4. The display device according to claim 3, wherein, In the plan view, the first contact area and the second contact area are opposite to each other, and the second area is disposed between the first contact area and the second contact area.

5. The display device according to claim 1, wherein, The conductive line includes a third portion extending parallel to the data line in the first region and a fourth portion extending in a different direction from the third portion. The first part of the data line is electrically connected to the fourth part of the conductive line.

6. The display device according to claim 5, wherein, The second portion of the data cable is electrically connected to the conductive wire at the second contact area in the peripheral region, and In the plan view, the first contact area and the second contact area are opposite to each other, and the display area is disposed between the first contact area and the second contact area.

7. The display device according to claim 6, wherein, The fourth portion of the conductive line has a portion disposed on a different conductive layer than the data line.

8. The display device according to claim 5, further comprising: The substrate, the data lines, and the conductive lines are disposed on the substrate. The fourth part is configured such that it is located in a direction perpendicular to the upper surface of the substrate, and is farther from the upper surface of the substrate than the data line.

9. The display device according to claim 1, wherein, The second region includes a transmission region, and The number of first light-emitting diodes per unit area in the first region is different from the number of second light-emitting diodes per unit area in the second region.

10. The display device according to claim 1, wherein, Each of the first pixels further includes a first transistor electrically connected to the first light-emitting diode, and Each of the second pixels also includes a second transistor electrically connected to the second light-emitting diode.

11. A display device, the display device comprising a display panel and optical elements, in, The display panel includes: The display area includes a first area and a second area. The first area includes a plurality of first light-emitting diodes of a plurality of first pixels. The second area is surrounded by the first area and includes a plurality of second light-emitting diodes of a plurality of second pixels. The peripheral area is located outside the display area; A data cable includes a first portion and a second portion spaced apart from each other, the first portion and the second portion being opposite each other in a plan view and a second region being located between the first portion and the second portion, the first portion and the second portion being electrically connected to each other; and Conductive wires, in the first region, In this configuration, the first virtual extension line of the first part and the second virtual extension line of the second part are on the same straight line. The first portion of the data cable is electrically connected to the conductive wire at a first contact area in the peripheral region. The second region includes a transmission region, and In the plan view, the optical element is superimposed on the transmission region.

12. The display device according to claim 11, further comprising: The drive circuit component is electrically connected to the data line. The distance between the driving circuit component and the first contact area is greater than the distance between the driving circuit component and the second area.

13. The display device according to claim 12, wherein, The second portion of the data cable is electrically connected to the conductive wire at the second contact area in the display area.

14. The display device according to claim 13, wherein, In the plan view, the first contact area and the second contact area are opposite to each other, and the second area is disposed between the first contact area and the second contact area.

15. The display device according to claim 11, wherein, The conductive line includes a third portion extending parallel to the data line in the first region and a fourth portion extending in a different direction from the third portion. The first part of the data line is electrically connected to the fourth part of the conductive line.

16. The display device according to claim 15, wherein, The second portion of the data cable is electrically connected to the conductive wire at the second contact area in the peripheral region, and In the plan view, the first contact area and the second contact area are opposite to each other, and the display area is disposed between the first contact area and the second contact area.

17. The display device according to claim 16, wherein, The fourth portion of the conductive line has a portion disposed on a different conductive layer than the data line.

18. The display device according to claim 15, further comprising: The substrate, the data lines, and the conductive lines are disposed on the substrate. The fourth part is configured to be farther from the upper surface of the substrate than the data line in a direction perpendicular to the upper surface of the substrate.

19. The display device according to claim 11, wherein, The number of first light-emitting diodes per unit area in the first region is different from the number of second light-emitting diodes per unit area in the second region.

20. The display device according to claim 11, wherein, The optical element includes at least one of a camera, a flash, and a sensor.

Images