Display substrate, preparation method thereof and display device

Abstract

The invention discloses a display substrate, a preparation method thereof and a display device. The display substrate comprises a substrate; the light-emitting device is arranged on the substrate, the light-emitting device comprises a laminated structure, the laminated structure comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are sequentially laminated in the direction away from the substrate, and the orthographic projection of the second semiconductor layer on the substrate is located in the orthographic projection of the light-emitting layer on the substrate; therefore, the light-emitting efficiency of the light-emitting device is improved.

Description

Technical Field

[0001] This article relates to, but is not limited to, the field of display technology, specifically to a display substrate and its preparation method, and a display device. Background Technology

[0002] The manufacturing size of light-emitting diodes (LEDs) is trending towards miniaturization. For example, micro light-emitting diodes (Micro LEDs) or sub-millimeter light-emitting diodes (Mini LEDs) are attracting increasing attention due to their advantages such as small size, low power consumption, and long product life. Summary of the Invention

[0003] This application provides a display substrate and a display device to improve the light extraction efficiency of light-emitting devices.

[0004] This application provides a display substrate, including:

[0005] Base;

[0006] A light-emitting device is disposed on the substrate. The light-emitting device includes a stacked structure, which includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially along a direction away from the substrate. The orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

[0007] In an exemplary embodiment, the region where the orthographic projection of the light-emitting layer on the substrate does not overlap with the orthographic projection of the second semiconductor layer on the substrate is an annular region.

[0008] In an exemplary embodiment, the minimum distance between the outer contour of the orthographic projection of the second semiconductor layer on the substrate and the outer contour of the orthographic projection of the light-emitting layer on the substrate is greater than or equal to 1 micrometer.

[0009] In an exemplary embodiment, the stacked structure further includes a protective layer, which is stacked between the second semiconductor layer and the light-emitting layer and contacts both the second semiconductor layer and the light-emitting layer. The orthographic projection of the protective layer on the substrate completely overlaps with the orthographic projection of the light-emitting layer on the substrate.

[0010] In an exemplary embodiment, the thickness of the protective layer is greater than or equal to 50 nanometers.

[0011] In an exemplary embodiment, the protective layer is integrally connected to the second semiconductor layer and comprises the same material.

[0012] In an exemplary embodiment, the second semiconductor layer includes a plurality of protrusions spaced apart, the protrusions being cylindrical in shape.

[0013] In an exemplary embodiment, the maximum opening size of the protrusion's orthogonal projection onto the substrate is less than or equal to 2 micrometers.

[0014] In an exemplary embodiment, the stacked structure further includes a filler layer disposed in the same layer as the protrusions, at least a portion of the filler layer being disposed between adjacent protrusions and in contact with the sidewalls of adjacent protrusions, the filler layer exposing the surface of the protrusions away from the substrate, and the refractive index of the filler layer being less than the refractive index of the protrusions in contact with the filler layer.

[0015] In an exemplary embodiment, the light-emitting device further includes an anti-reflection layer disposed on at least a portion of the surface and at least a portion of the side surface of the stacked structure away from the substrate, the anti-reflection layer being configured to reduce the proportion of total internal reflection of light emitted from the light-emitting layer.

[0016] In an exemplary embodiment, the anti-reflection layer includes a plurality of dielectric layers stacked together, with adjacent dielectric layers having different refractive indices, and the refractive index of the dielectric layer in contact with the stacked structure being greater than the refractive index of the stacked structure.

[0017] In an exemplary embodiment, the light-emitting device further includes a microstructure layer disposed on at least a portion of the surface and at least a portion of the side surface of the stacked structure away from the substrate. The microstructure layer is configured to scatter light emitted from the light-emitting layer. The microstructure layer includes a plurality of microstructures. The maximum opening size of the orthographic projection of the microstructures on the surface of the stacked structure away from the substrate is less than or equal to 50 nanometers, and / or the maximum opening size of the orthographic projection of the microstructures on the side surface of the stacked structure is less than or equal to 50 nanometers.

[0018] In an exemplary embodiment, the shape of the orthographic projection of the stacked structure onto the substrate is a polygon, and the size of any side of the orthographic projection of the stacked structure onto the substrate is less than or equal to 40 micrometers.

[0019] This application also provides a display device, including the aforementioned display substrate.

[0020] This application also provides a method for preparing a display substrate, including:

[0021] A light-emitting device is formed on a substrate; the light-emitting device includes a stacked structure, the stacked structure including a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially along a direction away from the substrate, wherein the orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

[0022] The embodiments of this application show that the substrate is located within the orthogonal projection of the second semiconductor layer on the substrate, which makes the second semiconductor layer shrink inward relative to the light-emitting layer. Under charge injection, the current intensity in the damaged area at the edge of the light-emitting device is reduced, the current intensity in the undamaged area of ​​the light-emitting device is enhanced, the electro-optic energy conversion is improved, and the internal quantum efficiency of the light-emitting device is improved.

[0023] The embodiments of this application show that the substrate scatters the light emitted from the light-emitting layer through multiple protrusions in the second semiconductor layer, thereby reducing the proportion of total internal reflection of the light emitted from the light-emitting layer and improving the light extraction efficiency of the light-emitting device.

[0024] The embodiments of this application show that the substrate is disposed between adjacent protrusions of the second semiconductor layer by a filler layer to ensure the strength of the second semiconductor layer.

[0025] The embodiments of this application show that the substrate reduces the proportion of total internal reflection of light emitted from the light-emitting layer by using an anti-reflection layer, thereby improving the light extraction efficiency of the light-emitting device.

[0026] The embodiments of this application show that by controlling the refractive index of the adjacent dielectric layers in the anti-reflection layer, the proportion of light emitted from the light-emitting layer undergoing total internal reflection is reduced, thereby improving the light extraction efficiency of the light-emitting device.

[0027] The embodiments of this application show that the substrate scatters the light emitted from the light-emitting layer through a microstructure layer, thereby improving the light extraction efficiency of the light-emitting device.

[0028] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the application. Other advantages of this application can be realized and obtained by means of the solutions described in the description and the accompanying drawings. Attached Figure Description

[0029] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0030] Figure 1 This is a schematic diagram of a planar structure of a related light-emitting diode device;

[0031] Figure 2 This is a schematic diagram of the planar structure of another related light-emitting diode device;

[0032] Figure 3 A simulation diagram illustrating the emission of light from another related light-emitting diode device;

[0033] Figure 4 This is a schematic diagram showing the formation of a first semiconductor thin film, a light-emitting thin film, and a second conductor thin film during the fabrication process of a display substrate according to an embodiment of this disclosure.

[0034] Figure 5 This is a schematic diagram showing the formation of a first mask pattern during the fabrication process of a display substrate according to an embodiment of the present disclosure;

[0035] Figure 6 This is a schematic diagram showing the columnar structure formed during the fabrication process of a display substrate according to an embodiment of the present disclosure;

[0036] Figure 7 This is a schematic diagram showing the formation of a second mask pattern during the fabrication process of a display substrate according to an embodiment of the present disclosure;

[0037] Figure 8 This is a schematic diagram showing the formation of a second semiconductor layer during the fabrication process of a display substrate according to an embodiment of the present disclosure;

[0038] Figure 9a and Figure 9b This is a schematic diagram showing the process of removing the second mask pattern during the fabrication of a display substrate according to an embodiment of the present disclosure;

[0039] Figure 10 This is a schematic diagram of the structure of another display substrate according to an embodiment of the present disclosure;

[0040] Figure 11 This is a schematic diagram of the structure of another display substrate according to an embodiment of the present disclosure;

[0041] Figure 12a This is a schematic diagram of the structure of another display substrate according to an embodiment of the present disclosure;

[0042] Figure 12b This is a schematic diagram of the structure of the dereflection layer of another display substrate according to an embodiment of the present disclosure;

[0043] Figure 13 This is a schematic diagram of the structure of another display substrate according to an embodiment of the present disclosure;

[0044] Figure 14 This is a schematic diagram showing the formation of multiple microstructures during the fabrication process of another display substrate according to an embodiment of this disclosure. Detailed Implementation

[0045] This application describes several embodiments, but these descriptions are exemplary and not restrictive, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0046] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application can also be combined with any conventional features or elements to form unique inventive solutions. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution. Therefore, it should be understood that any feature shown and / or discussed in this application can be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes can be made within the scope of the appended claims.

[0047] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.

[0048] The inventors of this application have discovered that light-emitting diode (LED) devices form independent display units through an etching process. This etching process damages the edge areas of the LED devices, creating damaged areas. The luminous efficiency of these damaged areas is lower than that of the undamaged central areas, resulting in lower brightness at the edges compared to the central areas. This edge effect affects the display performance of the LED devices.

[0049] Figure 1This is a schematic diagram of a planar structure of a related light-emitting diode device. For example... Figure 1 As shown, the shape of the related light-emitting diode device 20' is rectangular. The length L1' of the side of the light-emitting diode device 20' extending along the second direction D2 is approximately 250 micrometers. During the etching process, the edge area of ​​the light-emitting diode device will be etched and damaged, forming a damaged area 10'. The damaged area 10' is a rectangular ring surrounding the central area of ​​the light-emitting diode device. Due to the large area of ​​the light-emitting diode device, the area of ​​the damaged area 10' is a small percentage of the total area of ​​the light-emitting diode device. For example, the area of ​​the damaged area 10' is 3% of the area of ​​the light-emitting diode device, so that the edge effect of the light-emitting diode device has little impact on the display effect of the light-emitting diode device.

[0050] Figure 2 This is a schematic diagram of the planar structure of another related light-emitting diode device. For example... Figure 2 As shown, the shape of the related light-emitting diode device 20' is rectangular, and the length L2' of the side of the light-emitting diode device 20' extending along the second direction D2 is 5 micrometers. This light-emitting diode device 20' is a miniature light-emitting diode. During the etching process, the edge area of ​​the light-emitting diode device will be etched and damaged, forming a damaged area 10'. The damaged area 10' is a rectangular ring surrounding the central area of ​​the light-emitting diode device. Due to the small area of ​​the light-emitting diode device, the area of ​​the damaged area 10' accounts for a large proportion of the total area of ​​the light-emitting diode device. For example, the area of ​​the damaged area 10' is 96% of the area of ​​the light-emitting diode device, which makes the edge effect of the light-emitting diode device seriously affect the display effect of the light-emitting diode device.

[0051] Figure 3 This is a simulation diagram illustrating the emission of light from a related light-emitting diode device. Among them, Figure 3 It can be Figure 2 The diagram shows a simulation of a light-emitting diode (LED) device emitting light. Figure 3 As shown, the luminous intensity of a micro-LED is detected by photoexcitation. Under the same photoexcitation conditions, the luminous intensity of the edge region 11' of the micro-LED is lower than that of the middle region 12', which greatly affects the display effect of the LED device.

[0052] In summary, after miniaturization, such as to micro-LEDs or sub-millimeter LEDs, edge effects significantly impact the display performance of LEDs, leading to a decrease in internal quantum efficiency (IQE) and external quantum efficiency (IQE), ultimately affecting light extraction efficiency. External quantum efficiency (EQE) is the ratio of emitted photons to injected charge carriers, reflecting the overall luminous efficiency of the device. Internal quantum efficiency (IQE) is the percentage of photons emitted by exciton recombination within the device relative to the number of injected charge carriers, reflecting the material's luminescent properties and representing the electro-optical conversion efficiency of the element itself. Light extraction efficiency (LEE) is the number of photons generated within the element that, after absorption, refraction, and reflection, are actually measurable outside the element. The product of IQE and LEE affects the IQE of the LED. For example, with a constant light extraction efficiency, a higher IQE results in a higher LEE.

[0053] Furthermore, the inventors of this application have discovered that because the refractive index of the material of the light-emitting diode (LED) device is greater than the refractive index of the external environment (e.g., air) of the LED device, the light emitted by the LED device will undergo total internal reflection at the interface between the LED device and the external environment. This results in some of the light emitted by the LED device being unable to escape, thus reducing the light extraction efficiency of the LED device.

[0054] Light emission simulation experiments were conducted on Organic Light Emitting Diode (OLED) devices, blue or green LED devices, and red LED devices under the same external environment. The refractive index of the emissive layer material in the OLED device was 1.8, in the blue or green LED device it was 2.5, and in the red LED device it was 3.5. The simulation results showed that the single-sided light emission efficiency of the OLED device was 8.42%, the blue or green LED device was 4.17%, and the red LED device was 2.08%. This demonstrates that the higher the refractive index of the emissive layer material, the more light undergoes total internal reflection, and the lower the light emission efficiency of the device.

[0055] This application provides a display substrate, including:

[0056] Base;

[0057] A light-emitting device is disposed on the substrate. The light-emitting device includes a stacked structure, which includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially along a direction away from the substrate. The orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

[0058] In an exemplary embodiment, the region where the orthographic projection of the light-emitting layer on the substrate does not overlap with the orthographic projection of the second semiconductor layer on the substrate is an annular region.

[0059] In an exemplary embodiment, the minimum distance between the outer contour of the orthographic projection of the second semiconductor layer on the substrate and the outer contour of the orthographic projection of the light-emitting layer on the substrate is greater than or equal to 1 micrometer.

[0060] In an exemplary embodiment, the stacked structure further includes a protective layer, which is stacked between the second semiconductor layer and the light-emitting layer and contacts both the second semiconductor layer and the light-emitting layer. The orthographic projection of the protective layer on the substrate completely overlaps with the orthographic projection of the light-emitting layer on the substrate.

[0061] In an exemplary embodiment, the thickness of the protective layer is greater than or equal to 50 nanometers.

[0062] In an exemplary embodiment, the protective layer is integrally connected to the second semiconductor layer and comprises the same material.

[0063] The following description uses the fabrication process of a display substrate as an example. The "patterning process" described in this disclosure includes, for metallic, inorganic, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes processes such as organic material coating, mask exposure, and development. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying, spin coating, and inkjet printing; etching can be performed using any one or more of dry etching and wet etching. This disclosure does not limit the methods used. A "thin film" refers to a thin film made of a certain material on a substrate using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of this disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0064] In an exemplary embodiment, the fabrication process of the display substrate may include the following operations.

[0065] (101) Forming a first semiconductor thin film, a light-emitting thin film, and a second conductor thin film.

[0066] In an exemplary embodiment, forming the first semiconductor thin film, the light-emitting thin film, and the second conductor thin film includes: sequentially forming the first semiconductor thin film 21, the light-emitting thin film 22, and the second semiconductor thin film 23 on the substrate 101, such as... Figure 4 As shown.

[0067] In an exemplary embodiment, substrate 101 may include a glass, sapphire, or silicon substrate.

[0068] (102) Form the first mask pattern.

[0069] In an exemplary embodiment, forming the first mask pattern includes: depositing an adhesive layer on the surface of the second semiconductor thin film 23 on the substrate 101 where the aforementioned pattern is formed; subsequently, using processes such as photolithography, nanoimprint lithography, or ion beam exposure, patterning the adhesive layer to form multiple first mask patterns 24. The first mask patterns 24 are configured to block the area where the subsequently formed stacked structure is located. The area where the orthographic projection of the first mask pattern 24 on the substrate 101 overlaps with the orthographic projections of the first semiconductor thin film 21, the light-emitting thin film 22, and the second semiconductor thin film 23 on the substrate 101 forms the stacked structure of the light-emitting device in subsequent processes, such as... Figure 5 As shown.

[0070] In an exemplary embodiment, the first mask pattern 24 is block-shaped, and multiple first mask patterns 24 are spaced apart from each other.

[0071] (103) Forms a columnar structure.

[0072] In an exemplary embodiment, forming the columnar structure includes: patterning the first semiconductor thin film, the light-emitting thin film, and the second semiconductor thin film on the substrate 101 where the aforementioned pattern is formed using an etching process; etching away areas of the first semiconductor thin film, the light-emitting thin film, and the second semiconductor thin film not covered by the first mask pattern 24; retaining areas of the first semiconductor thin film, the light-emitting thin film, and the second semiconductor thin film covered by the first mask pattern 24; and forming a columnar structure 10 in the areas of the first semiconductor thin film, the light-emitting thin film, and the second semiconductor thin film covered by the first mask pattern 24. Figure 6 As shown.

[0073] In an exemplary embodiment, the columnar structure 10 includes a first semiconductor layer 11, a light-emitting layer 12, and a predetermined second semiconductor layer 25 sequentially stacked along a direction away from the substrate 101; wherein, the area of ​​the first semiconductor thin film that is covered by the first mask pattern 24 forms the first semiconductor layer 11 of the columnar structure 10, the area of ​​the light-emitting thin film that is covered by the first mask pattern 24 forms the light-emitting layer 12 of the columnar structure 10, and the area of ​​the second semiconductor thin film that is covered by the first mask pattern 24 forms the predetermined second semiconductor layer 25 of the columnar structure 10.

[0074] (104) Form the second mask pattern.

[0075] In an exemplary embodiment, forming the second mask pattern includes: patterning the first mask pattern on the substrate 101 where the aforementioned pattern is formed using an ashing process; etching away the edge regions of each first mask pattern; retaining the middle regions of each first mask pattern; and forming the second mask pattern 26 in the retained middle regions of the first mask patterns. The second mask pattern 26 is configured to shield the region where the subsequently formed first semiconductor layer is located, preventing damage to the region where the first semiconductor layer is located by subsequent etching processes. Figure 7 As shown. In this process, the columnar structure 10 was not etched.

[0076] In an exemplary embodiment, the orthographic projection of the second mask pattern 26 on the substrate 101 is located within the orthographic projection of the columnar structure 10 on the substrate 101, and the edge of the second mask pattern 26 is recessed relative to the edge of the preset second semiconductor layer 25 that contacts the second mask pattern 26, forming an annular boss structure.

[0077] In an exemplary embodiment, the preset second semiconductor layer 25 includes a first portion 25-1 and a second portion 25-2. The first portion 25-1 and the second portion 25-2 are different parts of the preset second semiconductor layer 25 in the direction perpendicular to the substrate, and the first portion 25-1 and the second portion 25-2 are an integral structure interconnected. The first portion 25-1 is located on the side of the second portion 25-2 away from the substrate 101. The first portion 25-1 of the preset second semiconductor layer 25 is configured to form the second semiconductor layer through a subsequent etching process, and the second portion 25-2 of the preset second semiconductor layer 25 is configured to form a protective layer in a subsequent process.

[0078] In an exemplary embodiment, the minimum distance between any outer contour of the second mask pattern 26 and the outer contour of the preset second semiconductor layer 25 is L1, where the distance L1 is greater than or equal to 1 micrometer and less than or equal to 2 micrometers.

[0079] In the process of fabricating the substrate, the first mask pattern is shrunk inward to form the second mask pattern, thereby achieving self-alignment of the pattern. This facilitates the subsequent etching process to pattern the preset second semiconductor layer to form the second semiconductor layer.

[0080] (105) Form a second semiconductor layer.

[0081] In an exemplary embodiment, forming the second semiconductor layer includes: patterning a preset second semiconductor layer on the substrate 101 where the aforementioned pattern is formed using an etching process; etching away the second portion of the preset second semiconductor layer not covered by the second mask pattern 26; retaining the second portion of the preset second semiconductor layer covered by the second mask pattern 26; forming a second semiconductor layer 13; the first portion of the preset second semiconductor layer is not etched during this etching process; forming a protective layer 14; the protective layer 14 is configured to block the light-emitting layer 12, preventing the light-emitting layer 12 from being etched and damaged during the etching process. Figure 8 As shown.

[0082] In an exemplary embodiment, the orthographic projection of the second semiconductor layer 13 on the substrate completely overlaps with the orthographic projection of the second mask pattern 26 on the substrate. The orthographic projection of the second semiconductor layer 13 on the substrate is located within the orthographic projection of the protective layer 14 that is in contact with the second semiconductor layer 13 on the substrate. The orthographic projection of the second semiconductor layer 13 on the substrate is located within the orthographic projection of the corresponding light-emitting layer 12 on the substrate. The outer contour of the second semiconductor layer 13 is inward compared to the outer contour of the corresponding light-emitting layer 12. The minimum distance between any outer contour of the orthographic projection of the second semiconductor layer 13 on the substrate and the outer contour of the orthographic projection of the corresponding light-emitting layer 12 on the substrate is L2, which is greater than or equal to 1 micrometer and less than or equal to 2 micrometers.

[0083] In an exemplary embodiment, the protective layer 14 is located between the second semiconductor layer 13 and the light-emitting layer 12. The surface of the protective layer 14 near the substrate 101 is in contact with the light-emitting layer 12, and the surface of the protective layer 14 away from the substrate 101 is in contact with the second semiconductor layer 13. The orthographic projection of the protective layer 14 on the substrate completely overlaps with the orthographic projection of the light-emitting layer 12 that is in contact with the protective layer 14 on the substrate. The outer contour of the protective layer 14 is approximately flush with the outer contour of the corresponding light-emitting layer 12.

[0084] In an exemplary embodiment, the protective layer 14 and the second semiconductor layer 13 can be integrally connected and made of the same material. The thickness of the protective layer 14 can be greater than or equal to 50 nanometers. The thickness of the protective layer 14 can be defined as its dimension in the direction perpendicular to the substrate.

[0085] In an exemplary embodiment, the first semiconductor layer 11, the light-emitting layer 12, the protective layer 14, and the second semiconductor layer 13 are sequentially stacked along a direction away from the substrate 101 to form a stacked structure 20 of the light-emitting device.

[0086] (106) Remove the second mask pattern.

[0087] In an exemplary embodiment, removing the second mask pattern includes: removing each second mask pattern on the substrate 101 on which the aforementioned patterns are formed, exposing the surface of each second semiconductor layer 13, such as... Figure 9a and Figure 9b As shown. Among them, Figure 9b It can be Figure 9a A cross-sectional view along the a-a' direction.

[0088] In an exemplary embodiment, the shape of the orthographic projection of the stacked structure 20 onto the substrate 101 may include a rectangle, and the size of any side L3 of the orthographic projection of the stacked structure 20 onto the substrate is less than or equal to 40 micrometers. In some embodiments, the shape of the orthographic projection of the stacked structure onto the substrate may include a triangle, rhombus, pentagon, hexagon, or other polygon, or a circle, ellipse, etc. When the shape of the orthographic projection of the stacked structure onto the substrate is circular or elliptical, the maximum opening size of the orthographic projection of the stacked structure onto the substrate is less than or equal to 40 micrometers.

[0089] In an exemplary embodiment, the orthographic projection of the second semiconductor layer 13 on the substrate is located within the orthographic projection of the corresponding light-emitting layer 12 on the substrate. The outer contour of the second semiconductor layer 13 is smaller than the outer contour of the corresponding light-emitting layer 12. The area where the orthographic projection of the light-emitting layer 12 on the substrate and the orthographic projection of the second semiconductor layer 13 on the substrate do not overlap is an annular area. This annular area is arranged around the orthographic projection of the second semiconductor layer 13 on the substrate.

[0090] In an exemplary embodiment, the minimum distance between any outer contour of the orthographic projection of the second semiconductor layer 13 on the substrate and the outer contour of the orthographic projection of the corresponding light-emitting layer 12 on the substrate is L2, which is greater than or equal to 1 micrometer and less than or equal to 2 micrometers.

[0091] In an exemplary embodiment, the first semiconductor layer 11 may be made of a P-type semiconductor material, such as a silicon semiconductor material doped with boron, indium, or gallium. The thickness of the first semiconductor layer 11 may be greater than or equal to 10 nanometers and less than or equal to 100 nanometers. The thickness of the first semiconductor layer 11 can be defined as the dimension of the first semiconductor layer 11 in the direction perpendicular to the substrate.

[0092] In an exemplary embodiment, the light-emitting layer 12 can be a colloidal quantum well (CQW) or a multiple quantum well (MQW), and the thickness of the light-emitting layer 12 can be greater than or equal to 100 nanometers and less than or equal to 200 nanometers. The thickness of the light-emitting layer 12 can be defined as its dimension in the direction perpendicular to the substrate.

[0093] In an exemplary embodiment, the second semiconductor layer 13 may be an N-type semiconductor material, such as silicon semiconductor material doped with phosphorus, arsenic, or antimony. The thickness of the second semiconductor layer 13 may be greater than or equal to 1000 nanometers and less than or equal to 2000 nanometers. The thickness of the second semiconductor layer 13 is greater than the thickness of the first semiconductor layer 11. The thickness of the second semiconductor layer 13 can be defined as its dimension in the direction perpendicular to the substrate.

[0094] In some embodiments, the first semiconductor layer may be an N-type semiconductor material, such as a silicon semiconductor material doped with boron, indium, or gallium. The thickness of the first semiconductor layer may be greater than or equal to 1000 nanometers and less than or equal to 2000 nanometers. The second semiconductor layer may be a P-type semiconductor material, such as a silicon semiconductor material doped with boron, indium, or gallium. The thickness of the second semiconductor layer may be greater than or equal to 10 nanometers and less than or equal to 100 nanometers. The thickness of the second semiconductor layer is less than the thickness of the first semiconductor layer.

[0095] In the process of fabricating the display substrate according to the present disclosure embodiment, the orthogonal projection of the second semiconductor layer 13 on the substrate is located within the orthogonal projection of the corresponding light-emitting layer 12 on the substrate, so that the outer contour of the second semiconductor layer 13 is smaller than the outer contour of the light-emitting layer 12. Under the condition of charge injection, the current intensity of the damaged area at the edge of the light-emitting device is reduced, the current intensity of the undamaged area of ​​the light-emitting device is enhanced, the electro-optic energy conversion is improved, and the internal quantum efficiency of the light-emitting device is improved.

[0096] Figure 10 This is a schematic diagram of another display substrate according to an embodiment of the present disclosure. Wherein, Figure 10 This illustration shows a stacked structure of a light-emitting device. In this exemplary embodiment, the structure of the light-emitting device on the display substrate is similar to... Figure 9b The light-emitting devices of the display substrates shown have basically the same structure, except that, as Figure 10 As shown in the embodiments of this disclosure, the second semiconductor layer 13 of the stacked structure 20 in the light-emitting device of the substrate includes a plurality of protrusions 131 spaced apart along a direction parallel to the substrate. The plurality of protrusions 131 are configured to scatter the light emitted from the light-emitting layer 12, reduce the proportion of total internal reflection of the light emitted from the light-emitting layer 12, and improve the light extraction efficiency of the light-emitting device.

[0097] In an exemplary embodiment, the plurality of protrusions 131 include an edge protrusion 131-1 located at the outermost periphery of the second semiconductor layer 13 and an intermediate protrusion 131-2 located in the middle of the second semiconductor layer 13. The plurality of edge protrusions 131-1 are arranged in a ring around the plurality of intermediate protrusions 131-2. The side of the ring-arc distributed edge protrusions 131-1 away from the plurality of intermediate protrusions 131-2 forms the outer contour of the second semiconductor layer 13.

[0098] In an exemplary embodiment, the protrusion 131 is columnar in shape, and the shape of the orthographic projection of the protrusion 131 on the substrate includes a circle, an ellipse, a triangle, a rectangle, a trapezoid, a pentagon, a hexagon, or other polygons. The maximum opening size of the orthographic projection of the protrusion 131 on the substrate is less than or equal to 2 micrometers.

[0099] In some embodiments, the shape of the protrusion may also include cone-shaped, pyramidal, or other shapes.

[0100] Figure 11 This is a schematic diagram of another display substrate according to an embodiment of the present disclosure. Wherein, Figure 11 The diagram illustrates the structure of a light-emitting device. In this exemplary embodiment, the structure of the light-emitting device on the display substrate is similar to... Figure 10 The light-emitting devices of the display substrates shown have basically the same structure, except that, as Figure 11 As shown in the present disclosure embodiment, the stacked structure 20 in the light-emitting device of the display substrate further includes a filling layer 15. The filling layer 15 is disposed in the same layer as the plurality of protrusions 131, and at least a portion of the filling layer 15 is disposed between adjacent protrusions 131. The filling layer 15 is configured to enhance the strength of the second semiconductor layer 13.

[0101] In an exemplary embodiment, the filling layer 15 contacts the sidewall of at least one protrusion 131. The refractive index of the filling layer 15 is less than the refractive index of the protrusion 131 that contacts the filling layer 15, thereby preventing total internal reflection of light at the junction of the sidewall of the protrusion 131 and the filling layer 15, and ensuring the output efficiency of the light-emitting device.

[0102] In an exemplary embodiment, the filler layer 15 exposes the surface of the plurality of protrusions 131 away from the substrate, so that the surface of the plurality of protrusions 131 away from the substrate can be connected to the electrode, thereby realizing the electrical connection between the electrode and the second semiconductor layer 13.

[0103] In an exemplary embodiment, a plurality of protrusions 131 of the second semiconductor layer 13 may share a single electrode.

[0104] Figure 12a This is a schematic diagram of another display substrate according to an embodiment of the present disclosure. Wherein, Figure 12a The diagram illustrates the structure of a light-emitting device. In this exemplary embodiment, the structure of the light-emitting device on the display substrate is similar to... Figure 9b The light-emitting devices of the display substrates shown have basically the same structure, except that, as Figure 12aAs shown in the present disclosure embodiment, the light-emitting device of the substrate further includes an anti-reflection layer 16. The anti-reflection layer 16 is disposed on at least a portion of the surface of the stacked structure away from the substrate 101 and at least a portion of the side surface of the stacked structure. The anti-reflection layer 16 is configured to reduce the proportion of total internal reflection of the light emitted from the light-emitting layer 12 and improve the light emission efficiency of the light-emitting device.

[0105] In an exemplary embodiment, the anti-reflection layer 16 contacts the surface of the stacked structure away from the substrate 101, and the orthographic projection of the anti-reflection layer 16 onto the substrate covers the orthographic projection of the surface of the stacked structure away from the substrate 101 onto the substrate. The anti-reflection layer 16 contacts the sides of the stacked structure, and the anti-reflection layer 16 covers all sides of the stacked structure. For example, the anti-reflection layer 16 covers the surface of the second semiconductor layer 13 away from the substrate 101, the sides of the second semiconductor layer 13, the surface of the protective layer 14 not covered by the second semiconductor layer 13, the sides of the protective layer 14, the sides of the light-emitting layer 12, and the sides of the first semiconductor layer 11.

[0106] Figure 12b This is a schematic diagram of the structure of an anti-reflection layer on another display substrate according to an embodiment of this disclosure. Figure 12b The de-reflection layer of the display substrate shown can be Figure 12a The dereflection layer of the display substrate is shown. In an exemplary embodiment, such as Figure 12b As shown, the anti-reflection layer 16 includes multiple dielectric layers 161 stacked together. The refractive indices of adjacent dielectric layers 161 are different. By controlling the refractive indices of adjacent dielectric layers 161, the proportion of total internal reflection of light emitted from the light-emitting layer 12 can be reduced, thereby improving the light extraction efficiency of the light-emitting device.

[0107] In an exemplary embodiment, the anti-reflection layer 16 contacts the surface and side surfaces of the stacked structure away from the substrate. The refractive index of the dielectric layer 161 in the anti-reflection layer 16 that contacts the stacked structure is greater than the refractive index of the stacked structure, thereby preventing total internal reflection of light emitted from the light-emitting layer 12 at the interface between the stacked structure and the anti-reflection layer 16. For example, the refractive index of the dielectric layer 161 in the anti-reflection layer 16 that contacts the second semiconductor layer 13 is greater than the refractive index of the second semiconductor layer 13, thereby preventing total internal reflection of light emitted from the light-emitting layer 12 at the interface between the second semiconductor layer 13 and the anti-reflection layer 16.

[0108] In an exemplary embodiment, the dielectric layer in the anti-reflection layer 16 can be an inorganic material or a metal compound. For example, the dielectric layer may include at least one of silicon dioxide, silicon nitride, titanium dioxide, magnesium fluoride, and niobium pentoxide.

[0109] Figure 13 This is a schematic diagram of another display substrate according to an embodiment of the present disclosure. Wherein, Figure 13The diagram illustrates the structure of a light-emitting device. In this exemplary embodiment, the structure of the light-emitting device on the display substrate is similar to... Figure 9b The light-emitting devices of the display substrates shown have basically the same structure, except that, as Figure 13 As shown in the present disclosure embodiment, the light-emitting device of the substrate further includes a microstructure layer 17. The microstructure layer 17 is disposed on at least a portion of the surface of the stacked structure away from the substrate 101 and at least a portion of the side surface of the stacked structure. The microstructure layer 17 is configured to scatter the light emitted from the light-emitting layer, reduce the proportion of total internal reflection of the light emitted from the light-emitting layer 12, and improve the light emission efficiency of the light-emitting device.

[0110] In an exemplary embodiment, the microstructure layer 17 includes a plurality of microstructures 17-1 disposed on the stacked structure. The plurality of microstructures 17-1 are arranged at intervals between each other. The plurality of microstructures 17-1 are disposed on at least a portion of the surface of the stacked structure away from the substrate 101 and at least a portion of the side surface of the stacked structure. The microstructures 17-1 are configured to scatter the light emitted from the light-emitting layer 12, reduce the proportion of total internal reflection of the light emitted from the light-emitting layer 12, and improve the light extraction efficiency of the light-emitting device.

[0111] In an exemplary embodiment, the microstructure 17-1 is cone-shaped, and the maximum opening size of the orthographic projection of the microstructure 17-1 on the surface of the stacked structure away from the substrate is less than or equal to 50 nanometers, and / or the maximum opening size of the orthographic projection of the microstructure 17-1 on the side of the stacked structure is less than or equal to 50 nanometers.

[0112] In an exemplary embodiment, the material of microstructure 17-1 may include a metallic compound, such as aluminum oxide.

[0113] In an exemplary embodiment, the fabrication process of the dereflection layer on the display substrate may include the following operations:

[0114] First, an atomic layer deposition (ALD) process is used to deposit a microstructure film on the surface of the stacked structure away from the substrate 101 and on the side surface of the stacked structure. Then, the microstructure film is annealed to modify it, forming multiple microstructures 17-1, such as... Figure 14 As shown.

[0115] In the process of fabricating the display substrate, a microstructure thin film is formed by atomic layer deposition (ALD). Atomic layer deposition (ALD) has conformal characteristics, which allows the microstructure to be attached to the surface and sides of the stacked structure.

[0116] This disclosure also provides a method for preparing a display substrate, comprising:

[0117] A light-emitting device is formed on a substrate; the light-emitting device includes a stacked structure, the stacked structure including a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially along a direction away from the substrate, wherein the orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

[0118] This disclosure also provides a display device, which includes the aforementioned display substrate. The display device can be any product or component with display function, such as a VR display device, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator, and the embodiments of the present invention are not limited thereto.

[0119] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0120] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include at least one of those features.

[0121] In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.

[0122] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0123] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0124] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0125] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A display substrate, characterized in that, include: Base; A light-emitting device is disposed on the substrate. The light-emitting device includes a stacked structure, which includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially along a direction away from the substrate. The orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

2. The display substrate according to claim 1, characterized in that, The region in which the orthographic projection of the light-emitting layer on the substrate does not overlap with the orthographic projection of the second semiconductor layer on the substrate is an annular region.

3. The display substrate according to claim 1, characterized in that, The minimum distance between the outer contour of the orthographic projection of the second semiconductor layer on the substrate and the outer contour of the orthographic projection of the light-emitting layer on the substrate is greater than or equal to 1 micrometer.

4. The display substrate according to any one of claims 1 to 3, characterized in that, The stacked structure further includes a protective layer, which is stacked between the second semiconductor layer and the light-emitting layer and is in contact with both the second semiconductor layer and the light-emitting layer. The orthographic projection of the protective layer on the substrate completely overlaps with the orthographic projection of the light-emitting layer on the substrate.

5. The display substrate according to claim 4, characterized in that, The thickness of the protective layer is greater than or equal to 50 nanometers.

6. The display substrate according to claim 4, characterized in that, The protective layer is integrally connected to the second semiconductor layer and comprises the same material.

7. The display substrate according to any one of claims 1 to 3, characterized in that, The second semiconductor layer includes a plurality of protrusions spaced apart, the protrusions being cylindrical in shape.

8. The display substrate according to claim 7, characterized in that, The maximum opening size of the protrusion's orthogonal projection on the substrate is less than or equal to 2 micrometers.

9. The display substrate according to claim 7, characterized in that, The stacked structure further includes a filler layer disposed in the same layer as the protrusions. At least a portion of the filler layer is disposed between adjacent protrusions and contacts the sidewalls of adjacent protrusions. The filler layer exposes the surface of the protrusions away from the substrate. The refractive index of the filler layer is less than the refractive index of the protrusions in contact with the filler layer.

10. The display substrate according to any one of claims 1 to 3, characterized in that, The light-emitting device further includes an anti-reflection layer disposed on at least a portion of the surface and at least a portion of the side surface of the stacked structure away from the substrate, the anti-reflection layer being configured to reduce the proportion of total internal reflection of light emitted from the light-emitting layer.

11. The display substrate according to claim 10, characterized in that, The anti-reflection layer comprises multiple dielectric layers stacked together, with adjacent dielectric layers having different refractive indices, and the refractive index of the dielectric layer in contact with the stacked structure being greater than the refractive index of the stacked structure.

12. The display substrate according to any one of claims 1 to 3, characterized in that, The light-emitting device further includes a microstructure layer disposed on at least a portion of the surface and at least a portion of the side surface of the stacked structure away from the substrate. The microstructure layer is configured to scatter light emitted from the light-emitting layer. The microstructure layer includes a plurality of microstructures. The maximum aperture size of the orthographic projection of the microstructures on the surface of the stacked structure away from the substrate is less than or equal to 50 nanometers, and / or the maximum aperture size of the orthographic projection of the microstructures on the side surface of the stacked structure is less than or equal to 50 nanometers.

13. The display substrate according to any one of claims 1 to 3, characterized in that, The shape of the orthographic projection of the stacked structure onto the substrate is polygonal, and the size of any side of the orthographic projection of the stacked structure onto the substrate is less than or equal to 40 micrometers.

14. A display device, characterized in that, Includes the display substrate as described in any one of claims 1 to 13.

15. A method for preparing a display substrate, characterized in that, include: Forming light-emitting devices on a substrate; The light-emitting device includes a stacked structure, which includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially along a direction away from the substrate, wherein the orthogonal projection of the second semiconductor layer on the substrate is located within the orthogonal projection of the light-emitting layer on the substrate.

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