Display panel, manufacturing method and display device
By setting a blocking structure in the OLED display panel, the problems of undercutting and warping of the electrode edges during the etching process are solved, thereby improving the structural stability of the pixels and the display effect.
Patent Information
- Application Number
- CN202411667203.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-20
- Publication Date
- 2026-05-22
AI Technical Summary
In OLED display technology, the structural reliability of pixels needs to be further improved, especially since problems such as undercutting and electrode edge lifting and peeling are prone to occur during the etching process.
A blocking structure is provided in the display panel, including a first blocking block and a second blocking block, which are located at the edge and in the groove of the first electrode, respectively, to block the erosion of the etching solution and prevent the electrode edge from being undercut and warped.
By setting up a barrier structure, the erosion of the electrode and insulating layer surfaces by the etching solution is reduced or even avoided, improving the stability of the electrode edges and enhancing the structural reliability and display effect of the pixels.
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Figure CN122073932A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a display panel, a manufacturing method, and a display device. Background Technology
[0002] The current mainstream display technologies mainly include LCD (Liquid Crystal Display), LED (Light-Emitting Diode) display, and OLED (Organic Light-Emitting Diode) display.
[0003] LCD, LED, and OLED technologies each have their own advantages and disadvantages. For example, OLED display technology boasts numerous advantages such as high contrast, wide color gamut, low power consumption, thinner and lighter structure, and the ability to be flexibly bent. Currently, OLED display technology is widely used in mobile phones, computers, televisions, and other fields.
[0004] In OLED display products, the structural reliability of pixels needs to be further improved. Summary of the Invention
[0005] The purpose of this application is to provide a display panel that offers a solution to improve the structural reliability of pixels.
[0006] This application embodiment is implemented as follows: a display panel includes:
[0007] The substrate includes a first insulating layer;
[0008] Multiple first electrodes are spaced apart and arranged on one side of the first insulating layer; and
[0009] Multiple blocking structures are disposed at the edge of the first electrode and located on the side of the first electrode close to the substrate, and are in contact with the first electrode.
[0010] In one embodiment, the blocking structure includes a first blocking block that protrudes from one side surface of the first insulating layer, and the edge of the first electrode is located on the side of the first blocking block away from the substrate.
[0011] Preferably, the material of the first blocking block includes organic materials;
[0012] Preferably, the first blocking block and the first insulating layer are an integral structure;
[0013] Preferably, the first blocking block is strip-shaped and extends along the edge of the first electrode;
[0014] Preferably, the first blocking block is ring-shaped.
[0015] In one embodiment, the height of the first blocking block is greater than or equal to the thickness of the first electrode;
[0016] Preferably, in the thickness direction of the substrate, the height of the first blocking block is 1200 nm to 1800 nm.
[0017] Preferably, the height of the first blocking block is 1500 nm to 1800 nm.
[0018] In one embodiment, the first blocking block is strip-shaped, and the width of the first blocking block is greater than or equal to 0.5 micrometers; the extending direction of the first blocking block is perpendicular to the thickness direction of the substrate;
[0019] Preferably, the width of the first blocking block is greater than or equal to 0.5 micrometers and less than or equal to 5 micrometers;
[0020] Preferably, the width of the first blocking block is greater than or equal to 0.5 micrometers and less than or equal to 3 micrometers;
[0021] Preferably, the width of the first blocking block is greater than or equal to 1 micrometer and less than or equal to 3 micrometers.
[0022] In one embodiment, the blocking structure includes a second blocking block; a groove is provided on one side surface of the first insulating layer, and the second blocking block is located in the groove;
[0023] Preferably, the second blocking block and the first electrode are an integral structure;
[0024] Preferably, the groove is strip-shaped and extends along the edge of the first electrode; or, the second blocking block is strip-shaped and extends along the edge of the first electrode.
[0025] Preferably, the groove or the second blocking block is annular.
[0026] In one embodiment, the depth of the groove is less than or equal to the thickness of the first insulating layer in the thickness direction of the substrate;
[0027] Preferably, the depth of the groove is equal to the thickness of the first insulating layer;
[0028] Preferably, the depth of the groove is 1 micrometer to 2.5 micrometers.
[0029] In one embodiment, the width of the groove is greater than or equal to 0.5 micrometers; the direction of the width is perpendicular to the thickness direction of the substrate;
[0030] Preferably, the width of the groove is less than or equal to 3 micrometers;
[0031] Preferably, the width of the groove is greater than or equal to 0.8 micrometers and less than or equal to 3 micrometers;
[0032] Preferably, the width of the groove is greater than or equal to 1 micrometer and less than or equal to 3 micrometers.
[0033] In one embodiment, the first insulating layer is provided with an electrode contact hole, the first electrode extends into the electrode contact hole, and the depth of the electrode contact hole is less than or equal to the thickness of the first insulating layer;
[0034] Preferably, the depth of the electrode contact hole is less than the thickness of the first insulating layer and less than the depth of the groove;
[0035] Preferably, the groove is strip-shaped, the extension direction of the groove is perpendicular to the thickness direction of the substrate, and the width of the groove on the side away from the substrate is greater than the width on the side closer to the substrate.
[0036] In one embodiment, the display panel further includes a pixel definition layer, the pixel definition layer having a plurality of pixel openings corresponding to the first electrode, the pixel definition layer being disposed on one side surface of the substrate and the side of the first electrode facing away from the substrate, a portion of the first electrode being exposed within the pixel openings; the blocking structure is projected onto the substrate within the projection of the pixel definition layer onto the substrate.
[0037] In one embodiment, the display panel further includes an isolation structure disposed on the side of the pixel definition layer opposite to the substrate; the isolation structure defines a plurality of isolation openings communicating with the pixel openings.
[0038] In one embodiment, the isolation structure includes an isolation portion and a blocking portion. The isolation portion is disposed on the side of the pixel definition layer opposite to the substrate, and the blocking portion is disposed on the side of the isolation portion opposite to the substrate. The orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the blocking portion on the substrate.
[0039] Preferably, the material of the insulating part includes aluminum;
[0040] Preferably, the material of the blocking portion includes titanium;
[0041] Preferably, the isolation structure further includes a connecting portion disposed between the pixel definition layer and the isolation portion;
[0042] Preferably, the material of the connecting part includes molybdenum.
[0043] Another objective of this application is to provide a method for manufacturing a display panel, comprising:
[0044] A first insulating layer is fabricated, and a plurality of protruding first blocking blocks are fabricated on one side surface of the first insulating layer;
[0045] A conductive metal layer is deposited on one side of the first insulating layer and the first blocking block. The conductive metal layer is patterned by a wet etching process, and at least the portion of the conductive metal layer located between adjacent first blocking blocks is removed to obtain a plurality of first electrodes.
[0046] Another objective of this application is to provide a method for manufacturing a display panel, comprising:
[0047] A first insulating layer is fabricated, and multiple grooves are formed on one side surface of the first insulating layer;
[0048] A conductive metal material layer is deposited on the surface of the first insulating layer and in the groove, and the portion of the conductive metal material layer located in the groove forms a second blocking block;
[0049] The conductive metal material layer is patterned by a wet etching process, and at least the portion of the conductive metal material layer located between adjacent grooves is removed to obtain a plurality of first electrodes.
[0050] Another objective of this application is to provide a display device that includes a display panel as described in the above embodiments, or a display panel manufactured by the method described in the above embodiments.
[0051] The display panel, manufacturing method, and display device provided in this application have the following advantages:
[0052] The display panel provided in this application embodiment has a blocking structure that contacts the first electrode on the side of the first electrode near the substrate. The blocking structure can block the etching solution, reduce or even avoid the etching solution from eroding the surfaces of the first electrode and the first insulating layer that are close to each other. Thus, the blocking structure can improve or even avoid the undercut problem of the edge of the first electrode, thereby improving or even avoiding the problem of edge lifting and peeling of the first electrode, improving the structural stability of the pixel, and ensuring the pixel life and display effect. Attached Figure Description
[0053] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0054] Figure 1 This is a cross-sectional structural diagram of a conventional display panel;
[0055] Figure 2 This is a schematic diagram of the planar structure of the display panel provided in an embodiment of this application;
[0056] Figure 3 yes Figure 2 A schematic diagram of a cross-sectional structure along line AA in the middle;
[0057] Figure 4 yes Figure 3 The diagram shows the etching process of the etching solution in the display panel.
[0058] Figure 5 yes Figure 4 Enlarged view of point P in the middle;
[0059] Figure 6 yes Figure 2 Another cross-sectional structure diagram along line AA;
[0060] Figure 7 yes Figure 6 The diagram shows the etching process of the etching solution in the display panel.
[0061] Figure 8 yes Figure 6 The diagram shows the undercut of the display panel;
[0062] Figure 9 yes Figure 8 Enlarged view of point Q;
[0063] Figure 10 This is a cross-sectional structural diagram of the display panel provided in an embodiment of this application;
[0064] Figure 11 This is a flowchart illustrating one step of a method for manufacturing a display panel according to an embodiment of this application;
[0065] Figure 12 yes Figure 11 The structural diagram corresponding to step S11 in step S1 of the manufacturing method of the display panel shown;
[0066] Figure 13 yes Figure 11 The structural diagram corresponding to step S12 in step S1 of the manufacturing method of the display panel shown;
[0067] Figure 14 yes Figure 11 The structural diagram corresponding to step S13 in step S1 of the manufacturing method of the display panel shown;
[0068] Figure 15 yes Figure 11 The structural diagram corresponding to step S21 in step S2 of the manufacturing method of the display panel shown;
[0069] Figure 16 yes Figure 11 The structural diagram corresponding to step S22 in step S2 of the manufacturing method of the display panel shown;
[0070] Figure 17 yes Figure 11 The structural diagram corresponding to step S23 in step S2 of the manufacturing method of the display panel shown;
[0071] Figure 18 This is another flowchart of the manufacturing method of the display panel provided in the embodiments of this application;
[0072] Figure 19 yes Figure 18 The structural diagram corresponding to step S11 in the manufacturing method of the display panel shown;
[0073] Figure 20 yes Figure 18 The structural diagram corresponding to step S12 of step S1 in the manufacturing method of the display panel shown;
[0074] Figure 21 yes Figure 18 The structural diagram corresponding to step S13 of step S1 in the manufacturing method of the display panel shown.
[0075] Figure 22 yes Figure 18 The structural diagram corresponding to another step S11 in the manufacturing method of the display panel shown.
[0076] Figure 23 yes Figure 18 The structural diagram corresponding to step S12, another step in step S1 of the manufacturing method of the display panel shown.
[0077] Figure 24 yes Figure 18 The structural diagram corresponding to step S13 of step S1 in the manufacturing method of the display panel shown.
[0078] Figure 25 yes Figure 18 The structural diagram corresponding to step S21 in step S2 of the manufacturing method of the display panel shown;
[0079] Figure 26 yes Figure 18 The structural diagram corresponding to step S22 in step S2 of the manufacturing method of the display panel shown;
[0080] Figure 27 yes Figure 18 The structural diagram corresponding to step S3 in the manufacturing method of the display panel shown.
[0081] The markings in the diagram mean:
[0082] 1. 01-Substrate, 10-First insulating layer, 101-Electrode contact hole, 11-Groove, 15-Pixel area, 16-Non-pixel area, 17-Way trace layer, 18-Second insulating layer;
[0083] 2-Light-emitting device; 21, 021-First electrode; 22-Light-emitting functional layer; 23-Second electrode;
[0084] 3-pixel definition layer, 30-pixel aperture;
[0085] 4-Blocking structure, 210-Second blocking block, 12-First blocking block;
[0086] 5-Isolation structure, 51-Isolation part, 52-Blocking part;
[0087] 61-First photoresist layer, 62-Second photoresist layer, 63-Third photoresist layer, 64-Fourth photoresist layer, 601-Fully exposed area, 602-Half exposed area, 603-Unexposed area;
[0088] 65 - First insulating material layer; 66 - First electrode material layer;
[0089] 69 - First encapsulation layer;
[0090] 72 - First light mask, 701 - Transparent area, 702 - Semi-transparent area, 703 - Opaque area;
[0091] 073 - Etching barrier pattern, 73 - First etch barrier pattern, 731 - Thin area, 732 - Thick area, 74 - Second etch barrier pattern;
[0092] 8.08 - Bottom Cut;
[0093] 9-Etching solution. Detailed Implementation
[0094] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0095] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly or indirectly fixed to or set on that other component. When a component is referred to as "connected to" another component, it can be directly or indirectly connected to that other component. The terms "upper," "lower," "left," "right," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the purpose of description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this patent. The terms "first" and "second" are used only for the purpose of description and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features. "A plurality" means two or more, unless otherwise explicitly specified.
[0096] To illustrate the technical solutions described in this application, the following detailed description is provided in conjunction with specific accompanying drawings and embodiments.
[0097] Please see Figure 1 As shown, in the display panel 0100, the first electrode 021 of the light-emitting device is formed on one side of the substrate 01. The first electrode 021 is composed of a single layer of metal ( Figure 1 (Not shown) is obtained by patterning. When patterning the metal layer, etch barrier patterns 073 are arranged at intervals on the side surface of the metal layer away from the substrate 01. The part covered and protected by the etch barrier patterns 073 can be retained as the first electrode 021, while the part not covered by the etch barrier patterns 073 is removed by wet etching.
[0098] During wet etching, the etching solution penetrates between the surfaces of the first electrode 021 and the substrate 01, forming an undercut 08 at the edge of the first electrode 021 closest to the substrate 01. In subsequent processes, due to moisture and stress from the substrate 01, the edge of the first electrode 021 is prone to lifting, forming a pixel notch. In severe cases, the first electrode 021 may peel off entirely from the substrate 01, forming a dark pixel.
[0099] Please see Figure 2 , Figure 3 and Figure 6 As shown, this application embodiment provides a display panel 100.
[0100] Please see Figure 2 and Figure 10 As shown, the display panel 100 includes a substrate 1 and a plurality of light-emitting devices 2 disposed on one side of the substrate 1, the plurality of light-emitting devices 2 being arranged at intervals. See also... Figure 3 and Figure 6As shown, the substrate 1 includes a first insulating layer 10, and each light-emitting device 2 includes a first electrode 21. Multiple first electrodes 21 are spaced apart and arranged on one side surface of the first insulating layer 10; as... Figure 2 , Figure 3 and Figure 6 As shown, the display panel 100 also includes a plurality of blocking structures 4, each blocking structure 4 corresponding to a first electrode 21, disposed on the side of the first electrode 21 near the substrate 1, and in contact with the first electrode 21.
[0101] The first electrode 21 is made of a conductive metal material and is fabricated by patterning a conductive metal material layer. Specifically, the conductive metal material layer is patterned by wet etching to obtain multiple spaced first electrodes 21. During the wet etching process of the conductive metal material layer, since the blocking structure 4 is disposed on the side of the first electrode 21 near the substrate 1 and is in contact with the first electrode 21, it can block the etching solution 9. Please refer to [link to relevant documentation]. Figure 4 and Figure 7 As shown, the etching solution 9 reduces or even avoids erosion between the adjacent surfaces of the first electrode 21 and the first insulating layer 10. Therefore, the blocking structure 4 can improve or even avoid the undercutting problem at the edge of the first electrode 21, thereby improving or even avoiding the edge lifting and peeling problems of the first electrode 21, enhancing the structural stability of the pixel, and ensuring pixel lifespan and display effect.
[0102] Please refer to the following: Figure 2 and Figure 10 As shown, in one embodiment, the light-emitting device 2 further includes a light-emitting functional layer 22 and a second electrode 23, which are sequentially stacked on the side surface of the first electrode 21 facing away from the substrate 1. The first electrode 21 can be an anode, and the second electrode 23 can be a cathode.
[0103] Depending on the specific materials in the light-emitting functional layer 22, different light-emitting devices 2 emit different colors. For example... Figure 2 As shown, the multiple light-emitting devices 2 include multiple light-emitting devices of different colors, for example, Figure 2 As shown, it includes at least red (R) light-emitting devices, green (G) light-emitting devices, and blue (B) light-emitting devices. A pixel group is composed of at least one red (R) light-emitting device, at least one green (G) light-emitting device, and at least one blue (B) light-emitting device.
[0104] In one embodiment, the first insulating layer 10 described above is a planarization layer. Furthermore, please refer to [reference needed]. Figure 10 As shown, the substrate 1 also includes a plurality of wiring layers 17 and a plurality of second insulating layers 18, which are arranged in a cross-shaped manner to form a pixel driving circuit for driving the light-emitting device 2 to emit light.
[0105] The planarization layer may be made of organic materials. In one alternative embodiment, the planarization layer may be made of resin. The second insulating layer 18 may include organic or inorganic insulating materials, depending on the specific materials of the two wiring layers 17 it separates.
[0106] Please see Figure 10 As shown, in one embodiment, the display panel 100 further includes a pixel definition layer 3. The pixel definition layer 3 is disposed on one side surface of the first insulating layer 10 and on the side surface of the first electrode 21 opposite to the first insulating layer 10. The pixel definition layer 3 is provided with a plurality of pixel openings 30. A portion of the first electrode 21 is exposed in the pixel openings 30. The light-emitting functional layer 22 is disposed in the pixel openings 30 and is located on the side surface of the first electrode 21 opposite to the substrate 1 and on the side surface of the pixel definition layer 3 opposite to the substrate 1. The second electrode 23 is disposed on the side surface of the light-emitting functional layer 22 and the pixel definition layer 3 opposite to the substrate 1.
[0107] Please continue reading. Figure 3 and Figure 6 As shown, in one embodiment, the area corresponding to the pixel opening 30 of the substrate 1 is the pixel area 15, and the area between the pixel areas 15 is the non-pixel area 16. Alternatively, the area corresponding to the orthographic projection of the pixel opening 30 on the substrate 1 is the pixel area 15, and the area covered by the pixel definition layer 3 is the non-pixel area 16.
[0108] Please see Figure 3 and Figure 6 As shown, the orthographic projection of the blocking structure 4 on the substrate 1 is within the orthographic projection of the pixel definition layer 3 on the substrate 1. In other words, the blocking structure 4 is not exposed in the pixel opening 30, but is covered by the pixel definition layer 3 and located in the non-pixel area 16.
[0109] Since the blocking structure 4 does not fall into the pixel area 15, it can avoid affecting the light emission of the light-emitting device 2.
[0110] Please see Figure 3 , Figure 4 , Figures 6 to 8 As shown, in one embodiment, the first insulating layer 10 has a through electrode contact hole 101, and the first electrode 21 extends into the electrode contact hole 101 and forms a connection with the wiring layer 17. In some embodiments, the thickness of the portion of the first insulating layer 10 with the electrode contact hole 101 is less than or equal to the thickness of other locations, that is, the depth of the electrode contact hole 101 is less than or equal to the thickness of the first insulating layer 10. In some optional embodiments, the depth of the electrode contact hole 101 is less than the thickness of the first insulating layer 10.
[0111] Please continue reading. Figure 10As shown, in one embodiment, the display panel 100 further includes an isolation structure 5, which is disposed on the side of the pixel definition layer 3 facing away from the substrate 1; the isolation structure 5 defines a plurality of isolation openings (not shown) communicating with the pixel openings 30. The isolation structure 5 is used to define and space adjacent light-emitting devices 2 during the fabrication of the light-emitting functional layer 22 and the second electrode 23.
[0112] In one embodiment, please refer to Figure 10 As shown, the isolation structure 5 includes an isolation portion 51 and a blocking portion 52. The isolation portion 51 is disposed on the side of the pixel definition layer 3 facing away from the substrate 1, and the blocking portion 52 is disposed on the side of the isolation portion 51 facing away from the substrate 1. The orthographic projection of the isolation portion 51 on the substrate 1 is located within the orthographic projection of the blocking portion 52 on the substrate 1.
[0113] In one embodiment, the material of the isolation portion 51 includes a conductive metal material, specifically, the material of the isolation portion 51 includes aluminum. Furthermore, as... Figure 10 As shown, the edge of the second electrode 23 overlaps with the isolation portion 51, and multiple second electrodes 23 are electrically connected through the isolation portion 51 to maintain the same potential.
[0114] In one embodiment, the material of the blocking portion 52 includes a conductive metal material, specifically, the material of the blocking portion 52 includes titanium.
[0115] In one embodiment, the isolation structure 5 further includes a connecting portion (not shown) disposed between the pixel definition layer 3 and the isolation portion 51. The connecting portion is used to enhance the connection strength between the isolation portion 51 and the first insulating layer 10.
[0116] In one embodiment, the material of the connector includes molybdenum.
[0117] Furthermore, the composition and preparation of the isolation structure 5 are specified in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, and CN11797. Further descriptions can be found in CN1755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, CN117396039A, CN116669480A, CN116600606A, and CN117500332A, the contents of which are incorporated herein by reference.
[0118] Please see Figure 10As shown, in one embodiment, the display panel 100 further includes a first encapsulation layer 69, which is disposed on the side of the second electrode 23 facing away from the substrate 1, as well as on the side surface of the isolation structure 5 and the side surface of the isolation structure 5 facing away from the substrate 1. The first encapsulation layer 69 encloses the light-emitting device 2 within the pixel opening 30, preventing the light-emitting device 2 from coming into contact with water and oxygen from the outside world and other film structures.
[0119] On the side of the isolation structure 5 away from the substrate 1, the first encapsulation layer 69 is spaced a certain distance from the surface of the blocking portion 52.
[0120] The material of the first encapsulation layer 69 may include inorganic materials.
[0121] In some other embodiments, the display panel 100 may further include a second encapsulation layer (not shown) disposed on the side of the first encapsulation layer 69 opposite to the substrate 1, and a third encapsulation layer (not shown) disposed on the side of the second encapsulation layer opposite to the substrate 1. The material of the second encapsulation layer may include an organic material, and the material of the third encapsulation layer may include an inorganic material.
[0122] Please see Figure 2 As shown, the blocking structure 4 is arranged in a closed ring at the edge of the first electrode 21. That is, the blocking structure 4 is continuously arranged around the pixel area 15. The risk of edge lifting and peeling at any point in the circumference of the first electrode 21 can be reduced.
[0123] In other embodiments, depending on specific needs, the blocking structure 4 may be arranged in a non-closed manner at the edge of the first electrode 21. For example, it may have a notch in the circumferential direction, or multiple notches arranged intermittently. In an alternative embodiment, based on the water flow direction of wet etching, the blocking structure 4 may not be necessary in areas where the undercut problem is relatively minor.
[0124] Next, we will introduce the specific structural features of the blocking structure 4.
[0125] In one embodiment, please refer to Figure 3 , Figures 4 to 5 As shown, the blocking structure 4 includes a first blocking block 12, which protrudes from one side surface of the first insulating layer 10, and the edge of the first electrode 21 is located on the side of the first blocking block 12 away from the substrate 1.
[0126] In one embodiment, the etching rate of the material of the first blocking block 12 is less than the etching rate of the material of the first electrode 21.
[0127] The first blocking block 12 protrudes from the surface of the first insulating layer 10 and has a low etching rate, even not reacting with the etching solution 9. During the wet etching process, the blocking structure 4 of the first blocking block 12 can prevent the etching solution 9 from eroding the pixel area 15, thereby reducing the undercut problem of the edge of the first electrode 21 facing the substrate 1, and even preventing the formation of undercut 8 on the edge of the first electrode 21 facing the substrate 1.
[0128] The material of the first blocking block 12 may include organic materials, inorganic materials, or a combination of organic and inorganic materials.
[0129] In one embodiment, the material of the first blocking block 12 is the same as the material of the first insulating layer 10. For example, the material of the first blocking block 12 includes an organic insulating material. Alternatively, the material of the first blocking block 12 includes a resin material.
[0130] In one embodiment, the first blocking block 12 and the first insulating layer 10 are formed through the same photomask process, that is, the first blocking block 12 and the first insulating layer 10 are an integral structure. Specifically, a first insulating material layer 65 is formed on one side of the wiring layer 17. This organic insulating material layer is exposed and etched through a halftone mask process or a grayscale mask process to obtain a first insulating layer 10 with multiple parts of different heights. The part of the first insulating layer 10 with the larger height can serve as the first blocking block 12 (the specific manufacturing method is described below and attached). Figure 12 and Figure 13 ).
[0131] In some other embodiments, the material of the first blocking block 12 is different from the material of the first insulating layer 10. For example, the material of the first blocking block 12 includes an inorganic insulating material. Specifically, an organic insulating material layer is formed on one side of the wiring layer 17, and an inorganic insulating material layer is formed on the side of the organic insulating material layer opposite to the wiring layer 17. The inorganic insulating material layer and the organic insulating material layer are exposed by a halftone mask process or a grayscale mask process and then etched to obtain the first insulating layer 10 and the first blocking block 12 located on the side opposite to the substrate 1.
[0132] In many other embodiments, the first blocking block 12 may include other materials or be manufactured in other ways.
[0133] Please see Figure 3 and Figure 5 As shown, in the thickness direction of the substrate 1, the first blocking block 12 should have a certain height to block the etchant 9 between the etch blocking patterns in the height direction.
[0134] In one embodiment, the height h of the first blocking block 12 is greater than or equal to the thickness H of the first electrode 21. This is taken into consideration that, in order to ensure that the etching solution 9 can effectively etch the first electrode material layer 66 (see the description below and accompanying drawings), Figure 16 Effective etching is performed, and the depth of the etching solution 9 is typically set to be close to the thickness H of the first electrode material layer 66. Therefore, the height h of the first blocking block 12 is greater than or equal to the thickness H of the first electrode 21, ensuring that the height h of the first blocking block 12 is greater than or equal to the depth of the etching solution 9 used. Please refer to [reference needed]. Figure 4 and Figure 5 As shown.
[0135] The thickness H of the first electrode 21 is 1.2 micrometers to 1.8 micrometers.
[0136] In one embodiment, the height h of the first blocking block 12 is 1.2 micrometers to 2 micrometers. The purpose of this setting is that, on the one hand, the height h of the first blocking block 12 is sufficient to effectively block the etching solution 9, and on the other hand, the height h of the first blocking block 12 does not need to be set too large, so as to ensure that the step difference of the surface of the first electrode 21 and the pixel definition layer 3 facing away from the substrate 1 is not too large, thus ensuring the structural reliability of the first electrode 21.
[0137] In one alternative embodiment, the height h of the first blocking block 12 is 1.2 micrometers to 1.8 micrometers.
[0138] In one alternative embodiment, the height h of the first blocking block 12 is 1.5 micrometers to 1.8 micrometers.
[0139] Alternatively, the height h of the first blocking block 12 is 1.6 micrometers to 1.8 micrometers.
[0140] In one specific embodiment, the height h of the first blocking block 12 is 1.2 micrometers, 1.25 micrometers, 1.3 micrometers, 1.35 micrometers, 1.4 micrometers, 1.45 micrometers, 1.5 micrometers, 1.55 micrometers, 1.6 micrometers, 1.65 micrometers, 1.7 micrometers, 1.75 micrometers, 1.8 micrometers, 1.85 micrometers, 1.9 micrometers, 1.95 micrometers, or 2 micrometers.
[0141] Please see Figure 3 and Figure 5 As shown, in one embodiment, the width L of the first blocking block 12 is greater than or equal to 0.5 micrometers. The direction of the width is perpendicular to the thickness direction of the substrate 1.
[0142] The purpose of this design is to ensure that the first blocking block 12 can be formed and is easy to manufacture, and to reduce the risk that the etching solution 9 will infiltrate between the first electrode 21 and the first insulating layer 10 due to a break in the first blocking block 12, especially for the first blocking block 12 which needs to be arranged in a closed ring.
[0143] It should be noted that there are multiple directions perpendicular to the thickness direction of the substrate 1 on one side surface of the first insulating layer 10. The pixel area 15 can also have various shapes, such as rectangular, circular, elliptical, or others. Therefore, the width direction is not uniquely determined. For example, for a rectangular pixel area 15, the blocking structure 4 is an inner and outer rectangular shape, and the width direction can be perpendicular to either the long side or the short side of the pixel area 15; for a circular pixel area 15, the blocking structure 4 is an inner and outer circular shape, and the width direction can be its radial direction. Examples of other pixel area shapes 15 will not be elaborated further.
[0144] In one embodiment, the first blocking block 12 is strip-shaped and extends along the edge of the first electrode 21. The first blocking block 12 can be strip-shaped along the edge of the first electrode 21, such as a straight strip on one side of the first electrode 21, or a bent strip on multiple sides of the first electrode 21. In an optional embodiment, the first blocking block 12 is annular, specifically a closed annular ring or a non-closed annular ring.
[0145] On the surface of the first insulating layer 10 of the substrate 1, the extension direction of the first blocking block 12 is perpendicular to the thickness direction of the substrate 1.
[0146] In one embodiment, the first blocking block 12 is strip-shaped, and the width L of the first blocking block 12 is greater than or equal to 0.5 micrometers and less than or equal to 5 micrometers. The purpose of this setting is to ensure that the first blocking block 12 can be manufactured without occupying too much of the non-pixel area 16, thereby reducing the impact of the first blocking block 12 on the fabrication of the first electrode 21, the pixel definition layer 3, and the isolation structure 5.
[0147] In one embodiment, the width L of the first blocking block 12 is greater than or equal to 0.5 micrometers and less than or equal to 3 micrometers.
[0148] In one embodiment, the width L of the first blocking block 12 is greater than or equal to 0.8 micrometers and less than or equal to 3 micrometers.
[0149] In one embodiment, the width L of the first blocking block 12 is greater than or equal to 1 micrometer and less than or equal to 3 micrometers.
[0150] In one embodiment, the width L of the first blocking block 12 is greater than or equal to 1 micrometer and less than or equal to 2.5 micrometers.
[0151] In one embodiment, the width L of the first blocking block 12 is greater than or equal to 1 micrometer and less than or equal to 2 micrometers.
[0152] In one specific embodiment, the width L of the first blocking block 12 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1 micrometer, 1.2 micrometers, 1.5 micrometers, 1.7 micrometers, 1.8 micrometers, 2 micrometers, 2.5 micrometers, 3 micrometers, 3.5 micrometers, 4 micrometers, 4.5 micrometers, or 5 micrometers.
[0153] Please see Figures 6 to 9 As shown, in one embodiment, the blocking structure 4 includes a second blocking block 210; a groove 11 is provided on one side surface of the first insulating layer 10, and the second blocking block 210 is disposed on the side surface of the first electrode 21 facing the substrate 1 and located in the groove 11.
[0154] The second blocking block 210 is located in the groove 11 on the surface of the first insulating layer 10, and the second blocking block 210 can react with the etching solution 9 and be etched.
[0155] Please refer to the following: Figure 8 and Figure 9 As shown, in this embodiment, the second blocking block 210 serves as a sacrificial structure to react with and be etched by the etchant 9 during the wet etching process. The undercut 8 can be formed inside the second blocking block 210 or between the second blocking block 210 and the inner wall of the groove 11, thereby reducing or even avoiding the possibility that the etchant 9 will further react with the surface of the first electrode 21 facing the substrate 1.
[0156] In one embodiment, the material of the second blocking block 210 is the same as the material of the first electrode 21. Further, the second blocking block 210 and the first electrode 21 are formed using the same photomask process. Specifically, a groove 11 surrounding the pixel region 15 is formed on one side surface of the first insulating layer 10, and a first electrode material layer 66 is deposited on one side surface of the first insulating layer 10. At this time, the material of the first electrode 21 is simultaneously deposited and filled within the groove 11. The first electrode material layer 66 is patterned, and the portion located between adjacent grooves 11 is removed to obtain the first electrode 21 and the second blocking block 210 filled within the groove 11 (the specific fabrication method is described below and attached). Figure 26 and attached Figure 27 ).
[0157] In this embodiment, the second blocking block 210 is made of the same material as the first electrode 21, and both are formed through the same photomask process; that is, the second blocking block 210 and the first electrode 21 are an integral structure. This results in no interface between the first electrode 21 and the second blocking block 210. Therefore, the second blocking block 210 located in the groove 11 also increases the connection strength between the first electrode 21 and the first insulating layer 10. Even if the second blocking block 210 is undercut, the remaining second blocking block 210 reduces the risk of edge warping of the first electrode 21.
[0158] In other embodiments, the material of the second blocking block 210 may be different from the material of the first electrode 21. For example, a groove 11 surrounding the pixel region 15 is formed on one side surface of the first insulating layer 10, and a blocking metal material layer (not shown) and a first electrode material layer 66 are deposited on the side surface of the first insulating layer 10 facing away from the driving substrate 1. In this case, the blocking metal material is simultaneously deposited and filled in the groove 11 (a portion of the blocking metal material layer is also present on the surface of the first insulating layer 10), and the first electrode material layer 66 is located on the side surface of the blocking metal material layer facing away from the substrate 1. The blocking metal material layer and the first electrode material layer 66 are simultaneously patterned, and the portion located between adjacent grooves 11 is removed to obtain the first electrode 21 and the second blocking block 210 filled in the groove 11. In this case, the first electrode 21 may simultaneously include a portion of the blocking metal material and a portion of the first electrode material stacked together.
[0159] Please see Figure 6 and Figure 9 As shown, in one embodiment, the depth t of the groove 11 in the thickness direction of the substrate 1 is greater than or equal to 1 micrometer, and the height of the second blocking block 210 is greater than or equal to 1 micrometer. The greater the depth t of the groove 11 and the greater the height of the second blocking block 210, the greater the consumption of the etching solution 9, and thus the more significant the improvement in the undercut problem of the first electrode 21.
[0160] Please see Figure 9 As shown, the depth t of the groove 11 is less than or equal to the thickness T of the first insulating layer 10, and the height of the second blocking block 210 is less than or equal to the thickness T of the first insulating layer 10. The purpose of this arrangement is that the depth t of the groove 11 will not exceed the thickness of the first insulating layer 10. In other words, the groove 11 is only provided in the first insulating layer 10 and not in other layers of the first insulating layer 10 facing away from the first electrode 21. Therefore, without adding process steps, the groove 11 can be formed during the patterning process of the first insulating layer 10.
[0161] In one optional embodiment, the depth t of the groove 11 is equal to the thickness T of the first insulating layer 10, and the height of the second blocking block 210 is equal to the thickness T of the first insulating layer 10. That is, the groove 11 penetrates exactly through the first insulating layer 10. The purpose of this arrangement is to ensure compatibility with existing processes.
[0162] Please refer to the following: Figures 6 to 8 As shown, the electrode contact hole 101 penetrating the first insulating layer 10 is used at least to form an electrical connection between the first electrode 21 and other wiring layers 17. During the fabrication of the first insulating layer 10, at locations such as the edge of the display panel 100 and / or the edge of the large board, the first insulating layer 10 is entirely removed in the thickness direction. The thickness of the first insulating layer 10 is slightly smaller at the location corresponding to the wiring layer 17. At this time, the edges of the display panel 100 and / or the edge of the large board, the electrode contact hole 101, and the groove 11 can be covered by the same photomask. (Please refer to the reference) Figures 22 to 24 The electrode is fabricated by removing all of the material in the thickness direction (as shown). The depth of the electrode contact hole 101 is different from the depth t of the groove 11, but both penetrate the first insulating layer 10.
[0163] In this way, the patterning process of the first insulating layer 10 does not require halftone masking or grayscale processes, which helps to simplify the production process and reduce production costs.
[0164] In other alternative embodiments, the groove 11 can be fabricated via a grayscale mask or a halftone mask, and its depth t can be less than the thickness of the first insulating layer 10 (see reference). Figure 20 and Figure 21 (As shown).
[0165] In one embodiment, the thickness T of the first insulating layer 10 is 1.8 micrometers to 2.5 micrometers.
[0166] In one specific embodiment, the depth t of the groove 11 is 1 micrometer, 1.05 micrometer, 1.1 micrometer, 1.15 micrometer, 1.2 micrometer, 1.25 micrometer, 1.3 micrometer, 1.35 micrometer, 1.4 micrometer, 1.45 micrometer, 1.5 micrometer, 1.55 micrometer, 1.6 micrometer, 1.65 micrometer, 1.7 micrometer, 1.75 micrometer, 1.8 micrometer, 1.85 micrometer, 1.9 micrometer, 1.95 micrometer, 2 micrometer, 2.05 micrometer, 2.1 micrometer, 2.15 micrometer, 2.2 micrometer, 2.25 micrometer, 2.3 micrometer, 2.35 micrometer, 2.4 micrometer, 2.45 micrometer, 2.5 micrometer, etc.
[0167] In one specific embodiment, the height of the second blocking block 210 is 1 micrometer, 1.05 micrometer, 1.1 micrometer, 1.15 micrometer, 1.2 micrometer, 1.25 micrometer, 1.3 micrometer, 1.35 micrometer, 1.4 micrometer, 1.45 micrometer, 1.5 micrometer, 1.55 micrometer, 1.6 micrometer, 1.65 micrometer, 1.7 micrometer, 1.75 micrometer, 1.8 micrometer, 1.85 micrometer, 1.9 micrometer, 1.95 micrometer, 2 micrometer, 2.05 micrometer, 2.1 micrometer, 2.15 micrometer, 2.2 micrometer, 2.25 micrometer, 2.3 micrometer, 2.35 micrometer, 2.4 micrometer, 2.45 micrometer, 2.5 micrometer, etc.
[0168] In one embodiment, the groove 11 is strip-shaped and extends along the edge of the first electrode 21. The groove 11 may be strip-shaped along the edge of the first electrode 21, such as a straight strip on one side of the first electrode 21, or a bent strip on multiple sides of the groove 11. In an optional embodiment, the groove 11 is annular, specifically a closed annulus or a non-closed annulus.
[0169] On the surface of the first insulating layer 10 of the substrate 1, the groove 11 extends in a direction perpendicular to the thickness direction of the substrate 1.
[0170] Correspondingly, the second blocking block 210 is strip-shaped and extends along the edge of the first electrode 21. The second blocking block 210 can be strip-shaped along the edge of the first electrode 21, such as a straight strip on one side of the first electrode 21, or a bent strip on multiple sides of the groove 11. In an optional embodiment, the second blocking block 210 is annular, specifically a closed annular ring or a non-closed annular ring.
[0171] On the surface of the first insulating layer 10 of the substrate 1, the extension direction of the second blocking block 210 is perpendicular to the thickness direction of the substrate 1.
[0172] Please continue reading. Figure 6 and Figure 9 As shown, the width L' of the side of the groove 11 facing away from the substrate 1 is greater than or equal to 500 nanometers; the width of the second blocking block 210 facing away from the substrate 1 is greater than or equal to 500 nanometers. During the research and development process, those skilled in the art discovered that the width d of the undercut 8 formed by the edge of the first electrode 21 is approximately 400 to 500 nanometers. Therefore, the width L' of the groove 11 facing away from the substrate 1 is greater than or equal to 500 nanometers, which can essentially ensure that during wet etching, the second blocking block 210 forms an undercut 8 precisely in the width direction, preventing the etching solution 9 from further eroding the surface of the first electrode 21 facing the substrate 1.
[0173] In one optional embodiment, the width L' of the side of the groove 11 facing away from the substrate 1 is greater than or equal to 600 nanometers; the width of the second blocking block 210 facing away from the substrate 1 is also greater than or equal to 600 nanometers. This arrangement aims to ensure that, with the undercut 8 formed at a portion of the second blocking block 210, breaking the second blocking block 210 along the thickness direction of the substrate 1 will not result in the second blocking block 210 breaking into two parts, but rather maintaining it as a single unit. This also prevents the etching solution 9 from eroding the surface of the first electrode 21 facing the substrate 1, and maintains the connection between the second blocking block 210 and the inner wall of the groove 11, as well as the connection between the first electrode 21 and the inner wall of the groove 11.
[0174] like Figure 9 As shown, the width L' of the groove 11 on the side facing away from the substrate 1 is greater than the width of the side facing closer to the substrate 1. This is determined by the etching process of the first insulating layer 10. The width of the second blocking block 210 on the side facing away from the substrate 1 is greater than the width of the side facing closer to the substrate 1.
[0175] Alternatively, the width L' of the groove 11 on the side opposite to the substrate 1 is greater than or equal to 800 nanometers.
[0176] Alternatively, the width L' of the groove 11 on the side opposite to the substrate 1 is greater than or equal to 1 micrometer.
[0177] Furthermore, the width L' of the side of the groove 11 facing away from the substrate 1 is less than or equal to 3 micrometers. The purpose of this setting is to avoid the formation of obvious steps or depressions on the surface of the first electrode 21, pixel definition layer 3, etc., facing away from the substrate 1, thus ensuring the fabrication and function of the isolation structure 5.
[0178] In one specific embodiment, the width L' of the side of the groove 11 facing away from the substrate 1 is 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1 μm, 1.05 μm, 1.1 μm, 1.15 μm, 1.2 μm, 1.25 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, 2.0 μm, 2.1 μm, 2.2 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.8 μm, or 3.0 μm.
[0179] In one specific embodiment, the width of the second blocking block 210 on the side facing away from the substrate 1 is 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1 μm, 1.05 μm, 1.1 μm, 1.15 μm, 1.2 μm, 1.25 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, 2.0 μm, 2.1 μm, 2.2 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.8 μm, or 3.0 μm.
[0180] Next, please refer to Figures 11 to 17 As shown in the embodiments of this application, a method for manufacturing a display panel is also provided, which includes:
[0181] Step S1: Fabricate a first insulating layer 10 and fabricate a plurality of protruding first blocking blocks 12 on one side surface of the first insulating layer 10;
[0182] The first blocking block 12 can be a closed ring or a non-closed ring.
[0183] Step S2: A conductive metal layer is deposited on one side surface of the first insulating layer 10 and the first blocking block 12. The conductive metal layer is patterned, and at least the portion of the conductive metal layer located between adjacent first blocking blocks 12 is removed to obtain a plurality of spaced first electrodes 21.
[0184] The edge of the first electrode 21 is located on the side of the first blocking block 12 that is away from the first insulating layer 10.
[0185] In one embodiment, please refer to Figures 12 to 14 As shown, step S1 specifically includes:
[0186] Step S11, please refer to Figure 12 As shown, a first insulating material layer 65 is provided, and a first photoresist material layer 61 is formed on one side surface of the first insulating material layer 65; a first photomask 72 is provided, which is a halftone mask or a grayscale mask, to expose the first photoresist material layer 61.
[0187] The first light cover 72 includes a light-transmitting area 701, a semi-light-transmitting area 702, and an opaque area 703.
[0188] The first photoresist layer 61 after exposure includes a fully exposed area 601, a half-exposed area 602, and an unexposed area 603.
[0189] Step S12, please refer to Figure 13As shown, the first photoresist material layer 61 after exposure is developed to obtain a first etch block pattern 73 with a thick area 732 and a thin area 731.
[0190] Taking the first photoresist layer 61 as a negative photoresist material as an example, the thick area 732 of the first photoresist layer 61 corresponds to the light-transmitting area 701 of the first photomask 72, the thin area 731 of the first photoresist layer 61 corresponds to the semi-transparent area 702 of the first photomask 72, and the part of the first photoresist layer 61 corresponding to the opaque area 703 of the first photomask 72 is removed by development.
[0191] Step S13, please refer to Figure 14 As shown, the first insulating material layer 65 is etched using the first etch blocking pattern 73 to obtain the first insulating layer 10 corresponding to the thin area 731 and the thick area 732, and the first blocking block 12 located on one side surface of the first insulating material layer 65 corresponding to the thick area 732.
[0192] The portion of the first insulating material layer 65 corresponding to the unexposed area 603 of the first photoresist material layer 61 forms the electrode contact hole 101 of the first insulating layer 10.
[0193] Please see Figures 15 to 17 As shown, step S2 specifically includes:
[0194] Step S21, please refer to Figure 15 As shown, a first electrode material layer 66 is deposited on one side surface of the first insulating layer 10 and on the side surface of the first blocking block 12 opposite to the first insulating layer 10, and a second photoresist material layer 62 is deposited on the side surface of the first electrode material layer 66 opposite to the first insulating layer 10.
[0195] Step S22, please refer to Figure 16 As shown, a second photomask (not shown) is provided to expose the second photoresist material layer 62, resulting in a second etch-block pattern 74 with multiple intervals. The second etch-block pattern 74 corresponds to the area of the first electrode 21 to be obtained.
[0196] Step S23, please refer to Figure 17 As shown, the first electrode material layer 66 is wet-etched using the second etch blocking pattern 74 as the blocking pattern to remove the portion not covered by the second etch blocking pattern 74, resulting in a plurality of spaced first electrodes 21.
[0197] Please see Figure 18 As shown in the embodiments of this application, a method for manufacturing a display panel is also provided, which includes:
[0198] Step S1: Fabricate a first insulating layer 10 and create a plurality of grooves 11 on one side surface of the first insulating layer 10;
[0199] The groove 11 can be a closed ring or a non-closed ring.
[0200] Step S2, depositing conductive metal material on the surface of the first insulating layer 10 and within the groove 11, the portion of the conductive metal material layer located within the groove 11 forming a second blocking block 210; and
[0201] Step S3: Pattern the conductive metal material layer using a wet etching process, removing at least the portion of the conductive metal material layer located between adjacent grooves 11, to obtain multiple first electrodes 21.
[0202] In step S2, the conductive metal material layer can be made of a single material, such as the first electrode material layer 66, or it can be a stack of the first electrode material layer 66 and other metal materials (blocking metal material layers). Optionally, the first electrode material layer 66 is located on the side of the other metal materials facing away from the substrate 1. Here, the first electrode material layer 66 is used as an example for illustration.
[0203] Please see Figures 19 to 21 ,or Figures 22 to 24 As shown, in one embodiment, step S1 specifically includes:
[0204] Step S11, please refer to Figure 19 or Figure 22 As shown, a first insulating material layer 65 is provided, and a third photoresist material layer 63 is formed on one side of the first insulating material layer 65; a first photomask 72 is provided to expose the third photoresist material layer 63.
[0205] Step S12, please refer to Figure 20 or Figure 23 As shown, the third photoresist material layer 63 after exposure is developed to obtain the first etch blocking pattern 73.
[0206] Step S13, please refer to Figure 21 or Figure 24 As shown, the first insulating material layer 65 is etched using the first etch barrier pattern 73 to obtain the first insulating layer 10 and the groove 11 located on one side of its surface.
[0207] Specifically, please refer to Figures 19 to 21 As shown, in one embodiment, step S1 specifically includes:
[0208] Step S11, please refer to Figure 19 As shown, a first insulating material layer 65 is provided, a third photoresist material layer 63 is formed on one side of the first insulating material layer 65, a first photomask 72 is provided, the first photomask 72 is a halftone photomask or a grayscale photomask, and the third photoresist material layer 63 is exposed.
[0209] The first light cover 72 includes a light-transmitting area 701, a semi-light-transmitting area 702, and an opaque area 703.
[0210] The third photoresist layer 63 after exposure includes a fully exposed area 601, a half-exposed area 602, and an unexposed area 603.
[0211] Step S12, please refer to Figure 20 As shown, the third photoresist material layer 63 after exposure is developed to obtain a first etch block pattern 73 with a thick area 732 and a thin area 731.
[0212] Taking the third photoresist layer 63 as a negative photoresist material as an example, the thick area 732 of the third photoresist layer 63 corresponds to the light-transmitting area 701 of the first photomask 72, the thin area 731 of the third photoresist layer 63 corresponds to the semi-transparent area 702 of the first photomask 72, and the part of the third photoresist layer 63 corresponding to the opaque area 703 of the first photomask 72 is removed by development.
[0213] Step S13, please refer to Figure 21 As shown, the first insulating material layer 65 is etched using the first etch blocking pattern 73 to obtain the first insulating layer 10 with corresponding thin area 731 and thick area 732, and the groove 11 located on one side surface of the first insulating layer 10 corresponding to the thin area 731; the depth of the groove 11 is less than the thickness of the first insulating layer 10.
[0214] The portion of the first insulating layer 10 corresponding to the unexposed area 603 of the third photoresist material layer 63 forms the electrode contact hole 101 of the first insulating layer 10.
[0215] Specifically, please refer to Figures 22 to 24 As shown, in one embodiment, step S2 specifically includes:
[0216] Step S11, please refer to Figure 22 As shown, a first insulating material layer 65 is provided, a third photoresist material layer 63 is formed on one side of the first insulating material layer 65, a first photomask 72 is provided, and the third photoresist material layer 63 is exposed.
[0217] The first light cover 72 includes a light-transmitting area 701 and an opaque area 703.
[0218] The third photoresist layer 63 after exposure includes a fully exposed area 601 and an unexposed area 603.
[0219] Step S12, please refer to Figure 23 As shown, the third photoresist material layer 63 after exposure is developed to obtain a first etch block pattern 73 with a uniform thickness.
[0220] Step S13, please refer to Figure 24As shown, the first insulating material layer 65 is etched using the first etch barrier pattern 73 to obtain the first insulating layer 10 corresponding to the first etch barrier pattern 73, and the groove 11 penetrating the first insulating layer 10.
[0221] In addition, electrode contact holes 101 are formed in the first insulating layer 10.
[0222] Please see Figure 25 , Figure 26 and Figure 27 As shown, in one embodiment, step S2 specifically includes:
[0223] Step S21, please refer to Figure 25 As shown, a first electrode material layer 66 is deposited on one side surface of the first insulating layer 10, and a fourth photoresist material layer 64 is deposited on the side surface of the first electrode material layer 66 opposite to the first insulating layer 10; a second photomask (not shown) is provided to expose the fourth photoresist material layer 64.
[0224] Step S22, please refer to Figure 26 As shown, the exposed fourth photoresist layer 64 is developed to obtain a second etch block pattern 74 with multiple intervals. The second etch block pattern 74 corresponds to the area of the first electrode 21 to be obtained.
[0225] Please see Figure 27 As shown, step S3 includes: using the second etch blocking pattern 74 as the blocking pattern, performing wet etching on the first electrode material layer 66 to remove the portion not covered by the second etch blocking pattern 74, thereby obtaining a plurality of spaced first electrodes 21.
[0226] Finally, this application also provides a display device (not shown), which includes the display panel 100 as described in the above embodiments, or the display panel 100 manufactured by the manufacturing method of the display panel as described in the above embodiments.
[0227] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A display panel, characterized in that, include: The substrate includes a first insulating layer; Multiple first electrodes are arranged at intervals on one side of the first insulating layer; as well as Multiple blocking structures are disposed at the edge of the first electrode and on the side of the first electrode close to the substrate, and are in contact with the first electrode.
2. The display panel as described in claim 1, characterized in that, The blocking structure includes a first blocking block, which protrudes from one side surface of the first insulating layer, and the edge of the first electrode is located on the side of the first blocking block away from the substrate. Preferably, the material of the first blocking block includes organic materials; Preferably, the first blocking block and the first insulating layer are an integral structure; Preferably, the first blocking block is strip-shaped and extends along the edge of the first electrode; Preferably, the first blocking block is ring-shaped.
3. The display panel as described in claim 2, characterized in that, The height of the first blocking block is greater than or equal to the thickness of the first electrode; Preferably, in the thickness direction of the substrate, the height of the first blocking block is 1200 nm to 1800 nm. Preferably, the height of the first blocking block is 1500 nm to 1800 nm.
4. The display panel as described in claim 2, characterized in that, The first blocking block is strip-shaped, and its width is greater than or equal to 0.5 micrometers; the extending direction of the first blocking block is perpendicular to the thickness direction of the substrate. Preferably, the width of the first blocking block is greater than or equal to 0.5 micrometers and less than or equal to 5 micrometers; Preferably, the width of the first blocking block is greater than or equal to 0.5 micrometers and less than or equal to 3 micrometers; Preferably, the width of the first blocking block is greater than or equal to 1 micrometer and less than or equal to 3 micrometers.
5. The display panel as described in claim 1, characterized in that, The blocking structure includes a second blocking block; a groove is provided on one side surface of the first insulating layer, and the second blocking block is located in the groove; Preferably, the second blocking block and the first electrode are an integral structure; Preferably, the groove is strip-shaped and extends along the edge of the first electrode; or, the second blocking block is strip-shaped and extends along the edge of the first electrode. Preferably, the groove or the second blocking block is annular.
6. The display panel as described in claim 5, characterized in that, In the thickness direction of the substrate, the depth of the groove is less than or equal to the thickness of the first insulating layer; Preferably, the depth of the groove is equal to the thickness of the first insulating layer; Preferably, the depth of the groove is 1 micrometer to 2.5 micrometers.
7. The display panel as described in claim 5, characterized in that, The width of the groove is greater than or equal to 0.5 micrometers; the direction of the width is perpendicular to the thickness direction of the substrate. Preferably, the width of the groove is less than or equal to 3 micrometers; Preferably, the width of the groove is greater than or equal to 0.8 micrometers and less than or equal to 3 micrometers; Preferably, the width of the groove is greater than or equal to 1 micrometer and less than or equal to 3 micrometers.
8. The display panel as described in claim 5, characterized in that, The first insulating layer is provided with an electrode contact hole, the first electrode extends into the electrode contact hole, and the depth of the electrode contact hole is less than or equal to the thickness of the first insulating layer; Preferably, the depth of the electrode contact hole is less than the thickness of the first insulating layer and less than the depth of the groove.
9. The display panel as described in any one of claims 1 to 8, characterized in that, The display panel further includes a pixel definition layer, which has a plurality of pixel openings corresponding to the first electrode. The pixel definition layer is disposed on one side surface of the substrate and the side of the first electrode facing away from the substrate, and a portion of the first electrode is exposed in the pixel openings. The obstruction structure is projected onto the substrate in a direction within the projection of the pixel definition layer onto the substrate.
10. The display panel as claimed in claim 9, characterized in that, The display panel further includes an isolation structure disposed on the side of the pixel definition layer opposite to the substrate; the isolation structure defines a plurality of isolation openings communicating with the pixel openings.
11. The display panel as claimed in claim 10, characterized in that, The isolation structure includes an isolation portion and a blocking portion. The isolation portion is disposed on the side of the pixel definition layer opposite to the substrate, and the blocking portion is disposed on the side of the isolation portion opposite to the substrate. The orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the blocking portion on the substrate; Preferably, the material of the insulating part includes aluminum; Preferably, the material of the blocking portion includes titanium; Preferably, the isolation structure further includes a connecting portion disposed between the pixel definition layer and the isolation portion; Preferably, the material of the connecting part includes molybdenum.
12. A method for manufacturing a display panel, characterized in that, include: A first insulating layer is fabricated, and a plurality of protruding first blocking blocks are fabricated on one side surface of the first insulating layer; A conductive metal layer is deposited on one side of the first insulating layer and the first blocking block. The conductive metal layer is patterned by a wet etching process, and at least the portion of the conductive metal layer located between adjacent first blocking blocks is removed to obtain a plurality of first electrodes.
13. A method for manufacturing a display panel, characterized in that, include: A first insulating layer is fabricated, and multiple grooves are formed on one side surface of the first insulating layer; A conductive metal material layer is deposited on the surface of the first insulating layer and in the groove, and the portion of the conductive metal material layer located in the groove forms a second blocking block; The conductive metal material layer is patterned by a wet etching process, and at least the portion of the conductive metal material layer located between adjacent grooves is removed to obtain a plurality of first electrodes.
14. A display device, characterized in that, The display panel includes any one of claims 1 to 11, or a display panel manufactured by the method of manufacturing a display panel as described in claim 12, or a display panel manufactured by the method of manufacturing a display panel as described in claim 13.
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