Task processing apparatus, method, device, storage medium and program products

Abstract

This application discloses a task processing apparatus, method, device, storage medium, and program product, relating to the field of computer technology. The method includes: receiving a data processing task; acquiring idle thread data corresponding to at least two thread bundles; determining a first thread bundle from the at least two thread bundles based on the idle thread data corresponding to the at least two thread bundles; and invoking the first thread bundle to execute a first task instruction according to a second invocation strategy based on a first bundle identifier corresponding to the first thread bundle. This method can selectively choose a first thread bundle that can execute task instructions as quickly as possible using idle thread data, and improve the instruction execution efficiency of the first thread bundle by adjusting the first invocation strategy to a second invocation strategy with a higher instruction execution frequency, thereby increasing the task execution speed. This application can be applied to various scenarios such as image processing and data analysis.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a task processing apparatus, method, device, storage medium, and program product. Background Technology

[0002] A data processing task in a graphics processing unit (GPU) is typically executed by at least two sets of threads (blocks), each set of threads is divided into at least two thread bundles (wraps), and the at least two thread bundles work together to execute the data processing task.

[0003] In related technologies, each thread bundle includes at least two threads. Multiple thread bundles within a thread set execute the same code. Although at least two threads within a thread bundle are also executing the same code, different branch paths may be triggered because different threads process different data. This may result in different execution times for the at least two thread bundles.

[0004] However, a thread set can only be considered complete after at least two thread bundles within it have finished executing. Only then can the resources associated with the thread set be released, preparing it for the execution of other thread sets. If the execution of other thread sets depends on the completion of the previous thread set, this process will lead to lower overall task execution efficiency and affect task execution speed. Summary of the Invention

[0005] This application provides a task processing apparatus, method, device, storage medium, and program product. It can selectively choose a first thread bundle that can execute task instructions as quickly as possible using idle thread data. By adjusting a first invocation strategy to a second invocation strategy with a higher instruction execution frequency, it aims to improve the instruction execution efficiency of the first thread bundle, thereby increasing task execution speed. The technical solution is as follows.

[0006] On the one hand, a task processing device is provided, the device comprising: a thread bundle state unit, a polling arbitration unit, and an instruction execution unit;

[0007] The thread bundle state unit is used to obtain idle thread data corresponding to the at least two thread bundles when the data processing task is executed through at least two thread bundles. The idle thread data is used to indicate the number of threads in the idle state within the thread bundle, and the thread bundle includes at least two threads. The idle thread data is then sent to the polling arbitration unit.

[0008] The polling arbitration unit is used to determine a first thread bundle from the at least two thread bundles based on the idle thread data corresponding to the at least two thread bundles respectively. The first thread bundle includes a first task instruction to be executed and the first thread bundle corresponds to a first invocation strategy. The first bundle identifier corresponding to the first thread bundle is sent to the instruction execution unit.

[0009] The instruction execution unit is configured to invoke the first thread bundle to execute the first task instruction based on the first bundle identifier and according to the second invocation strategy, wherein the instruction execution frequency of the first thread bundle under the second invocation strategy is higher than the instruction execution frequency under the first invocation strategy.

[0010] On the other hand, a task processing method is provided, the method comprising:

[0011] Receive a data processing task, the data processing task being executed through at least two thread bundles, each thread bundle including at least two threads;

[0012] Obtain the idle thread data corresponding to the at least two thread bundles respectively, wherein the idle thread data is used to indicate the number of threads in the thread bundle that are in an idle state;

[0013] Based on the idle thread data corresponding to the at least two thread bundles respectively, a first thread bundle is determined from the at least two thread bundles. The first thread bundle includes a first task instruction to be executed and the first thread bundle corresponds to a first invocation strategy. The first bundle identifier corresponding to the first thread bundle is sent to the instruction execution unit.

[0014] Based on the first bundle identifier corresponding to the first thread bundle, the first thread bundle is invoked to execute the first task instruction according to the second invocation strategy. The instruction execution frequency of the first thread bundle under the second invocation strategy is higher than the instruction execution frequency under the first invocation strategy.

[0015] On the other hand, a computer device is provided, the computer device including a processor and a memory, the memory storing at least one instruction, at least one program, code set or instruction set, the at least one instruction, the at least one program, the code set or instruction set being loaded and executed by the processor to implement the task processing method as described in any of the embodiments of this application above.

[0016] On the other hand, a computer-readable storage medium is provided, wherein at least one instruction, at least one program, code set, or instruction set is stored therein, wherein the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the task processing method as described in any of the embodiments of this application above.

[0017] On the other hand, a computer program product or computer program is provided, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform any of the task processing methods described in the above embodiments.

[0018] The beneficial effects of the technical solutions provided in this application include at least the following:

[0019] When executing data processing tasks using thread bundles, based on the idle thread data corresponding to at least two thread bundles, a first thread bundle is determined from these at least two thread bundles. By adjusting the first invocation strategy to a second invocation strategy, the execution frequency of the first thread bundle executing the first task instruction is increased. By leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles is flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle is improved. This avoids waiting for thread bundles with a larger number of idle threads to complete before proceeding with subsequent processes, thus contributing to improved processing efficiency and task execution speed when at least two thread bundles are executing data processing tasks. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a structural block diagram of a processing system provided in an exemplary embodiment of this application;

[0022] Figure 2 This is a structural block diagram of a task processing apparatus provided in an exemplary embodiment of this application;

[0023] Figure 3 This is a structural block diagram of a task processing apparatus provided in another exemplary embodiment of this application;

[0024] Figure 4 This is a structural block diagram of a task processing apparatus provided in another exemplary embodiment of this application;

[0025] Figure 5 This is a schematic diagram illustrating code execution as provided in an exemplary embodiment of this application;

[0026] Figure 6 This is a schematic diagram illustrating the thread execution situation in a code execution scenario provided by an exemplary embodiment of this application;

[0027] Figure 7 This is a schematic diagram illustrating the thread execution situation in a code execution scenario provided by another exemplary embodiment of this application;

[0028] Figure 8 This is a schematic diagram illustrating the execution time of at least two threads within a thread set in a related art provided by an exemplary embodiment of this application;

[0029] Figure 9 This is a schematic diagram illustrating the execution of a static arbitration thread in a related technology provided by an exemplary embodiment of this application;

[0030] Figure 10 This is a schematic diagram of the overall framework of a task processing apparatus provided in an exemplary embodiment of this application;

[0031] Figure 11 This is a flowchart of a task processing method provided in an exemplary embodiment of this application;

[0032] Figure 12 This is a structural block diagram of the server provided in an exemplary embodiment of this application. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0034] First, a brief introduction to the terms used in the embodiments of this application will be given.

[0035] Graphics Processing Unit (GPU): A key component for efficiently performing large-scale computing tasks, especially in areas such as video game rendering, scientific computing, and deep learning. The GPU's design allows it to significantly accelerate processing when performing parallel computing, thanks to its highly parallel architecture and multi-threading capabilities.

[0036] Thread block: A thread block, or thread set, is a group of at least two threads. Thread blocks are the basic units for parallel execution of tasks. GPUs decompose large-scale computing tasks (such as data processing tasks) into at least two smaller blocks, each of which can be processed independently. This allows for the collaborative processing of more complex tasks by thread blocks, thereby achieving efficient parallel processing.

[0037] Thread bundle: A thread set can contain at least two thread bundles. The thread bundle is the basic unit of GPU scheduling, which helps to simplify scheduling logic and improve execution efficiency.

[0038] Thread: A thread bundle consists of at least two threads. A thread in a GPU is the smallest unit for executing computational tasks. Each thread can process one data element, such as processing a pixel in an image or performing an operation on an element in an array. For example, in the Compute Unified Device Architecture (CUDA), a thread bundle typically contains 32 threads. These threads execute the same instructions in a Single Instruction Multiple Data (SIMD) manner. That is, all threads in the same thread bundle perform the same operation at any given time, but the data elements they operate on can be different.

[0039] In related technologies, each thread bundle includes at least two threads. Multiple thread bundles within a thread set execute the same code. Although at least two threads within a thread bundle are executing the same code, they may trigger different branch paths due to the different data they process. This can result in different execution times for the at least two thread bundles. However, a thread set can only be considered complete after at least two thread bundles within it have finished executing. Only then can the resources associated with the thread set be released, preparing for the execution of other thread sets. If the execution of other thread sets depends on the completion of a previous thread set, this process leads to lower overall task execution efficiency and affects task execution speed.

[0040] This application provides a task processing method that utilizes idle thread data to selectively choose a first thread bundle that can execute task instructions as quickly as possible. By adjusting a first invocation strategy to a second invocation strategy with a higher instruction execution frequency, the method aims to improve the instruction execution efficiency of the first thread bundle, thereby increasing task execution speed. The task processing method proposed in this application can be applied to various task processing scenarios, such as image processing, data analysis, engineering simulation, and scientific computing, and is not limited thereto.

[0041] It should be noted that all information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.), and signals involved in this application have been authorized by the user or fully authorized by all parties, and the collection, use, and processing of related data must comply with the relevant laws, regulations, and standards of the relevant regions. For example, the data processing tasks and idle thread data involved in this application were obtained with full authorization.

[0042] The processing system involved in the embodiments of this application will be described. The task processing method provided in the embodiments of this application can be implemented by the terminal alone, by the server, or by the terminal and the server through data interaction. The embodiments of this application do not limit this. Optionally, the task processing method executed by the terminal and the server interactively will be used as an example for description.

[0043] This is illustrative; please refer to it. Figure 1 The processing system involves a terminal 110 and a server 120, which are connected via a communication network 130.

[0044] In some embodiments, terminal 110 sends a data processing task to server 120 via communication network 130, and server 120 receives the data processing task and executes the data processing task via thread bundle.

[0045] Indicatively, server 120 uses at least two thread bundles (such as...) Figure 1 The thread bundle (thread bundle 1, thread bundle 2, thread bundle 3, etc.) performs data processing tasks, and each thread bundle includes at least two threads.

[0046] In some embodiments, server 120 obtains idle thread data corresponding to at least two thread bundles.

[0047] The idle thread data indicates the number of threads in an idle state within a thread bundle. Illustratively, server 120 determines the number of idle threads within each thread bundle based on the execution status of at least two thread bundles performing data processing tasks, and obtains idle thread data corresponding to each of the at least two thread bundles (e.g., ...). Figure 1 (Idle thread data 1 corresponding to thread bundle 1, idle thread data 2 corresponding to thread bundle 2, idle thread data 3 corresponding to thread bundle 3, etc.). For example: Figure 1 White threads represent idle threads, while gray threads represent active threads, etc.

[0048] In some embodiments, server 120 determines a first thread bundle from at least two thread bundles based on idle thread data corresponding to at least two thread bundles respectively.

[0049] Optionally, server 120 compares the idle thread data corresponding to at least two thread bundles, and selectively selects the thread bundle with the most idle thread data from the at least two thread bundles as the first thread bundle. The first thread bundle includes a first task instruction to be executed, and the first thread bundle corresponds to a first invocation strategy.

[0050] To illustrate, each thread bundle executes at least one task instruction in the data processing task. Taking the first thread bundle about to execute the first task instruction as an example, the first thread bundle originally used the first invocation strategy and was in the first task instruction.

[0051] In some embodiments, server 120 invokes the first thread bundle to execute the first task instruction according to the second invocation strategy based on the first bundle identifier corresponding to the first thread bundle.

[0052] Specifically, the instruction execution frequency of the first thread bundle under the second invocation strategy is higher than that under the first invocation strategy. This illustrates how adjusting the invocation strategy corresponding to a thread bundle allows the first thread bundle to execute the first task instruction through the second invocation strategy, which has a higher instruction execution frequency. This improves the instruction execution efficiency of the first thread bundle, avoids the problem of slow task instruction processing caused by a large amount of idle thread data in the first thread bundle, and ultimately improves the overall processing efficiency of the thread bundle.

[0053] In some embodiments, after the server 120 has completed the data processing task in at least two thread bundles, it obtains the task processing result and sends the task processing result to the terminal 110 through the communication network 130.

[0054] It is worth noting that the aforementioned terminals include, but are not limited to, mobile terminals such as mobile phones, tablets, portable laptops, smart voice interaction devices, smart home appliances, and in-vehicle terminals, and can also be desktop computers, etc.; the aforementioned servers can be independent physical servers, or server clusters or distributed systems consisting of at least two physical servers, or cloud servers.

[0055] Based on the above-described terms and application scenarios, the task processing device provided in this application will be described. The task processing device includes a thread bundle state unit, a polling arbitration unit, and an instruction execution unit, such as... Figure 2 As shown, the scheduling process of the various components of the task processing device when scheduling the data processing of at least two thread bundles 210 is as follows.

[0056] Thread bundle 210 is a group of threads that execute in parallel to perform data processing tasks, such as... Figure 2 As shown, there are at least two thread bundles 210, such as thread bundle 211, thread bundle 212, thread bundle 213, etc. Optionally, the thread bundle 210 is a hardware execution unit dynamically created by the GPU's hardware scheduling unit, or the thread bundle 210 is a combination of multiple threads obtained at the software level. The implementation method of the thread bundle is not limited here.

[0057] Each thread bundle 210 includes at least two threads, and the number of threads in different thread bundles 210 is usually the same. For example, in the CUDA architecture, a thread bundle 210 typically includes 32 threads. The at least two threads within a thread bundle 210 collaboratively execute data processing tasks.

[0058] Schematic, a data processing task is used to characterize a task instruction to analyze large amounts of data to generate analytical results. Optionally, a data processing task includes at least one of several processing methods such as data collection, storage, cleaning, analysis, and presentation.

[0059] In some embodiments, a data processing task is input into a GPU, which splits the data processing task into at least two task parts. Each task part is assigned to a set of threads in the GPU, and the at least two sets of threads process the at least two task parts in parallel. At least two thread bundles 210 within each thread bundle execute the task part. Each task part typically consists of at least two task instructions, and the threads in the thread bundle 210 are responsible for executing the task instructions in the task part.

[0060] Optionally, with Figure 2 The example shown is at least two thread bundles 210 within a thread set. At least two thread bundles 210 within a thread set jointly execute the part of the data processing task executed by the thread set, thereby realizing the process of executing the data processing task through at least two thread bundles 210.

[0061] In some embodiments, a computing task is input into the GPU, and the GPU splits the computing task into at least two task parts, which include data processing tasks, image processing tasks, etc. The at least two task parts are assigned to a set of threads in the GPU, and the at least two set of threads process the at least two task parts in parallel. For example, if the data processing task is processed by any set of threads, at least two thread bundles 210 in the thread bundle execute the data processing task to achieve the purpose of executing the data processing task through at least two thread bundles.

[0062] In some embodiments, taking at least two thread bundles 210 as a thread bundle within a thread set as an example, the thread set is responsible for executing a certain part of the data processing task. The code executed by at least two thread bundles 210 within a thread set is usually the same, but the data processed by each thread bundle 210 may be different.

[0063] To illustrate, taking the execution of vector addition by a set of threads as an example, the code executed by the set of threads is the same, all instructing the execution of addition; however, each thread bundle 210 in the set of threads may be responsible for a specific part of the vector. This process allows each thread bundle to process different data segments simultaneously, although it executes the same calculation instructions, in order to achieve parallel data processing.

[0064] In a thread bundle 210, at least two threads typically handle their own independent data elements when performing data processing. For example, taking the execution of vector addition by a set of threads as an example, assuming that each thread bundle processes a specific part of the vector, within a certain thread bundle, each thread will be responsible for a specific data point in the addition operation. This allows all threads in the thread bundle to perform operations on their own independent data points, even though they jointly execute the same task instructions, thus achieving parallel processing.

[0065] The components of the task processing device are described below.

[0066] (I) Thread Beam State Unit 220

[0067] In illustrative terms, thread bundle state unit 220 is a processing unit used to count the state of thread bundle 210. The thread bundle state includes thread bundle running status (such as thread bundle running, thread bundle running completed, thread bundle blocked status, etc.) and thread running status (such as the number of threads running in the thread bundle, thread running identifier, etc.), etc., which are not limited here.

[0068] In some embodiments, at least two thread bundles 210 jointly correspond to one thread bundle state unit 220. Therefore, the thread bundle states corresponding to at least two thread bundles 210 can be simultaneously counted through one thread bundle state unit 220. For example, at least two thread bundles 210, such as thread bundle 211, thread bundle 212, and thread bundle 213, are connected to the thread bundle state unit 220, thereby allowing the thread bundle state unit 220 to count the thread bundle states of thread bundle 211, thread bundle 212, and thread bundle 213, respectively.

[0069] In some embodiments, at least two thread bundles 210 correspond to one thread bundle state unit 220, so the thread bundle state of each thread bundle 210 can be counted through the thread bundle state unit 220 corresponding to each thread bundle 210. For example, the thread bundle state of thread bundle 211 can be counted through the thread bundle state unit 220 corresponding to thread bundle 211, the thread bundle state of thread bundle 212 can be counted through the thread bundle state unit 220 corresponding to thread bundle 212, and the thread bundle state of thread bundle 213 can be counted through the thread bundle state unit 220 corresponding to thread bundle 213, and so on.

[0070] In an optional embodiment, the thread bundle state unit 220 is used to obtain idle thread data corresponding to at least two thread bundles when performing data processing tasks through at least two thread bundles.

[0071] Indicatively, during the parallel execution of data processing tasks by at least two thread bundles, the GPU calls the thread bundle state unit 220 to obtain the idle thread data corresponding to each of the at least two thread bundles.

[0072] The idle thread data indicates the number of threads in an idle state within a thread bundle.

[0073] Indicatively, the idle state represents a thread that is currently idle as it has not been assigned a task to execute. Optionally, a thread being in an idle state includes at least one of the following situations: (1) the thread is in an idle state due to resource waiting, such as the thread waiting for necessary computing resources or data to become available; (2) during code execution, such as when facing branch paths or multi-path execution, the thread is in an idle state due to branching; (3) the thread is in an idle state when it has finished executing the assigned task instructions and no new task instructions are assigned to the thread.

[0074] This illustrates the concept of an active state, representing the opposite of an idle state. An active state indicates that the thread is executing its assigned task instructions, meaning the thread is fully utilizing computing resources to perform data processing.

[0075] Optionally, for each thread bundle, the number of threads in an idle state within the thread bundle is determined to obtain idle thread data corresponding to the thread bundle. For example, for thread bundle 211, the number of threads in thread bundle 211 that are in an idle state is determined to obtain idle thread data corresponding to thread bundle 211.

[0076] Optionally, for each thread bundle, the number of active threads within the thread bundle is determined, and the idle thread data corresponding to the thread bundle is obtained based on the difference between the total number of threads in the thread bundle and the number of active threads. For example, for thread bundle 211, the number of active threads in thread bundle 211 is determined, and the idle thread data (e.g., 7) corresponding to thread bundle 211 is obtained by the difference between the total number of threads in thread bundle 211 (e.g., 32) and the number of active threads (e.g., 25), etc., etc., without limitation here.

[0077] In some embodiments, the thread bundle state unit 220 is used to obtain idle thread data corresponding to at least two thread bundles after the thread bundle has finished executing the currently assigned task instruction.

[0078] Indicatively, each thread bundle executes at least one assigned task instruction. If the currently executing task instruction is completed, the thread bundle state unit 220 is called to analyze the running status of the threads within the thread bundle during the execution of the most recent task instruction, in order to determine the number of threads in the thread bundle that are in an idle state and obtain idle thread data.

[0079] In some embodiments, the thread bundle state unit 220 is used to acquire idle thread data corresponding to at least two thread bundles during the execution of the currently assigned task instruction by the thread bundle.

[0080] Indicatively, each thread bundle executes at least one assigned task instruction. During the execution of the current task instruction, the thread bundle state unit 220 is called to analyze the running status of the threads within the thread bundle when executing the current task instruction, in order to determine the number of threads in the thread bundle that are in an idle state and obtain idle thread data.

[0081] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0082] In an optional embodiment, idle thread data is sent to the polling arbitration unit.

[0083] Indicatively, after calling the thread bundle state unit 220 to obtain the idle thread data corresponding to at least two thread bundles respectively, the at least two idle thread data are sent to the polling arbitration unit to guide the polling arbitration unit to comprehensively analyze the at least two idle thread data.

[0084] (II) Arbitration Unit 230

[0085] Indicatively, the polling arbitration unit 230 is a processing unit used to manage the access of task processing processes to shared resources, thereby rationally allocating resources and thread calls in the task processing processes.

[0086] In an optional embodiment, the polling arbitration unit 230 is used to determine a first thread bundle from at least two thread bundles based on the idle thread data corresponding to at least two thread bundles respectively.

[0087] Indicatively, after receiving idle thread data corresponding to at least two thread bundles, the polling arbitration unit 230 compares the values ​​of the at least two idle thread data to determine the first thread bundle from the at least two thread bundles.

[0088] Optionally, the first thread bundle is one of at least two thread bundles; or, the first thread bundle is at least two of the at least two thread bundles. Taking the first thread bundle as an example, by comparing at least two idle thread data, the thread bundle with the largest number of idle thread data is taken as the first thread bundle, that is, the thread bundle with the largest number of idle threads is determined from at least two thread bundles as the first thread bundle.

[0089] The first thread bundle includes the first task instruction to be executed.

[0090] Schematic, each of the at least two thread bundles is used to execute at least one task instruction. Optionally, taking the first thread bundle as an example of being one of the at least two thread bundles, the first task instruction is one of the at least one task instruction that the first thread bundle needs to execute.

[0091] Optionally, the first task instruction is the task instruction that the first thread bundle is about to execute. For example, the first thread bundle executes task instruction 1, task instruction 2, and task instruction 3 in sequence; after the first thread bundle has recently finished executing task instruction 1, the first task instruction to be executed is task instruction 2.

[0092] The first thread bundle corresponds to the first invocation strategy.

[0093] Schematic, the invocation strategy is used to characterize the strategy form of invoking a thread bundle to execute task instructions. Optionally, the invocation strategy includes at least one of a thread bundle invocation priority strategy and a resource amount invocation strategy.

[0094] In illustrative terms, the thread bundle invocation priority strategy is used to describe the priority of invoking thread bundles to execute task instructions. For example, if thread bundle 1 is invoked first to execute at least one task instruction that thread bundle 1 needs to execute, and then thread bundle 2 is invoked to execute at least one task instruction that thread bundle 2 needs to execute, then the invocation priority of thread bundle 1 is higher than that of thread bundle 2.

[0095] In illustrative terms, the resource allocation strategy describes the amount of computing resources allocated to a thread bundle when it executes a task instruction. For example, if 10 computing resources are allocated when thread bundle 1 executes the corresponding task instruction, and 15 computing resources are allocated when thread bundle 2 executes the corresponding task instruction, it means that the amount of computing resources allocated when thread bundle 1 executes the task instruction is less than the amount of computing resources allocated when thread bundle 2 executes the task instruction.

[0096] Optionally, the invocation strategy corresponding to a thread bundle is preset. For example, if the first thread bundle corresponds to the first invocation strategy, it means that when the first thread bundle is invoked to execute the task instruction, the first invocation strategy is used in advance to implement the instruction execution process. For example, the first thread bundle corresponding to the first invocation strategy indicates that the invocation priority of the task instruction executed by the first thread bundle is low; or, the first thread bundle corresponding to the first invocation strategy indicates that the amount of computing resources allocated when the first thread bundle executes the task instruction is small, etc.

[0097] In an optional embodiment, the polling arbitration unit 230 is used to send the first bundle identifier corresponding to the first thread bundle to the instruction execution unit.

[0098] Schematic illustration: at least two thread bundles each correspond to a bundle identifier, which is used to uniquely identify the thread bundle. Optionally, the bundle identifier is represented by a hash value; or, the bundle identifier is represented by a numerical value, etc. For example: the first bundle identifier corresponding to thread bundle 211 is 0001, the first bundle identifier corresponding to thread bundle 212 is 0010, the first bundle identifier corresponding to thread bundle 213 is 0011, and so on.

[0099] Optionally, after the polling arbitration unit 230 determines the first thread bundle from at least two thread bundles, it determines the first bundle identifier corresponding to the first thread bundle and sends the first bundle identifier to the instruction execution unit.

[0100] (III) Instruction Execution Unit 240

[0101] Schematic illustration: Instruction execution unit 240 is a hardware-level processing unit used to execute task instructions, including arithmetic operations, logical operations, etc. Optionally, when thread bundle 210 is invoked to execute task instructions, the task instructions are assigned to instruction execution unit 240 for execution.

[0102] In an optional embodiment, the instruction execution unit 240 is configured to invoke the first thread bundle to execute the first task instruction based on the first bundle identifier and in accordance with the second invocation strategy.

[0103] Indicatively, after the instruction execution unit 240 receives the first bundle identifier, the instruction execution unit 240 determines the first thread bundle based on the first bundle identifier, and uses a second invocation strategy different from the first invocation strategy to invoke the first thread bundle to execute the first task instruction.

[0104] Among them, the instruction execution frequency of the first thread bundle under the second invocation strategy is higher than that under the first invocation strategy.

[0105] Schematic illustration: Instruction execution frequency is used to characterize the speed at which task instructions are executed. Taking the instruction execution frequency under the first invocation strategy as the first execution frequency and the instruction execution frequency under the second invocation strategy as the second execution frequency as an example, the first execution frequency describes the speed at which the first thread bundle executes the first task instruction, and the second execution frequency describes the speed at which the second thread bundle executes the second task instruction.

[0106] Optionally, the invocation strategy includes at least one of a thread bundle invocation priority strategy and a resource amount invocation strategy. When the first invocation strategy is changed to the second invocation strategy, the instruction execution frequency can be adjusted by adjusting the thread bundle invocation priority, and / or the instruction execution frequency can be adjusted by adjusting the amount of computing resources allocated to the thread bundle.

[0107] As an illustration, when the invocation strategy represents the invocation priority, the purpose of adjusting the first invocation strategy to the second invocation strategy can be achieved by increasing the invocation priority of the first thread. For example, if the invocation priority of the first thread bundle is low under the first invocation strategy, but high under the second invocation strategy, then the first thread bundle can be invoked first to execute the first task instruction based on the second invocation strategy.

[0108] As an illustration, when the invocation strategy represents the amount of resources allocated, the purpose of changing the first invocation strategy to the second invocation strategy can be achieved by increasing the amount of computing resources allocated to the first thread. For example, if the first invocation strategy allocates less resources to the first thread bundle, while the second invocation strategy allocates more resources, then the second invocation strategy can call the first thread bundle to execute the first task instruction more efficiently with more computing resources.

[0109] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0110] In summary, by leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles can be flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle can be improved. This avoids waiting for the thread bundle with a larger number of idle threads to finish executing before proceeding with subsequent processes, thus helping to improve the processing efficiency and speed of data processing tasks when at least two thread bundles are executing them.

[0111] In an optional embodiment, at least two thread bundles each correspond to a thread bundle state unit, such that the i-th thread bundle corresponds to the i-th thread bundle state unit, where i is a positive integer. The number of idle threads corresponding to the i-th thread bundle is obtained through the i-th thread bundle state unit, and this number is directly sent as idle thread data to the polling arbitration unit. Alternatively, the weight determination subunit within the i-th thread bundle state unit determines the thread bundle weight corresponding to the i-th thread bundle based on the number of idle threads, and then the weight determination subunit sends the thread bundle weight as idle thread data to the polling arbitration unit, so that the polling arbitration unit can determine the first thread bundle based on the idle thread data corresponding to at least two thread bundles. (Illustrative example follows.) Figure 3 As shown above, Figure 2 The thread bundle state unit and polling arbitration unit shown can also perform the following process.

[0112] (a) Thread bundle state unit 310

[0113] In an optional embodiment, the device includes at least two thread bundle state units, where the i-th thread bundle corresponds to the i-th thread bundle state unit, and i is a positive integer.

[0114] Indicatively, the i-th thread bundle is any one of at least two thread bundles, and the i-th thread bundle state unit is the thread bundle state unit corresponding to the i-th thread bundle, used to determine the running status of the i-th thread bundle.

[0115] In an optional embodiment, the i-th thread bundle state unit 310 is used to obtain the number of idle threads corresponding to the i-th thread bundle as idle thread data.

[0116] In some embodiments, each thread bundle corresponds to a thread bundle state unit 310, and the thread bundle state unit 310 includes a thread counting subunit 311, which is used to obtain the number of idle threads of the thread bundle.

[0117] Schematic, the i-th thread bundle state unit includes the i-th thread counting subunit, which is used to obtain the number of idle threads corresponding to the i-th thread bundle. For example, the thread bundle state unit 310 corresponding to thread bundle A is used to analyze the state of thread bundle A, wherein the thread counting subunit 311 is used to count the number of threads in the idle state in thread bundle A, and obtain the number of idle threads in thread bundle A.

[0118] Schematic, the number of idle threads indicates the number of threads in an idle state within a thread bundle; an idle state represents a thread that is currently not assigned a task to execute and is therefore idle. Optionally, for each of at least two thread bundles, the states of at least two threads within the thread bundle are analyzed, and the number of threads in an idle state is counted to obtain the number of idle threads corresponding to the thread bundle; alternatively, the number of threads in an active state is counted as the number of active threads, and the difference between the total number of threads and the number of active threads is taken as the number of idle threads corresponding to the thread bundle.

[0119] Optionally, after the number of idle threads corresponding to the thread bundle is obtained by the thread bundle state unit 310, the number of idle threads is used as the idle thread data to be sent to the polling arbitration unit to realize the arbitration process.

[0120] Indicatively, each thread bundle corresponds to a thread bundle state unit 310. For the i-th thread bundle, the number of idle threads corresponding to the i-th thread bundle, which is counted by the i-th thread counting subunit, is sent to the polling arbitration unit.

[0121] In an optional embodiment, the thread bundle state unit 310 includes a thread counting subunit 311 and a weight determination subunit; the thread counting subunit 311 sends the number of idle threads corresponding to the thread bundle to the weight determination subunit 312.

[0122] Optionally, at least two thread bundles correspond to one thread bundle state unit. For the i-th thread bundle state unit corresponding to the i-th thread bundle, after obtaining the idle thread data through the i-th thread counting subunit 311, the number of idle threads corresponding to the i-th thread bundle is sent to the i-th weight determination subunit to instruct the weight determination subunit 312 to determine the idle thread data based on the number of idle threads.

[0123] In some embodiments, the weight determination subunit 312 is a processing unit that evaluates the number of idle threads based on a weight threshold.

[0124] In an optional embodiment, the weight determination subunit 312 is used to obtain the thread bundle weight corresponding to the thread bundle as idle thread data based on the number of idle threads.

[0125] In some embodiments, each thread bundle corresponds to a thread bundle state unit, and therefore each thread bundle corresponds to a weight determination subunit 312. For the weight determination subunit corresponding to the i-th thread bundle, the i-th weight determination subunit is used to determine the thread bundle weight based on the number of idle threads in the i-th thread bundle.

[0126] Indicatively, thread bundle A corresponds to weight determination subunit 312, which is used to determine the thread bundle weight of thread bundle A as idle thread data based on the number of idle threads corresponding to thread bundle A.

[0127] Among them, the thread bundle weight is used to characterize the priority of thread bundle invocation when performing data processing tasks.

[0128] Optionally, each thread bundle corresponds to a thread bundle state unit, and therefore each thread bundle corresponds to a weight determination subunit 312. For the i-th weight determination subunit corresponding to the i-th thread bundle, the i-th weight determination subunit is also used to obtain at least one weight threshold.

[0129] The weight threshold is a preset threshold parameter stored in the weight threshold register 321. The weight threshold is used to determine the priority of the thread bundles called when processing different tasks.

[0130] Schematic, the weight determination subunit 312 obtains at least one weight threshold from the weight threshold register 321. The at least one weight threshold is a pre-set numerical parameter. When there are at least two weight thresholds, the at least two weight thresholds are usually different values.

[0131] Optionally, the device further includes a global control unit 320, which includes at least one weight threshold register 321; the global control unit 320 is used to broadcast the weight threshold stored in the weight threshold register to the thread bundle state units 310 corresponding to at least two thread bundles respectively.

[0132] Schematic, the global control unit 320 includes a weight threshold register 321 for storing at least two weight thresholds; or, the global control unit 320 includes at least two weight threshold registers 321, each weight threshold register 321 for storing one weight threshold, etc.; the weight determination subunit 312 receives at least one weight threshold, etc., sent by the weight threshold register 321.

[0133] For example, the global control unit 320 includes four weight threshold registers 321, each of which stores a weight threshold. The global control unit 320 instructs the weight threshold registers 321 to send a weight threshold to the weight determination subunit 312, so that the weight determination subunit 312 obtains four weight thresholds.

[0134] Optionally, the i-th weight determination subunit is also used to compare the numerical relationship between the number of idle threads corresponding to the i-th thread bundle and at least one weight threshold to obtain the thread bundle weight corresponding to the i-th thread bundle.

[0135] Indicatively, when analyzing the number of idle threads by determining the i-th weight sub-unit, the numerical relationship between the number of idle threads corresponding to the i-th thread bundle and at least one weight threshold is compared to obtain at least one comparison result; the thread bundle weight of the i-th thread bundle is determined by combining at least one comparison result.

[0136] For example, taking a weight threshold of 3 as an example, if the number of idle threads corresponding to thread bundle A is 5, the number of idle threads 5 is compared with the weight threshold 3, and the weight determination subunit 312 outputs the thread bundle weight of thread bundle A as 1 (representing greater than the weight threshold), or the weight determination subunit 312 outputs the thread bundle weight of thread bundle A as 2 (representing greater than the weight threshold by 2); if the number of idle threads corresponding to thread bundle B is 2, the number of idle threads 2 is compared with the weight threshold 3, and the weight determination subunit 312 outputs the thread bundle weight of thread bundle B as 0 (representing less than the weight threshold), or the weight determination subunit 312 outputs the thread bundle weight of thread bundle B as -1 (representing less than the weight threshold by 1), and so on.

[0137] For example, taking the existence of four weight thresholds as an example, the four weight thresholds are: wth0 = 3, wth1 = 6, wth2 = 8, and wth3 = 10. If the number of idle threads corresponding to thread bundle A is 5, the number of idle threads 5 is compared with the four weight thresholds respectively. The weight determination subunit 312 compares the number of idle threads 5 with wth0 = 3. The input value is not less than wth0, so the condition is met. It compares the number of idle threads 5 with wth1 = 6. The input value is less than wth1, so the condition is not met. It compares the number of idle threads 5 with wth2 = 8. The input value is less than wth2, so the condition is not met. It compares the number of idle threads 5 with wth3 = 10. The input value is less than wth3, so the condition is not met. If the preset rule for determining the weight of the thread bundle is to increment the weight value by one if the condition is met, then the weight of the thread bundle A is output as 1. If the number of idle threads corresponding to thread bundle B is 12, compare the number of idle threads 12 with the four weight thresholds respectively; the weight determination subunit 312 determines that the number of idle threads 12 is greater than wth0, wth1, wth2 and wth3, which means that the four conditions are met, so the thread bundle weight of thread bundle B is output as 4, etc.

[0138] It is worth noting that the above-mentioned weight thresholds and number of idle threads are merely illustrative examples, and the embodiments of this application do not limit them.

[0139] In an optional embodiment, when at least two thread bundles correspond to a thread bundle state unit respectively, the i-th weight determination subunit is further configured to send the thread bundle weight corresponding to the i-th thread bundle as idle thread data to the polling arbitration unit 330.

[0140] Indicatively, for any i-th weight determination subunit corresponding to the i-th thread bundle, the thread bundle weight corresponding to the i-th thread bundle is determined based on the number of idle threads corresponding to the i-th thread bundle. The thread bundle weight is used as the idle thread data corresponding to the thread bundle, and the idle thread data is sent to the polling arbitration unit 330. The weight determination subunits corresponding to at least two thread bundles execute this process to achieve the purpose of sending the idle thread data corresponding to at least two thread bundles to the polling arbitration unit 330.

[0141] In an optional embodiment, when at least two thread bundles jointly correspond to a thread bundle state unit, the at least two thread bundles jointly correspond to a thread counting subunit. The thread counting subunit counts the number of idle threads corresponding to the at least two thread bundles respectively, and sends the number of idle threads as idle thread data to the polling arbitration unit. Alternatively, at least two thread bundles jointly correspond to a thread counting subunit and a weight determination subunit. The weight determination subunit receives the number of idle threads corresponding to the at least two thread bundles respectively sent by the thread counting subunit, thereby determining the thread bundle weights corresponding to the at least two thread bundles respectively, and sends the thread bundle weights as idle thread data to the polling arbitration unit.

[0142] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0143] (II) Arbitration Unit 330

[0144] Schematic illustration: The polling arbitration unit 330 is used to arbitrate the execution status of thread bundles based on idle thread data. Optionally, at least two thread bundles may share a polling arbitration unit 330, so that the polling arbitration unit 330 can receive idle thread data corresponding to at least two thread bundles respectively, and determine the first thread bundle.

[0145] In an optional embodiment, the polling arbitration unit 330 is used to select at least one thread bundle with the largest number of idle threads among at least two thread bundles as the first thread bundle.

[0146] Schematic illustration: When the polling arbitration unit 330 receives idle thread data representing the number of idle threads, the polling arbitration unit 330 directly compares at least two idle thread counts and selects at least one thread bundle with the largest idle thread count to obtain the first thread bundle. Optionally, the polling arbitration unit 330 selects the unique thread bundle with the largest idle thread count from at least two idle thread counts as the first thread bundle.

[0147] Optionally, when there are at least two thread bundles that correspond to the largest and the same number of idle threads, both of the at least two thread bundles are used as the first thread bundle. Alternatively, the thread bundle with the higher instruction execution frequency is determined from the at least two thread bundles and used as the first thread bundle (e.g., comparing the call priorities of the at least two thread bundles and using the thread with the higher call priority as the first thread bundle, etc.). This is not limited here.

[0148] In an optional embodiment, the polling arbitration unit 330 is used to select at least one thread bundle with the largest thread bundle weight as the first thread bundle based on the thread bundle weights corresponding to at least two thread bundles respectively.

[0149] Schematic illustration: When the idle thread data received by the polling arbitration unit 330 is a thread bundle weight, the polling arbitration unit 330 compares at least two thread bundle weights and selects at least one thread bundle with the largest thread bundle weight to obtain the first thread bundle. Optionally, the polling arbitration unit 330 selects the only thread bundle with the largest thread bundle weight from at least two thread bundle weights as the first thread bundle.

[0150] Optionally, when there are at least two thread bundles with the largest and the same thread bundle weight, both of the at least two thread bundles are used as the first thread bundle. Alternatively, the thread bundle with the higher instruction execution frequency is determined from the at least two thread bundles and used as the first thread bundle (e.g., comparing the call priorities of the at least two thread bundles and using the thread with the higher call priority as the first thread bundle, etc.). This is not limited here.

[0151] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0152] In summary, by leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles can be flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle can be improved. This avoids waiting for the thread bundle with a larger number of idle threads to finish executing before proceeding with subsequent processes, thus helping to improve the processing efficiency and speed of data processing tasks when at least two thread bundles are executing them.

[0153] In this embodiment, a process is described whereby at least two thread bundles correspond to a thread bundle state unit, and the thread bundles are then analyzed specifically based on the thread bundle state unit. Each thread bundle corresponds to a thread bundle state unit, which helps to distribute the processing load of thread bundle state analysis and ensures the accuracy of obtaining idle thread data. Furthermore, the idle thread data can be implemented as the number of idle threads themselves to improve polling arbitration efficiency. The idle thread data can also be determined by combining a weight threshold and the number of idle threads, thereby standardizing the number of idle threads through the weight threshold, improving the accuracy of polling arbitration, and facilitating a more accurate determination of the first thread bundle from at least two thread bundles.

[0154] In an optional embodiment, such as Figure 4 As shown, the task processing device includes a global control unit 410, a thread bundle state unit 420, a polling arbitration unit 430, a multiplexer 440, and an instruction execution unit 450. Taking the existence of one global control unit 410, at least two thread bundles corresponding to one thread bundle state unit 420, one polling arbitration unit 430, one multiplexer 440, and one instruction execution unit 450 as an example, the various units of the task processing device are described as follows. Furthermore, the instruction execution unit 450 can selectively obtain the first task instruction based on the first bundle identifier. It can either invoke the first thread bundle to execute the first task instruction at a first moment to implement the second invocation strategy, or allocate second computing resources higher than the first computing resources to the first thread bundle to implement the second invocation strategy. Therefore, the instruction execution unit 450 can also execute corresponding processes.

[0155] (I) Global Control Unit 410

[0156] Indicatively, the global control unit 410 is a core component used for global management and coordination of unit operations. It coordinates the behavior of various units to ensure the smooth progress of data processing tasks and avoid conflicts or resource competition. The full English name of the global control unit 410 is "global control unit", abbreviated as "GCU".

[0157] Optionally, the global control unit 410 includes a weight threshold register 411, which can be regarded as a sub-unit of the global control unit and is used to store weight thresholds.

[0158] Schematic, at least one weight threshold is stored in one weight threshold register 411; or, at least one weight threshold is stored in at least two weight threshold registers 411, wherein each weight threshold register 411 stores one weight threshold.

[0159] Optionally, the weight threshold register 411 is used to send a weight threshold to the thread bundle state unit 420.

[0160] (ii) Thread bundle state unit 420

[0161] Schematic, thread bundle state unit 420 is a unit used to manage thread bundle states. Thread bundle states are used to characterize the running state of a thread bundle, typically including idle and active states.

[0162] The idle state represents a thread that is currently not assigned a task to execute and is in an idle state; the active state represents the opposite of the idle state, indicating that the thread is executing the assigned task instructions, that is, the thread is making full use of computing resources to perform data processing.

[0163] Optionally, during code execution, such as when facing branch paths or multi-path execution, threads within a thread bundle are prone to being idle due to branching. The following is an example of code executed by a thread bundle.

[0164] 01.A0;

[0165] 02.A1;

[0166] 03.if(condition){

[0167] 04.BO;

[0168] 05.B1;

[0169] 06.B2;

[0170] 07.}else{

[0171] 08.Co;

[0172] 09.C1;

[0173] 10.}

[0174] 11.DO;

[0175] The code contains branch paths, such as Figure 5 As shown in Figure 500, this is a diagram illustrating code execution. The if branch executes instructions B0, B1, and B2, while the else branch executes instructions C0 and C1. In the else branch, instructions A0, A1, and D0 are not included in any branch. Since a thread bundle contains at least two threads, the branches executed by each thread may be different.

[0176] For example: Suppose a thread bundle contains 4 threads T0 to T3, and there are two execution scenarios such as Figure 6 and Figure 7 As shown. Since instructions A0, A1, and D0 are not in any branch, all threads in the thread bundle need to execute these three instructions (e.g., ...). Figure 6and Figure 7 In the diagram, black arrows indicate the process of a thread executing an instruction, while white arrows indicate the process of not executing that instruction.

[0177] against Figure 6 The scenario 610 (Scenario 1) is shown, in which threads T0 and T1 execute the else branch, and threads T2 and T3 execute the if branch. Since both the if branch and the else branch need to be executed, the multi-threaded processor needs to traverse the if branch and the else branch. That is, when executing the else branch, threads T2 and T3 need to wait (i.e., be in an idle state), and when executing the if branch, threads T0 and T1 need to wait (i.e., be in an idle state).

[0178] against Figure 7 The scenario 710 (Scenario 2) shown is in which all threads execute the else branch. At this time, no thread executes the if branch. The multi-threaded processor can skip the execution of the if branch and only execute the else branch.

[0179] Depend on Figure 6 and Figure 7 As shown, the traversal of the branch path differs in different scenarios. For example... Figure 6 As shown, if the thread branches within a thread bundle are scattered, the multithreaded processor needs to traverse a significant amount of code, resulting in a longer overall program completion time. Figure 7 As shown, if the thread branches in a thread bundle are relatively concentrated, the multithreaded processor can skip the execution of some branches, and the overall program completion time can be shorter.

[0180] based on Figure 6 and Figure 7 When the number of idle threads in a thread bundle is large due to thread branching or other reasons, the arbitration priority of the corresponding thread bundle can be increased by counting the number of idle threads, thereby speeding up the execution progress of the thread bundle and avoiding delays in the execution progress of the thread set due to the slow execution of individual thread bundles.

[0181] Optionally, there is a one-to-one correspondence between the thread status unit 420 and at least two thread bundles, with each thread bundle status unit 420 managing one thread bundle; the full English name of the thread bundle status unit 420 is "warp status unit," abbreviated as "WSU." Figure 4 As shown, at least two thread bundles are not shown, but the thread bundle state units 420 corresponding to at least two thread bundles are shown respectively. For example, WSU[0] represents the thread bundle state unit corresponding to thread bundle 0 (such as wrap0), and WSU[1], WSU[2], etc. represent the thread bundle state units corresponding to the corresponding thread bundles.

[0182] Optionally, for any thread bundle state unit 420, the thread bundle state unit 420 includes a thread counting subunit 421, such as the thread counting subunit 421 being represented as "idle_cnt".

[0183] Indicatively, the thread counting subunit 421 is used to determine the number of threads that were in an idle state when the thread bundle executed the most recent task instruction; that is, the thread counting subunit 421 is used to obtain the number of idle threads corresponding to the thread bundle.

[0184] Optionally, the thread counting subunit 421 sends the number of idle threads as idle thread bundle data corresponding to the thread bundle to the polling arbitration unit 430.

[0185] Optionally, for any thread bundle state unit 420, the thread bundle state unit 420 includes a thread counting subunit 421 and a weight determination subunit 422, such as the weight determination subunit 422 being denoted as "weight calc unit".

[0186] Indicatively, the weight determination subunit 422 is used to receive the number of idle threads sent by the thread counting subunit 421; it is also used to determine the thread bundle weight corresponding to the thread bundle based on the number of idle threads, and the thread bundle weight is used to characterize the priority of thread bundle invocation when performing data processing tasks.

[0187] Schematic, the weight threshold register 411 is used to send at least one weight threshold to the weight determination subunit 422 in the thread bundle state unit 420. The weight determination subunit 422 compares the number of idle threads in the corresponding thread bundle with the at least one weight threshold to determine the thread bundle weight corresponding to the thread bundle. For example, the weight threshold register 411 is connected to the thread bundle state unit 420 corresponding to at least two thread bundles, thereby sending the weight threshold to the weight determination subunit 422 corresponding to the at least two thread bundle state units 420.

[0188] Optionally, the weight determination subunit 422 sends the thread bundle weight corresponding to the thread bundle as idle thread data to the polling arbitration unit 430.

[0189] In an optional embodiment, the thread bundle state unit 420 further includes a program counter 423, which is a subunit in the thread bundle state unit 420 used to store the address of the currently executing instruction. The full name of the program counter 423 is "program counter", which can be abbreviated as "PC".

[0190] Indicatively, each thread bundle corresponds to a thread bundle state unit 420. Each thread bundle is used to execute at least one task instruction. The instruction address is an address identifier used to obtain the task instruction. Based on the execution order of the task instructions, the instruction addresses corresponding to at least one task instruction can be arranged into an instruction address sequence. Based on the execution status of the task instructions, the program counter 423 in the thread bundle state unit 420 stores the instruction address corresponding to the task instruction that the thread bundle is about to execute in the instruction address sequence.

[0191] In an optional embodiment, program counter 423 is used to send the instruction address corresponding to the task instruction to be executed by the thread bundle to multiplexer 440.

[0192] Indicatively, the program counter 423 corresponding to each thread bundle sends the task instruction to be executed by the thread bundle to the multiplexer 440, so that the multiplexer can obtain the instruction addresses corresponding to at least two thread bundles respectively.

[0193] (III) Arbitration Unit 430

[0194] Indicatively, polling arbitration unit 430 is used to determine a first thread bundle from at least two thread bundles.

[0195] Optionally, when the idle thread data received by the polling arbitration unit 430 is the number of idle threads sent by the thread counting subunit 421, the polling arbitration unit 430 can directly select at least one thread bundle with the largest number of idle threads as the first thread bundle.

[0196] Optionally, when the idle thread data received by the polling arbitration unit 430 is the thread bundle weight sent by the weight determination subunit 422, the polling arbitration unit 430 may select at least one thread bundle with the largest thread bundle weight as the first thread bundle.

[0197] In some embodiments, the polling arbitration unit 430 is used to send the first bundle identifier corresponding to the first thread bundle to the multiplexer 440.

[0198] Schematic, the first bundle identifier is an identifier used to uniquely identify the first thread bundle. Sending the first bundle identifier to the multiplexer 440 helps the multiplexer 440 to specifically identify the first thread bundle.

[0199] (iv) Multiplexer 440

[0200] Schematic, the multiplexer 440 receives a first bundle identifier sent by the polling arbitration unit 430 and instruction addresses sent by at least two program counters 423 respectively, thereby enabling it to selectively determine the first instruction address corresponding to the first thread bundle from at least two instruction addresses based on the first bundle identifier.

[0201] Here, the first instruction address represents the instruction address of the first task instruction that the first thread bundle is about to execute. The full name of the multiplexer 440 is "multiplexer," abbreviated as "MUX."

[0202] (v) Instruction Execution Unit 450

[0203] Indicatively, the instruction execution unit 450 is a unit used to call the thread bundle to execute task instructions. The instruction execution unit 450 can also be called a pipeline. The first instruction address is input into the instruction execution unit so that the instruction execution unit reads the first task instruction from the first instruction address and executes the first task instruction through the first thread bundle.

[0204] In an optional embodiment, the instruction execution frequency of the first thread bundle when executing task instructions is increased by adjusting the first invocation strategy to the second invocation strategy. Optionally, the invocation strategy includes at least one of a thread bundle invocation priority strategy and a resource amount invocation strategy. The method of adjusting the first invocation strategy to the second invocation strategy is described below.

[0205] (1) The invocation strategy is the thread bundle invocation priority strategy.

[0206] The illustrative thread bundle invocation priority strategy is used to describe the priority of invoking thread bundles to execute task instructions.

[0207] In an optional embodiment, the instruction execution unit 450 is further configured to obtain a first task instruction based on the first bundle identifier; and invoke the first thread bundle to execute the first task instruction at a first moment.

[0208] The first moment is earlier than the second moment corresponding to the first invocation strategy. Illustratively, the first moment is the execution time when the second invocation strategy instructs the first thread bundle to execute the first task instruction, and the second moment is the execution time when the first invocation strategy instructs the first thread bundle to originally execute the first task instruction.

[0209] Optionally, by adjusting the calling priority of the first thread bundle, the second moment corresponding to the first calling strategy can be adjusted to the first moment corresponding to the second calling strategy.

[0210] Indicatively, the first invocation strategy indicates that the invocation priority of the first thread bundle is lower, therefore the second time step corresponding to the first invocation strategy is later. For example, if the invocation priority of other thread bundles is 1 and the invocation priority of the first thread bundle is 2, then during the thread bundle invocation process, other thread bundles are invoked first to execute their corresponding task instructions, and then the first thread bundle is invoked to execute its task instructions, and so on. To avoid a large number of threads in the first thread bundle remaining in an idle state, the first invocation strategy is adjusted to a second invocation strategy, such as the second invocation strategy indicating that the invocation priority of the first thread bundle is the highest, so that the first time step corresponding to the second invocation strategy is earlier than the second time step. For example, if the invocation priority of the first thread bundle is adjusted to 1 and the invocation priority of other thread bundles is adjusted to 2, then during the thread bundle invocation process, the first thread bundle is invoked first to execute its corresponding task instructions, and then other thread bundles are invoked to execute their task instructions, and so on.

[0211] (2) The invocation strategy is implemented as a resource quantity invocation strategy.

[0212] The resource allocation strategy is illustrative and describes the amount of computational resources allocated to a thread bundle when a thread bundle executes a task instruction.

[0213] In an optional embodiment, the instruction execution unit is further configured to obtain a first task instruction based on the first bundle identifier; and allocate a second computing resource higher than the first computing resource to the first thread bundle to execute the first task instruction.

[0214] The first computing resource is the computing resource allocated to the first thread bundle according to the first invocation strategy, and the second computing resource is the computing resource allocated to the first thread bundle according to the second invocation strategy.

[0215] Schematic, the first computing resource and the second computing resource are used to describe different amounts of computing resources allocated to the first thread bundle, wherein the first computing resource represents a smaller amount of resources allocated to the first thread bundle for executing the first task instruction, and the second computing resource represents a larger amount of resources allocated to the first thread bundle for executing the first task instruction.

[0216] For example, the first invocation strategy indicates that 10 computing resources should be allocated when the first thread bundle is invoked to execute the first task instruction. If the number of idle threads corresponding to the first thread bundle is large, the first invocation strategy will be adjusted to the second invocation strategy. For example, the second invocation strategy indicates that 15 computing resources should be allocated when the first thread bundle is invoked to execute the first task instruction. This helps the first thread bundle to execute the first task instruction more efficiently through the second computing resources, thereby improving the instruction execution efficiency.

[0217] Optionally, the amount of computing resources in the second computing resource that exceeds the amount of computing resources in the first computing resource can be obtained from public resources or additionally from computing resources allocated to other thread bundles, without limitation here.

[0218] In some embodiments, the instruction execution unit 450 is further configured to determine a second thread bundle from at least two thread bundles based on the number of idle threads corresponding to at least two thread bundles respectively.

[0219] Specifically, based on the first invocation strategy, a third computing resource is allocated to the second thread bundle. The second thread bundle is at least one thread bundle with the most idle threads, excluding the first thread bundle. Illustratively, after counting the number of idle threads corresponding to at least two thread bundles, not only is the at least one thread bundle with the most idle threads determined as the first thread bundle, but the second thread bundle is also determined from the thread bundles with the most idle threads outside the first thread bundle. For example, the thread bundle with the most idle threads is designated as the first thread bundle, and the thread bundle with the second most idle threads is designated as the second thread bundle.

[0220] In illustrative terms, the computing resources allocated to the second thread bundle based on the preset first invocation strategy are the third computing resources, which represent the amount of resources allocated when the second thread bundle executes task instructions.

[0221] In some embodiments, a fourth computing resource is obtained from a third computing resource; a second computing resource is allocated to a first thread bundle, the second computing resource being the sum of the first computing resource and the fourth computing resource.

[0222] In a schematic manner, a fourth computing resource is obtained from the third computing resource that was originally allocated to the second thread bundle. The fourth computing resource is no greater than the third computing resource, such as the third computing resource being 10 and the fourth computing resource being 5. When allocating computing resources to the first thread bundle, if the first invocation strategy indicates that the first computing resource is allocated to the first thread bundle, an additional fourth computing resource is allocated to the first thread bundle, thereby allocating a total of second computing resources to the first thread bundle, which improves the instruction execution efficiency when the first thread bundle executes the first task instruction.

[0223] It is worth noting that the above-described methods of adjusting the invocation strategy to improve instruction execution efficiency are merely illustrative examples, and the embodiments of this application do not limit this.

[0224] In summary, by leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles can be flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle can be improved. This avoids waiting for the thread bundle with a larger number of idle threads to finish executing before proceeding with subsequent processes, thus helping to improve the processing efficiency and speed of data processing tasks when at least two thread bundles are executing them.

[0225] This application describes a process to improve instruction execution efficiency and thus increase task execution speed by adjusting the invocation strategy. This can be achieved by adjusting the thread bundle invocation priority to pre-call the first thread bundle to execute the first task instruction, thereby avoiding the problem of a large number of threads in the first thread bundle remaining idle and slowing down instruction execution. Alternatively, allocating more computing resources can improve the instruction execution efficiency of the first thread bundle executing the first task instruction. Furthermore, this approach significantly improves the fault tolerance of instruction execution and is highly effective in large-scale data processing scenarios.

[0226] In an optional embodiment, the execution of thread bundles in the related art is described. For example... Figure 8 As shown, taking the thread set 810 as an example, which includes four thread bundles, the four thread bundles include thread bundle 0, thread bundle 1, thread bundle 2 and thread bundle 3; when performing data processing tasks through the GPU, the data processing tasks are usually organized together in the form of at least two thread sets, that is, the data processing tasks are executed together by at least two thread sets.

[0227] Optionally, the data processing tasks are distributed to various multi-threaded execution units in the form of thread bundles by the task scheduler. A thread bundle contains at least two threads. The task portion that a thread set needs to execute will be assigned to the same multi-threaded execution unit. The thread set can be considered to have completed execution only when at least two threads in the thread set have completed the task instructions in the task portion.

[0228] Indicative, such as Figure 9 As shown, arbitration between at least two thread bundles (such as thread bundle W0, thread bundle W1, thread bundle W2, and thread bundle W3) in a thread set typically employs a static arbitration strategy (such as executing task instructions according to a pre-defined call priority), without being aware of the current execution state of each thread bundle.

[0229] like Figure 8As shown, within the execution cycle of the task execution portion of the multi-threaded execution unit, thread bundle 1 executes instructions faster (higher instruction execution frequency), followed by thread bundle 3, then thread bundle 0, and finally thread bundle 2. For example, this execution process occurs because the branch paths of the threads within thread bundle 2 are more dispersed, requiring thread bundle 2 to traverse more branch paths, resulting in a longer overall execution time. Even after other threads have finished executing, thread bundle 2 continues to execute, with this execution time being T (the instruction execution speeds of thread bundle 1, thread bundle 3, and thread bundle 0 are all relatively similar).

[0230] Therefore, during the execution time T when the critical thread bundle is executed alone, since thread bundle 2 exclusively occupies the multi-threaded processing unit, if the instruction stream of the thread bundle execution has data dependencies (such as thread set 2 depending on thread set 1 to complete before it can execute), it will cause the pipeline to stall, and the utilization rate of the multi-threaded processing unit will drop sharply.

[0231] In an optional embodiment, the above-described task processing device may also be referred to as "a key thread bundle identification device for improving execution efficiency," such as... Figure 10 The diagram shown is a schematic overall architecture diagram of a task processing device.

[0232] This includes thread bundle state units 1010WSU, each corresponding to at least two thread bundles. Each thread bundle state unit 1010 contains two key registers (subunits): a thread counter subunit (idle_cnt) and a program counter (PC). The thread counter subunit counts the number of invalid thread channels executed within a thread bundle over a period of time (i.e., the number of threads in an idle state – the number of idle threads). The program counter, which indicates the program pointer, stores the instruction address of the currently executing task instruction. The program counter is maintained by a program counter update unit (PC update unit). For example, there are n thread bundle state units, where n is the number of thread bundles that a multi-threaded processing unit can accommodate (e.g., one thread set corresponds to one multi-threaded processing unit, and n represents the number of thread bundles in the thread set), and n is a positive integer. One thread bundle corresponds to one thread bundle state unit.

[0233] The larger the number of idle threads counted by the thread counting subunit, the more branch paths the current thread bundle traversed. The number of idle threads is sent to the weight determination subunit [weight calc (calculate) unit] to generate the priority used by the polling arbitration unit wrr. The polling arbitration unit performs weighted polling arbitration on at least two thread bundles based on the thread bundle weights sent by at least two thread bundle state units, selects the thread bundle that most needs to be executed in the current scenario as the first thread bundle, and outputs the thread bundle number wid (i.e., the first bundle identifier) ​​corresponding to the first thread bundle.

[0234] Subsequently, the multiplexer 1020MUX selects the first instruction address corresponding to the first task instruction to be executed by the first thread bundle from the instruction addresses sent by at least two thread bundle state units based on the first bundle identifier, and sends it to the instruction execution unit pipeline for execution.

[0235] In addition, another input to the weight determination subunit in the thread bundle state unit 1010 comes from the global control unit (GCU), which contains four weight threshold registers (wth0 to 3). The GCU broadcasts the weight thresholds stored in these four weight threshold registers to each thread bundle state unit. The weight determination subunit compares the number of idle threads with the weight thresholds corresponding to the four weight threshold registers to determine the final thread bundle weights to be arbitrated by the polling arbitration unit.

[0236] In an optional embodiment, the task processing apparatus further includes a counting unit and a multiplexer.

[0237] In some embodiments, the instruction execution unit is further configured to generate an idle vector signal based on the idle states of at least two threads in the first thread bundle after invoking the first thread bundle to execute the first task instruction.

[0238] The idle vector signal is used to characterize the state distribution of at least two threads in the first thread bundle. The state distribution is used to describe the running status of at least two threads respectively, such as thread 1 being in an idle state and thread 2 being in an active state.

[0239] Indicatively, the idle vector signal can represent not only the number and position of threads in the first thread bundle that are in an idle state, but also the number and position of threads in the first thread bundle that are in an active state.

[0240] like Figure 10As shown, the instruction execution unit 1030 is the main pipeline for task instruction execution. For each task instruction executed, the instruction execution unit 1030 outputs an idle state signal `idle_vector`, which indicates the idle state of each thread. Assuming the instruction execution unit can execute 4 threads in parallel, the idle state signal is 4 bits, with each bit corresponding to one thread. If the execution channel corresponding to a thread is idle (representing the thread is in an idle state), the corresponding bit of the idle state signal is 1. For example: Figure 6 In scenario 1, when the B0 task instruction is executed, the idle state signal output by the instruction execution unit 1030 is 0011.

[0241] In some embodiments, the instruction execution unit is further configured to send an idle vector signal to the counting unit; the counting unit is configured to determine the number of threads in an idle state based on the idle vector signal.

[0242] For illustrative purposes, the thread count describes the number of threads in an idle state when the first thread bundle executes the first task instruction. For example, after the counting unit Pop_cnt receives the idle state signal 0011, it counts the number of 1s in the idle state signal, and the thread count idle_num output by the counting unit is 2.

[0243] In some embodiments, the counting unit is further configured to send the number of threads to the multiplexer; the multiplexer is configured to send the number of threads to the first thread bundle state unit corresponding to the first thread bundle.

[0244] Here, the first thread bundle state unit is the thread bundle state unit corresponding to the first thread bundle. Illustratively, at least two thread bundles each correspond to one thread bundle state unit, with the first thread bundle state unit specifically referring to the thread bundle state unit of the first thread bundle. The multiplexer can determine the thread bundle (such as the first thread bundle) based on the most recently executed task instruction, and thus send the counted thread count to the corresponding thread bundle.

[0245] Optionally, the thread bundle state unit includes a counting control subunit, wherein the first thread bundle state unit corresponding to the first thread bundle includes a first counting control subunit; the first counting control subunit is used to receive the number of threads; and to cumulatively count the number of idle threads of the first thread bundle based on the number of threads.

[0246] Indicatively, each thread bundle corresponds to a thread bundle state unit, and each thread bundle state unit includes a counting control subunit. When the multiplexer sends the thread count to the first thread bundle state unit corresponding to the first thread bundle, the multiplexer sends the thread count to the first counting control subunit in the first thread bundle state unit, instructing the first counting control subunit to accumulate the thread count based on the already stored number of idle threads, thereby achieving the purpose of cumulative counting.

[0247] like Figure 10 As shown, the task processing device also includes a de-multiplexer (DEMUX). The de-multiplexer outputs the counted number of threads to the counting control subunit in the first thread bundle state unit corresponding to the first thread bundle, based on the first thread bundle used to execute the task instructions, thereby incrementing the number of idle threads to adjust the value of the number of idle threads.

[0248] In an optional embodiment, the task processing apparatus further includes a global control unit, which includes a clock counter, a maximum counter, and a global zeroing subunit.

[0249] In some embodiments, a clock counter is used to perform an increment operation when a clock cycle is reached, to obtain a clock count value.

[0250] To illustrate, the clock cycle is typically controlled by the computer's clock generator. The clock cycle defines the time interval for synchronization among all hardware components in the system (such as the CPU, GPU, and memory). The frequency of the clock cycle determines how many cycles the computer executes per second, thus affecting its performance. The length of the clock cycle is usually determined by both the hardware and the clock signal generation mechanism.

[0251] Optionally, each time a clock cycle is reached, the clock counter increments by one, such as from 3 to 4, to obtain a clock count value that reflects the number of clock cycles elapsed.

[0252] In some embodiments, the clock counter sends a clock count value to the global return-to-zero subunit.

[0253] To illustrate, the clock counter sends the clock count value to the global zeroing subunit in real time; or, the clock counter sends the most recently updated clock count value to the global zeroing subunit after each clock cycle, etc.

[0254] In some embodiments, the maximum counter is used to receive the maximum count value and send the maximum count value to the global zeroing subunit.

[0255] As an illustration, the maximum count value of the maximum counter in the global control unit and the weight thresholds of the four weight threshold registers can be configured by software. The configuration signal enters through the signal receiving port and is configured into the corresponding register by the signal receiving unit config logic, so that the maximum counter can obtain the preset maximum count value.

[0256] Optionally, the maximum counter sends the maximum count value to the global zeroing subunit upon receiving the maximum count value; or, the maximum counter sends the maximum count value to the global zeroing subunit within a preset clock cycle after receiving the maximum count value.

[0257] In some embodiments, the global zeroing subunit is further configured to generate a zeroing signal when the clock count value reaches the maximum count value; and send the zeroing signal to the thread bundle state units corresponding to at least two thread bundles respectively.

[0258] Schematic, the zeroing signal is used to clear the number of idle threads, that is, to reduce the count of the number of idle threads to zero. Optionally, after the global zeroing subunit generates a zeroing signal, it sends a zeroing signal to the thread bundle state units corresponding to at least two thread bundles respectively, so as to adjust the count of at least two idle threads to be in a zeroed state.

[0259] In some embodiments, the first counting control subunit is further configured to perform a zeroing operation on the number of idle threads corresponding to the first thread bundle state unit upon receiving a zeroing signal.

[0260] Indicatively, the zeroing signal sent by the global zeroing subunit is received by the counting control subunit in the thread bundle state unit. Taking the first counting control subunit in the first thread bundle state unit receiving the zeroing signal as an example, the first counting control subunit controls the number of idle threads corresponding to the first thread bundle state unit to zero based on the zeroing signal.

[0261] The above process introduced the method of obtaining the number of idle threads based on cumulative counting. Based on cumulative counting, the number of idle threads over a period of time can be considered in the process of determining the first thread bundle, avoiding the randomness problem of relying solely on the most recent idle thread situation analysis, and improving the accuracy of determining the first thread bundle and the stability of task execution.

[0262] like Figure 10As shown, the global control unit also has two registers: a maximum counter `timer_max` and a clock counter `timer_cnt`. The clock counter increments by 1 in each clock cycle. When the clock counter reaches the maximum count value indicated by the maximum counter, it is cleared and counting restarts. At this time, the global clear subunit generates a clear signal `cnt_clear`, which is sent to the idle_cnt control subunit in the thread bundle state unit. This clears the number of at least two idle threads, thus restarting the counting of the branch traversal state of the thread bundle.

[0263] In other words, based on the settings of the maximum counter and the clock counter, the number of idle threads can be determined by comprehensively considering the execution status of at least one task instruction (which can be accumulated). This allows for a more balanced measurement of instruction execution, which in turn helps to better arbitrate at least two thread bundles, thereby specifically increasing the instruction execution frequency of thread bundles with a larger number of idle threads. For example, if the historical number of idle threads is large, it can be assumed that the instruction execution frequency of that thread bundle is slow. The arbitration priority of the thread bundle can be dynamically adjusted to increase the instruction execution frequency of the thread bundle, thereby synchronizing the execution completion time of all thread bundles in a thread set as much as possible, thus improving the execution efficiency of the multi-threaded execution unit.

[0264] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0265] In summary, by leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles can be flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle can be improved. This avoids waiting for the thread bundle with a larger number of idle threads to finish executing before proceeding with subsequent processes, thus helping to improve the processing efficiency and speed of data processing tasks when at least two thread bundles are executing them.

[0266] In this embodiment, the number of idle threads is counted based on the execution status of different branches of the thread bundle. When the number of historically idle threads is large, it can be considered that the execution progress of the thread bundle is slow. Thus, the arbitration priority of the thread bundle is dynamically adjusted to increase the instruction execution frequency of the thread bundle. This makes the execution completion time of all threads in a thread set as synchronized as possible, reduces the time that critical thread bundles monopolize multi-threaded processing units, and thus improves the execution efficiency of the processor.

[0267] In an optional embodiment, the task processing method is executed by the server as an example. This is illustrative, as shown below. Figure 11 As shown, the task processing method includes the following steps 1110 to 1140.

[0268] Step 1110: Receive data processing task.

[0269] The data processing task is executed through at least two thread bundles, each containing at least two threads.

[0270] Schematic, a data processing task is used to characterize a task instruction to analyze large amounts of data to generate analytical results. Optionally, a data processing task includes at least one of several processing methods such as data collection, storage, cleaning, analysis, and presentation.

[0271] In some embodiments, a data processing task is input into a GPU, which splits the data processing task into at least two task parts. Each task part is assigned to a set of threads in the GPU, and the at least two sets of threads process the at least two task parts in parallel. At least two thread bundles within each thread bundle execute the task part. Each task part typically consists of at least two task instructions, and the threads in the thread bundle are responsible for executing the task instructions in the task part.

[0272] Step 1120: Obtain the idle thread data corresponding to at least two thread bundles.

[0273] The idle thread data indicates the number of threads in an idle state within a thread bundle.

[0274] Indicatively, the idle state represents a thread that is currently idle as it has not been assigned a task to execute. Optionally, a thread being in an idle state includes at least one of the following situations: (1) the thread is in an idle state due to resource waiting, such as the thread waiting for necessary computing resources or data to become available; (2) during code execution, such as when facing branch paths or multi-path execution, the thread is in an idle state due to branching; (3) the thread is in an idle state when it has finished executing the assigned task instructions and no new task instructions are assigned to the thread.

[0275] In some embodiments, the number of idle threads corresponding to a thread bundle is used as the idle thread data corresponding to the thread bundle; or, the thread bundle weight corresponding to the thread bundle is determined based on the number of idle threads corresponding to the thread bundle, and the thread bundle weight is used as the idle thread data corresponding to the thread bundle.

[0276] In some embodiments, at least two thread bundle state units are deployed in the server, and the at least two thread bundle state units correspond one-to-one with at least two thread bundles. Idle thread data corresponding to a thread bundle is obtained through the thread bundle state units.

[0277] Optionally, the thread bundle state unit includes a thread counting subunit, which obtains the number of idle threads corresponding to the thread bundle as the idle thread data corresponding to the thread bundle; or, the thread bundle state unit includes a thread counting subunit and a weight determination subunit, which obtains the number of idle threads corresponding to the thread bundle through the thread counting subunit, sends the number of idle threads to the weight determination subunit, and obtains the thread bundle weight corresponding to the thread bundle as the idle thread data corresponding to the thread bundle.

[0278] In some embodiments, the idle thread data is determined based on the number of idle threads obtained from the most recent statistics; or, the idle thread data is determined based on the number of idle threads obtained from the cumulative count, which is not limited here.

[0279] It is worth noting that the content of obtaining idle thread data here is only an illustrative example. The content of obtaining idle thread data can be referred to the above-described method of obtaining data through the task processing device. This application embodiment does not limit or elaborate on this.

[0280] Step 1130: Determine the first thread bundle from the at least two thread bundles based on the idle thread data corresponding to the at least two thread bundles respectively.

[0281] In some embodiments, a polling arbitration unit is deployed in the server. The polling arbitration unit receives idle thread data sent by at least two thread bundle state units respectively, thereby determining a first thread bundle based on at least two idle thread data.

[0282] In some embodiments, when the idle thread data is the number of idle threads corresponding to a thread bundle, a thread bundle corresponding to at least one maximum number of idle threads is used as the first thread bundle; when the idle thread data is the weight of a thread bundle corresponding to a thread bundle, a thread bundle corresponding to at least one maximum thread bundle weight is used as the first thread bundle, etc.

[0283] The first thread bundle includes a first task instruction to be executed, and the first thread bundle corresponds to a first invocation strategy.

[0284] It is worth noting that the determination of the content of the first thread bundle here is only an illustrative example. The determination of the content of the first thread bundle can be referred to the determination method through the task processing device described above. This application embodiment does not limit or elaborate on this.

[0285] Step 1140: Based on the first bundle identifier corresponding to the first thread bundle, the first thread bundle is invoked to execute the first task instruction according to the second invocation strategy.

[0286] Optionally, an instruction execution unit is deployed in the server, and the instruction execution unit calls the first thread bundle to execute the first task instruction according to the second calling strategy.

[0287] Among them, the instruction execution frequency of the first thread bundle under the second invocation strategy is higher than that under the first invocation strategy.

[0288] In an optional embodiment, the instruction execution frequency of the first thread bundle when executing task instructions is increased by adjusting the first invocation strategy to a second invocation strategy. Optionally, the invocation strategy includes at least one of a thread bundle invocation priority strategy and a resource amount invocation strategy.

[0289] Indicatively, the thread bundle invocation priority strategy describes the priority of invoking thread bundles to execute task instructions; the resource allocation strategy describes the amount of computing resources allocated to a thread bundle when invoking a thread bundle to execute task instructions.

[0290] In some embodiments, the instruction execution unit obtains a first task instruction based on a first bundle identifier; and invokes a first thread bundle to execute the first task instruction at a first moment; wherein the first moment is earlier than the second moment corresponding to the first invocation strategy.

[0291] In some embodiments, the instruction execution unit obtains a first task instruction based on a first bundle identifier; allocates a second computing resource higher than the first computing resource to the first thread bundle to execute the first task instruction; wherein the first computing resource is the computing resource allocated to the first thread bundle according to a first invocation strategy, and the second computing resource is the computing resource allocated to the first thread bundle according to a second invocation strategy.

[0292] It is worth noting that the above are merely illustrative examples, and the embodiments of this application are not limited thereto.

[0293] In summary, by leveraging the idle status of at least two thread bundles within a thread bundle, the idle thread data corresponding to each of the at least two thread bundles can be flexibly determined. This allows for the targeted selection of the first thread bundle that can execute task instructions as quickly as possible. By adjusting the original first invocation strategy for executing the first task instruction to a second invocation strategy with a higher instruction execution frequency, the execution efficiency of the first thread bundle can be improved. This avoids waiting for the thread bundle with a larger number of idle threads to finish executing before proceeding with subsequent processes, thus helping to improve the processing efficiency and speed of data processing tasks when at least two thread bundles are executing them.

[0294] It should be noted that the task processing device provided in the above embodiments is only an example of the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the task processing device and the task processing method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0295] Figure 12 This illustration shows a schematic diagram of a server provided in an exemplary embodiment of this application. The server 1200 includes a Central Processing Unit (CPU) 1201, a system memory 1204 including Random Access Memory (RAM) 1202 and Read Only Memory (ROM) 1203, and a system bus 1205 connecting the system memory 1204 and the CPU 1201. The server 1200 also includes a mass storage device 1206 for storing an operating system 1213, application programs 1214, and other program modules 1215.

[0296] Mass storage device 1206 is connected to central processing unit 1201 via a mass storage controller (not shown) connected to system bus 1205. Mass storage device 1206 and its associated computer-readable media provide non-volatile storage for server 1200. That is, mass storage device 1206 may include computer-readable media (not shown) such as hard disk or compact disc read-only memory (CD-ROM) drives.

[0297] In general, computer-readable media can include computer storage media and communication media. Computer storage media includes volatile and non-volatile, removable and non-removable media implemented using any method or technology for storing information such as computer-readable instructions, data structures, program modules or other data. The system memory 1204 and mass storage device 1206 described above can be collectively referred to as memory.

[0298] According to various embodiments of this application, server 1200 can also be connected to a remote computer on a network, such as the Internet. That is, server 1200 can be connected to network 1212 via network interface unit 1211 connected to system bus 1205, or network interface unit 1211 can be used to connect to other types of networks or remote computer systems (not shown).

[0299] The aforementioned memory also includes one or more programs, which are stored in the memory and configured to be executed by the CPU.

[0300] Embodiments of this application also provide a computer device, which includes a processor and a memory. The memory stores at least one instruction, at least one program, code set, or instruction set. The at least one instruction, at least one program, code set, or instruction set is loaded and executed by the processor to implement the task processing method provided in the above-described method embodiments.

[0301] Embodiments of this application also provide a computer-readable storage medium storing at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, at least one program, code set, or instruction set is loaded and executed by a processor to implement the task processing method provided in the above-described method embodiments.

[0302] Embodiments of this application also provide a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform any of the task processing methods described in the above embodiments.

[0303] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A task processing device, characterized in that, The device includes: a thread beam state unit, a polling arbitration unit, and an instruction execution unit; The thread bundle state unit is used to obtain idle thread data corresponding to the at least two thread bundles when the data processing task is executed through at least two thread bundles. The idle thread data is used to indicate the number of threads in the idle state within the thread bundle, and the thread bundle includes at least two threads. The idle thread data is then sent to the polling arbitration unit. The polling arbitration unit is used to determine a first thread bundle from the at least two thread bundles based on the idle thread data corresponding to the at least two thread bundles respectively. The first thread bundle includes a first task instruction to be executed and the first thread bundle corresponds to a first invocation strategy. The first bundle identifier corresponding to the first thread bundle is sent to the instruction execution unit. The instruction execution unit is configured to invoke the first thread bundle to execute the first task instruction based on the first bundle identifier and according to the second invocation strategy, wherein the instruction execution frequency of the first thread bundle under the second invocation strategy is higher than the instruction execution frequency under the first invocation strategy.

2. The apparatus according to claim 1, characterized in that, The device includes at least two thread bundle state units, where the i-th thread bundle corresponds to the i-th thread bundle state unit, and i is a positive integer; The i-th thread bundle state unit is used to obtain the number of idle threads corresponding to the i-th thread bundle; Based on the number of idle threads, the thread bundle weight corresponding to the i-th thread bundle is obtained as the idle thread data. The thread bundle weight is used to characterize the priority of calling the i-th thread bundle when executing the data processing task. The thread bundle weight corresponding to the i-th thread bundle is sent to the polling arbitration unit. The polling arbitration unit is further configured to receive the thread bundle weights corresponding to the at least two thread bundles respectively, and determine the first thread bundle from the at least two thread bundles based on the thread bundle weights corresponding to the at least two thread bundles respectively.

3. The apparatus according to claim 2, characterized in that, The thread bundle state unit includes a thread counting subunit and a weight determination subunit. The i-th thread bundle state unit includes the i-th thread counting subunit and the i-th weight determination subunit. The i-th thread counting subunit is used to obtain the number of idle threads corresponding to the i-th thread bundle; Send the number of idle threads corresponding to the i-th thread bundle to the i-th weight determination subunit; The i-th weight determination subunit is used to obtain at least one weight threshold, which is a threshold parameter stored in a weight threshold memory. The weight threshold is used to determine the priority of the thread bundles called when processing different tasks. The subunit compares the numerical relationship between the number of idle threads corresponding to the i-th thread bundle and the at least one weight threshold to obtain the thread bundle weight corresponding to the i-th thread bundle.

4. The apparatus according to claim 3, characterized in that, The device further includes: a global control unit, the global control unit including at least one weight threshold register; The global control unit is used to broadcast the weight threshold stored in the weight threshold register to the thread beam state units corresponding to the at least two thread beams respectively. The i-th weight determination subunit is further configured to receive the at least one weight threshold; compare the numerical relationship between the number of idle threads corresponding to the i-th thread bundle and the at least one weight threshold to obtain at least one comparison result; and determine the thread bundle weight of the i-th thread bundle by combining the at least one comparison result.

5. The apparatus according to claim 2, characterized in that, The polling arbitration unit is further configured to select at least one thread bundle with the largest thread bundle weight as the first thread bundle based on the thread bundle weights corresponding to the at least two thread bundles respectively.

6. The apparatus according to claim 1, characterized in that, The device includes at least two thread bundle state units, where the i-th thread bundle corresponds to the i-th thread bundle state unit, and i is a positive integer; The i-th thread bundle state unit is further configured to obtain the number of idle threads corresponding to the i-th thread bundle as the idle thread data; and send the number of idle threads corresponding to the i-th thread bundle to the polling arbitration unit; The polling arbitration unit is further configured to select at least one thread bundle with the largest number of idle threads among the at least two thread bundles as the first thread bundle.

7. The apparatus according to any one of claims 1 to 6, characterized in that, The instruction execution unit is further configured to obtain the first task instruction based on the first bundle identifier; and to invoke the first thread bundle to execute the first task instruction at a first moment, wherein the first moment is earlier than the second moment corresponding to the first invocation strategy.

8. The apparatus according to any one of claims 1 to 6, characterized in that, The device includes at least two thread bundle state units and a multiplexer, wherein the i-th thread bundle corresponds to the i-th thread bundle state unit, and i is a positive integer; The i-th thread bundle state unit is also used to send the instruction address corresponding to the task instruction to be executed to the multiplexer; The polling arbitration unit is also used to send the first bundle of identifiers to the multiplexer; The multiplexer is configured to receive instruction addresses sent by the at least two thread bundle state units respectively; search for at least two instruction addresses based on the first bundle identifier to determine the first instruction address corresponding to the first thread bundle; read the first task instruction from the first instruction address; and send the first task instruction to the instruction execution unit.

9. The apparatus according to any one of claims 1 to 6, characterized in that, The instruction execution unit is further configured to obtain the first task instruction based on the first bundle identifier; allocate a second computing resource higher than the first computing resource to the first thread bundle, wherein the first computing resource is the computing resource allocated to the first thread bundle in accordance with the first invocation strategy, and the second computing resource is the computing resource allocated to the first thread bundle in accordance with the second invocation strategy.

10. The apparatus according to claim 9, characterized in that, The instruction execution unit is further configured to determine a second thread bundle from the at least two thread bundles based on the number of idle threads corresponding to the at least two thread bundles respectively; wherein, based on the first invocation strategy, a third computing resource is allocated to the second thread bundle, and the second thread bundle is at least one thread bundle with the largest number of idle threads other than the first thread bundle; a fourth computing resource is obtained from the third computing resource; and the second computing resource is allocated to the first thread bundle, wherein the second computing resource is the sum of the first computing resource and the fourth computing resource.

11. The apparatus according to any one of claims 1 to 6, characterized in that, The device also includes: a counting unit and a multiplexer; The instruction execution unit is further configured to, after calling the first thread bundle to execute the first task instruction, generate an idle vector signal based on the idle states of at least two threads in the first thread bundle, the idle vector signal being used to characterize the state distribution of at least two threads in the first thread bundle; and send the idle vector signal to the counting unit. The counting unit is used to determine the number of threads in the idle state based on the idle vector signal; and to send the number of threads to the multiplexer. The multiplexer is used to send the number of threads to the first thread bundle state unit corresponding to the first thread bundle, wherein the first thread bundle state unit is the thread bundle state unit corresponding to the first thread bundle.

12. The apparatus according to claim 11, characterized in that, The thread bundle state unit includes a counting control subunit, and the first thread bundle state unit corresponding to the first thread bundle includes a first counting control subunit. The first counting control subunit is used to receive the number of threads and to cumulatively count the number of idle threads in the first thread bundle based on the number of threads.

13. The apparatus according to claim 12, characterized in that, The device also includes a global control unit, which includes a clock counter, a maximum counter, and a global reset subunit. The clock counter is used to increment by one when the clock cycle is reached, so as to obtain a clock count value. Send the clock count value to the global zeroing subunit; The maximum counter is used to receive the maximum count value; Send the maximum count value to the global zeroing subunit; The global zeroing subunit is used to generate a zeroing signal when the clock count value reaches the maximum count value; and to send the zeroing signal to the thread state units corresponding to at least two thread bundles respectively. The first counting control subunit is further configured to perform a zeroing operation on the number of idle threads corresponding to the first thread bundle state unit when the zeroing signal is received.

14. A task processing method, characterized in that, The method includes: Receive a data processing task, the data processing task being executed through at least two thread bundles, each thread bundle including at least two threads; Obtain the idle thread data corresponding to the at least two thread bundles respectively, wherein the idle thread data is used to indicate the number of threads in the thread bundle that are in an idle state; Based on the idle thread data corresponding to the at least two thread bundles respectively, a first thread bundle is determined from the at least two thread bundles. The first thread bundle includes a first task instruction to be executed and the first thread bundle corresponds to a first invocation strategy. Based on the first bundle identifier corresponding to the first thread bundle, the first thread bundle is invoked to execute the first task instruction according to the second invocation strategy. The instruction execution frequency of the first thread bundle under the second invocation strategy is higher than the instruction execution frequency under the first invocation strategy.

15. A computer device, characterized in that, The computer device includes a processor and a memory, the memory storing at least one program, which is loaded and executed by the processor to implement the task processing method as described in claim 14.

16. A computer-readable storage medium, characterized in that, The computer storage medium stores at least one program, which is loaded and executed by a processor to implement the task processing method as described in claim 14.

17. A computer program product, characterized in that, It includes computer instructions that, when executed by a processor, implement the task processing method as described in claim 14.

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