Normalization calculation method, device and equipment based on FPGA (Field Programmable Gate Array)
By shifting and splitting the input vector into integer and fractional parts on the FPGA through subtraction, and then using lookup tables and Taylor expansion to perform exponent calculation, the problem of high-precision normalized exponent functions on FPGA is solved, and efficient normalization calculation is achieved.
Patent Information
- Application Number
- CN202610155305.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-03
- Publication Date
- 2026-05-26
AI Technical Summary
In the existing technology, it is difficult to perform normalized exponential function (softmax function) calculation with high accuracy on FPGA, especially due to the large resource consumption and long calculation cycle caused by complex exponent and division operations.
The input vector is shifted into the negative domain by subtraction, compressing the exponent domain. The complex exponent calculation is split into integer and fractional parts, which are calculated separately. The exponent is calculated using lookup tables and Taylor expansion. Finally, the normalized result is obtained through the normalized reference value.
It simplifies the computational logic, reduces resource consumption, achieves high-precision normalized exponential function operations, and improves the computational efficiency of FPGA.