Display panel, driving method thereof, driving chip and display device

Abstract

The invention discloses a display panel and a driving method thereof, a driving chip and a display device, the display panel comprises a sub-pixel, the sub-pixel comprises a pixel circuit and a light-emitting element, the pixel circuit accesses a light-emitting control signal and a first scanning signal, the light-emitting control signal is used for controlling whether the sub-pixel emits light or not, and the first scanning signal is used for scanning the sub-pixel. The first scanning signal is used for controlling whether the data signal is written into the pixel circuit; the working modes of the display panel comprise a first mode, a second mode and a transition mode, the transition mode is located between the first mode and the second mode, and the first mode is before the transition mode; in the transition mode, the light-emitting control signal comprises an integer number of pulses, the first scanning signal is a cut-off level, and the pulses of the light-emitting control signal comprise a conduction level and the cut-off level. According to the display panel and the driving method thereof, the driving chip and the display device provided by the invention, the flicker problem caused by switching of different modes can be avoided.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel and its driving method, driving chip and display device. Background Technology

[0002] With the development of display technology, users have increasingly higher requirements for the display effect of display panels.

[0003] Organic light-emitting diode (OLED) display panels typically have multiple display modes, such as High Brightness Mode (HBM), Normal Mode, and Always On Display Mode (AOD).

[0004] However, the technology suffers from flickering issues when switching between different display modes. Summary of the Invention

[0005] This application provides a display panel and its driving method, driving chip and display device, which can avoid flickering problems caused by switching between different modes.

[0006] In a first aspect, embodiments of this application provide a display panel including a sub-pixel. The sub-pixel includes a pixel circuit and a light-emitting element. The pixel circuit is connected to a light-emitting control signal and a first scan signal. The light-emitting control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether a data signal is written to the pixel circuit. The display panel has three operating modes: a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. In transition mode, the light emission control signal consists of an integer number of pulses, and the first scan signal is at the cutoff level. The pulses of the light emission control signal include both on-level and off-level signals.

[0007] Secondly, embodiments of this application also provide a driving method for a display panel, characterized in that it is used to drive the display panel, the display panel includes sub-pixels, the sub-pixels include pixel circuits and light-emitting elements; the operating modes of the display panel include a first mode, a second mode and a transition mode, the transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode; The driving method includes: A light emission control signal and a first scan signal are provided to the pixel circuit. The light emission control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether the data signal is written to the pixel circuit. In the transition mode, the light emission control signal includes an integer number of pulses, and the first scan signal is at the cutoff level. The pulses of the light emission control signal include a conduction level and a cutoff level.

[0008] Thirdly, embodiments of this application also provide a driver chip for a display panel, used to execute the driving method for the display panel described in any embodiment of the second aspect.

[0009] Fourthly, embodiments of this application also provide a display device, including the display panel described in any embodiment of the first aspect. According to the display panel, driving method, driving chip, and display device provided in the embodiments of this application, the display panel includes sub-pixels, each sub-pixel includes a pixel circuit and a light-emitting element. The pixel circuit is connected to a light-emitting control signal and a first scan signal. The light-emitting control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether a data signal is written to the pixel circuit. The operating modes of the display panel include a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. In the transition mode, the light-emitting control signal includes an integer number of pulses (the pulses of the light-emitting control signal include on-level and off-level), and the first scan signal is at the off-level in the transition mode. That is, when switching from the first mode to the second mode, a transition mode (an integer number of pulses of the light-emitting control signal) can be inserted between the two modes, and no new data signal is written first. Therefore, by inserting a transition mode between the two display modes, the power supply voltage switching (the power supply voltage switching process is in the transition mode) and data writing (no data writing is performed in the transition mode) can be performed at different times, thereby avoiding flickering problems caused by switching between different modes. Attached Figure Description

[0010] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0011] Figure 1 This is a schematic diagram illustrating the brightness changes when switching between two display modes in related technologies; Figure 2 This is a schematic diagram illustrating the brightness changes when switching between two display modes, as provided in the embodiments of this application. Figure 3 This is a schematic diagram of a display panel provided in an embodiment of this application; Figure 4This is a schematic diagram of the driving timing of a display panel provided in an embodiment of this application; Figure 5 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 6 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 7 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 8 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 9 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 10 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 11 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 12 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 13 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 14 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 15 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 16-A This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 16-B This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 16-C This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 17 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 18 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 19 This is another structural schematic diagram of the display panel provided in the embodiments of this application; Figure 20 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 21This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 22 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 23 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 24 This is another driving timing diagram of the display panel provided in the embodiments of this application; Figure 25 This is a schematic flowchart of a display panel driving method provided in an embodiment of this application; Figure 26 This is a schematic flowchart of a display panel driving method provided in an embodiment of this application; Figure 27 This is a schematic flowchart of a display panel driving method provided in an embodiment of this application; Figure 28 This is a schematic diagram of a driver chip provided in an embodiment of this application; Figure 29 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0012] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0013] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0014] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0015] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0016] Before describing the technical solutions provided in the embodiments of this application, in order to facilitate understanding of the embodiments of this application, this application first specifically explains the problems existing in the related technologies: To reduce power consumption, Organic Light-Emitting Diode (OLED) display panels typically have multiple display modes, such as High Brightness Mode (HBM), Normal Mode, and Always On Display Mode (AOD). Because the power supply voltage settings differ between these modes, flickering can easily occur when switching between them. For example, ... Figure 1 As shown, when switching from display mode 1 to display mode 2, there will be a momentary jump in brightness, which will cause flickering.

[0017] Specifically, in order to maintain optimal power consumption for each display mode, the power supply voltage (such as PVDD, PVEE) for different display modes is designed differently, as shown in Table 1.

[0018] Table 1 As shown in Table 1, when the display panel switches from normal mode to high brightness mode, the power supply voltage PVDD increases from 3.3V to 3.5V, and PVEE decreases from -3.3V to -3.5V. Simultaneously, the pixel circuit writes new data signals. Since the power supply voltage PVDD, PVEE, and data signal Data are all key factors affecting the drive current, the synchronous switching of power supply voltage and data writing causes a surge in drive current, resulting in a noticeable instantaneous increase in brightness. This leads to visible flickering when switching between different display modes.

[0019] Based on this, embodiments of this application provide a display panel and its driving method, driving chip, and display device. By inserting a time period (transition mode) between two display modes that need to be switched, the power supply voltage switching (the power supply voltage switching process occurs in the transition mode) and data writing (no data writing occurs in the transition mode) can be prevented from happening simultaneously, thereby avoiding flickering problems caused by switching between different modes. Figure 2 As shown, the brightness does not increase significantly when switching between different display modes, eliminating the obvious brightness jump caused by mode switching, and the flicker is not perceptible to the naked eye.

[0020] The display panel provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0021] Figure 3 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application, such as... Figure 3 As shown, the display panel 100 may include a sub-pixel 10, and the sub-pixel 10 may include a pixel circuit 11 and a light-emitting element 12. The pixel circuit 11 is connected to a light-emitting control signal EM and a first scan signal SP. The light-emitting control signal EM is used to control whether the sub-pixel 10 emits light, and the first scan signal SP is used to control whether the data signal Data is written to the pixel circuit 11. Figure 3 The structure of the pixel circuit 11 shown is merely an example and is not intended to limit this application.

[0022] The display panel can have a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode.

[0023] The first mode is the preceding display mode of the transition mode, and can be denoted as Mode1. The second mode is the following display mode of the transition mode, and can be denoted as Mode2. The transition mode can be denoted as Mode3.

[0024] For example, when the display mode of the display panel switches from normal mode to high-brightness mode, a transition mode can be inserted between the two display modes. The normal mode can be called the first mode, and the high-brightness mode can be called the second mode.

[0025] For example, when the display mode of the display panel switches from highlight mode to normal mode, a transition mode can be inserted between the two display modes. In this case, the highlight mode can be called the first mode, and the normal mode can be called the second mode.

[0026] In other words, when switching from the first mode to the second mode, a transition mode can be inserted between the two display modes.

[0027] like Figure 4As shown, in the transition mode, the light emission control signal EM can include an integer number of pulses. The pulses of the light emission control signal EM include a turn-on level (such as a low level) and a turn-off level (such as a high level). Here, T is the duration of one pulse of the light emission control signal EM in the transition mode, n is the number of pulses of the light emission control signal EM in the transition mode, n is an integer greater than or equal to 1, n*T is the total duration of the transition mode, and n*T is the product of n and T.

[0028] You can continue to see Figure 3 When the first scan signal SP is at an on level (e.g., low), the data signal Data is written; when the first scan signal SP is at an off level (e.g., high), the data signal Data is not written. In transition mode, when the first scan signal SP is at an off level (e.g., high), the data signal Data is not written. The fact that no new data signal Data is written in transition mode avoids power supply voltage switching during data writing, ensuring that power supply voltage switching (which occurs in transition mode) and data writing (which does not occur in transition mode) do not happen simultaneously, thus preventing flickering.

[0029] In other words, when switching between two display modes, a time n*T, which is an integer multiple of the pulse of the luminous emission control signal EM, can be inserted between the two display modes, and no new data signal Data is written during this time. This time is especially necessary when the PVDD voltage is different between display modes (transition mode).

[0030] According to the display panel provided in the embodiments of this application, the display panel includes sub-pixels, each sub-pixel including a pixel circuit and a light-emitting element. The pixel circuit is connected to a light-emitting control signal EM and a first scan signal SP. The light-emitting control signal EM is used to control whether the sub-pixel emits light, and the first scan signal SP is used to control whether a data signal Data is written to the pixel circuit. The operating modes of the display panel include a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. In the transition mode, the light-emitting control signal EM includes an integer number of pulses (the pulses of the light-emitting control signal EM include on-level and off-level), and the first scan signal is at the off-level in the transition mode. That is, when switching from the first mode to the second mode, a transition mode (an integer number of pulses of the light-emitting control signal EM) can be inserted between the two modes, and no new data signal is written in the transition mode. Therefore, by inserting a transition mode between the two display modes, the power supply voltage switching (the power supply voltage switching process is in the transition mode) and data writing (no data writing is performed in the transition mode) can be prevented from occurring simultaneously, thereby avoiding flickering problems caused by switching between different modes.

[0031] In some embodiments, such as Figure 5As shown, the duty cycle of at least one pulse of the light emission control signal EM in the first mode is different from the duty cycle of at least one pulse of the light emission control signal EM in the second mode.

[0032] The duty cycle is the percentage of time the signal is on within a pulse. The larger the duty cycle of the luminous control signal EM, the greater the percentage of time the sub-pixel is lit, and the higher the brightness.

[0033] For example, at least the duty cycles of the two pulses within the first and second modes adjacent to the transition mode are different; see further... Figure 5 EM low level is the conduction level. Duty cycle refers to the proportion of the conduction level (e.g., low level) of the light emission control signal EM to the duration of one pulse cycle T. The duty cycle of the conduction level of the last pulse of the light emission control signal EM in the first mode is represented by a1, and the duty cycle of the enable level of the first pulse of the light emission control signal EM in the second mode is represented by d1. a1≠d1.

[0034] For example, the duty cycle of the luminous control signal EM in the transition mode can be replicated in the first mode. For instance, if the duty cycle of the luminous control signal EM in the first mode is 70% and the duty cycle of the luminous control signal EM in the second mode is 95%, then the duty cycle of the luminous control signal EM in the transition mode can be 70%. This allows the power supply voltage switching and the EM duty cycle switching to occur at different times, avoiding the superimposed disturbance to brightness caused by the simultaneous changes in both the power supply voltage and the EM duty cycle. This avoids the flickering problem when switching between different display modes. At the same time, since data writing is paused in the transition mode, the superimposed disturbance to brightness caused by the simultaneous changes in both the power supply voltage and the data signal is avoided, thus avoiding the flickering problem when switching between different display modes.

[0035] For example, if the duty cycle difference between the two modes that need to be switched is large, the duty cycle of the luminous emission control signal EM in the transition mode can be between the first mode and the second mode. For instance, if the duty cycle of the luminous emission control signal EM in the first mode is 70% and the duty cycle of the luminous emission control signal EM in the second mode is 95%, then the duty cycle of the luminous emission control signal EM in the transition mode can be between 70% and 95% (e.g., 75%, 80%, 85%, 90%), so that the proportion of emission time changes gradually.

[0036] This application embodiment solves the flickering problem that occurs when switching between two display modes with different power supply voltages and different EM duty cycles by inserting a transition mode between the first mode and the second mode.

[0037] The pulse count characteristics of the light emission control signal EM of the display panel in transition mode provided in the embodiments of this application are described below.

[0038] In some embodiments, the number of pulses of the luminance control signal EM in the transition mode is less than the number of pulses of the luminance control signal EM in one frame refresh cycle of the first mode.

[0039] And / or, the number of pulses of the luminance control signal EM in the transition mode is less than the number of pulses of the luminance control signal in one frame refresh cycle in the second mode.

[0040] For example, such as Figure 6 As shown, the number of pulses of the light emission control signal EM in the transition mode is n, the number of pulses of the light emission control signal EM in one screen refresh cycle in the first mode is m, and the number of pulses of the light emission control signal in one screen refresh cycle in the second mode is p, where n < m and n < p.

[0041] The embodiments of this application insert a small number of EM pulses between the first mode and the second mode, that is, the duration of the transition mode inserted between the first mode and the second mode is very short, which can eliminate flickering while avoiding display delay or visual stuttering caused by excessively long transition time.

[0042] In some embodiments, such as Figure 7 As shown, the duration of each pulse in the light emission control signal EM is the same in both the first mode and the transition mode.

[0043] For example, the first mode is either normal mode or highlight mode; you can continue to refer to [link / reference]. Figure 7 If the duration of each pulse of the light emission control signal EM in the first mode is T, then the duration of each pulse of the light emission control signal EM in the transition mode is also T, which can simplify the timing control logic and reduce the design complexity.

[0044] In this embodiment, a smaller number of EM pulses are inserted between the first mode and the second mode, and the duration of each EM pulse is the same as that of the first mode. That is, the duration of a single EM pulse remains unchanged. This can eliminate flickering and avoid display delay or visual stuttering caused by excessive transition time. It can also simplify timing control logic and reduce design complexity.

[0045] In some embodiments, such as Figure 8 As shown, the number of pulses n of the light emission control signal EM in the transition mode is greater than or equal to 2.

[0046] For example, the number of pulses in the light emission control signal EM in the transition mode is 2.

[0047] In this embodiment, the number n of the light emission control signal pulses in the transition mode is not only less than the number m of the light emission control signal EM pulses in one screen refresh cycle of the first mode, and less than the number p of the light emission control signal pulses in one screen refresh cycle of the second mode, but also ensures that it is at least 2. This can avoid display delay or visual stuttering caused by excessively long transition time, while ensuring that the transition mode has enough time to switch the power supply voltage, thereby effectively avoiding flickering problems.

[0048] In some embodiments, such as Figure 9 As shown, in the first mode (such as the constant display mode), a screen refresh cycle includes a write frame t1 and at least one hold frame t2. The first scan signal SP includes an on level (such as a low level) in the write frame t1 and an off level (such as a high level) in the hold frame t2.

[0049] The number of pulses n of the light emission control signal EM in the transition mode is less than or equal to the number of pulses n of the light emission control signal EM in the hold frame t2.

[0050] In other words, when there is a hold frame in the first mode, the EM timing of the transition mode can copy part or all of the EM timing of the hold frame in the first mode. Therefore, the EM pulse count setting in the transition mode can refer to the EM pulse count of the hold frame and can be less than or equal to the EM pulse count of the hold frame t2 in the first mode. For example, if the EM pulse count in the hold frame t2 of the first mode is 3, then the EM pulse count in the transition mode can be less than or equal to 3.

[0051] This application embodiment addresses a scenario where the first mode is a constant display mode (including write frames and hold frames). By setting the number of light emission control signal pulses in the transition mode to be not only less than the number of pulses in the entire screen refresh cycle, but also to be less than or equal to the number of pulses in a single hold frame, the total duration of the transition mode is compressed to the duration of a single hold frame, thus avoiding display delays or visual stuttering caused by excessively long transition times.

[0052] The duty cycle characteristics of the light emission control signal EM of the display panel in transition mode provided in the embodiments of this application are described below.

[0053] In some embodiments, the duty cycle of the first pulse of the light emission control signal EM in the transition mode is the same as the duty cycle of at least one pulse of the light emission control signal EM in the first mode.

[0054] In other words, the duty cycle of the first pulse of the light emission control signal EM in the transition mode replicates the duty cycle of at least one pulse of the previous display mode (first mode).

[0055] For example, such as Figure 10As shown, if the duty cycle of a certain pulse of the light emission control signal EM in the first mode is a1, then the duty cycle of the first pulse of the light emission control signal EM in the transition mode is also a1. For example, if the duty cycle of a certain pulse of the light emission control signal EM in the first mode is 70%, then the duty cycle of the first pulse of the light emission control signal EM in the transition mode is also 70%.

[0056] In the embodiments of this application, when switching from the first mode to the second mode, the EM pulse inserted between the two display modes has the same duty cycle as at least one EM pulse in the first mode, which can avoid flickering problems that may be caused by sudden changes in duty cycle and voltage adjustment.

[0057] It should be noted that changes in power signals, rewriting of data signals, changes in EM duty cycle, and the duration of a single EM pulse are all factors that affect brightness. Therefore, when switching between two display modes, multiple factors can be made to occur sequentially rather than simultaneously, thereby avoiding flickering caused by sudden changes in brightness.

[0058] In some embodiments, the duty cycle of the first pulse of the light emission control signal EM in the transition mode is the same as the duty cycle of at least one pulse of the light emission control signal EM in the first mode, and the duty cycles of different pulses of the light emission control signal EM are the same in the transition mode.

[0059] For example, such as Figure 11 As shown, if the duty cycle of a certain pulse of the light emission control signal EM in the first mode is a1, then the duty cycle of each pulse of the light emission control signal EM in the transition mode is also a1. For example, if the duty cycle of a certain pulse of the light emission control signal EM in the first mode is 70%, then the duty cycle of each pulse of the light emission control signal EM in the transition mode is also 70%.

[0060] The embodiments of this application reduce the complexity of timing design for the transition mode by setting the duty cycle of all EM pulses in the transition mode to be the same, and the duty cycle is copied from the duty cycle of a certain pulse in the first mode.

[0061] In some embodiments, the first pulse of the light emission control signal EM in the transition mode has the same duty cycle as the last pulse in the first mode.

[0062] For example, such as Figure 12 As shown, if the duty cycle of the last pulse of the light emission control signal EM in the first mode is a1, then the duty cycle of the first pulse of the light emission control signal EM in the transition mode is also a1. For example, if the duty cycle of the last pulse of the light emission control signal EM in the first mode is 78%, then the duty cycle of the first pulse of the light emission control signal EM in the transition mode is also 78%.

[0063] In this embodiment, the first EM pulse of the transition mode maintains the same duty cycle as the last EM pulse of the first mode, thus achieving a seamless transition of boundary brightness from the end of the first mode to the beginning of the transition mode.

[0064] In some embodiments, the first pulse of the light emission control signal EM in the transition mode has the same duty cycle as the last pulse in the first mode, and in the transition mode, the duty cycles of different pulses of the light emission control signal EM are the same.

[0065] For example, such as Figure 13 As shown, if the duty cycle of the last pulse of the light emission control signal EM in the first mode is a1, then the duty cycle of each pulse of the light emission control signal EM in the transition mode is also a1. For example, if the duty cycle of the last pulse of the light emission control signal EM in the first mode is 78%, then the duty cycle of each pulse of the light emission control signal EM in the transition mode is also 78%.

[0066] In this embodiment, the first EM of the transition mode maintains the same duty cycle as the last EM pulse of the first mode, achieving a seamless transition of boundary brightness from the end of the first mode to the beginning of the transition mode. The duty cycle of each EM in the transition mode is the same, avoiding flickering problems that may be caused by the superposition of duty cycle jumps and power supply voltage adjustments. At the same time, the control logic is simple and direct, and easy to implement.

[0067] In some embodiments, the duty cycle of the n pulses of the light emission control signal EM in the transition mode is the same as the duty cycle of the last n pulses of the light emission control signal EM in the first mode, where n is an integer greater than or equal to 2.

[0068] In other words, the transition mode has a total of n EM pulses, where n is a fixed value. So no matter how the EM duty cycle of the first mode changes, we only need to set the duty cycle of these n EM pulses in the transition mode to be the same as the duty cycle of the last n pulses in the first mode.

[0069] For example, such as Figure 14 As shown, the luminous control signal EM has two pulses in the transition mode (that is, two EM pulses are inserted between the two display modes). The duty cycles of the last two pulses of the luminous control signal EM in the first mode are b1 and a1, respectively. Therefore, the duty cycles of the two pulses of the luminous control signal EM in the transition mode are also b1 and a1. For example, if the duty cycles of the last two pulses of the luminous control signal EM in the first mode are 70% and 75%, respectively, then the duty cycles of the two pulses of the luminous control signal EM in the transition mode are also 70% and 75%.

[0070] In the embodiment of this application, during the phase of gradual adjustment of the power supply voltage (transition mode), the proportion of the screen's light-up time still follows the change pattern before switching (EM duty cycle pattern of the first mode), ensuring flicker-free switching while also taking into account visual comfort.

[0071] In some embodiments, the order of the duty cycles of the n pulses of the light emission control signal EM in the transition mode is the same as or the opposite of the order of the duty cycles of the last n pulses of the light emission control signal in the first mode.

[0072] For example, you can continue to see Figure 14 When n is 2, the duty cycle order of the two pulses of the light emission control signal EM in the transition mode is the same as the duty cycle order of the last two pulses of the light emission control signal in the first mode.

[0073] For example, such as Figure 15 As shown, n is 2. The order of the duty cycles of the two pulses of the light emission control signal EM in the transition mode is the opposite of the order of the duty cycles of the last two pulses of the light emission control signal in the first mode.

[0074] In one example, such as Figure 16-A As shown, the first mode is the constant display mode, which is a low-frequency mode. The constant display mode includes a data write frame t1 and at least one hold frame t2. For brightness compensation of leakage current in LTPS products, the constant display mode adjusts the EM duty cycle in hold frame t2 to compensate for brightness. At this time, the EM duty cycle of hold frame t2 will change due to EM compensation. For example, if n is 2, the transition mode can insert the last EM pulse waveform of hold frame t2 (e.g., ...). Figure 16-A (As shown), instead of inserting data into the EM pulse waveform corresponding to frame t1; or, the last two EM pulse waveforms of frame t2 can be inserted, such as B+A (as shown). Figure 16-B As shown), you can also insert A+B (as shown). Figure 16-C (As shown). The same applies when n=3. Similarly, if 3 EM cycles are inserted, the transition mode can insert the last EM pulse waveform of the hold frame t2 instead of inserting the EM pulse waveform corresponding to the data write frame t1; or, it can insert the last three EM pulse waveforms of the hold frame t2, which can be C+B+A or A+B+C.

[0075] This application provides multiple configuration schemes for EM pulses inserted in the transition mode for scenarios with different EM duty cycles in the first mode, which can be flexibly set according to actual needs.

[0076] In some embodiments, such as Figure 17As shown, in the first mode (such as the constant display mode), a screen refresh cycle includes a write frame t1 and at least one hold frame t2. The first scan signal SP has an on level (such as a low level) in the write frame t1 and an off level (such as a high level) in the hold frame t2. The timing of the light emission control signal EM in the transition mode is the same as the timing of the light emission control signal EM in the hold frame t2.

[0077] In other words, the EM timing in transition mode can replicate the EM timing within a whole hold frame in constant mode.

[0078] In one example, when switching from normal mode to highlight mode, if the duty cycles of the EM pulses in normal mode are different, and for LTPO 8T1C products, the EM width is often set differently, then the transition mode can copy the last or last n EM pulses of normal mode, inserting A or A+B, etc., or inserting an EM pulse of a cycle. For example, A+B+C is one cycle of EM, and one "A+B+C" or n "A+B+C" can be inserted.

[0079] This application embodiment simplifies timing design by setting the timing of the light emission control signal in the transition mode to be the same as the timing of the hold frame in the first mode, thus avoiding flickering.

[0080] In some embodiments, such as Figure 18 As shown, the voltage values ​​of the power signals accessed by the sub-pixels in the first mode and the second mode are different. For example, the power signal may include PVDD, and the voltage values ​​of PVDD accessed by the sub-pixels in the first mode and the second mode are different. As another example, the power signal may also include PVEE, and the voltage values ​​of PVEE accessed by the sub-pixels in the first mode and the second mode are different.

[0081] The voltage values ​​of the power supply signals (PVDD and PVEE) in transition mode are between the voltage values ​​of the power supply signals in the first mode and the voltage values ​​in the second mode. For example, see [further details omitted]. Figure 17 The PVDD of the transition mode is greater than or equal to the PVDD of the first mode and less than or equal to the PVDD of the second mode, and the PVEE of the transition mode is less than or equal to the PVDD of the first mode and greater than or equal to the PVEE of the second mode.

[0082] In this embodiment, the transition mode does not write new data signals and switches the power signal, which can prevent new data signals from being written during at least part of the power voltage adjustment time, thus avoiding the brightness flickering problem caused by the simultaneous switching of power voltage and data writing.

[0083] In some embodiments, such as Figure 19 As shown, Figure 19This is another schematic diagram of a pixel circuit structure. The pixel circuit is connected to a second scan signal SPX. The second scan signal SPX is used to control whether the anode of the light-emitting element OLED is reset, and / or, the second scan signal SPX is used to control the adjustment of the bias state of the driving transistor (such as M3) in the pixel circuit.

[0084] Figure 20 for Figure 19 A corresponding time series diagram, such as Figure 20 As shown, in transition mode, the second scan signal SPX includes at least one on level (such as low level).

[0085] In other words, when copying the EM pulse timing of the first mode, the timing of the SPX pulse within the same time period can also be copied, thus obtaining the EM timing and SPX timing of the transition mode.

[0086] This application embodiment can reset the OLED anode during the transition mode period, clearing residual charge that may accumulate during the no-refresh transition mode and preventing uneven brightness or afterimages when the device is turned on after the transition. Adjusting or resetting the bias of the driving transistor (such as M3) prevents node potential drift caused by leakage, ensuring the pixel circuit is always in a preset operating state. This prepares the device for a smooth transition to the second mode after the transition mode ends, avoiding display abnormalities caused by internal node state drift. Furthermore, since the SPX timing can directly reuse the corresponding waveform within the frame maintained by the first mode, the driver chip does not need to develop additional complex control logic. This achieves efficient reuse and low-cost implementation of timing design while ensuring display stability.

[0087] In some embodiments, the absolute value of the difference between the duty cycle of the last pulse of the light emission control signal EM in the first mode and the duty cycle of the first pulse of the light emission control signal EM in the second mode is less than a preset threshold.

[0088] Within the same duration, the number of pulses of the light emission control signal EM in the first mode is the same as the number of pulses of the light emission control signal EM in the second mode.

[0089] The preset threshold can be set according to needs, such as 20%, 25%, 30%, etc.

[0090] In one example, the preset threshold is 20%, such as Figure 21As shown, the duty cycle of the last pulse of the luminous emission control signal EM in the first mode (such as normal mode) is 80%, and the duty cycle of the first pulse of the luminous emission control signal EM in the second mode (such as high brightness mode) is 95%. The difference in EM duty cycles is 15%, and 15% < 20%. Therefore, within the same duration, the number of EMs in the two display modes is the same. That is, when switching from normal mode to high brightness mode, if the difference in EM duty cycles is less than 20%, the brightness change will not be particularly obvious, and the number of EMs in normal mode and high brightness mode can be the same within the same duration.

[0091] In yet another example, such as Figure 22 As shown, the duty cycle of the last pulse of the luminous emission control signal EM in the first mode (such as high brightness mode) is 95%, and the duty cycle of the first pulse of the luminous emission control signal EM in the second mode (such as normal mode) is 80%. The difference in EM duty cycles is 15%, and 15% < 20%. Therefore, within the same duration, the number of EMs in the two display modes is the same. That is, when switching from high brightness mode to normal mode, if the difference in EM duty cycles is less than 20%, the brightness change will not be particularly obvious, and the number of EMs in high brightness mode and normal mode can be the same within the same duration.

[0092] In this embodiment, a preset threshold is set to determine the degree of difference in EM duty cycle between the first mode and the second mode. When the absolute value of the difference between the two is less than the preset threshold (e.g., 20%), the number of EM pulses in the two modes is allowed to remain the same within the same duration. Since a small difference in duty cycle means that the brightness change itself is relatively smooth, the number of pulses can remain unchanged, which reduces the complexity of timing design while ensuring no brightness flicker.

[0093] In some embodiments, the absolute value of the difference between the duty cycle of the last pulse of the light emission control signal EM in the first mode and the duty cycle of the first pulse of the light emission control signal EM in the second mode is greater than or equal to a preset threshold. For example, the absolute value of the difference between the duty cycle of the last pulse of the light emission control signal EM in the first mode and the duty cycle of the first pulse of the light emission control signal EM in the second mode is greater than or equal to 20%.

[0094] In one example, such as Figure 23 As shown, the duty cycle of the first mode (such as normal mode) is 70%, and the duty cycle of the second mode (such as high brightness mode) is 95%. The absolute value of the difference between the duty cycles is greater than 20%. Therefore, within the same duration, the number of pulses of the light emission control signal EM in the first mode and the number of pulses of the light emission control signal EM in the second mode can be set to be the same.

[0095] In yet another example, such as Figure 24As shown, the duty cycle of the first mode is 70%, and the duty cycle of the second mode is 95%. If the absolute value of the difference between the duty cycles is greater than or equal to 20%, then the number of EM pulses in the mode with the lower duty cycle can be increased to be greater than the number of EM pulses in the display mode with the higher duty cycle. For example, increasing... Figure 23 The number of EM pulses in the first mode, that is, within the same duration, the number of pulses of the EM control signal in the first mode and the number of pulses of the EM control signal in the second mode can be set to be different. Among them, the mode with a smaller duty cycle of the EM control signal in the first mode and the second mode has a larger number of pulses of the EM control signal.

[0096] See also Figure 24 By increasing the number of EM pulses in the first mode within the same duration (a larger number of pulses reduces the duration of each pulse, as well as the on-time and off-time within each pulse), the interpolation ratio (off-time) of the transition mode is reduced when replicating the EM timing of the first mode. This reduces the interpolation ratio between the two modes that need to be switched. For example, setting the interpolation ratio of a single EM pulse between two modes to <10% can be achieved. Figure 23 The difference in the single-pulse black insertion ratio of EM between the two modes (15% and 2.5%) was 12.5%. Figure 24 The difference in the percentage of single-pulse black insertion in EM between the two modes (7.5% and 2.5%) is 5% < 10%, resulting in better visual effect.

[0097] This application embodiment inserts a transition mode between two display modes to prevent power voltage switching (the power voltage switching process occurs in the transition mode) and data writing (no data writing occurs in the transition mode) from happening simultaneously. This avoids flickering issues caused by switching between different modes. Furthermore, by increasing the number of light emission control signal pulses in the low duty cycle mode, the difference in black insertion time between the two display modes can be effectively reduced, thereby significantly reducing brightness fluctuations and flickering, and achieving a smoother and better visual experience when switching display modes.

[0098] Based on the same inventive concept, such as Figure 25 As shown in the figure, this application embodiment also provides a driving method for a display panel, which is used to drive the display panel. The display panel includes sub-pixels, and each sub-pixel includes a pixel circuit and a light-emitting element. The operating modes of the display panel include a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. The driving method may include step S110.

[0099] S110, a light emission control signal and a first scan signal are provided to the pixel circuit. The light emission control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether the data signal is written to the pixel circuit. In the transition mode, the light emission control signal includes an integer number of pulses, and the first scan signal is at the cutoff level. The pulses of the light emission control signal include a conduction level and a cutoff level.

[0100] According to the driving method of the display panel provided in the embodiments of this application, the display panel includes sub-pixels, each sub-pixel including a pixel circuit and a light-emitting element. The pixel circuit is connected to a light-emitting control signal EM and a first scan signal SP. The light-emitting control signal EM is used to control whether the sub-pixel emits light, and the first scan signal SP is used to control whether a data signal Data is written to the pixel circuit. The operating modes of the display panel include a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. In the transition mode, the light-emitting control signal EM includes an integer number of pulses (the pulses of the light-emitting control signal EM include on-level and off-level), and the first scan signal is at the off-level in the transition mode. That is, when switching from the first mode to the second mode, a transition mode (an integer number of pulses of the light-emitting control signal EM) can be inserted between the two modes, and no new data signal is written first. Therefore, by inserting a transition mode between the two display modes, the power supply voltage switching (the power supply voltage switching process is in the transition mode) and data writing (no data writing is performed in the transition mode) can be performed at different times, thereby avoiding flickering problems caused by switching between different modes.

[0101] In some embodiments, such as Figure 26 As shown, the driving method for the display panel may further include step S120.

[0102] S120, a power signal is provided to the sub-pixel. The voltage values ​​of the power signal provided to the sub-pixel in the first mode and the second mode are different. The voltage value of the power signal in the transition mode is between the voltage value of the power signal in the first mode and the voltage value of the power signal in the second mode.

[0103] In this embodiment, the transition mode does not write new data signals and switches the power signal, which can prevent new data signals from being written during at least part of the power voltage adjustment time, thus avoiding the brightness flickering problem caused by the simultaneous switching of power voltage and data writing.

[0104] In some embodiments, such as Figure 27 As shown, the driving method for the display panel may further include step S130.

[0105] S130, a second scan signal is provided to the pixel circuit. The second scan signal is used to control whether the anode of the light-emitting element is reset, and / or, the second scan signal is used to control the adjustment of the bias state of the driving transistor in the pixel circuit; in the transition mode, the second scan signal includes at least one on level.

[0106] This application embodiment can reset the OLED anode during the transition mode period by providing a second scanning signal to the pixel circuit. This clears residual charge that may accumulate during the transition mode without refresh, preventing uneven brightness or afterimages when the device is lit after the transition ends. Adjusting or resetting the bias of the driving transistor (such as M3) prevents node potential drift caused by leakage, ensuring the pixel circuit is always in a preset operating state. This prepares the device for a smooth transition to the second mode after the transition mode ends, avoiding display abnormalities caused by internal node state drift. Furthermore, since the SPX timing can directly reuse the corresponding waveform within the frame from the first mode, the driver chip does not need to develop additional complex control logic. This achieves efficient reuse and low-cost implementation of timing design while ensuring display stability.

[0107] Based on the same inventive concept, such as Figure 28 As shown, this application embodiment also provides a display panel driver chip 200 for executing the driving method of the display panel 100 in any of the above embodiments.

[0108] The driver chip 200 has all the beneficial effects of the above-mentioned driving method for the display panel.

[0109] Based on the same inventive concept, such as Figure 29 As shown, this application embodiment also provides a display device 1000, including the display panel 100 described in any of the above embodiments.

[0110] The display device 1000 includes the display panel 100 provided in any of the above embodiments, and therefore the display device 1000 has all the beneficial effects of the above display panel.

[0111] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, The sub-pixel includes a pixel circuit and a light-emitting element. The pixel circuit is connected to a light-emitting control signal and a first scan signal. The light-emitting control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether a data signal is written to the pixel circuit. The display panel has three operating modes: a first mode, a second mode, and a transition mode. The transition mode is located between the first mode and the second mode, and the first mode precedes the transition mode. In the transition mode, the light emission control signal comprises an integer number of pulses, and the first scan signal is at a cutoff level. The pulses of the light emission control signal include both on-level and off-level signals.

2. The display panel according to claim 1, characterized in that, The duty cycle of at least one pulse of the light emission control signal in the first mode is different from the duty cycle of at least one pulse of the light emission control signal in the second mode.

3. The display panel according to claim 1, characterized in that, The number of pulses of the light emission control signal in the transition mode is less than the number of pulses of the light emission control signal in one frame refresh cycle of the first mode. And / or, the number of pulses of the light emission control signal in the transition mode is less than the number of pulses of the light emission control signal in one screen refresh cycle of the second mode.

4. The display panel according to claim 3, characterized in that, The duration of each pulse in the light emission control signal is the same in both the first mode and the transition mode.

5. The display panel according to claim 3, characterized in that, The number of pulses of the light emission control signal in the transition mode is greater than or equal to 2.

6. The display panel according to claim 3, characterized in that, In the first mode, a screen refresh cycle includes a write frame and at least one hold frame, wherein the first scan signal is at an on level in the write frame and at an off level in the hold frame; The number of pulses of the light emission control signal in the transition mode is less than or equal to the number of pulses of the light emission control signal in the hold frame.

7. The display panel according to claim 1, characterized in that, The duty cycle of the light emission control signal in the first pulse of the transition mode is the same as the duty cycle of the light emission control signal in at least one pulse of the first mode.

8. The display panel according to claim 7, characterized in that, In the transition mode, the duty cycle of different pulses of the light emission control signal is the same.

9. The display panel according to claim 7, characterized in that, The duty cycle of the first pulse of the light emission control signal in the transition mode is the same as that of the last pulse in the first mode.

10. The display panel according to claim 9, characterized in that, In the transition mode, the duty cycle of different pulses of the light emission control signal is the same.

11. The display panel according to claim 7, characterized in that, The duty cycle of the light emission control signal in the n pulses of the transition mode is the same as the duty cycle of the light emission control signal in the last n pulses of the first mode, where n is an integer greater than or equal to 2.

12. The display panel according to claim 11, characterized in that, The order of the duty cycles of the light emission control signal in the n pulses of the transition mode is the same as or the opposite of the order of the duty cycles of the light emission control signal in the last n pulses of the first mode.

13. The display panel according to claim 7, characterized in that, In the first mode, a screen refresh cycle includes a write frame and at least one hold frame. The first scan signal has an on level in the write frame and an off level in the hold frame. The timing of the light emission control signal in the transition mode is the same as the timing of the light emission control signal in the hold frame.

14. The display panel according to claim 1, characterized in that, The voltage values ​​of the power signals accessed by the sub-pixel in the first mode and the second mode are different; The voltage value of the power signal in the transition mode is between the voltage value of the power signal in the first mode and the voltage value in the second mode.

15. The display panel according to claim 1, characterized in that, The pixel circuit is connected to a second scanning signal, which is used to control whether the anode of the light-emitting element is reset, and / or, the second scanning signal is used to control the adjustment of the bias state of the driving transistor in the pixel circuit; In the transition mode, the second scan signal includes at least one on level.

16. The display panel according to claim 1, characterized in that, The absolute value of the difference between the duty cycle of the last pulse of the light emission control signal in the first mode and the duty cycle of the first pulse of the light emission control signal in the second mode is less than a preset threshold. Within the same duration, the number of pulses of the light emission control signal in the first mode is the same as the number of pulses of the light emission control signal in the second mode.

17. The display panel according to claim 1, characterized in that, The absolute value of the difference between the duty cycle of the last pulse of the light emission control signal in the first mode and the duty cycle of the first pulse of the light emission control signal in the second mode is greater than or equal to a preset threshold. Within the same time period, the number of pulses of the light emission control signal in the first mode is the same as the number of pulses of the light emission control signal in the second mode; Alternatively, within the same duration, the number of pulses of the light emission control signal in the first mode is different from the number of pulses of the light emission control signal in the second mode, wherein the mode with a smaller duty cycle of the light emission control signal in the first mode and the second mode has a larger number of pulses of the light emission control signal.

18. A driving method for a display panel, characterized in that, The display panel is used to drive a display panel, the display panel including sub-pixels, the sub-pixels including pixel circuits and light-emitting elements; the operating modes of the display panel include a first mode, a second mode and a transition mode, the transition mode being located between the first mode and the second mode, and the first mode preceding the transition mode; The driving method includes: A light emission control signal and a first scan signal are provided to the pixel circuit. The light emission control signal is used to control whether the sub-pixel emits light, and the first scan signal is used to control whether the data signal is written to the pixel circuit. In the transition mode, the light emission control signal includes an integer number of pulses, and the first scan signal is at a cutoff level. The pulses of the light emission control signal include a conduction level and a cutoff level.

19. A driver chip for a display panel, characterized in that, Used to perform the driving method for the display panel as described in claim 18.

20. A display device, characterized in that, The display panel includes any one of claims 1 to 17.

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