A fully analog-domain integrated architecture for sampling, storage, and computing based on memristor arrays.

Abstract

This application relates to a full analog domain acquisition, storage, and computation integrated architecture based on a memristor array. The architecture includes an acquisition and storage module and a computation module. The acquisition and storage module is used to limit the voltage range for storing and reading analog input signals, quantize analog voltage excitation, and output voltage signals to the computation module. The input terminal of the computation module is connected to the acquisition and storage module to limit the voltage range for calculating analog input signals, receive the voltage signals output by the acquisition and storage module, analyze and process the analog input signals corresponding to the voltage signals, and output analog output signals as the calculation results. This can realize the full analog domain acquisition, storage, and computation integrated function, without the need to convert analog signals to digital signals, and can directly perform operations on analog signals, avoiding signal loss and resource consumption caused during analog-to-digital conversion. It not only achieves high-speed processing and high resolution, but also significantly reduces circuit power consumption and area occupation, improves circuit integration, and effectively reduces circuit costs.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a fully analog-domain acquisition, storage, and computing architecture based on memristor arrays. Background Technology

[0002] In recent years, with the development of applications such as electronic warfare and spectrum sensing, the demand for new high-speed and high-precision ADCs has become increasingly urgent. Under the current trend of ultra-high-speed data acquisition, traditional ADCs face numerous problems and challenges.

[0003] However, traditional ADCs inevitably suffer from quantization errors during the conversion of analog signals to digital signals. Increasing the sampling rate usually leads to a decrease in resolution, and the effects of thermal noise and quantization noise become more significant with increasing conversion speed, resulting in a decrease in signal-to-noise ratio (SNR). Furthermore, traditional ADCs generally employ a von Neumann architecture, where data acquisition, storage, and computation are separated. This architecture not only increases the hardware footprint and overall power consumption but also prolongs data transmission time, limiting the improvement of system performance.

[0004] Therefore, there is an urgent need to develop a fully analog domain acquisition, storage, and computing architecture based on memristor arrays to solve one or more of the aforementioned problems. Summary of the Invention

[0005] In view of this, in order to solve the above-mentioned technical problems or some of the technical problems, the embodiments of the present invention provide a fully analog domain acquisition, storage and computing integrated architecture based on memristor array.

[0006] In a first aspect, this application provides a fully analog domain acquisition, storage, and computing integrated architecture based on a memristor array, the framework including an acquisition and storage module and a computing module; The acquisition and storage module is used to limit the voltage range for storing and reading analog input signals, quantize analog voltage excitation, and output voltage signals to the calculation module. The input terminal of the calculation module is connected to the acquisition and storage module, which is used to limit the voltage range of the analog input signal calculation, receive the voltage signal output by the acquisition and storage module, analyze and process the analog input signal corresponding to the voltage signal, and output the analog output signal as the calculation result, so as to realize the integrated acquisition, storage and calculation function of the entire analog domain.

[0007] In one possible implementation, the data acquisition module includes a sampling circuit, a data acquisition module control unit, and a first memristor array; The sampling circuit is connected to the data acquisition module control unit and the first memristor array, respectively, and is used to receive analog input signals and amplify and preprocess the analog input signals. The data acquisition module control unit is also connected to the first memristor array, and is used to complete the sampling action of analog input signal by controlling the sampling circuit, drive the pre-processed analog input signal to be stored in the first memristor array, read the data stored in the first memristor array, and output the stored data to the calculation module after being converted into a voltage signal by the output amplifier. The first memristor array is used to adjust its resistance value according to the voltage change flowing through it, so as to store the analog input signal in the form of resistance state.

[0008] In one possible implementation, the sampling circuit includes a multi-channel sampling amplifier, each of which is configured with a corresponding independent switch. The sampling amplifier establishes selective connections with the data acquisition module control unit and the row input of the corresponding memristor in the first memristor array through the independent switches. In the initial state, the sampling amplifier is connected to the data acquisition module control unit through the switch. After the data acquisition module control unit completes the sampling and judgment of the analog input signal through the switch, it controls the switch to switch to connect the sampling amplifier and the first memristor array, and transmits the analog input signal preprocessed by the sampling amplifier to the row input of the corresponding memristor in the first memristor array, so as to realize the storage of the signal in the first memristor array.

[0009] In one possible implementation, the data acquisition module control unit limits the voltage range for storing and reading analog input signals by controlling the read / write threshold of the first memristor array; After the analog input signal is amplified by the amplifier, the first memristor array directly quantizes the analog voltage excitation to achieve signal storage.

[0010] In one possible implementation, the computing module includes a computing module control unit and a second memristor array; The computing module control unit is connected to the second memristor array to realize read and write control of the second memristor array; The second memristor array performs neuromorphic calculations on the received voltage signal and analyzes and processes the analog input signal before outputting an analog output signal converted by an operational amplifier as the calculation result.

[0011] In one possible implementation, the computing module control unit limits the voltage range for calculating the analog input signal by controlling the read / write threshold of the second memristor array; After the analog input signal is simulated by the second memristor array, the voltage signal corresponding to the analog input signal is subjected to neuromorphic calculation under the control of the computing module control unit to complete the analysis and processing of the analog input signal.

[0012] In one possible implementation, the row inputs of the second memristor array are connected to the voltage signals output by the output amplifiers of each column in the first memristor array.

[0013] In one possible implementation, the first memristor array and the second memristor array work together to form a memristor storage array. The acquisition and storage module control unit and the computing module control unit coordinate to regulate the read and write thresholds, signal transmission paths and working timing of the memristor storage array to achieve integrated acquisition, storage and computing functions across the entire analog domain.

[0014] In one possible implementation, the memristor storage array adjusts the array resistance value according to the input signal to achieve gain control, so that the amplitude of the output signal is kept within a constant effective range; The memristor storage array compresses the range of input signals by continuously adjusting the array resistance value, so that signals of different intensities can be displayed on the screen.

[0015] In one possible implementation, the memristor storage array utilizes a continuously adjustable resistance storage array to perform Fast Fourier Transform (FFT) and conduct spectral analysis. The memristor storage array performs phase adjustment on the signal to achieve phase measurement.

[0016] Compared with the prior art, the above-mentioned technical solutions provided in this application have the following advantages: The architecture provided in this application implements both the acquisition and storage module and the computing module based on memristor arrays. There is no need to convert analog signals into digital signals. The acquisition, storage and computing operations can be performed directly on analog signals, thereby avoiding signal loss and resource consumption during analog-to-digital conversion. It not only achieves high-speed processing and high resolution, but also significantly reduces circuit power consumption and area occupation, improves circuit integration, and effectively reduces circuit cost. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0020] Figure 1 A schematic diagram of a fully analog domain acquisition, storage, and computing integrated architecture based on a memristor array is provided for an embodiment of this application; Figure 2 A schematic diagram of the data acquisition and storage principle structure of the data acquisition and storage module provided in the embodiments of this application; Figure 3 A schematic diagram illustrating the sampling and calculation errors based on 1-bit, 2-bit, 3-bit, and 4-bit memristors provided for embodiments of this application; Figure 4 The curve showing the change in the sampling and storage error rate as a function of the memristor accuracy is provided for the embodiments of this application. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0023] To address the unavoidable quantization error problem in the conversion of analog signals to digital signals in existing technologies, and the issues that increasing sampling speed typically leads to a decrease in resolution, and that increasing conversion speed significantly affects thermal noise and quantization noise, resulting in a decrease in signal-to-noise ratio (SNR), this application proposes a fully analog-domain integrated acquisition, storage, and computation architecture based on a memristor array. This architecture integrates the acquisition and storage modules and the computation module using a memristor array, eliminating the need for analog-to-digital conversion and allowing direct acquisition, storage, and computation of analog signals. This effectively avoids signal loss and resource consumption during analog-to-digital conversion. This design not only achieves a balance between high-speed processing and high resolution but also significantly reduces circuit power consumption and footprint, improves circuit integration, and effectively reduces circuit costs.

[0024] Figure 1 This application provides a schematic diagram of a fully analog domain acquisition, storage, and computing architecture based on a memristor array, as shown in the following embodiment. Figure 1 As shown, the architecture includes a data acquisition and storage module and a computing module; The acquisition and storage module is used to limit the voltage range for storing and reading analog input signals, quantize analog voltage excitation, and output voltage signals to the calculation module. The input terminal of the calculation module is connected to the acquisition and storage module, which is used to limit the voltage range of the analog input signal calculation, receive the voltage signal output by the acquisition and storage module, analyze and process the analog input signal corresponding to the voltage signal, and output the analog output signal as the calculation result, so as to realize the integrated acquisition, storage and calculation function of the entire analog domain.

[0025] In this embodiment, the data acquisition and storage module strictly limits the voltage range involved in the storage and retrieval operations of the analog input signal. It also undertakes the task of quantizing the analog voltage excitation and, after completing these operations, outputs the generated voltage signal to the subsequent calculation module to ensure the smooth operation of the entire system. The input terminal of the calculation module is connected to the aforementioned data acquisition and storage module, clearly defining the allowed voltage range of the analog input signal during the calculation process. Based on this, the module is responsible for receiving the voltage signals transmitted from the data acquisition and storage module and performing in-depth analysis and processing on the corresponding analog input signals. After a series of complex calculations, the calculation module outputs the corresponding analog output signal as the result of the entire calculation process.

[0026] The fully analog domain acquisition, storage, and computation architecture based on memristor arrays provided in this application, through the collaborative work of the acquisition and storage module and the computation module, eliminates the need for analog-to-digital conversion and directly completes the acquisition, storage, and computation of analog signals within the analog domain. This effectively avoids problems such as quantization errors and reduced signal-to-noise ratio caused by analog-to-digital conversion in traditional architectures, while significantly improving the system's signal processing speed and resolution.

[0027] In one optional embodiment of the present invention, the data acquisition module includes a sampling circuit, a data acquisition module control unit, and a first memristor array; The sampling circuit is connected to the data acquisition module control unit and the first memristor array, respectively, and is used to receive analog input signals and amplify and preprocess the analog input signals. The data acquisition module control unit is also connected to the first memristor array, and is used to complete the sampling action of analog input signal by controlling the sampling circuit, drive the pre-processed analog input signal to be stored in the first memristor array, read the data stored in the first memristor array, and output the stored data to the calculation module after being converted into a voltage signal by the output amplifier. The first memristor array is used to adjust its resistance value according to the voltage change flowing through it, so as to store the analog input signal in the form of resistance state.

[0028] In an optional embodiment of the present invention, the sampling circuit includes a multi-channel sampling amplifier, each of which is configured with a corresponding independent switch. The sampling amplifier establishes selective connections with the data acquisition module control unit and the row input of the corresponding memristor in the first memristor array through the independent switches. In the initial state, the sampling amplifier is connected to the data acquisition module control unit through the switch. After the data acquisition module control unit completes the sampling and judgment of the analog input signal through the switch, it controls the switch to switch to connect the sampling amplifier and the first memristor array, and transmits the analog input signal preprocessed by the sampling amplifier to the row input of the corresponding memristor in the first memristor array, so as to realize the storage of the signal in the first memristor array.

[0029] In this embodiment, the data acquisition module includes a data acquisition module control unit, a first memristor array, and a sampling circuit; The data acquisition and storage module control unit samples the analog input signal by controlling the sampling circuit and stores the analog input signal in the first memristor array. At the same time, the data acquisition and storage module control unit reads the data stored in the first memristor array and converts it into a voltage signal through the output amplifier before outputting it to the calculation module. The first memristor array changes its resistance according to the voltage flowing through it, thereby storing the input signal. The output of each column of memristors is connected to the computing module after passing through an output amplifier. The sampling circuit includes multiple sampling amplifiers. Each sampling amplifier is connected to the data acquisition module control unit and the row input of the memristor in the first memristor array through a switch. The input of the sampling amplifier is an analog input signal. Initially, the sampling amplifier is connected to the data acquisition module control unit through the switch. After the data acquisition module control unit samples the analog input signal through the switch, it controls the switch to connect the sampling amplifier and the memristor to store the data in the memristor.

[0030] In one optional embodiment of the present invention, the data acquisition module control unit limits the voltage range for storing and reading analog input signals by controlling the read / write threshold of the first memristor array; After the analog input signal is amplified by the amplifier, the first memristor array directly quantizes the analog voltage excitation to achieve signal storage.

[0031] In this embodiment, the data acquisition module control unit controls the read / write threshold of the first memristor array to realize the voltage range for storing and reading analog input signals; after the analog input signal is amplified by an amplifier, the first memristor array directly quantizes the analog voltage excitation, and the resistance value is continuously variable, realizing ultra-precision stepless storage.

[0032] In one optional embodiment of the present invention, the computing module includes a computing module control unit and a second memristor array; The computing module control unit is connected to the second memristor array to realize read and write control of the second memristor array; The second memristor array performs neuromorphic calculations on the received voltage signal and analyzes and processes the analog input signal before outputting an analog output signal converted by an operational amplifier as the calculation result.

[0033] In this embodiment, the computing module is divided into a computing module control unit and a second memristor array; The computing module control unit is responsible for controlling the read and write operations of the second memristor array; The row inputs of the second memristor array are connected one-to-one with the voltage signals output by each column of the first memristor array after passing through the output amplifier. Under the control of the computing module control unit, the second memristor array performs neuromorphic calculations. Finally, each column output of the second memristor array is passed through an operational amplifier to output an analog output signal as the calculation result.

[0034] In an optional embodiment of the present invention, the calculation module control unit limits the voltage range of the analog input signal calculation by controlling the read / write threshold of the second memristor array; After the analog input signal is simulated by the second memristor array, the voltage signal corresponding to the analog input signal is subjected to neuromorphic calculation under the control of the computing module control unit to complete the analysis and processing of the analog input signal.

[0035] In this embodiment, the calculation module control unit controls the read / write threshold of the second memristor array to realize the voltage range for calculating the analog input signal; the analog input signal is analyzed and processed by the second memristor array.

[0036] In one optional embodiment of the present invention, the row input of the second memristor array is connected to the voltage signal output by each column of the first memristor array after being converted by the output amplifier.

[0037] In this embodiment, the first memristor array and the second memristor array constitute a memristor storage array. The memristor storage array is controlled by the acquisition module control unit and the computing module control unit to realize the integrated acquisition, storage and computing function of the entire analog domain.

[0038] In an optional embodiment of the present invention, the first memristor array and the second memristor array cooperate to form a memristor storage array. The acquisition and storage module control unit and the computing module control unit adjust the read and write thresholds, signal transmission paths and working timing of the memristor storage array through a cooperative control method to realize the integrated acquisition, storage and computing function of the entire analog domain.

[0039] In an optional embodiment of the present invention, the memristor storage array adjusts the array resistance value according to the input signal to achieve gain control, so that the amplitude of the output signal is kept within a constant effective range; The memristor storage array compresses the range of input signals by continuously adjusting the array resistance value, so that signals of different intensities can be displayed on the screen.

[0040] In this embodiment, the memristor memory array adjusts its resistance value according to the input signal to achieve automatic gain control, keeping the amplitude of the output signal within a constant range. By continuously adjusting the resistance value, the dynamic range of the signal is compressed, ensuring that signals of different intensities are clearly visible on the display screen. Specifically, the memristor-based memory array (AGC) adjusts its resistance based on the input signal to achieve automatic gain control (AGC), keeping the output signal amplitude within a constant range. This ensures the signal remains within the optimal display range, maintaining stability even when the input signal strength changes. For example, when the input signal strength changes, AGC can adjust the gain accordingly to keep the output signal at a constant level, thereby improving communication quality, reducing signal distortion, and increasing the receiver's dynamic range. By continuously adjusting the resistance, the dynamic range of the signal is compressed, allowing signals of varying strengths to be clearly visible on the display screen.

[0041] Memristor memory arrays can also implement low-pass filters, high-pass filters, band-pass filters, or FIR filters by adjusting the resistance value. The continuously changing resistance value allows for precise adjustment of the filter's cutoff frequency and bandwidth, and the filter coefficients can also be configured steplessly.

[0042] Memristor-based memory arrays can also precisely control the trigger threshold by adjusting the resistance value, enabling the detection of specific signal edges; and can use continuously adjusted resistance values ​​to set trigger conditions, implementing more complex trigger logic. Among these, the more complex trigger logic involves triggering within a specific time window.

[0043] In one optional embodiment of the present invention, the memristor storage array utilizes a storage array with continuously adjustable resistance values ​​to implement Fast Fourier Transform (FFT) for spectral analysis. The memristor storage array performs phase adjustment on the signal to achieve phase measurement.

[0044] In this embodiment, the memristor storage array uses a continuously adjustable resistance array to implement Fast Fourier Transform (FFT) for spectrum analysis; and achieves accurate phase measurement by adjusting the phase of the signal.

[0045] Memristor memory arrays can also generate composite waveforms by superimposing different signals through adjusting the resistance value; they can also achieve analog modulation by continuously adjusting the resistance value and display the modulated signal on an oscilloscope.

[0046] In addition, the memristor storage array can achieve peak detection by adjusting the resistance value, which is used to measure the maximum or minimum value of a signal; it can also be used to calculate the average value of a signal to eliminate the influence of random noise; it can perform integration or differentiation on the signal to achieve further analysis; and it can achieve the automatic calibration function of the oscilloscope by continuously adjusting the resistance value to ensure the accuracy of the measurement results.

[0047] Specifically, memristor-based compute arrays implement advanced triggering functions: Edge triggering: By adjusting the resistance value, the trigger threshold can be precisely controlled to achieve the detection of specific signal edges.

[0048] Window triggering: By using continuously adjusted resistance values ​​to set trigger conditions, more complex triggering logic can be implemented, such as triggering within a specific time window.

[0049] Furthermore, memristor-based memory arrays are used for signal analysis: Spectrum analysis: Fast Fourier Transform (FFT) is implemented using a continuously adjustable storage array to perform spectrum analysis.

[0050] Phase measurement: Accurate phase measurement is achieved by adjusting the phase of the signal.

[0051] Furthermore, the memristor-based memory array enables waveform generation: Waveform superposition: By adjusting the resistance value, different signals can be superimposed to generate composite waveforms.

[0052] Modulation signal generation: Analog modulation (such as AM, FM) is achieved by continuously adjusting the resistance value, and the modulation signal is displayed on an oscilloscope.

[0053] Furthermore, memristor-based memory arrays enable advanced measurements: Peak detection: By adjusting the resistance value, the peak detection function is realized, which is used to measure the maximum or minimum value of the signal.

[0054] Average value calculation: The average value of the signal is calculated using a storage array to eliminate the influence of random noise.

[0055] Integration and differentiation: By integrating or differentiating a signal, further analysis of the signal can be achieved.

[0056] Self-calibration: By continuously adjusting the resistance value, the oscilloscope can automatically calibrate itself, ensuring the accuracy of measurement results.

[0057] The fully analog-domain sampling, storage, and computation architecture proposed in this application allows for direct processing of sampled and held data in the analog domain without analog-to-digital conversion. This design reduces conversion steps in the signal path, significantly lowering the risk of signal distortion and noise introduction, while effectively simplifying the system architecture.

[0058] Employing an in-memory computing model, which deeply integrates computation and storage, can significantly improve the performance of an ADC. This model achieves high-speed and high-precision data processing by reducing the data transfer time and energy consumption between the processor and memory. Since data does not need to move frequently between different hardware units, system latency is effectively reduced and overall processing efficiency is improved.

[0059] The processed results remain in analog form and can be directly used in subsequent processing stages without additional digital-to-analog conversion. This not only further simplifies the signal processing flow but also avoids the cumulative errors caused by multiple conversions, ensuring the continuity and accuracy of signal processing.

[0060] Figure 2 The principle structure diagram of the acquisition and storage module provided in the embodiments of this application is as follows: Figure 2 As shown, in this embodiment, the analog input signal is amplified by an amplifier, and the first memristor array directly quantizes the analog voltage excitation. The resistance value is continuously variable, and there is no quantization bit width, enabling ultra-precision stepless storage. A single device in the storage array can achieve one-to-one sample storage, with read / write speeds approximately 1000 times faster than traditional flash memory, and power consumption reduced by 15 times. Then, under the control of the acquisition and storage module control unit, the signal information stored in the resistance value of the first memristor array is converted into a voltage signal by an amplifier and input to the second memristor array for signal analysis and processing.

[0061] The first and second memristor arrays have read / write thresholds; that is, the memristor resistance will not change when the input voltage is below the threshold, but will change when it is above the threshold. Therefore, the memristor arrays require different voltage ranges for signal storage, readout, and computation, a process controlled by the acquisition module control unit and the computation module control unit. Utilizing the nanosecond or even picosecond switching speeds and wide frequency response range of memristors, which can process high-frequency signals, high speed and high resolution can be achieved simultaneously, overcoming the speed and accuracy trade-offs of traditional ADCs. Furthermore, the memristor in-memory array is an on-chip, highly parallel integrated computing unit; the storage unit directly performs multiplication and accumulation operations without bus transport. One in-memory unit is equivalent to a multiplier + adder + memory. This significantly reduces circuit power consumption and area, increases circuit integration, and lowers circuit cost.

[0062] Memristors can accurately realize the above-mentioned integrated analog domain acquisition-storage-computation architecture when the resistance value is linearly and infinitely adjustable. However, considering factors such as memristor technology, it is not currently possible to achieve linear and infinitely adjustable memristor resistance. Using low-bit memristors will cause errors in the acquisition-storage-computation system. Here, we will analyze the error situation.

[0063] Taking a 1-bit memristor as an example, it only exists in two states: high impedance and low impedance. The memristor only changes from its initial high impedance to low impedance when the input voltage exceeds a certain threshold. After the input analog signal passes through the sampling circuit, the storage module control unit stores it in the first memristor array in both high and low impedance states. Then, the first memristor array is read, and the current signal is converted into a voltage signal by an amplifier before entering the calculation module. Since the memristor only has two states, when the input voltage signal is greater than the threshold, the memristor changes from high impedance to low impedance, outputting a current signal, which is then converted into a high-level signal by an amplifier. When the voltage is less than the threshold, the memristor maintains its high impedance state, and the output current is approximately zero, which is then converted into a low-level signal by an amplifier. Thus, the calculation module achieves the quantization and encoding of the input analog signal.

[0064] Figure 3 The schematic diagrams of the sampling and calculation errors based on 1-bit, 2-bit, 3-bit, and 4-bit memristors provided in the embodiments of this application are as follows: Figure 3 As shown, For example, for a 2-bit memristor, the signal on the positive half-axis, after sampling, storage, and processing, can only yield four values: 0, 1 / 3, 2 / 3, and 1 (the negative half-axis yields 0, -1 / 3, -2 / 3, and -1), which contains errors compared to the ideal signal. A sampling-storage-processing error rate formula is defined as follows: ; The sampling and storage error rates when using 1-bit, 2-bit, 3-bit, and 4-bit memristors are 31.51%, 11.58%, 5.18%, and 2.48%, respectively. The more memristor states there are, the lower the sampling and storage error rate, and the closer the actual displayed signal is to the ideal signal.

[0065] The sampling and storage error rates for memristors with a precision of 1-16 bits were calculated and plotted as curves, as shown below. Figure 4 As shown, the sampling and storage error rate decreases exponentially with increasing memristor precision. By fitting this curve, the following formula is obtained to calculate the error rate generated by memristors of different precisions: ; As can be seen from the above embodiments, this embodiment includes an acquisition and storage module and a computing module, both based on memristor arrays, realizing integrated acquisition-storage-computation across the entire analog domain. Full analog domain processing eliminates the need for analog-to-digital signal conversion, reducing conversion steps in the signal path and thus lowering the risk of signal distortion and noise introduction. It also simplifies the system architecture and avoids the cumulative errors caused by multiple analog-to-digital conversions, ensuring the continuity and accuracy of signal processing. The in-memory computing mode, which tightly integrates computation and storage, significantly improves ADC performance, reduces the time and energy consumption of data transfer between the processor and memory, effectively reducing latency and improving overall efficiency, while achieving high-speed and high-precision data processing. It also greatly reduces circuit power consumption and area, increases circuit integration, and lowers circuit costs.

[0066] This embodiment relates to the field of integrated circuit technology, specifically a fully analog-domain integrated acquisition, storage, and computation architecture based on a memristor array. The invention includes an acquisition / storage module and a computation module, both implemented using a memristor array. Full analog-domain processing eliminates the need for analog-to-digital signal conversion, reducing conversion steps in the signal path and thus lowering the risk of signal distortion and noise introduction. It also simplifies the system architecture and avoids the cumulative errors caused by multiple analog-to-digital conversions, ensuring the continuity and accuracy of signal processing. The in-memory computation mode, which tightly integrates computation and storage, significantly improves ADC performance, reduces the time and energy consumption of data transfer between the processor and memory, effectively reducing latency and improving overall efficiency, while achieving high-speed and high-precision data processing. It also greatly reduces circuit power consumption and area, increases circuit integration, and lowers circuit costs.

[0067] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0068] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0069] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A fully analog-domain integrated architecture for acquisition, storage, and computation based on a memristor array, characterized in that, The architecture includes a data acquisition and storage module and a computing module; The acquisition and storage module is used to limit the voltage range for storing and reading analog input signals, quantize analog voltage excitation, and output voltage signals to the calculation module. The input terminal of the calculation module is connected to the acquisition and storage module, which is used to limit the voltage range of the analog input signal calculation, receive the voltage signal output by the acquisition and storage module, analyze and process the analog input signal corresponding to the voltage signal, and output the analog output signal as the calculation result, so as to realize the integrated acquisition, storage and calculation function of the entire analog domain.

2. The architecture according to claim 1, characterized in that, The data acquisition module includes a sampling circuit, a data acquisition module control unit, and a first memristor array. The sampling circuit is connected to the data acquisition module control unit and the first memristor array, respectively, and is used to receive analog input signals and amplify and preprocess the analog input signals. The data acquisition module control unit is also connected to the first memristor array, and is used to complete the sampling action of analog input signal by controlling the sampling circuit, drive the pre-processed analog input signal to be stored in the first memristor array, read the data stored in the first memristor array, and output the stored data to the calculation module after being converted into a voltage signal by the output amplifier. The first memristor array is used to adjust its resistance value according to the voltage change flowing through it, so as to store the analog input signal in the form of resistance state.

3. The architecture according to claim 2, characterized in that, The sampling circuit includes multiple sampling amplifiers, each of which is equipped with a corresponding independent switch. The sampling amplifiers are selectively connected to the data acquisition module control unit and the row input of the corresponding memristor in the first memristor array through the independent switches. In the initial state, the sampling amplifier is connected to the data acquisition module control unit through the switch. After the data acquisition module control unit completes the sampling and judgment of the analog input signal through the switch, it controls the switch to switch to connect the sampling amplifier and the first memristor array, and transmits the analog input signal preprocessed by the sampling amplifier to the row input of the corresponding memristor in the first memristor array, so as to realize the storage of the signal in the first memristor array.

4. The architecture according to claim 2, characterized in that, The data acquisition module control unit limits the voltage range for storing and reading analog input signals by controlling the read / write threshold of the first memristor array. After the analog input signal is amplified by the amplifier, the first memristor array directly quantizes the analog voltage excitation to achieve signal storage.

5. The architecture according to claim 1, characterized in that, The computing module includes a computing module control unit and a second memristor array; The computing module control unit is connected to the second memristor array to realize read and write control of the second memristor array; The second memristor array performs neuromorphic calculations on the received voltage signal and analyzes and processes the analog input signal before outputting an analog output signal converted by an operational amplifier as the calculation result.

6. The architecture according to claim 5, characterized in that, The calculation module control unit limits the voltage range for calculating analog input signals by controlling the read / write threshold of the second memristor array. After the analog input signal is simulated by the second memristor array, the voltage signal corresponding to the analog input signal is subjected to neuromorphic calculation under the control of the computing module control unit to complete the analysis and processing of the analog input signal.

7. The architecture according to claim 2 or 5, characterized in that, The row inputs of the second memristor array are connected to the voltage signals output by the output amplifiers of each column in the first memristor array.

8. The architecture according to claim 7, characterized in that, The first memristor array and the second memristor array work together to form a memristor storage array. The acquisition and storage module control unit and the computing module control unit coordinate and control the read and write thresholds, signal transmission paths and working timing of the memristor storage array to achieve integrated acquisition, storage and computing functions in the entire analog domain.

9. The architecture according to claim 8, characterized in that, The memristor storage array adjusts the array resistance value according to the input signal to achieve gain control, so that the amplitude of the output signal is kept within a constant effective range; The memristor storage array compresses the range of input signals by continuously adjusting the array resistance value, so that signals of different intensities can be displayed on the screen.

10. The architecture according to claim 8, characterized in that, The memristor storage array utilizes a continuously adjustable resistance storage array to perform Fast Fourier Transform (FFT) and conduct spectral analysis. The memristor storage array performs phase adjustment on the signal to achieve phase measurement.

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