Slurry composition, polishing pad, and semiconductor device manufacturing method using the same

Abstract

Slurry compositions including abrasive particles, polishing pads, and semiconductor device manufacturing methods are provided. The abrasive particles include a core including a phase change material that undergoes a phase change within a processing temperature range of a chemical mechanical polishing (CMP) process, and a shell including a material different from the phase change material of the core and surrounding the core.

Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2024-0170062, filed on November 25, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to a slurry composition for chemical mechanical polishing (CMP), a polishing pad for CMP, and a method for manufacturing a semiconductor device using the same. Background Technology

[0004] In semiconductor device manufacturing processes, CMP (Chemical Motion Polishing) is primarily used to polish the surfaces of semiconductor devices that include multiple highly integrated components. As the integration level of semiconductor devices increases, improving the reliability of polishing processes used to create fine patterns becomes increasingly important. Summary of the Invention

[0005] This disclosure provides a slurry composition for chemical mechanical polishing (CMP) to facilitate control of process temperature, a polishing pad for CMP, and a method for manufacturing a semiconductor device using the same.

[0006] Furthermore, this disclosure is not limited to the foregoing. Other aspects of this disclosure not mentioned above will be readily understood by those skilled in the art from the following description.

[0007] According to one aspect of this disclosure, the slurry composition includes abrasive particles, the abrasive particles including a core and a shell, the core including a phase change material that undergoes a phase change within the processing temperature range of the CMP process, and the shell including a material different from the core and surrounding the core.

[0008] According to another aspect of this disclosure, the polishing pad includes a substrate and abrasive particles disposed on the surface of the substrate and including a core and a shell. The core includes a phase change material that undergoes a phase change within the processing temperature range of the CMP process, and the shell includes a material different from the core and surrounds the core.

[0009] According to another aspect of this disclosure, a method of manufacturing a semiconductor device includes: forming an object to be polished on a substrate, and performing a chemical mechanical polishing (CMP) process using a slurry composition and a polishing pad to polish the object to be polished, wherein at least one of the slurry composition and the polishing pad includes abrasive particles, the abrasive particles including a core and a shell, the core including a phase change material that undergoes a phase change in a temperature range from about 30°C to about 80°C, and the shell including a material different from the material of the core and surrounding the core. Attached Figure Description

[0010] The embodiments will become clearer from the following detailed description taken in conjunction with the accompanying drawings.

[0011] In the attached image:

[0012] Figure 1 This is a schematic partial cross-sectional perspective view showing some components of the polishing apparatus according to an embodiment;

[0013] Figure 2 This is a cross-sectional view of an abrasive particle with a core-shell structure according to an embodiment;

[0014] Figure 3 This is a cross-sectional view of an abrasive particle with a core-shell structure according to an embodiment;

[0015] Figure 4 This is a plan view of the abrasive layer according to the implementation method;

[0016] Figures 5A to 5M This is a cross-sectional view showing a semiconductor device manufacturing method according to an embodiment; and

[0017] Figures 6A to 6K This is a cross-sectional view showing a semiconductor device manufacturing method according to an embodiment. Detailed Implementation

[0018] The embodiments are described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used for the same parts, and redundant descriptions are omitted.

[0019] Figure 1 This is a schematic partial cross-sectional perspective view showing some components of the polishing apparatus according to an embodiment.

[0020] Reference Figure 1 The polishing apparatus 1 can be used to polish the surface of a wafer (WF) in a chemical mechanical polishing (CMP) process. Figure 1 The polishing device 1 can rotate.

[0021] The polishing apparatus 1 may include a table 20 having a rotating disk shape. The table 20 may be rotatably arranged about a central axis 25 of the table 20 by means of a motor 21. For example, the motor 21 may rotate a drive shaft 24 to rotate the table 20. A polishing pad 10 may be disposed on the top surface of the table 20. The polishing pad 10 may include an abrasive layer 12 and a support layer 14. The support layer 14 may support the polishing pad 10 for attachment to the table 20.

[0022] In one embodiment, the polishing pad 10 may include a polishing pad with a three-dimensional structure. As the need for conditioning of polishing pads with three-dimensional structures decreases, the sustainability of abrasive particles within the polishing pad 10 can be increased.

[0023] For example, a film to be polished, such as a metal film or an insulating film, can be formed on the wafer WF. The wafer WF can have a structure for forming integrated circuit devices, a structure for forming thin-film transistor-liquid crystal displays (TFT-LCDs), and a structure including various substrates (such as glass substrates, ceramic substrates, and polymer substrates).

[0024] The polishing apparatus 1 may include a slurry inlet 30 for supplying the slurry composition SC to the polishing pad 10. The polishing apparatus 1 may also include a polishing pad adjuster 60. The polishing pad adjuster 60 may be configured to perform a periodic polishing and dressing process on the surface of the polishing pad 10, thereby enabling the polishing pad 10 to provide a certain polishing efficiency.

[0025] The polishing apparatus 1 may include at least one carrier head 40. The carrier head 40 may be loaded with a wafer WF. When the wafer WF loaded on the carrier head 40 is arranged facing the stage 20, the carrier head 40 may be configured to rotate while pressing the wafer WF toward the stage 20. Although in Figure 1 The image shows only one carrier head 40 on the polishing pad 10, but multiple carrier heads 40 can be provided on the polishing pad 10. The carrier head 40 can be configured to control the pressure applied to the wafer WF.

[0026] The carrier head 40 may include a retaining ring 42 for holding the wafer WF. The carrier head 40 may be supported by a support structure 50 (e.g., a disc conveyor or track) and may be connected to a carrier head rotation motor 54 via a drive shaft 52 to rotate about a central axis 55 of the drive shaft 52.

[0027] The polishing apparatus 1 may also include a control system for rotating the control panel 20. The control system may include a controller 90 (such as a general-purpose programmable digital computer), an output device 92 (such as a monitor), and an input device 94 (such as a keyboard). Although in Figure 1 The control system is only connected to motor 21, but this is just an example. The control system can also be connected to carrier head 40 to adjust the pressure or rotation speed of carrier head 40. In addition, the control system can be connected to slurry inlet 30 to adjust the supply of slurry composition SC.

[0028] The slurry composition SC and / or polishing pad 10 of this disclosure may include a phase change material that undergoes a phase change within the temperature range for performing a CMP process. The slurry composition SC and / or polishing pad 10 of this disclosure may include abrasive particles having a core-shell structure. The abrasive particles having a core-shell structure according to this disclosure are described in detail below. Abrasive particles having a core-shell structure are referenced to... Figure 2 and Figure 3 Describe it.

[0029] abrasive particles

[0030] Figure 2 This is a cross-sectional view of an abrasive particle with a core-shell structure according to an embodiment. Figure 3 This is a cross-sectional view of an abrasive particle with a core-shell structure according to an embodiment. Figure 2 Abrasive particles comprising a shell are shown, and Figure 3 An abrasive particle consisting of two shells is shown.

[0031] Reference Figure 2 and Figure 3 The abrasive particles AP and APa may have a core-shell structure. The core-shell structure may include a solid core C and a shell S surrounding the core C. The core C and shell S may each comprise different materials. In embodiments, the abrasive particles having a core-shell structure may include one or more layers of shell S.

[0032] In the implementation method, such as Figure 2 As shown, the abrasive particle AP may include a core C and a shell S surrounding the core C.

[0033] In another embodiment, such as Figure 3 As shown, the abrasive particle APa may include a core C, a first shell S1 surrounding the core C, and a second shell S2 surrounding the first shell S1. The first shell S1 and the second shell S2 may form a shell S structure. Each of the core C, the first shell S1, and the second shell S2 may include different materials. In an embodiment, the thermal conductivity of the first shell S1 may be greater than that of the second shell S2.

[0034] Core C may include a phase change material. Core C may include a material that undergoes a phase change within a preset temperature range. In an embodiment, core C may include a material that undergoes a phase change at the processing temperature of a CMP process. In an embodiment, core C may include a material that undergoes a phase change between about 30°C and about 80°C. In an embodiment, core C may include a material that undergoes a phase change between about 40°C and about 70°C. In an embodiment, core C may include a material that undergoes a phase change between about 50°C and about 60°C. In an embodiment, core C may include a fatty acid that melts (or solidifies) between about 30°C and about 80°C. In an embodiment, core C may include a material that melts (or solidifies) between about 40°C and about 70°C. In an embodiment, core C may include a material that melts (or solidifies) between about 50°C and about 60°C. For example, core C may include lauric acid, palmitic acid, stearic acid, and / or myristic acid. However, core C is not limited to these. Core C may include other types of materials.

[0035] The shell S may cover the core C. The shell S may comprise a material with high thermal conductivity. In embodiments, the shell S may comprise, but is not limited to, silicon dioxide, aluminum oxide, cerium dioxide, titanium dioxide, zirconium oxide, magnesium oxide, germanium oxide and / or manganese oxide. As described above, the shell S may comprise one or more layers.

[0036] In one embodiment, the slurry composition SC and / or polishing pad 10 may include abrasive particles AP and APa in an amount of about 0.05 wt.% to about 30 wt.% based on the total weight of the slurry composition SC or abrasive layer 12. In another embodiment, the slurry composition SC and / or polishing pad 10 may include abrasive particles in an amount of about 0.1 wt.% to about 20 wt.% based on the total weight of the slurry composition SC and / or abrasive layer 12. In yet another embodiment, the slurry composition SC and / or polishing pad 10 may include abrasive particles in an amount of about 1 wt.% to about 10 wt.% based on the total weight of the slurry composition SC and / or abrasive layer 12. In yet another embodiment, the slurry composition SC and / or polishing pad 10 may include abrasive particles in an amount of about 2 wt.% to about 8 wt.% based on the total weight of the slurry composition SC and / or abrasive layer 12.

[0037] In one embodiment, the abrasive particles AP and APa may have a size of about 5 nm to about 200 nm. In another embodiment, the abrasive particles AP and APa may have a size of about 1 nm to about 10 nm. In yet another embodiment, the abrasive particles AP and APa may have a size of about 10 nm to about 5 μm. In yet another embodiment, the abrasive particles AP and APa may have a size of about 5 nm to about 10 μm.

[0038] Processing temperatures can be increased as the CMP process progresses. Excessive increases in processing temperature can lead to an increase in dishing, etching, wafer recess, and / or pad elongation. Dishing can refer to over-polishing of the film material being polished, and etching can refer to the chemical etching of the film material being polished. Wafer recess can refer to excessive removal of the wafer funnel (WF), and pad elongation can refer to physical deformation of the pads.

[0039] When the abrasive particles AP and APa include phase change materials, the phase change materials can undergo a phase change during the CMP process as the processing temperature increases. When the phase change material induces an endothermic reaction during the phase change, the increase in processing temperature can be suppressed. This can reduce the occurrence of the aforementioned pitting, corrosion, wafer pitting, and / or pad elongation. Furthermore, since the processing temperature is controlled, the removal rate of the film material to be polished can be controlled.

[0040] Return to reference Figure 1The components constituting the slurry composition SC and the polishing pad 10 can be further described. In one embodiment, the slurry composition SC can be used to polish a metallic material film. In another embodiment, the slurry composition SC can be used to polish an insulating material film. For example, the slurry composition SC may selectively include the aforementioned abrasive particles, polishing accelerators, pH adjusters, oxidants, water, corrosion inhibitors, catalysts, and / or antimicrobial agents. For example, the slurry composition SC may selectively include surfactants, polishing inhibitors, and / or homogenizers.

[0041] Polishing accelerator

[0042] The slurry composition SC may further include a polishing accelerator to increase the polishing rate (or removal rate). The polishing accelerator may include anionic low molecular weight, anionic high molecular weight, hydroxy acid, or amino acid. For example, anionic low molecular weight may include at least one of citric acid, polyacrylic acid, polymethacrylic acid, and copolyacids or salts thereof. Furthermore, hydroxy acids may include at least one of hydroxybenzoic acid, ascorbic acid, or salts thereof. Non-limiting examples of amino acids may include pyridinecarboxylic acid, serine, proline, arginine, asparagine, aspartic acid, cysteine, glutamine, glutamic acid, glycine, histidine, lysine, phenylalanine, tyrosine, valine, tryptophan, betaine, pyroglutamic acid, GABA, pyridinecarboxylic acid, polyethylene glycol amino ether acetic acid, and isoleucine.

[0043] Additional examples of polishing accelerators may include quinone compounds, such as 3-hydroxy-4-methylphenol anion or 3-hydroxy-4-hydroxymethylphenol anion, 4-methyl-benzene-1,3-diol, kojic acid, maltol propionate, and maltol isobutyrate. Non-limiting examples of quinone compounds may include at least one selected from the group consisting of: dienes, glycols, and dialenols (dienol anions) comprising alkylbenzene glycols and hydroxyl and alkyl groups; dienes, glycols, and dialenols (dienol anions) comprising alkyl groups linked by an oxygen group and phenol anions; and dienes, glycols, and dialenols (dienol anions) comprising hydroxyalkyl groups and benzene rings.

[0044] Specifically, non-limiting examples of quinone compounds include 4-alkyl-benzene-1,3-diol, 3-hydroxy-4-alkyl-cyclohex-2,5-dienone, 6-alkyl-3-oxo-cyclohex-1,4-dienol anion, 3-hydroxy-6-alkyl-cyclohex-2,4-dienone, 4-alkyl-3-oxo-cyclohex-1,5-dienol anion, 3-hydroxy-4-alkyl-phenol anion, 5-hydroxy-2-alkyl-phenol anion, 3-hydroxy -4-alkyl-phenol anion, 5-hydroxy-2-hydroxyalkyl-phenol anion, 3-hydroxy-4-hydroxyalkyl-phenol anion, 3-hydroxy-4-hydroxyalkyl-cyclohex-2,5-dienone, 6-hydroxyalkyl-3-oxo-cyclohex-1,4-dienol anion, 3-hydroxy-6-hydroxyalkyl-cyclohex-2,4-dienone, 4-hydroxyalkyl-3-oxo-cyclohex-1,5-dienol anion, and 4-hydroxyalkyl-benzene-1,3-diol.

[0045] Additional examples of polishing accelerators may include diammonium hydrogen phosphate, ammonium dihydrogen phosphate, bis(2-ethylhexyl) phosphate, 2-aminoethyl dihydrogen phosphate, 4-chlorophenyldiazohexafluorophosphate, nitrobenzenediazo hexafluorophosphate, ammonium hexafluorophosphate, bis(2,4-dichlorophenyl)chlorophosphite, bis(2-ethylhexyl) hydrogen phosphate, bis(2-ethylhexyl) phosphite, calcium fluorophosphate, diethyl chlorophosphate, O,O-diethylthiophosphoryl chloride, potassium hexafluorophosphate, pyrophosphate, tetrabutylammonium hexafluorophosphate, and tetraethylammonium hexafluorophosphate.

[0046] pH adjuster

[0047] The slurry composition SC may also include a pH adjuster for adjusting the pH of the composition. In one embodiment, the pH of the slurry composition SC may be from about 1 to about 9. In another embodiment, the pH of the slurry composition SC may be from about 2 to about 7. In yet another embodiment, the pH of the slurry composition SC may be from about 4 to about 9.

[0048] Acidic and alkaline solutions can be appropriately used to control the pH of the slurry composition SC. In embodiments, acidic solutions (such as sulfuric acid, phosphoric acid, hydrochloric acid, nitric acid, carboxylic acid, maleic acid, malonic acid, citric acid, oxalic acid, or tartaric acid) and / or alkaline solutions (such as calcium hydroxide, potassium hydroxide, ammonium hydroxide, sodium hydroxide, magnesium hydroxide, triethylamine, tetramethylammonium hydroxide, or ammonia) can be used as pH adjusters, but are not limited thereto. The pH adjuster can be included in the slurry composition SC in an amount that allows the pH of the slurry composition SC to have a desired range, but is not limited thereto.

[0049] Oxidizing agent

[0050] Typically, slurry compositions SC used for polishing films of metallic materials include oxidizing agents. Non-limiting examples of oxidizing agents may include organic peroxides, such as peracetic acid, perbenzoic acid, and tert-butyl hydroperoxide; permanganate compounds, such as potassium permanganate; dichromate compounds, such as potassium dichromate; halogenated acid compounds, such as potassium iodate; nitric acid compounds, such as nitric acid and ferric nitrate; perhalate compounds, such as perchloric acid; persulfates, such as sodium persulfate, potassium persulfate, and ammonium persulfate; percarbonates, such as sodium percarbonate and potassium percarbonate; urea peroxide; and heteropoly acids.

[0051] water

[0052] The water contained in the slurry composition SC may include purified water. There is no particular limitation on the water content in the slurry composition SC. Water may be included as a remainder in the slurry composition SC along with the main components, including pH adjusters and / or oxidants.

[0053] Corrosion inhibitors

[0054] The slurry composition SC may also include a corrosion inhibitor, which is composed of an azole compound or a water-soluble polymer comprising anionic carboxylic acids. The corrosion inhibitor can selectively adhere to the surface of the metal contained in the metal-containing film, which is the film to be polished, thereby effectively inhibiting excessive corrosion of the metal-containing film while maintaining a good polishing rate.

[0055] In embodiments, the corrosion inhibitor may include an azole-containing compound, including triazole, tetraazole, benzotriazole, tolyltriazole, aminotriazole, aminobenzimidazole, pyrazole, imidazole, aminotetrazole, or combinations thereof. For example, the corrosion inhibitor may be selected from 5-methyl-1H-benzotriazole, 2,2'-[[(5-methyl-1H-benzotriazole-1-yl)methyl]imino]bis-ethanol, 1,2,4-triazole, 1,2,3-triazole, 1,2,3-triazolo[4,5-b]pyridine, or combinations thereof. As a corrosion inhibitor, one material selected from the above materials may be used alone, or two or more materials may be used in combination.

[0056] In an embodiment, the slurry composition SC for polishing metal may include an amount of corrosion inhibitor from about 0.001 wt.% to about 1 wt.% (e.g., about 0.001 wt.% to about 0.5 wt.%), based on the total amount of the slurry composition SC. When the content of corrosion inhibitor in the slurry composition SC is too small or too large, it may be difficult to maintain a good polishing rate for the metal-containing film to be polished.

[0057] catalyst

[0058] Catalysts can enhance the oxidation capacity of slurry composition SC and increase the removal rate of metal-containing films to be polished.

[0059] In embodiments, the catalyst may include ferric nitrate, ferric sulfate, and ferric halides, iron-containing organic compounds, or combinations thereof. Ferric halides may be selected from ferric fluoride, ferric chloride, ferric bromide, ferric iodide, ferric perchlorate, ferric perbromate, and ferric periodate, or combinations thereof. For example, iron-containing organic compounds may be selected from ferric acetate, ferric acetylacetone, ferric citrate, ferric gluconate, ferric malonate, ferric oxalate, ferric phthalate, and ferric succinate, or combinations thereof. Examples of catalysts are not limited thereto. As a catalyst, one material selected from the above-mentioned materials may be used alone, or two or more materials may be used in combination.

[0060] In an embodiment, based on the total amount of the slurry composition SC, the slurry composition SC may include an amount of catalyst of about 0.001 wt.% to about 0.1 wt.% (e.g., about 0.001 wt.% to about 0.1 wt.%).

[0061] antimicrobial agents

[0062] Antimicrobial agents prevent microbial contamination of the slurry composition SC and / or the object to be polished. In embodiments, antimicrobial agents may include, but are not limited to, organotin compounds, salicylaniline, formaldehyde, quaternary ammonium compounds, 2-bromo-2-nitropropane-1,3-diol (Brobol), 2,2-dibromo-3-hypoazolinamide (DBNPA), isothiazolinones, carbamates, quaternary phosphonium salts (e.g., tetrakis(hydroxymethyl)phosphonium sulfate (THPS)), sodium chloride, sodium hypochlorite, trichloroisocyanuric acid, dichloroisocyanuric acid, calcium hypochlorite, lithium hypochlorite, chlorine dioxide, ozone, hydrogen peroxide, or combinations thereof.

[0063] When the slurry composition SC includes an antimicrobial agent, the content of the antimicrobial agent can be from about 0.001 wt.% to about 10 wt.% based on the total amount of the slurry composition SC. In embodiments, the content of the antimicrobial agent can be from about 0.001 wt.% to about 5 wt.%, from about 0.001 wt.% to about 3 wt.%, or from about 0.001 wt.% to about 1 wt.% based on the total amount of the slurry composition SC.

[0064] surfactants

[0065] The slurry composition SC may also include a surfactant as needed. As the surfactant, a suitable choice may be made from nonionic surfactants, cationic surfactants, anionic surfactants, and amphoteric surfactants.

[0066] Examples of nonionic surfactants may include polyoxyethylene alkyl ethers, such as polyoxyethylene lauryl ether and polyoxyethylene stearyl ether; polyoxyethylene alkylphenyl ethers, such as polyoxyethylene octylphenyl ether and polyoxyethylene nonylphenyl ether; sorbitan higher fatty acid esters, such as sorbitan monolaurate, sorbitan monostearate and sorbitan trioleate; polyoxyethylene sorbitan higher fatty acid esters, such as polyoxyethylene sorbitan monolaurate; polyoxyethylene higher fatty acid esters, such as polyoxyethylene monolaurate and polyoxyethylene monostearate; glycerol higher fatty acid esters, such as glycerol monooleate and glycerol monostearate; and polyoxyethylene, such as polyoxyethylene, polyoxypropylene and polyoxybutene, and their block copolymers.

[0067] Examples of cationic surfactants may include alkyltrimethylammonium chloride, dialkyldimethylammonium chloride, benzalkonium chloride, and alkyldimethylethylammonium sulfate.

[0068] Examples of anionic surfactants may include carboxylates such as sodium lauryl ether, sodium oleate, sodium N-acyl-N-methylglycinate, and sodium polyoxyethylene lauryl ether carboxylate; sulfonates such as sodium dodecylbenzenesulfonate, dialkyl sulfosuccinate, and sodium dimethyl-5-sulfoisophthalate; sulfates such as sodium lauryl sulfate, sodium polyoxyethylene lauryl ether sulfate, and sodium polyoxyethylene nonylphenyl ether sulfate; and phosphates such as sodium polyoxyethylene lauryl phosphate and sodium polyoxyethylene nonylphenyl ether phosphate.

[0069] Examples of amphoteric surfactants may include carboxybetaine surfactants, aminocarboxylates, imidazoline betaines, lecithin, and alkylamine oxides.

[0070] The surfactant can be mixed with the slurry composition SC at a mixing ratio of about 0.001 wt.% to 0.5 wt.%.

[0071] Polishing inhibitor

[0072] The slurry composition SC may also include a polishing inhibitor as needed. In embodiments, the polishing inhibitor may include nitrogen-containing compounds, such as amines and low molecular weight nitrogen-containing heterocyclic compounds (such as benzotriazole, 1,2,3-triazole and 1,2,4-triazole).

[0073] The polishing inhibitor can be mixed with the slurry composition SC at a mixing ratio of about 0.1 wt.% to 1 wt.% based on the total amount of the slurry composition SC.

[0074] homogenizer

[0075] The slurry composition SC may also include, as needed, a homogenizing agent for reducing the non-uniformity of the surface to be polished.

[0076] In the embodiments, the homogenizing agent may include ammonium chloride, ammonium lauryl sulfate, polyethylene glycol, triethanolamine polyoxyethylene alkyl ether sulfate, polyvinylpyrrolidone, polyacrylaldehyde, etc.

[0077] The homogenizer can be mixed with the slurry composition SC at a mixing ratio of about 0.1 wt.% to 1 wt.% based on the total amount of the slurry composition SC.

[0078] In one embodiment, polishing pad 10 can be used to polish a film of metallic material. In another embodiment, polishing pad 10 can be used to polish a film of insulating material. Polishing pad 10 may include the aforementioned abrasive particles, resin, and / or adhesive. Abrasive layer 12 may include resin and abrasive particles. Adhesive may be located between abrasive layer 12 and support layer 14 and / or between support layer 14 and platform 20 to bond abrasive layer 12 to support layer 14 and / or bond support layer 14 to platform 20. Support layer 14 may include resin. In one embodiment, support layer 14 may include a nonwoven felt in which the resin is formed into a sheet, but this disclosure is not limited thereto.

[0079] The resin can define the shape of the abrasive layer 12. Abrasive particles can be disposed within the resin. Furthermore, the resin can define the shape of the support layer 14. The abrasive layer 12 can be referenced... Figure 4 Describe it.

[0080] Figure 4 This is a plan view of the abrasive layer according to the implementation method. Figure 4 This is a plan view of the top surface of the abrasive layer 12 that is in contact with the object to be polished.

[0081] Reference Figure 4 The abrasive layer 12 may include a substrate 1200 and abrasive particles AP disposed on the surface of the substrate 1200. The substrate 1200 defines the general shape of the abrasive layer 12 and may include resin. For example, the substrate 1200 may have a cylindrical shape. In one embodiment, the abrasive particles AP may be uniformly spaced apart from each other on the substrate 1200. In another embodiment, the abrasive particles AP may be randomly spaced apart from each other on the substrate 1200. In another embodiment, the abrasive particles AP may include... Figure 3 Abrasive particles APa.

[0082] resin

[0083] In an embodiment, the resin may include at least one selected from the group consisting of polyethylene resin, polypropylene resin, polystyrene resin, polyvinyl chloride resin, polyamide resin, acrylic resin, polyurethane resin, polycarbonate resin, phenolic resin, amino resin, epoxy resin, polyester resin, rubber, acrylonitrile butadiene styrene (ABS), and styrene-acrylonitrile copolymer (SAN).

[0084] adhesives

[0085] In embodiments, the adhesive may include pressure-sensitive adhesive (PSA) and / or hot-melt adhesive (HMA). For example, PSA may include an adhesive containing polypropylene, epoxy, or rubber components, or may include, but is not limited to, a double-sided PSA tape in which the adhesive material is applied to both surfaces of a substrate (e.g., a polyethylene terephthalate (PET) film or felt). For example, HMA may include, but is not limited to, HMA that has undergone a curing reaction.

[0086] The following describes a method for manufacturing a semiconductor device using a slurry composition SC and / or a polishing pad 10.

[0087] Figures 5A to 5M This is a cross-sectional view showing a semiconductor device manufacturing method according to an embodiment. Figures 5A to 5M This is an example of a process for polishing a metal material film using a slurry composition SC and / or a polishing pad 10.

[0088] Reference Figure 5A On a substrate 110 including multiple active regions AC, an interlayer insulating film 120 patterned to at least partially expose the multiple active regions AC can be formed. The interlayer insulating film 120 may include recesses RE exposing the active regions AC. The recesses RE may include contact holes or may be in the form of trenches. Although the recesses RE are described as contact holes, those skilled in the art will understand that the same disclosure can be applied to the form of trenches.

[0089] Substrate 110 may include a semiconductor (such as Si or Ge) or a compound semiconductor (such as SiGe, SiC, GaAs, InAs, or InP). In embodiments, substrate 110 may include at least one of group III-V materials and group IV materials. Group III-V materials may include binary, ternary, or quaternary compounds comprising at least one group III atom and at least one group V atom. Group III-V materials may include compounds comprising at least one atom selected from In, Ga, and Al as a group III atom and at least one atom selected from As, P, and Sb as a group V atom. For example, group III-V materials may be selected from InP, In... z Ga 1-z As (0≤z≤1) and Al z Ga 1-zAs (0≤z≤1). Binary compounds may include, for example, any one of InP, GaAs, InAs, InSb, and GaSb. Ternary compounds may include any one of InGaP, InGaAs, AlInAs, InGaSb, GaAsSb, and GaAsP. Group IV materials may include Si or Ge. However, the Group III-V and Group IV materials that may be used in the integrated circuit devices according to this disclosure are not limited to those listed above. In another embodiment, substrate 110 may have a silicon-on-insulator (SOI) structure. Substrate 110 may include conductive regions, such as doped wells or doped structures.

[0090] Multiple active regions AC can be defined by multiple device isolation regions 112 formed in the substrate 110. The device isolation regions 112 may include a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a combination thereof. The interlayer insulating film 120 may include a silicon oxide film.

[0091] Reference Figure 5B A barrier metal layer 122 is formed in the recess RE and on the entire top surface of the interlayer insulating film 120. The barrier metal layer 122 can be formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD). The barrier metal layer 122 may include, for example, Ti and / or TiN.

[0092] Additionally, a conductive material layer 124m can be formed on the entire top surface of the barrier metal material layer 122. The conductive material layer 124m may include doped polycrystalline silicon or a metal, such as tungsten (W), and can be formed by CVD.

[0093] Reference Figure 5C CMP can be performed on the conductive material layer 124m to confine the conductive material layer 124m within the recess RE. For this purpose, the slurry composition and / or polishing pad described above can be used, wherein the slurry composition and / or polishing pad may include a phase change material that undergoes a phase change within the processing temperature range of the CMP process. In this case, the barrier metal material layer 122 can be used as a polishing stop film for performing CMP.

[0094] Reference Figure 5D By performing CMP on the exposed barrier metal material layer 122, the barrier metal material layer 122 can be confined within each contact hole, and complete node separation between contact holes can be performed. For this purpose, a slurry composition and / or a polishing pad can be used as described above.

[0095] exist Figure 5D In the process, such as in the reference Figure 5CIn the described process, the slurry composition and / or polishing pad may include a phase change material that undergoes a phase change within the processing temperature range of the CMP process.

[0096] Figure 5C and Figure 5D The illustration shows a two-step CMP performed using each of the barrier metal material layer 122 and the interlayer insulating film 120 as a polishing stop film. However, in some embodiments, a single-step CMP can be performed using only the interlayer insulating film 120 as a polishing stop film.

[0097] Multiple conductive regions 124 may be connected to a terminal of a switching device (such as a field-effect transistor formed on substrate 110). The multiple conductive regions 124 may include, but are not limited to, doped polysilicon, metal, conductive metal nitride, metal silicide, or combinations thereof.

[0098] Reference Figure 5E An insulating layer 128 is formed covering the interlayer insulating film 120 and multiple conductive regions 124. The insulating layer 128 can be used as an etch stop layer.

[0099] Insulating layer 128 may include, relative to interlayer insulating film 120 and molding film 130 formed in subsequent processes (see...). Figure 5F The insulating layer 128 is an etch-selective insulating material. In an embodiment, the insulating layer 128 may include silicon nitride, silicon oxynitride, or a combination thereof. In an embodiment, the insulating layer 128 may be formed to a thickness of about 10 nm to about 60 nm, but is not limited thereto.

[0100] Reference Figure 5F A molding film 130 is formed on the insulating layer 128. In embodiments, the molding film 130 may comprise an oxide film. For example, the molding film 130 may comprise an oxide film such as borosilicate glass (BPSG), phosphosilicate glass (PSG), undoped silicate glass (USG), spin-on dielectric (SOD), or an oxide film formed by a high-density plasma chemical vapor deposition (HDP CVD) process. Thermal CVD or plasma CVD processes can be used to form the molding film 130. In embodiments, the molding film 130 may be formed to a thickness of about 100 nm to about 2000 nm, but is not limited thereto.

[0101] In one embodiment, the molding film 130 may include a support film. The support film may include a material having etch selectivity relative to the molding film 130 and may have a thickness of about 5 nm to about 300 nm. The support film may include a material having a relatively low etch rate relative to the etch atmosphere used when removing the molding film 130 in a subsequent process, for example, an etchant including ammonium fluoride (NH4F), hydrofluoric acid (HF), and water. In another embodiment, the support film may include silicon nitride, silicon carbonitride, tantalum oxide, titanium oxide, or combinations thereof, but the materials constituting the support film are not limited to those listed above.

[0102] Reference Figure 5G A sacrificial film 142 and a mask pattern 144 are sequentially formed on the molding film 130. The sacrificial film 142 may include an oxide film, such as an oxide film formed by BPSG, PSG, USG, SOD, or HDP CVD processes. The sacrificial film 142 may have a thickness of about 50 nm to about 200 nm. The sacrificial film 142 protects the support film included in the molding film 130.

[0103] The mask pattern 144 may include an oxide film, a nitride film, a polycrystalline silicon film, a photoresist film, or a combination thereof. The mask pattern 144 can be used to define the region in which the lower electrode of the capacitor will be formed.

[0104] Reference Figure 5H The sacrificial film 142 and the molding film 130 are dry-etched by using a mask pattern 144 as an etching mask and an insulating layer 128 as an etching stop layer, and a sacrificial pattern 142P and a molding pattern 130P defining a plurality of holes H1 are formed.

[0105] In this case, the insulating layer 128 can also be etched by instantaneous etching to form an insulating pattern 128P that exposes multiple conductive areas 124.

[0106] Reference Figure 5I From Figure 5H After removing the mask pattern 144 from the product, a conductive film 150 for forming the lower electrode is formed to cover the inner wall of each of the plurality of holes H1, the exposed surface of the insulating pattern 128P, the surfaces of the plurality of conductive regions 124 exposed in the plurality of holes H1 respectively, and the exposed surface of the sacrificial pattern 142P.

[0107] A conductive film 150 for forming a lower electrode can be conformally formed on the sidewalls of the plurality of holes H1, such that a portion of the internal space of each of the plurality of holes H1 is preserved.

[0108] In embodiments, the conductive film 150 used to form the lower electrode may include a doped semiconductor, a conductive metal nitride, a metal, a metal silicide, a conductive oxide, or a combination thereof. For example, the conductive film 150 used to form the lower electrode may include TiN, TiAlN, TaN, TaAlN, W, WN, Ru, RuO2, SrRuO3, Ir, IrO2, Pt, PtO, SRO (SrRuO3), BSRO ((Ba,Sr)RuO3), CRO (CaRuO3), LSCO ((La,Sr)CoO3), or a combination thereof, but the materials constituting the conductive film 150 are not limited thereto.

[0109] To form the conductive film 150 for forming the lower electrode, CVD, metal-organic CVD (MOCVD), or ALD processes can be used. The conductive film 150 for forming the lower electrode can be formed to have a thickness of about 1 nm to about 100 nm, but is not limited thereto. Subsequently, although... Figure 5I Not shown, but a sacrificial film may also be formed to fill the interior of the recess defined by the conductive film 150 used to form the lower electrode. The sacrificial film may cover the top surface of the conductive film 150 used to form the lower electrode.

[0110] Reference Figure 5J The upper part of the conductive film 150 used to form the lower electrode is partially removed to divide the conductive film 150 into a plurality of lower electrodes LE.

[0111] To form multiple lower electrodes LE, the upper portion of the conductive film 150 and the sacrificial pattern 142P used to form the lower electrodes can be partially removed using an etch-back or CMP process (see [link]). Figure 5I This exposes the top surface of the molded pattern 130P. Multiple lower electrodes LE can pass through the insulating pattern 128P and can be connected to the conductive area 124, respectively.

[0112] Reference Figure 5K Remove the molded pattern 130P to expose the outer wall surface of the multiple cylindrical lower electrodes LE. The molded pattern 130P can be removed by a stripping process using an etchant.

[0113] Reference Figure 5L A dielectric film 160 is formed on multiple lower electrodes LE. The dielectric film 160 can be formed to conformally cover the exposed surfaces of the multiple lower electrodes LE. The dielectric film 160 can be formed by an ALD process.

[0114] The dielectric film 160 may include oxides, metal oxides, nitrides, or combinations thereof. In an embodiment, the dielectric film 160 may include a ZrO2 film. For example, the dielectric film 160 may include a monolayer ZrO2 film or a combination of at least one ZrO2 film and at least one Al2O3 film in multiple layers.

[0115] In an embodiment, the dielectric film 160 may have a thickness of about 5 nm to about 15 nm, but is not limited thereto.

[0116] Reference Figure 5M An upper electrode UE is formed on the dielectric film 160. The capacitor 170 can be constructed from a lower electrode LE, the dielectric film 160, and the upper electrode UE.

[0117] The top electrode UE can include doped semiconductors, conductive metal nitrides, metals, metal silicides, conductive oxides, or combinations thereof. For example, the top electrode UE can include TiN, TiAlN, TaN, TaAlN, W, WN, Ru, RuO2, SrRuO3, Ir, IrO2, Pt, PtO, SRO (SrRuO3), BSRO ((Ba,Sr)RuO3), CRO (CaRuO3), LSCO ((La,Sr)CoO3), or combinations thereof, but the materials constituting the top electrode UE are not limited to these. To form the top electrode UE, CVD, MOCVD, PVD, or ALD processes can be used.

[0118] Although the above has been referenced Figures 5A to 5M A method for manufacturing a semiconductor device, including forming a dielectric film 160 covering the surface of a cylindrical lower electrode LE, is described, but this disclosure is not limited thereto. For example, instead of a cylindrical lower electrode LE, a cylindrical lower electrode without an internal space can be formed, and the dielectric film 160 can be formed on the cylindrical lower electrode.

[0119] Based on reference Figures 5A to 5M The described embodiments of semiconductor device manufacturing methods involve performing CMP using a paste composition and / or polishing pad according to the present disclosure to form a barrier metal material layer 122 and a conductive region 124. However, those skilled in the art will understand that performing CMP using a paste composition and / or polishing pad according to the present disclosure is also used to manufacture other semiconductor devices.

[0120] Figures 6A to 6K This is a cross-sectional view showing a semiconductor device manufacturing method according to an embodiment. Figures 6A to 6K This is an example illustrating a process for polishing an insulating material film using the slurry composition and / or polishing pad of this disclosure.

[0121] Reference Figure 6AA substrate 215 may be provided first. The substrate 215 may include, for example, a semiconductor material, such as a group IV, group III-V, or group II-VI semiconductor material. A common source line layer 210 may be formed on the substrate 215. A first portion of the preliminary stacked structure PSa may be formed on the common source line layer 210. The first portion of the preliminary stacked structure PSa may be formed by alternately forming a plurality of first interlayer insulating layers 220a and a plurality of first sacrificial layers 235a on the common source line layer 210. Each of the first sacrificial layers 235a may include a material having etch selectivity relative to each of the first interlayer insulating layers 220a. For example, when the first interlayer insulating layer 220a comprises silicon oxide, the first sacrificial layer 235a may comprise silicon nitride.

[0122] In one embodiment, a lower sacrificial layer 255 may also be formed between the common source line layer 210 and the first portion PSa of the initial stacked structure. In another embodiment, a lower support layer 260 may also be formed between the lower sacrificial layer 255 and the first portion PSa of the initial stacked structure. The lower sacrificial layer 255 may comprise a material having etch selectivity relative to the common source line layer 210 and the lower support layer 260. For example, when the common source line layer 210 and the lower support layer 260 comprise polysilicon, the lower sacrificial layer 255 may comprise silicon nitride.

[0123] The initial stacked structure can be patterned so that the step region EXT of the first portion PSa of the initial stacked structure has a step shape. Next, the first portion IL2c of the insulating structure can be formed on the substrate 215 and the first portion PSa of the initial stacked structure. Then, a first channel via 240Ha penetrating the cell region CELL of the first portion PSa of the initial stacked structure and a first pseudo-channel via 280Ha penetrating the step region EXT of the first portion PSa of the initial stacked structure can be formed. The first pseudo-channel via 280Ha can further penetrate the first portion IL2c of the insulating structure. The first channel via 240Ha and the first pseudo-channel via 280Ha can further penetrate the lower support layer 260 and the lower sacrificial layer 255.

[0124] Next, the first channel via 240Ha and the first pseudo-channel via 280Ha are filled with the first filling layer 240Fa and the first pseudo-filling layer 280Fa, respectively. In this embodiment, the first filling layer 240Fa and the first pseudo-filling layer 280Fa may comprise polysilicon.

[0125] To form the first filler layer 240Fa and the first pseudo filler layer 280Fa, polysilicon can be formed inside the first channel via 240Ha and the first pseudo channel via 280Ha, as well as on the uppermost first interlayer insulating layer 220a. Then, CMP is performed using the upper surface of the first interlayer insulating layer 220a as a polishing stop film to confine the polysilicon inside the first channel via 240Ha and the first pseudo channel via 280Ha. During CMP, the polysilicon can be removed with high reliability using the slurry composition and / or polishing pad according to this disclosure.

[0126] See Figure 6B A second portion PSb of the preliminary stacked structure can be formed on a first portion PSa of the preliminary stacked structure. The second portion PSb of the preliminary stacked structure can be formed by alternately forming a plurality of second interlayer insulating layers 220b and a plurality of second sacrificial layers 235b on the first portion PSa of the preliminary stacked structure. Each second sacrificial layer 235b may comprise a material having etch selectivity relative to each second interlayer insulating layer 220b. For example, when the second interlayer insulating layer 220b comprises silicon oxide, the second sacrificial layer 235b may comprise silicon nitride.

[0127] Next, the second portion PSb of the preliminary stacked structure can be patterned such that the step region EXT of the second portion PSb of the preliminary stacked structure has a step shape. Next, the second portion IL2b of the insulating structure can be formed on the first portion IL2c of the insulating structure and the first portion PSa and the second portion PSb of the preliminary stacked structure. Next, a second channel hole 240Hb can be formed that penetrates the second portion PSb of the preliminary stacked structure to expose the first filler layer 240Fa, and a second pseudo-channel hole 280Hb can be formed that penetrates the second portion IL2b of the insulating structure to expose the first pseudo-filler layer 280Fa.

[0128] Reference Figure 6C The second channel via 240Hb and the second pseudo-channel via 280Hb can be filled with the second filling layer 240Fb and the second pseudo-filling layer 280Fb, respectively. In an embodiment, the second filling layer 240Fb and the second pseudo-filling layer 280Fb may comprise polysilicon.

[0129] Polysilicon can be formed inside the second channel via 240Hb and the second pseudo-channel via 280Hb, and on the uppermost layer of the second portion of PSb, to form the second filler layer 240Fb and the second pseudo-filler layer 280Fb. Then, by performing CMP using the uppermost layer as a polishing stop film, the polysilicon can be confined inside the second channel via 240Hb and the second pseudo-channel via 280Hb. During CMP, the polysilicon can be removed with high reliability by using the slurry composition and / or polishing pad according to this disclosure.

[0130] Reference Figure 6C and Figure 6D The first filler layer 240Fa and the second filler layer 240Fb can be removed from the first channel hole 240Ha and the second channel hole 240Hb, respectively. Before removing the first filler layer 240Fa and the second filler layer 240Fb, a mask can be formed that covers the second dummy filler layer 280Fb and exposes the second filler layer 240Fb to prevent the first dummy filler layer 280Fa and the second dummy filler layer 280Fb from being removed. After removing the first filler layer 240Fa and the second filler layer 240Fb, the mask can be removed.

[0131] Next, a channel structure 240 can be formed in the first channel via 240Ha and the second channel via 240Hb. A gate insulating layer 241 can be formed on the first channel via 240Ha and the second channel via 240Hb. For example, the gate insulating layer 241 can be formed by sequentially forming a barrier insulating layer, a charge storage layer, and a tunneling insulating layer on the first channel via 240Ha and the second channel via 240Hb. A channel layer 242 can be formed on the gate insulating layer 241. A buried insulating layer 243 can be formed on the channel layer 242. The buried insulating layer 243 can be used to fill the first channel via 240Ha and the second channel via 240Hb together with the gate insulating layer 241 and the channel layer 242 to form the channel structure 240. Next, portions of the gate insulating layer 241, the channel layer 242, and the buried insulating layer 243 located at the end of the second channel hole 240Hb can be removed, and a channel pad 244 can be formed at the end of the second channel hole 240Hb.

[0132] Reference Figure 6D and Figure 6E The first dummy fill layer 280Fa and the second dummy fill layer 280Fb can be removed from the first dummy channel aperture 280Ha and the second dummy channel aperture 280Hb, respectively. In an embodiment, to prevent the channel structure 240 from being removed, a mask covering the channel structure 240 and exposing the second dummy fill layer 280Fb can be formed before removing the first dummy fill layer 280Fa and the second dummy fill layer 280Fb. The mask can be removed after removing the first dummy fill layer 280Fa and the second dummy fill layer 280Fb.

[0133] Next, a pseudo-channel structure 280 can be formed in the first pseudo-channel hole 280Ha and the second pseudo-channel hole 280Hb. First, an insulating layer 282 can be formed on the sidewalls of the first pseudo-channel hole 280Ha and the second pseudo-channel hole 280Hb. For example, the insulating layer 282 can be formed on the top surface of the second portion IL2b of the insulating structure, the sidewall of the second pseudo-channel hole 280Hb, and the sidewall and bottom surface of the first pseudo-channel hole 280Ha, and the insulating layer 282 on the top surface of the second portion IL2b and the bottom surface of the first pseudo-channel hole 280Ha can be removed by anisotropic etching of the insulating layer 282. Next, a conductive layer 281 can be formed on the insulating layer 282. The conductive layer 281 can be formed to fill the first pseudo-channel hole 280Ha and the second pseudo-channel hole 280Hb together with the insulating layer 282.

[0134] Reference Figure 6E and Figure 6F By removing the lower sacrificial layer 255, a space 255H can be formed between the common source line layer 210 and the lower support layer 260. The gate insulating layer 241 of the channel structure 240 and the insulating layer 282 of the pseudo-channel structure 280 can be exposed to the space 255H. In order to remove the lower sacrificial layer 255, a word line cutout (not referenced) can be formed before removing the lower sacrificial layer 255, penetrating the initial stacked structure, the first portion PSa and the second portion PSb, and the lower support layer 260, to expose the lower sacrificial layer 255. Figure 6E and 6F (As shown). The etchant can pass through the word line cut to reach and etch the sacrificial layer 255.

[0135] Reference Figure 6F and Figure 6G An opening 240P can be formed through the gate insulating layer 241 of the channel structure 240 exposed to the space 255H by removing the portion of the gate insulating layer 241 exposed to the space 255H. The channel layer 242 can be exposed to the space 255H through the opening 240P. In one embodiment, the thickness of the insulating layer 282 of the dummy channel structure 280 can be large enough that the conductive layer 281 is not exposed to the space 255H even when the insulating layer 282 of the dummy channel structure 280 is exposed to the etchant used to remove a portion of the gate insulating layer 241 of the channel structure 240. In another embodiment, the conductive layer 281 can be exposed to the space 255H by exposing the insulating layer 282 of the dummy channel structure 280 to the etchant used to remove a portion of the gate insulating layer 241 of the channel structure 240 and etching the exposed portion of the insulating layer 282.

[0136] Reference Figure 6G and Figure 6HA lower conductive layer 250 can be formed in space 255H. The lower conductive layer 250 can contact the channel layer 242 through opening 240P. In an embodiment, the lower conductive layer 250 may not contact the conductive layer 281. Figure 6H Unlike the previous embodiment, in another embodiment, the lower conductive layer 250 may penetrate the insulating layer 282 to contact the conductive layer 281.

[0137] Reference Figure 6H and Figure 6I Multiple spaces 235Ha and 235Hb between multiple interlayer insulating layers 220a and 220b can be formed by removing multiple sacrificial layers 235a and 235b.

[0138] Reference Figure 6I and Figure 6J Multiple gate layers 230a and 230b can be formed in multiple spaces 235Ha and 235Hb between multiple interlayer insulating layers 220a and 220b. Therefore, a stacked structure SS can be formed including a first portion SSa having a first interlayer insulating layer 220a and a first gate layer 230a alternately stacked on a common source line layer 210, and a second portion SSb having a second interlayer insulating layer 220b and a second gate layer 230b alternately stacked on the first portion SSa.

[0139] Reference Figure 6K This allows the formation of the third part IL2a of the insulating structure IL2, the interconnect structure IC2, and multiple bonding pads BP2. Therefore, the insulating structure IL2, comprising the first part IL2c, the second part IL2b, and the third part IL2a, can be completed.

[0140] As used herein, the term “and / or” means and covers any and all possible combinations of one or more of the associated listed terms. For example, the term “A and / or B” means that option A, option B, or both options A and B are possible, where A and B can be singular or plural.

[0141] As used herein, the term “at least one of…” may refer to and cover any and all possible combinations of one or more of the associated listed terms. For example, the term “at least one of A, B or C” means that (i) at least one of A, (ii) at least one of B, (iii) at least one of C, (iv) at least one of A and at least one of B, (v) at least one of B and at least one of C, (vi) at least one of A and at least one of C, or (vii) at least one of A, at least one of B and at least one of C are possible, wherein A, B and C may be singular or plural.

[0142] While this disclosure contains numerous specific implementation details, these should not be construed as limiting the scope of claims. Certain features described in the context of separate embodiments in this disclosure may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations, one or more features from a combination may be removed from the combination in some cases, and combinations may be for sub-combinations or variations thereof.

Claims

1. A slurry composition comprising: Abrasive particles, including The core includes a phase change material that undergoes a phase change within the processing temperature range of a chemical mechanical polishing process; as well as A shell surrounding the core, the shell comprising a material different from the phase change material of the core.

2. The slurry composition according to claim 1, wherein, The phase change material includes materials that undergo a phase change in a temperature range of 30°C to 80°C.

3. The slurry composition according to claim 1, wherein, The phase change material is fusible within the processing temperature range.

4. The slurry composition according to claim 1, wherein, The concentration of the abrasive particles in the slurry composition is between 0.05 wt.% and 30 wt.% of the total weight of the slurry composition.

5. The slurry composition according to claim 1, wherein, The abrasive particles have a size of 5 nm to 200 nm.

6. The slurry composition according to claim 1, wherein, The nucleus includes at least one of lauric acid, palmitic acid, stearic acid, or myristic acid.

7. The slurry composition according to claim 1, wherein, The shell comprises at least one of silicon oxide, aluminum oxide, cerium dioxide, titanium dioxide, zirconium oxide, magnesium oxide, germanium oxide, or manganese oxide.

8. The slurry composition according to claim 1, wherein, The shell includes a first shell surrounding the core and a second shell surrounding the first shell, wherein the first shell and the second shell comprise different materials.

9. The slurry composition according to claim 1, comprising: Polishing accelerator, pH adjuster, oxidant and water.

10. The slurry composition according to claim 1, comprising a corrosion inhibitor and / or a catalyst, in, The corrosion inhibitor comprises an azole compound and / or a water-soluble polymer comprising anionic carboxylic acids, and wherein the catalyst comprises an iron-containing compound.

11. A polishing pad, comprising: Base; as well as Abrasive particles on the surface of the substrate, the abrasive particles comprising Cores, including phase change materials that exhibit phase transitions within the processing temperature range of chemical mechanical polishing processes, and A shell surrounding the core, the shell comprising a material different from the phase change material of the core.

12. The polishing pad according to claim 11, wherein, The phase change material includes materials that undergo a phase change in the range of 30°C to 80°C.

13. The polishing pad according to claim 11, wherein, The substrate includes at least one of polyethylene resin, polypropylene resin, polystyrene resin, polyvinyl chloride resin, polyamide resin, acrylic resin, polyurethane resin, polycarbonate resin, phenolic resin, amino resin, epoxy resin, polyester resin, rubber, acrylonitrile butadiene styrene, or styrene-acrylonitrile copolymer.

14. The polishing pad according to claim 11, comprising: Support layer, and An abrasive layer on the support layer, the abrasive layer comprising the abrasive particles.

15. The polishing pad according to claim 14, wherein, The concentration of the abrasive particles is between 0.05 wt.% and 30 wt.% of the total weight of the abrasive layer.

16. The polishing pad according to claim 11, wherein, The polishing pad has a three-dimensional structure.

17. A method for manufacturing a semiconductor device, comprising: The object to be polished is formed on the substrate; as well as The object is polished using a chemical mechanical polishing process performed with a slurry composition and a polishing pad. Wherein, at least one of the slurry composition and the polishing pad comprises abrasive particles, the abrasive particles comprising... Cores, including phase change materials that exhibit a phase transition in a temperature range of 30°C to 80°C, and A shell surrounding the core, the shell comprising a material different from the phase change material of the core.

18. The method for manufacturing a semiconductor device according to claim 17, wherein, The slurry composition includes a polishing accelerator, a pH adjuster, an oxidant, and water, and The polishing pad comprises resin.

19. The method for manufacturing a semiconductor device according to claim 17, wherein, The abrasive particles have a size of 5 nm to 200 nm.

20. The method for manufacturing a semiconductor device according to claim 17, wherein, The object includes a metal material film.

21. The method for manufacturing a semiconductor device according to claim 17, wherein, The nucleus includes at least one of lauric acid, palmitic acid, stearic acid, or myristic acid, and The shell comprises at least one of silicon oxide, aluminum oxide, cerium dioxide, titanium dioxide, zirconium oxide, magnesium oxide, germanium oxide, or manganese oxide.

22. The method for manufacturing a semiconductor device according to claim 17, wherein, The shell comprises a single layer.

23. The method for manufacturing a semiconductor device according to claim 17, wherein, The shell comprises a first shell surrounding the core and a second shell surrounding the first shell, and The thermal conductivity of the first shell is greater than that of the second shell.

24. The method for manufacturing a semiconductor device according to claim 17, wherein, The slurry composition includes corrosion inhibitors and / or catalysts. The corrosion inhibitor comprises azole compounds and / or water-soluble polymers comprising anionic carboxylic acids, and The catalyst includes an iron-containing compound.

25. The method for manufacturing a semiconductor device according to claim 17, wherein, Each of the slurry composition and the polishing pad includes the abrasive particles.

26. The method for manufacturing a semiconductor device according to claim 17, wherein, The object includes an insulating material film.

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