Data storage method and device, electronic equipment and computer readable storage medium

Abstract

Embodiments of the present application provide a data storage method, device, electronic equipment and computer readable storage medium, relating to the technical field of data storage. The method allocates a physical address for to-be-written data; the physical address comprises a storage area index; a target P2L table is determined according to a strip capacity and the storage area index, and an offset position corresponding to the storage area index is queried in the target P2L table; and a logical address corresponding to the to-be-written data is saved to the offset position. Embodiments of the present application provide a P2L table storing only logical addresses, the target P2L table corresponding to the to-be-written data and the offset position of the physical address in the target P2L table are determined by using the physical address, and the logical address corresponding to the physical address is stored by using the offset position, thereby realizing the mapping relationship between the physical address and the logical address, compared with recording the physical address and the logical address in the P2L table, the storage efficiency of the P2L table can be improved, the efficiency of data writing is improved at the same time, and write amplification is effectively reduced.

Description

Technical Field

[0001] This invention relates to the field of data storage technology, and more specifically, to a data storage method, apparatus, electronic device, and computer-readable storage medium. Background Technology

[0002] Because the NAND flash memory in a solid state drive (SSD) does not support overwrite operations, it can only be erased before writing. When the host writes new data or overwrites existing data, a physical address needs to be allocated on the NAND flash memory for the newly written data.

[0003] In existing technologies, a Physical-to-Logical Mapping Table (P2L table) is typically used to record the mapping relationship between the physical and logical addresses of host data, while a Logical-to-Physical Mapping Table (L2P table) is used to record the mapping relationship between logical and physical addresses. When the host writes data, both the P2L and L2P tables need to be updated, which leads to write amplification and wasted space. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a data storage method, apparatus, electronic device and computer-readable storage medium that can effectively reduce writing methods and space waste.

[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows: In a first aspect, the present invention provides a data storage method, the method comprising: Assign a physical address to the data to be written; the physical address includes a storage area index. Determine the target P2L table based on the stripe capacity and the storage area index, and query the offset position corresponding to the storage area index in the target P2L table; Save the logical address corresponding to the data to be written to the offset position.

[0006] In an optional implementation, determining the target P2L table based on the stripe capacity and the storage area index includes: Calculate the least common multiple of the stripe capacity and the number of logical addresses; the number of logical addresses is the maximum number of logical addresses stored in the P2L table. The target P2L index is determined based on the least common multiple and the storage area index; The target P2L table is determined from at least one P2L table based on the target P2L index.

[0007] In an optional implementation, determining the target P2L index based on the least common multiple and the storage area index includes: The target P2L index is determined by taking the remainder of the storage area index modulo the least common multiple and then dividing the remainder by the stripe capacity.

[0008] In an optional implementation, querying the offset position corresponding to the storage area index in the target P2L table includes: The offset position is obtained by taking the remainder of the storage area index with respect to the least common multiple, and then taking the remainder with respect to the stripe capacity.

[0009] In an optional implementation, the physical address further includes a block index and a stripe index; the method further includes: Once all P2L tables in the logical group have been constructed, the target block is determined from the NAND flash memory based on the block index; the logical group includes at least one stripe in the same block, and the number of stripes in the logical group is determined by the least common multiple and the stripe capacity; the number of P2L tables in the logical group is determined by the least common multiple and the number of logical addresses. Obtain the maximum index from at least one stripe index corresponding to the logical group, and determine the stripe corresponding to the maximum index as the target stripe; The logical addresses in each of the P2L tables are stored in at least one preset storage area in the target stripe; the number of preset storage areas is the same as the number of P2L tables contained in the logical group.

[0010] In an optional implementation, the method further includes: During garbage collection, a garbage collection mapping relationship is generated based on the preset storage area corresponding to each logical group in the block to be collected; the garbage collection mapping relationship includes the target physical address and the target logical address. When the physical address corresponding to the target logical address recorded in the L2P table is different from the target physical address, the data corresponding to the target physical address is determined to be invalid data; the L2P table is used to record the latest physical address corresponding to the logical address; When the physical address corresponding to the target logical address recorded in the L2P table is the same as the target physical address, the data corresponding to the target physical address is determined to be valid data; The valid data is reassigned a physical address, and the L2P table and the P2L table are updated based on the newly assigned physical address.

[0011] In an optional implementation, generating a mapping relationship for recycling based on a preset storage area corresponding to each logical group in the block to be recycled includes: Obtain the starting stripe index and starting storage area index corresponding to the logical group; Read the target logical address and the offset position corresponding to the target logical address from the preset storage area; The target stripe index and target memory area index corresponding to the target logical address are determined based on the starting stripe index, the starting memory area index, the offset position, and the stripe capacity. The target physical address is generated based on the target stripe index, the target storage area index, and the index of the block to be reclaimed; Generate a mapping relationship to be recycled based on each target physical address and its corresponding target logical address.

[0012] In a second aspect, the present invention provides a data storage device, the device comprising: The allocation module is used to allocate physical addresses for data to be written; the physical address includes a storage area index. The processing module is used to determine the target P2L table based on the stripe capacity and the storage area index, query the offset position corresponding to the storage area index in the target P2L table, and save the logical address corresponding to the data to be written to the offset position.

[0013] Thirdly, the present invention provides an electronic device including a processor and a memory, the memory storing a computer program executable by the processor, the processor executing the computer program to implement any of the data storage methods described in the foregoing embodiments.

[0014] Fourthly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the data storage method as described in any of the foregoing embodiments.

[0015] Compared to existing technologies, the data storage method, apparatus, electronic device, and computer-readable storage medium provided in this invention allocate physical addresses for the data to be written; the physical address includes a storage area index; a target P2L table is determined based on the stripe capacity and the storage area index; the offset position corresponding to the storage area index is queried in the target P2L table; and the logical address corresponding to the data to be written is saved to the offset position. This invention provides a P2L table that only stores logical addresses. It uses physical addresses to determine the target P2L table corresponding to the data to be written and the offset position of the physical address in the target P2L table, and uses the offset position to store the logical address corresponding to the physical address, thereby realizing the mapping relationship from physical address to logical address. Compared to recording both physical and logical addresses in the P2L table, this reduces space usage by half, improves the storage efficiency of the P2L table, and simultaneously improves data writing efficiency, effectively reducing write amplification.

[0016] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic flowchart of a data storage method provided by an embodiment of the present invention is shown.

[0019] Figure 2 This diagram illustrates another flow chart of the data storage method provided in an embodiment of the present invention.

[0020] Figure 3 A schematic diagram of a block, strip, and storage area provided in an embodiment of the present invention is shown.

[0021] Figure 4 This diagram illustrates another flow chart of the data storage method provided in an embodiment of the present invention.

[0022] Figure 5 This diagram illustrates a structure of a P2L table stored in NAND flash memory, as provided in an embodiment of the present invention.

[0023] Figure 6 This diagram illustrates another flow chart of the data storage method provided in an embodiment of the present invention.

[0024] Figure 7 A block diagram of a data storage device provided in an embodiment of the present invention is shown.

[0025] Figure 8 A block diagram of an electronic device provided in an embodiment of the present invention is shown.

[0026] Icons: 300 - Data storage device; 301 - Distribution module; 302 - Processing module; 400 - Electronic device; 410 - Memory; 420 - Processor; 430 - Communication module. Detailed Implementation

[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0028] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0029] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0030] Overwrite operations on the host machine write to the new physical space of the NAND flash memory. The old data becomes garbage data on that physical block, leading to insufficient user space on the SSD. Therefore, a garbage collection process is needed to move the valid data from the physical block and then erase the physical block to obtain a new block that can be written to. When writing data on the host machine, the P2L table and L2P table need to be updated, which results in write amplification and low storage efficiency.

[0031] Based on this, the data storage method and apparatus provided in this embodiment of the invention allocate physical addresses for the data to be written; the physical address includes a storage area index; a target P2L table is determined according to the stripe capacity and the storage area index; the offset position corresponding to the storage area index is queried in the target P2L table; and the logical address corresponding to the data to be written is saved to the offset position. This embodiment of the invention provides a P2L table that only stores logical addresses. It uses physical addresses to determine the target P2L table corresponding to the data to be written and the offset position of the physical address in the target P2L table, and uses the offset position to store the logical address corresponding to the physical address, thereby realizing the mapping relationship from physical address to logical address. Compared with recording both physical and logical addresses in the P2L table, this reduces the space occupation by half, improves the storage efficiency of the P2L table, and simultaneously improves the data writing efficiency, effectively reducing write amplification.

[0032] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0033] Please refer to Figure 1 , Figure 1 A schematic flowchart of a data storage method provided by an embodiment of the present invention is shown. The method includes the following steps: Step S100: Allocate a physical address for the data to be written; the physical address includes the storage area index.

[0034] In this embodiment of the invention, when the host writes IO data (i.e., data to be written), a physical address is allocated to the data to be written.

[0035] Step S110: Determine the target P2L table based on the stripe capacity and storage area index, and query the offset position corresponding to the storage area index in the target P2L table.

[0036] Step S120: Save the logical address corresponding to the data to be written to the offset position.

[0037] In this embodiment of the invention, a P2L table is used to manage the mapping relationship between physical addresses and logical addresses, and a storage area index is used to identify the offset position of each logical address in the P2L table. There is a one-to-one correspondence between the storage area index and the offset position. It can be understood that the P2L table is related to an array; the array index can be determined based on the storage area index, and the logical address is equivalent to an array element.

[0038] It's important to note that stripe capacity refers to the number of storage areas contained within a stripe. Each storage area stores one I / O of data, and the size of an I / O is related to the disk capacity. For example, if one I / O is 4KB, and a stripe can write 1000 I / Os (i.e., 4KB of data), then the stripe contains 1000 storage areas, corresponding to 1000 physical addresses, and the stripe capacity is 1000.

[0039] The electronic device's cache contains at least one P2L table. Based on the stripe capacity and storage area index, a target P2L table matching the physical address is retrieved from at least one P2L table. The target index is calculated based on the storage area index, and the storage location corresponding to the target index in the target P2L table is determined as the offset position corresponding to the storage area index. The logical address corresponding to the data to be written is written to the offset position in the target P2L table.

[0040] In summary, the data storage method provided by this invention allocates a physical address for the data to be written; the physical address includes a storage area index; a target P2L table is determined based on the stripe capacity and the storage area index; the offset position corresponding to the storage area index is queried in the target P2L table; and the logical address corresponding to the data to be written is saved to the offset position. This invention provides a P2L table that only stores logical addresses. It uses the physical address to determine the target P2L table corresponding to the data to be written and the offset position of the physical address in the target P2L table, and uses the offset position to store the logical address corresponding to the physical address, thereby realizing the mapping relationship from physical address to logical address. Compared with recording both physical and logical addresses in the P2L table, this reduces the space occupied by half, improves the storage efficiency of the P2L table, and simultaneously improves the data writing efficiency, effectively reducing write amplification.

[0041] Optionally, regarding how to obtain the target P2L table, the following is one possible implementation. Please refer to... Figure 2 , Figure 1 The sub-steps of step S110 may include: Step S111: Calculate the least common multiple of the stripe capacity and the number of logical addresses; the number of logical addresses is the maximum number of logical addresses stored in the P2L table.

[0042] In this embodiment of the invention, the least common multiple of the stripe capacity and the number of logical addresses is used to characterize the number of storage areas contained in the logical group. Assuming the size of a logical address is 4 bytes, the size of the P2L table is 4K, and each entry in the P2L table stores only one logical address, then the maximum number of logical addresses that the P2L table can store is 1000, that is, the number of logical addresses is 1000.

[0043] If the stripe capacity is 1000, then the logical group contains 1000 memory areas, meaning the logical group contains only one stripe. A P2L table can store the logical addresses corresponding to each memory area in a stripe.

[0044] Step S112: Determine the target P2L index based on the least common multiple and the storage area index.

[0045] Step S113: Determine the target P2L table from at least one P2L table based on the target P2L index.

[0046] In this embodiment of the invention, the P2L index of the P2L table containing the logical address corresponding to the data to be written is determined based on the number of storage areas contained in the logical group and the storage area index, thus obtaining the target P2L index, and the target P2L table is obtained based on the target P2L index. There is a one-to-one correspondence between the P2L table and the P2L index, with the P2L index uniquely identifying the P2L table.

[0047] Alternatively, one possible implementation for determining the target P2L index is provided below. Figure 2 The sub-steps of step S112 may include: The target P2L index is determined by taking the remainder of the storage area index with respect to the least common multiple and then using the ratio of the remainder to the stripe capacity.

[0048] In this embodiment of the invention, a block comprises multiple storage areas, and the storage area indices corresponding to the multiple storage areas within the block are uniformly addressed. Assume a block comprises n stripes, each stripe comprising 1000 storage areas, i.e., the stripe capacity is 1000. The storage area indices contained in a block are as follows: Figure 3 As shown.

[0049] As one possible implementation, assuming a stripe capacity of 400 and a logical address count of 1000, the least common multiple is 2000. That is, a logical group contains 2000 memory areas, each stripe contains 400 memory areas, and 5 stripes contain exactly 2000 memory areas.

[0050] Calculate the remainder when the storage area index is divided by the least common multiple (i.e., the first remainder). Then, calculate the ratio of the first remainder to the stripe capacity to obtain the target P2L index. The first remainder represents the logical offset of the storage area corresponding to the storage area index. For example, if the storage area index is 2001, the first remainder is 1, and the target P2L index is 0.

[0051] Optionally, regarding how to determine the offset of the logical address, the following is a possible implementation method. Please refer to... Figure 2 , Figure 1 The sub-steps of step S110 may include: Step S114: Perform a modulo operation on the storage area index with respect to the least common multiple, and then perform a modulo operation on the stripe capacity with respect to the remainder to obtain the offset position.

[0052] In this embodiment of the invention, the remainder when the storage area index is divided by the least common multiple (i.e., the first remainder) is calculated, and the remainder when the first remainder is divided by the stripe capacity (i.e., the second remainder) is calculated. The second remainder is then used as the offset position. Assuming the storage area index is 2001, the least common multiple is 2000, and the stripe capacity is 400, then the first remainder is 1, the target P2L index is 0, and the offset position is 1. That is, the logical address corresponding to the data to be written will be stored in the storage area at offset position 1 in the target P2L table, i.e., the second storage area of ​​the target P2L table.

[0053] It's important to note that when allocating physical addresses for host I / O, the allocation follows the ascending order of the stripe indices. For example, the first memory area in stripe 0 (i.e., memory area index 0) is allocated first, and the logical address corresponding to the host I / O stored at memory area index 0 is saved as the first offset position of the first P2L table. When the next host I / O is written, memory area index 1 is allocated sequentially for the next host I / O, and so on, allocating memory areas within the block for host I / O in ascending order of memory area indices.

[0054] Optionally, the physical address also includes a block index and a stripe index. Please refer to [link / reference]. Figure 4 The method also includes the following steps: Step S130: After all P2L tables in the logical group have been constructed, the target block is determined from the NAND flash memory according to the block index; the logical group includes at least one stripe in the same block, and the number of stripes contained in the logical group is determined by the least common multiple and the stripe capacity; the number of P2L tables contained in the logical group is determined by the least common multiple and the number of logical addresses.

[0055] In this embodiment of the invention, when all P2L tables in a logical group have been constructed, it indicates that the storage areas for storing host data in the logical group have been allocated, and the host data and P2L tables need to be written into the NAND flash memory. Since the host data and P2L tables corresponding to the same logical group belong to the same block, the target block index is obtained from one of the physical addresses, and the target block corresponding to the target block index is obtained from the NAND flash memory.

[0056] It should be noted that the block index corresponds one-to-one with the block, the ratio of the least common multiple to the stripe capacity is used to determine the number of stripes contained in the logical group, and the ratio of the least common multiple to the number of logical addresses is used to determine the number of P2L tables contained in the logical group.

[0057] Assuming a stripe capacity of 1000 and a logical address count of 1000, then the least common multiple of the stripe capacity and the logical address count is 1000. A logical group contains one stripe and one P2L table. In other words, a logical group includes one stripe and one P2L table. 999 memory areas within the stripe are used to store host I / O, and another memory area is used to store the 999 logical addresses in the P2L table. This results in one 4-byte gap.

[0058] Assuming a stripe capacity of 2000 and a logical address count of 1000, then the least common multiple of the stripe capacity and the logical address count is 2000. A logical group contains 1 stripe and 2 P2L tables. In other words, a logical group includes 1 stripe and 2 P2L tables. 1998 memory areas within the stripe are used to store host I / O, and the other 2 memory areas are used to store the 1998 logical addresses in the 2 P2L tables. This results in two 4-byte gaps.

[0059] Assuming a stripe capacity of 1500 and a logical address count of 1000, the least common multiple of the stripe capacity and the logical address count is 3000. A logical group contains 2 stripes and 3 P2L tables. In other words, a logical group includes 2 stripes and 3 P2L tables. 2997 memory areas within a stripe are used to store host I / O, and the other 3 memory areas are used to store the 2997 logical addresses in the 3 P2L tables. This results in 3 4-byte gaps.

[0060] Step S140: Obtain the maximum index from at least one stripe index corresponding to the logical group, and determine the stripe corresponding to the maximum index as the target stripe.

[0061] In this embodiment of the invention, it is assumed that the first logical group comprises 5 stripes with stripe indices of 0, 1, 2, 3, and 4. The stripe with index 4 is determined as the target stripe. That is, for the first logical group, the logical addresses in the P2L table are stored in the stripe with index 4, while the four stripes with indices 0, 1, 2, and 3 are used to store host I / O. In the stripe with index 4, apart from the storage area used to store logical addresses, the other storage areas are used to store host I / O.

[0062] Step S150: Store the logical addresses in each P2L table in at least one preset storage area in the target stripe; the number of preset storage areas is the same as the number of P2L tables contained in the logical group.

[0063] In this embodiment of the invention, a preset storage area is set up according to the number of P2L tables contained in the logical group, and the logical addresses of each P2L table are written into the preset storage area in ascending order of P2L table index. That is, each preset storage area is used to store the logical address of the corresponding P2L table.

[0064] Continue with Figure 3 For example, assuming a stripe capacity of 1000 and a logical address count of 1000, the last storage area is set as the preset storage area. The host I / O corresponding to the logical group is written to the corresponding storage area according to the storage area index in the physical address, and the logical addresses of the host I / O are written to the preset storage area in the order of the storage area indexes, such as... Figure 5 As shown.

[0065] As can be seen, the embodiments of the present invention determine logical groups based on stripe capacity and P2L table storage capacity, and set the number of P2L tables based on the number of storage areas in the logical group, which can effectively avoid space waste. A preset storage area is set in the last stripe contained in the logical group, and the logical addresses in the P2L table are stored in the corresponding preset storage area. This realizes the storage of the physical address and logical address mapping relationship of host data, effectively reducing the space occupation of the P2L table and improving the management efficiency of the P2L table.

[0066] Alternatively, please refer to Figure 6 The method also includes the following steps: Step S200: During garbage collection, a garbage collection mapping relationship is generated based on the preset storage area corresponding to each logical group in the block to be collected; the garbage collection mapping relationship includes the target physical address and the target logical address.

[0067] In this embodiment of the invention, when recycling waste, the block to be recycled is obtained according to the preset recycling rules, and each logical group in the block to be recycled is processed in sequence. The mapping relationship to be recycled is generated according to the logical address (i.e. target logical address) recorded in the preset storage area corresponding to the logical group and the physical address (i.e. target physical address) where the data corresponding to the logical address is stored.

[0068] Step S210: When the physical address corresponding to the target logical address recorded in the L2P table is different from the target physical address, the data corresponding to the target physical address is determined to be invalid data; the L2P table is used to record the latest physical address corresponding to the logical address.

[0069] In this embodiment of the invention, an L2P table is obtained. When data is overwritten, the physical address corresponding to the logical address of the data in the L2P table will be updated to the latest physical address. The offset position corresponding to the latest physical address in the P2L table corresponding to the latest physical address is written to the logical address, and the newly written data is stored in the storage area corresponding to the latest physical address.

[0070] Before migrating data for waste recycling, it's necessary to determine which data is valid and which is invalid, and then migrate the valid data. Data validity can be determined using L2P tables and the mapping relationship to be recycled.

[0071] The L2P table is searched based on the target logical address. If the physical address corresponding to the target logical address in the L2P table is invalid, it means the data at the target logical address has been deleted, and the data stored at the target physical address is invalid. If the physical address corresponding to the target logical address in the L2P table (i.e., the latest physical address) is valid, but different from the target physical address, it means the data stored at the target physical address has been overwritten, and the data stored at the target physical address is old data, which is invalid. When the data stored at the target physical address is invalid, no migration of that data is required.

[0072] Step S220: When the physical address corresponding to the target logical address recorded in the L2P table is the same as the target physical address, the data corresponding to the target physical address is determined as valid data.

[0073] Step S230: Reallocate physical addresses for valid data and update the L2P table and P2L table based on the newly allocated physical addresses.

[0074] In this embodiment of the invention, if the physical address (i.e. the latest physical address) corresponding to the target logical address in the L2P table is the same as the target physical address, it indicates that the data in the target physical address is valid data and data migration is required.

[0075] In the free block, a physical address is reallocated for the valid data, and the physical address corresponding to the logical address of the valid data in the L2P table is updated to the newly allocated physical address. Based on the new physical address, the P2L table to be updated is located, and the logical address of the valid data is written to the offset position corresponding to the physical address in the P2L table to be updated.

[0076] As can be seen, the P2L table provided in this embodiment of the invention only stores logical addresses. When garbage collection reads the preset storage area (i.e., the storage space corresponding to the P2L table), the number of physical address to logical address mapping relationships obtained by reading a preset storage area is twice that of the prior art, which can effectively reduce the number of times the preset storage area is read, thereby improving the efficiency of garbage collection.

[0077] Alternatively, one possible implementation for generating the mapping relationships to be recycled is provided below. Figure 6 The sub-steps of step S200 may include: Obtain the starting stripe index and starting storage area index corresponding to the logical group; read the target logical address and the corresponding offset position from the preset storage area; determine the target stripe index and target storage area index corresponding to the target logical address based on the starting stripe index, starting storage area index, offset position, and stripe capacity; generate the target physical address based on the target stripe index, target storage area index, and the index of the block to be reclaimed; generate the mapping relationship to be reclaimed based on each target physical address and the corresponding target logical address.

[0078] In this embodiment of the invention, when a logical group has multiple preset storage areas, each preset storage area is processed sequentially according to its order. The logical addresses in each preset storage area are sequentially used as target logical addresses, and the offset position of the target logical address within the preset storage area is determined as the target offset position.

[0079] The storage area offset is determined based on the preset storage area index, offset position, and number of logical addresses. The target storage area index is then obtained based on the starting storage area index and the storage area offset. The stripe offset is determined based on the target storage area index and the stripe capacity. The target stripe index is then determined based on the starting stripe index and the stripe offset. Target physical addresses are generated based on the index of the block to be reclaimed, the target stripe index, and the target storage area index. A garbage collection mapping relationship is generated based on each target logical address and its corresponding target physical address. Garbage collection is then performed based on this mapping relationship.

[0080] Based on the same inventive concept, the basic principle and technical effects of the data storage device provided in this embodiment are the same as those in the above embodiments. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the above embodiments.

[0081] Please refer to Figure 7 , Figure 7 This is a block diagram of a data storage device 300 provided in an embodiment of the present invention. The data storage device 300 includes an allocation module 301 and a processing module 302.

[0082] Allocation module 301 is used to allocate physical addresses for the data to be written; the physical address includes the storage area index; The processing module 302 is used to determine the target P2L table based on the stripe capacity and the storage area index, query the offset position corresponding to the storage area index in the target P2L table, and save the logical address corresponding to the data to be written to the offset position.

[0083] In summary, the data storage device provided in this embodiment of the invention allocates physical addresses for the data to be written; the physical address includes a storage area index; a target P2L table is determined based on the stripe capacity and the storage area index; the offset position corresponding to the storage area index is queried in the target P2L table; and the logical address corresponding to the data to be written is saved to the offset position. This embodiment of the invention provides a P2L table that only stores logical addresses. It uses physical addresses to determine the target P2L table corresponding to the data to be written and the offset position of the physical address in the target P2L table, and uses the offset position to store the logical address corresponding to the physical address, thereby realizing the mapping relationship from physical address to logical address. Compared with recording both physical and logical addresses in the P2L table, this reduces space usage by half, improves the storage efficiency of the P2L table, and simultaneously improves data writing efficiency, effectively reducing write amplification.

[0084] Optionally, the processing module 302 is specifically used to calculate the least common multiple of the stripe capacity and the number of logical addresses; the number of logical addresses is the maximum number of logical addresses stored in the P2L table; determine the target P2L index based on the least common multiple and the storage area index; and determine the target P2L table from at least one P2L table based on the target P2L index.

[0085] Optionally, the processing module 302 is specifically used to perform a modulo operation on the storage area index with respect to the least common multiple, and to determine the ratio of the obtained remainder to the stripe capacity as the target P2L index.

[0086] Optionally, the processing module 302 is specifically used to perform a modulo operation on the storage area index with respect to the least common multiple, and then perform a modulo operation on the obtained remainder with respect to the stripe capacity to obtain the offset position.

[0087] Optionally, the physical address also includes a block index and a stripe index; the processing module 302 is further configured to, after all P2L tables in the logical group have been constructed, determine the target block from the NAND flash memory according to the block index; the logical group includes at least one stripe in the same block, the number of stripes contained in the logical group is determined by the least common multiple and the stripe capacity; the number of P2L tables contained in the logical group is determined by the least common multiple and the number of logical addresses; obtain the maximum index from at least one stripe index corresponding to the logical group, and determine the stripe corresponding to the maximum index as the target stripe; store the logical addresses in each P2L table in at least one preset storage area in the target stripe; the number of preset storage areas is the same as the number of P2L tables contained in the logical group.

[0088] Optionally, the processing module 302 is further configured to generate a garbage collection mapping relationship based on the preset storage area corresponding to each logical group in the block to be collected during garbage collection; the garbage collection mapping relationship includes a target physical address and a target logical address; when the physical address corresponding to the target logical address recorded in the L2P table is different from the target physical address, the data corresponding to the target physical address is determined to be invalid data; the L2P table is used to record the latest physical address corresponding to the logical address; when the physical address corresponding to the target logical address recorded in the L2P table is the same as the target physical address, the data corresponding to the target physical address is determined to be valid data; a physical address is reallocated for the valid data, and the L2P table and P2L table are updated based on the newly allocated physical address.

[0089] Optionally, the processing module 302 is specifically used to obtain the starting stripe index and the starting storage area index corresponding to the logical group; read the target logical address and the offset position corresponding to the target logical address from the preset storage area; determine the target stripe index and the target storage area index corresponding to the target logical address based on the starting stripe index, the starting storage area index, the offset position and the stripe capacity; generate the target physical address based on the target stripe index, the target storage area index and the index of the block to be reclaimed; and generate the mapping relationship to be reclaimed based on each target physical address and the corresponding target logical address.

[0090] Please refer to Figure 8 This is a block diagram of an electronic device 400 provided in an embodiment of the present invention. The electronic device 400 includes a memory 410, a processor 420, and a communication module 430. The memory 410, processor 420, and communication module 430 are electrically connected directly or indirectly to each other to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines.

[0091] The memory 410 is used to store programs or data. The memory 410 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0092] The processor 420 is used to read / write data or programs stored in the memory 410 and perform corresponding functions. For example, when a computer program stored in the memory 410 is executed by the processor 420, the data storage methods disclosed in the above embodiments can be implemented.

[0093] The communication module 430 is used to establish a communication connection between the electronic device 400 and other communication terminals via a network, and to send and receive data via the network.

[0094] It should be understood that, Figure 8 The structure shown is only a schematic diagram of the electronic device 400. The electronic device 400 may also include components that are larger than... Figure 8 The more or fewer components shown, or having the same Figure 8 The different configurations shown. Figure 8 The components shown can be implemented using hardware, software, or a combination thereof.

[0095] This invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor 420, implements the data storage methods disclosed in the above embodiments.

[0096] This invention also provides a program product that, when executed by processor 420, implements the data storage method disclosed in the above embodiments.

[0097] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0098] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0099] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0100] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A data storage method, characterized in that, The method includes: Assign a physical address to the data to be written; the physical address includes a storage area index. Determine the target P2L table based on the stripe capacity and the storage area index, and query the offset position corresponding to the storage area index in the target P2L table; Save the logical address corresponding to the data to be written to the offset position.

2. The data storage method according to claim 1, characterized in that, The step of determining the target P2L table based on the stripe capacity and the storage area index includes: Calculate the least common multiple of the stripe capacity and the number of logical addresses; the number of logical addresses is the maximum number of logical addresses stored in the P2L table. The target P2L index is determined based on the least common multiple and the storage area index; The target P2L table is determined from at least one P2L table based on the target P2L index.

3. The data storage method according to claim 2, characterized in that, Determining the target P2L index based on the least common multiple and the storage area index includes: The target P2L index is determined by taking the remainder of the storage area index modulo the least common multiple and then dividing the remainder by the stripe capacity.

4. The data storage method according to claim 2, characterized in that, The step of querying the offset position corresponding to the storage area index in the target P2L table includes: The offset position is obtained by taking the remainder of the storage area index with respect to the least common multiple, and then taking the remainder with respect to the stripe capacity.

5. The data storage method according to claim 2, characterized in that, The physical address further includes a block index and a stripe index; the method further includes: Once all P2L tables in the logical group have been constructed, the target block is determined from the NAND flash memory based on the block index; the logical group includes at least one stripe in the same block, and the number of stripes in the logical group is determined by the least common multiple and the stripe capacity; the number of P2L tables in the logical group is determined by the least common multiple and the number of logical addresses. Obtain the maximum index from at least one stripe index corresponding to the logical group, and determine the stripe corresponding to the maximum index as the target stripe; The logical addresses in each of the P2L tables are stored in at least one preset storage area in the target stripe; the number of preset storage areas is the same as the number of P2L tables contained in the logical group.

6. The data storage method according to claim 1, characterized in that, The method further includes: During garbage collection, a garbage collection mapping relationship is generated based on the preset storage area corresponding to each logical group in the block to be collected; the garbage collection mapping relationship includes the target physical address and the target logical address. When the physical address corresponding to the target logical address recorded in the L2P table is different from the target physical address, the data corresponding to the target physical address is determined to be invalid data; the L2P table is used to record the latest physical address corresponding to the logical address; When the physical address corresponding to the target logical address recorded in the L2P table is the same as the target physical address, the data corresponding to the target physical address is determined to be valid data; The valid data is reassigned a physical address, and the L2P table and the P2L table are updated based on the newly assigned physical address.

7. The data storage method according to claim 6, characterized in that, The step of generating a mapping relationship for recycling based on the preset storage area corresponding to each logical group in the block to be recycled includes: Obtain the starting stripe index and starting storage area index corresponding to the logical group; Read the target logical address and the offset position corresponding to the target logical address from the preset storage area; The target stripe index and target memory area index corresponding to the target logical address are determined based on the starting stripe index, the starting memory area index, the offset position, and the stripe capacity. The target physical address is generated based on the target stripe index, the target storage area index, and the index of the block to be reclaimed; Generate a mapping relationship to be recycled based on each target physical address and its corresponding target logical address.

8. A data storage device, characterized in that, The device includes: The allocation module is used to allocate physical addresses for data to be written; the physical address includes a storage area index. The processing module is used to determine the target P2L table based on the stripe capacity and the storage area index, query the offset position corresponding to the storage area index in the target P2L table, and save the logical address corresponding to the data to be written to the offset position.

9. An electronic device, characterized in that, It includes a processor and a memory, the memory storing a computer program that can be executed by the processor to implement the data storage method according to any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data storage method as described in any one of claims 1-7.

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