Mapping method, demapping method and apparatus

Abstract

The mapping method, demapping and device provided by the embodiments of the present application can improve charging efficiency. The mapping method can comprise: obtaining a bit sequence, the bit sequence comprising a first target bit block; mapping the first target bit block into a first bit block set, the first bit block set comprising N second bit blocks, wherein M second bit blocks in the N second bit blocks obtained by mapping the first target bit block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more specifically, to a mapping method, a demapping method, and an apparatus. Background Technology

[0002] With the development of wireless networks and the evolution of business needs, a massive number of Internet of Things (IoT) nodes exist in the network. These IoT nodes are low-cost and small in size, but cannot carry large-capacity batteries, resulting in short standby life. To solve this problem, the industry has proposed using environmental energy harvesting to provide a continuous power source for IoT nodes. Radio frequency energy is one of the candidate energy sources, with advantages such as controllable energy amount and source, as well as certain penetration and relatively long transmission distance.

[0003] Cellular mobile communication networks deploy a large number of base stations, which are equipped with multiple antennas and can emit arbitrarily designed electromagnetic waves and provide directional beams to enhance radio frequency energy in certain directions, frequency bands, and time periods. This can significantly improve the inefficiency of energy transfer. Therefore, wireless energy transfer (WPT) via base stations is one of the important ways to solve the short battery life problem of IoT devices in the future. However, due to the limited resources of cellular networks, if a large amount of resources are used to serve IoT charging, the resources available for communication will be greatly limited. If data can be transmitted simultaneously during charging, resource utilization can be further improved. Therefore, the technology of simultaneous wireless information and power transfer (SWIPT) has emerged.

[0004] In existing data-energy simultaneous transmission technologies, the transmitting end sends a communication signal, taking phase shift keying (PSK)-orthogonal frequency division multiplexing (OFDM) signal as an example. This communication signal can carry data and is also an electromagnetic wave. The receiving end can acquire energy while receiving data by receiving this communication signal. However, because this communication signal may be a random signal with rapidly changing and irregular signal strength, it cannot match the charging and discharging time of the rectifier's capacitor. This results in the rectifier being unable to capture energy from rapidly changing signals, thus leading to low charging efficiency. Summary of the Invention

[0005] The mapping method, demapping method, and apparatus provided in this application can improve charging efficiency.

[0006] In a first aspect, embodiments of this application provide a mapping method, which may include: taking a bit sequence, the bit sequence including a first target bit block; mapping the first target bit block to a first bit block set, the first bit block set including N second bit blocks, wherein M of the N second bit blocks obtained by mapping the first target bit block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0007] In one possible implementation, the method can be executed by a first communication device, such as a bit mapping module in the first communication device.

[0008] Alternatively, the method can also be executed by the first chip device.

[0009] For example, the bit mapping module may be located in the physical layer of the communication protocol architecture.

[0010] The mapping method provided in this application's embodiments maps a first target bit block to a first bit block set, wherein the first bit block set includes M identical second bit blocks and other second bit blocks. This ensures that the modulated and mapped signal is a non-deterministic signal, suitable for communication and power charging. Furthermore, the presence of M identical second bit blocks in the first bit block set, where M is greater than or equal to a first threshold and less than N, improves the stability of the modulated and mapped signal and its envelope, thereby increasing power charging efficiency.

[0011] Optionally, the first communication device may acquire the bit sequence in a variety of ways, and this application embodiment does not limit this.

[0012] In one possible implementation, the method is performed by a bit mapping module that can receive bit sequences from the medium access control (MAC) layer.

[0013] In another possible implementation, the first communication device can receive a bit sequence from a bit sequence generation device.

[0014] Optionally, the first target bit block may include at least one bit.

[0015] In one possible implementation, mapping the first target bit block to a first bit block set includes: mapping the first target bit block to the first bit block set based on a bit mapping relationship, wherein the bit mapping relationship is used to indicate the correspondence between P first bit blocks and P bit block sets, the P first bit blocks include the first target bit block, and the P bit block sets include the first bit block set, where P is an integer greater than 1.

[0016] By using the mapping method provided in this application embodiment, the first communication device can directly determine the first bit block set corresponding to the first target bit block by looking up the bit mapping relationship, which can reduce processing complexity and improve mapping rate.

[0017] In one possible implementation, the bit mapping is determined at least based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

[0018] In one possible implementation, the number of bits in the first bit block is determined at least based on P.

[0019] For example, taking the number of bits in the first bit block as S, 2 S =P, where S is an integer greater than 0.

[0020] Using the mapping method provided in this application embodiment, the larger the value of P, the longer the length of the first bit block, and therefore the faster the mapping rate, and thus the faster the transmission rate; the smaller the value of P, the smaller the amount of data in the bit mapping table, and therefore the less memory and channel resources are occupied.

[0021] In one possible implementation, the number of bits in the second bit block is determined at least based on the modulation order.

[0022] Using the mapping method provided in this application embodiment, the number of bits in the second bit block is determined based on the modulation order. In this way, when performing modulation mapping, a second bit block can be directly mapped to a modulation symbol, which can improve the mapping rate.

[0023] Optionally, the first communication device may obtain the bit mapping relationship in a variety of ways, and the embodiments of this application do not limit this.

[0024] In one possible implementation, the first communication device may receive second indication information from a mapping relationship generation device (such as a second communication device), the second indication information being used to indicate the bit mapping relationship.

[0025] Using the mapping method provided in this application embodiment, the bit mapping relationship is obtained from the second communication device, and the mapping relationship can be flexibly adjusted to adapt to different transmission environments.

[0026] In another possible implementation, the bit mapping relationship can be preset.

[0027] The bit mapping relationship is preset using the mapping method provided in this application embodiment, which can reduce the complexity of configuring the bit mapping relationship.

[0028] In another possible implementation, the first communication device may determine the bit mapping relationship based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

[0029] By using the mapping method provided in the embodiments of this application, the first communication device generates its own bit mapping relationship, which can reduce signaling overhead and improve transmission efficiency.

[0030] Optionally, the method may further include: the first communication device sending the bit mapping relationship to the second communication device.

[0031] In one possible implementation, the bit sequence further includes a second target bit block, and the method further includes: mapping the second target bit block to a set of second bit blocks, the set of second bit blocks including N second bit blocks, wherein K of the N second bit blocks obtained by mapping the second target bit block are the same, and K is greater than the first threshold and less than N.

[0032] Optionally, the values ​​of K and M can be the same or different, and this application embodiment does not limit this.

[0033] Using the mapping method provided in this application, the values ​​of K and M are the same, which can reduce the complexity of the bit mapping relationship; the values ​​of K and M are different, which can flexibly adjust the communication or charging efficiency.

[0034] Optionally, before mapping the first target bit block to a first set of bit blocks, the method may further include: dividing the bit sequence into a plurality of first bit blocks, the plurality of first bit blocks including the first target bit block and the second target bit block.

[0035] Optionally, the method further includes mapping the N second bit blocks to N modulation symbols.

[0036] Optionally, the method further includes: sending the N modulation symbols to a second communication device.

[0037] In one possible implementation, the N modulation symbols are used for simultaneous digital and energy transmission.

[0038] Secondly, embodiments of this application provide a demapping method, which may include: obtaining at least one set of bit blocks, the at least one set of bit blocks including a first set of bit blocks, the first set of bit blocks including N second bit blocks, M of the N second bit blocks being identical, N being an integer greater than 1, M being greater than or equal to a first threshold and less than N; and demapping the first set of bit blocks into a first target bit block.

[0039] In one possible implementation, the method can be executed by a second communication device, such as a bit demapping module in the second communication device.

[0040] Alternatively, the method can also be executed by a second chip device.

[0041] Optionally, the second communication device may acquire the at least one set of bit blocks in a variety of ways, and the embodiments of this application do not limit this.

[0042] In one possible implementation, taking the method as an example, the bit demapping module may receive the at least one set of bit blocks from the second parallel / serial conversion module.

[0043] In another possible implementation, the second communication device can receive N modulation symbols from the first communication device and demap the N modulation symbols into N second bit blocks included in the first bit block set.

[0044] It should be noted that the demapping method provided in the second aspect is the inverse process of the mapping method provided in the first aspect. Please refer to the relevant part of the first aspect for details, which will not be repeated here.

[0045] In one possible implementation, demapping the first set of bit blocks to the first target bit block includes: demapping the first set of bit blocks to the first target bit block based on a bit mapping relationship, wherein the bit mapping relationship is used to indicate the correspondence between P first bit blocks and a set of P bit blocks, wherein the P first bit blocks include the first target bit block, and the set of P bit blocks includes the set of first bit blocks, where P is an integer greater than 1.

[0046] In one possible implementation, the at least one set of bit blocks further includes a second set of bit blocks, which includes N second bit blocks, wherein K of the N second bit blocks in the second set of bit blocks are the same, K is greater than the first threshold and less than N, and K is not equal to M. The method further includes: demapping the second set of bit blocks into a second target bit block.

[0047] In one possible implementation, acquiring at least one set of bit blocks includes: acquiring N modulation symbols; and demapping the N modulation symbols into N second bit blocks included in the first set of bit blocks.

[0048] Thirdly, embodiments of this application provide a mapping method, which may include: obtaining a modulation symbol sequence, the modulation symbol sequence including a first target modulation symbol block; mapping the first target modulation symbol block to a first modulation symbol block set, the first modulation symbol block set including N second modulation symbol blocks, wherein M of the N second modulation symbol blocks obtained by mapping the first target modulation symbol block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0049] In one possible implementation, the method can be performed by a first communication device, such as a modulation mapping module in the first communication device.

[0050] The mapping method provided in this application's embodiments maps the first target modulation symbol block to a first modulation symbol block set. This first modulation symbol block set includes M identical second modulation symbol blocks and other second modulation symbol blocks. This ensures that the mapped signal is non-deterministic and can be used for communication and power charging. Furthermore, the presence of M identical second modulation symbol blocks in the first modulation symbol block set, where M is greater than or equal to a first threshold and less than N, improves the stability of the mapped signal and its envelope, thereby increasing power charging efficiency.

[0051] Optionally, the “modulation symbol sequence” in this application embodiment may also be referred to as the “original modulation symbol sequence”, “modulation symbol stream”, or “modulation symbol string”; the “modulation symbol block” (such as the first target modulation symbol block) in this application embodiment may also be referred to as the “modulation symbol block set”, “modulation symbol block group”, or “modulation symbol block group”. This application embodiment does not limit this.

[0052] Optionally, the first communication device may acquire the modulation symbol sequence in a variety of ways, and the embodiments of this application do not limit this.

[0053] In one possible implementation, the method is executed by a modulation mapping module, which can receive the modulation symbol sequence from a constellation mapping module.

[0054] In another possible implementation, the first communication device can acquire a bit sequence and map the bit sequence to the modulation symbol sequence.

[0055] In one possible implementation, mapping the first target modulation symbol block to the first modulation symbol set includes: mapping the first target modulation symbol block to the first modulation symbol set based on a modulation symbol mapping relationship, wherein the modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and P sets of first modulation symbol blocks, wherein the P first modulation symbol blocks include the first target modulation symbol block, and the P sets of modulation symbol blocks include the first modulation symbol block set, where P is an integer greater than 1.

[0056] Using the mapping method provided in this application embodiment, the larger the value of P, the longer the length of the first bit block, and therefore the faster the mapping rate, and thus the faster the transmission rate; the smaller the value of P, the smaller the amount of data in the bit mapping table, and therefore the less memory and channel resources are occupied.

[0057] In one possible implementation, P is determined at least based on the number of modulation symbols and the modulation order of the first modulation symbol block, and the modulation symbol mapping relationship is determined at least based on P, N, and M.

[0058] Optionally, the first communication device may obtain the modulation mapping relationship in a variety of ways, and the embodiments of this application do not limit this.

[0059] In one possible implementation, the first communication device may receive second indication information from the mapping relationship generation device, the second indication information being used to indicate the modulation mapping relationship.

[0060] In another possible implementation, the modulation mapping relationship can be preset.

[0061] In another possible implementation, the first communication device may determine the modulation mapping relationship based on P, N, and M.

[0062] Optionally, the method may further include: the first communication device sending the modulation mapping relationship to the second communication device.

[0063] In one possible implementation, the modulation symbol sequence further includes a second target modulation symbol block, and the method further includes: mapping the second target modulation symbol block to a set of second modulation symbol blocks, the set of second modulation symbol blocks including N second modulation symbol blocks, wherein K of the N second modulation symbol blocks obtained by mapping the second target modulation symbol block are the same, and K is greater than the first threshold and less than N.

[0064] Optionally, the values ​​of K and M can be the same or different, and this application embodiment does not limit this.

[0065] Using the mapping method provided in this application, the values ​​of K and M are the same, which can reduce the complexity of the bit mapping relationship; the values ​​of K and M are different, which can flexibly adjust the communication or charging efficiency.

[0066] Optionally, before mapping the first target modulation symbol block to a first modulation symbol block set, the method may further include: dividing the modulation symbol sequence into a plurality of first modulation symbol blocks, the plurality of first modulation symbol blocks including the first target modulation symbol block and the second target modulation symbol block.

[0067] In one possible implementation, the acquisition of the modulation symbol sequence includes: acquiring a bit sequence; and mapping the bit sequence to the modulation symbol sequence.

[0068] In one possible implementation, the N second modulation symbol blocks are used for simultaneous digital and energy transmission.

[0069] Fourthly, embodiments of this application provide a demapping method, which may include: obtaining at least one set of modulation symbol blocks, the at least one set of modulation symbol blocks including a first set of modulation symbol blocks, the first set of modulation symbol blocks including N second modulation symbol blocks, M of the N second modulation symbol blocks being identical, N being an integer greater than 1, M being greater than or equal to a first threshold and less than N; and demapping the N second modulation symbol blocks included in the first set of modulation symbol blocks into a first target modulation symbol block.

[0070] In one possible implementation, the method can be performed by a second communication device, such as a modulation / demapping module within the second communication device.

[0071] Optionally, the second communication device may acquire the at least one set of modulation symbol blocks in a variety of ways, and the embodiments of this application do not limit this.

[0072] In one possible implementation, taking the method as an example, the modulation and demapping module may receive the at least one set of modulation symbol blocks from the second parallel-to-serial conversion module.

[0073] In another possible implementation, the second communication device can receive N modulation symbols from the first communication device and demap the N modulation symbols into N second bit blocks included in the first bit block set.

[0074] It should be noted that the demapping method provided in the fourth aspect is the inverse process of the mapping method provided in the second aspect. Please refer to the relevant part of the second aspect for details, which will not be repeated here.

[0075] In one possible implementation, demapping the N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block includes: demapping the N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block based on a modulation symbol mapping relationship, wherein the modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and P sets of modulation symbol blocks, wherein the P first modulation symbol blocks include the first target modulation symbol block, and the P sets of modulation symbol blocks include the first modulation symbol block set, where P is an integer greater than 1.

[0076] In one possible implementation, the at least one set of modulation symbol blocks further includes a second set of modulation symbol blocks, which includes N second modulation symbol blocks. K of the N second modulation symbol blocks in the second set of modulation symbol blocks are the same, K is greater than the first threshold and less than N, and K is not equal to M. The method further includes: demapping the N second modulation symbol blocks in the second set of modulation symbol blocks into a second target modulation symbol block.

[0077] In one possible implementation, the method further includes: demapping the first target modulation symbol block into a first target bit block.

[0078] Fifthly, embodiments of this application also provide a communication device for implementing the methods described in the above aspects or any possible implementation thereof, the device including units for implementing the methods described in the above aspects or any possible implementation thereof.

[0079] For example, the communication device may be a mapping device or a demapping device.

[0080] Sixthly, embodiments of this application also provide a communication device, which includes a processor and a communication interface, the processor and the communication interface being coupled together, the processor being used to implement the methods described in the above aspects or any possible implementation thereof.

[0081] For example, the communication device may be a chip device.

[0082] In a seventh aspect, this application also provides a computer-readable storage medium for storing a computer program, the computer program including instructions for implementing the methods described in the foregoing aspects or any possible implementation thereof.

[0083] Eighthly, this application also provides a computer program product containing instructions that, when executed on a computer or processor, cause the computer or processor to implement the methods described in the foregoing aspects or any possible implementation thereof.

[0084] Ninthly, this application also provides a chip device, which includes at least one processor and an interface circuit. The at least one processor transmits signals through the interface circuit, and when the at least one processor executes program code or instructions, it implements the methods described in the above aspects or any possible implementation thereof.

[0085] The communication device, computer storage medium, computer program product, and chip device provided in the embodiments of this application are all used to execute the methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects of the methods provided above, and will not be repeated here. Attached Figure Description

[0086] Figure 1 This is a schematic block diagram of the communication system 100 provided in an embodiment of this application;

[0087] Figure 2 This is another schematic block diagram of the communication system 100 provided in the embodiments of this application;

[0088] Figure 3 This is another schematic block diagram of the communication system 100 provided in the embodiments of this application;

[0089] Figure 4 This is a schematic block diagram of an open radio access network (O-RAN) system provided in an embodiment of this application;

[0090] Figure 5 This is a schematic diagram illustrating the application scenario provided in the embodiments of this application;

[0091] Figure 6 This is a schematic diagram of the charging principle provided in the embodiments of this application;

[0092] Figure 7 This is a waveform diagram of the QPSK signal provided in the embodiments of this application;

[0093] Figure 8 This is a schematic flowchart of the mapping method 200 provided in the embodiments of this application;

[0094] Figure 9 This is a schematic flowchart of the demapping method 300 provided in the embodiments of this application;

[0095] Figure 10 This is a schematic flowchart of the mapping method 400 provided in an embodiment of this application;

[0096] Figure 11 This is a schematic flowchart of the demapping method 500 provided in the embodiments of this application;

[0097] Figure 12This is a schematic block diagram of the communication device 600 provided in an embodiment of this application;

[0098] Figure 13 This is a schematic block diagram of the communication device 700 provided in the embodiments of this application;

[0099] Figure 14 This is a schematic block diagram of the communication device 800 provided in an embodiment of this application;

[0100] Figure 15 This is a schematic block diagram of the communication device 900 provided in the embodiments of this application. Detailed Implementation

[0101] First, let me introduce the communication system used in the methods and apparatus provided in the embodiments of this application.

[0102] Optionally, the technical solutions provided in this application can be applied to various communication systems. For example, Global System for Mobile Communications (GSM), Long Term Evolution (LTE), Universal Mobile Telecommunications System (UMTS), 4th Generation (4G), 4.5th Generation (4.5G), Worldwide Interoperability for Microwave Access (WiMAX), 5th Generation (5G), or New Radio Access Technology (NR). The technical solutions in this application can also be used with Zigbee, Long Range Radio (Lora), Bluetooth (BT), Wireless Fidelity (Wi-Fi), satellite communication systems, future communication systems such as 6th Generation (6G), or integrated systems of multiple technologies.

[0103] Optionally, the technical solutions of this application embodiment can also be applied to universal mobile telecommunications system (UMTS), code division multiple access (CDMA) system, wireless local area network (WLAN), open access network (open RAN, O-RAN or ORAN), cloud radio access network (CRAN), etc.

[0104] Optionally, the technical solutions of this application embodiment can also be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems.

[0105] For example, Figure 1 A schematic block diagram of a communication system 100 provided in an embodiment of this application is shown. Figure 1 As shown, the system 100 may include at least two communication devices, such as... Figure 1 The first communication device 110 and the second communication device 110 shown in the figure are capable of communicating or charging at least one of the following:

[0106] Optionally, "communication" in the embodiments of this application may also be referred to as "wireless communication", "data transmission", or "information transmission"; "charging" in the embodiments of this application may also be referred to as "wireless charging", "energy transfer", or "charging"; "charging" may also be referred to as "wireless energy transfer", "wireless charging", "wireless energy transmission", "radio frequency energy transmission", "radio frequency energy transfer", "radio frequency charging", or "radio frequency charging"; "simultaneous data and energy transmission" in the embodiments of this application may also be referred to as "wireless simultaneous data and energy transmission", "energy-carrying energy transmission", "energy-carrying information transmission", "integrated data and energy transmission", "integrated energy and data transmission", or "wireless data and energy collaborative transmission", and the embodiments of this application do not limit this.

[0107] In one possible implementation, the at least two communication devices can communicate wirelessly via air interface resources.

[0108] Optionally, the air interface resources involved in the embodiments of this application may include at least one of time domain resources, frequency domain resources, code resources, or spatial resources.

[0109] In another possible implementation, the at least two communication devices can be powered by transmitting communication signals.

[0110] For example, the communication signals involved in the embodiments of this application may include PSK signals (such as BPSK, QPSK, etc.) or quadrature amplitude modulation (QAM) signals (such as 4-QAM signals, 16-QAM, etc.).

[0111] For example, the first communication device 110 and the second communication device 110 can transmit data and charge each other by transmitting communication signals.

[0112] Optionally, the communication devices involved in the embodiments of this application (such as the first communication device 110 or the second communication device 110) may include network devices or terminal devices.

[0113] Optionally, the terminal device involved in the embodiments of this application can also be called a terminal, which can be a device with wireless transceiver capabilities. It can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; it can also be deployed on water (such as ships); and it can also be deployed in the air (such as airplanes, balloons, and satellites). The terminal device can be user equipment (UE), wherein the UE includes handheld devices, vehicle-mounted devices, wearable devices, or computing devices with wireless communication capabilities. For example, the UE can be a mobile phone, tablet computer, or computer with wireless transceiver capabilities. The terminal device can also be a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in autonomous driving, a wireless terminal in telemedicine, a wireless terminal in a smart grid, a wireless terminal in a smart city, a wireless terminal in a smart home, and so on.

[0114] Alternatively, the terminal device can also be a device that provides voice / data, such as a handheld device or vehicle-mounted device with wireless connectivity. Currently, examples of terminals include: mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving vehicles, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, wearable devices, terminal devices in 5G networks, or future public land mobile communication networks. Terminal devices in a network (PLMN), devices in a Zigbee network, devices in a LoRa network, Bluetooth slaves, BLE slaves, Wi-Fi stations (STAs), etc.

[0115] Optionally, the terminal device can also be a terminal device in an IoT system, also known as an IoT node. IoT is an important component of future information technology development. Its main technical characteristic is connecting objects to networks via communication technologies, thereby realizing an intelligent network that enables human-machine interconnection and machine-to-machine interconnection. Connectivity can be achieved through broadband or narrowband technologies. IoT technology, for example, can achieve massive connectivity, deep coverage, and low terminal power consumption through narrowband (NB) technology. IoT technologies include reflective communication technology, spread spectrum technology, and ultra-wideband (UWB), which will not be elaborated further.

[0116] Optionally, the network devices involved in the embodiments of this application may include access network devices, such as base stations (BS). A BS can be a device deployed in a wireless access network that can wirelessly communicate with terminals. Base stations may take various forms, such as macro base stations, micro base stations, relay stations, and access points. For example, the base station involved in the embodiments of this application may be a 5G base station or an evolved Node B (eNB) in LTE. A 5G base station may also be called a transmission reception point (TRP) or a 5G base station (Next-Generation Node B, gNB). In the embodiments of this application, the apparatus for implementing the functions of the network device may be a network device itself; it may also be an apparatus capable of supporting the network device in implementing the functions, such as a chip system, which can be installed in the network device. In the technical solutions provided in the embodiments of this application, the apparatus for implementing the functions of the network device is a network device, and the network device is a base station, as an example, to describe the technical solutions provided in the embodiments of this application.

[0117] Optionally, the radio access network (RAN) device in this application is a device with wireless transceiver capabilities. The RAN device can provide wireless communication services, enabling terminal devices to access the wireless network. The RAN can also be referred to as an access network device or a network device. In the embodiments of this application, the network device can refer to a radio access network (RAN) node (or device) used in a cellular network (or mobile network) to connect terminal devices to the wireless network; it can also be a Zigbee base station, a Bluetooth master, a Bluetooth Low Energy (BLE) master, a LoRa base station, or a Wi-Fi access point.

[0118] For example, Figure 2 Another schematic block diagram of the system 100 provided in an embodiment of this application is shown. For example... Figure 2As shown, the first communication device 110 may include a bit mapping module 111, a first serial-to-parallel conversion module 112, a constellation mapping module 113, an inverse fast fourier transform (IFFT) module 114, a first parallel-to-serial conversion module 115, a digital-to-analog converter (DAC) 116, an up-conversion module 117, and a power amplifier (PA) 118. The second communication device 110 may include a down-conversion module 121, an analog-to-digital converter (ADC) 122, a second serial-to-parallel conversion module 123, a fast fourier transform (FFT) module 124, a constellation demapping module 125, a second parallel-to-serial conversion module 126, and a bit demapping module 127.

[0119] First, let's introduce the functions of each module (or device) in the first communication device 110.

[0120] The bit mapping module 111 is used to obtain the original bit sequence; using the mapping method provided in the embodiments of this application, the first target bit block in the original bit sequence is mapped to a first bit block set, the second bit block set includes N second bit blocks, M of the N second bit blocks are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0121] The first serial-to-parallel conversion module 112 is used to perform serial-to-parallel conversion on the N second bit blocks to obtain the converted N second bit blocks.

[0122] The constellation mapping module 113 is used to map the converted N second bit blocks into N modulation symbols according to the constellation diagram.

[0123] The IFFT module 114 is used to perform IFFT on the N modulation symbols to obtain N time-domain sampling points.

[0124] The first parallel-to-serial conversion module 115 is used to perform parallel-to-serial conversion on the N time-domain sampling points to obtain an OFDM baseband symbol, the length of which is N.

[0125] The DAC116 is used to perform DAC on the OFDM baseband symbol to obtain the OFDM baseband signal.

[0126] The upconversion module 117 is used to upconvert the OFDM bandpass signal to obtain an OFDM bandpass signal.

[0127] PA118 is used to transmit the OFDM bandpass signal.

[0128] Next, we will introduce the functions of each module (or device) in the second communication device 110.

[0129] The downconversion module 121 is used to acquire the OFDM bandpass signal; and to downconvert the OFDM bandpass signal to obtain the OFDM baseband signal and the baseband symbol sequence.

[0130] The ADC122 is used to perform digital-to-analog conversion on the OFDM baseband symbol to obtain the OFDM baseband symbol.

[0131] The second serial-to-parallel conversion module 123 is used to perform serial-to-parallel conversion on the OFDM baseband symbol to obtain N time-domain sampling points.

[0132] FFT module 124 is used to perform FFT on the N time-domain sampling points to obtain the modulation symbols on each subcarrier in the frequency domain.

[0133] The constellation demapping module 125 is used to map the modulation symbols on each subcarrier in the frequency domain into data bits according to the constellation diagram.

[0134] The second parallel-to-serial conversion module 126 is used to perform parallel-to-serial conversion on data bits to obtain at least one set of bit blocks. The at least one set of bit blocks includes a first set of bit blocks, and the second set of bit blocks includes N second bit blocks. M of the N second bit blocks are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0135] The bit demapping module 127 is used to map N second bit blocks into a first target bit block using the mapping method provided in the embodiments of this application.

[0136] Optionally, embodiments of this application provide for Figure 2 The specific form of each module (or device) is not limited.

[0137] In one possible implementation, Figure 2 Each module (or device) can be in the form of software (or virtual module), hardware (or physical device), or a combination of software and hardware.

[0138] For example, at least one of DAC116, PA118, and ADC122 can be hardware.

[0139] For example, at least one of the bit mapping module 111, the first serial-to-parallel conversion module 112, the constellation mapping module 113, the inverse fast fourier transform (IFFT) module 114, the first parallel-to-serial conversion module 115, the up-conversion module 117, the down-conversion module 121, the second serial-to-parallel conversion module 123, the FFT module 124, the constellation demapping module 125, the second parallel-to-serial conversion module 126, or the bit demapping module 127 can be software or hardware.

[0140] It should be noted that, Figure 2 The first communication device 110 is shown as an example only, including a first serial-to-parallel conversion module 112, a constellation mapping module 113, an IFFT module 114, a first parallel-to-serial conversion module 115, a DAC 116, an up-conversion module 117, and a PA 118. The second communication device 110 includes a down-conversion module 121, an ADC 122, a second serial-to-parallel conversion module 123, an FFT module 124, a constellation demapping module 125, and a second parallel-to-serial conversion module 126. However, the embodiments of this application are not limited to this.

[0141] Optionally, the first communication device 110 or the second communication device 120 may include only Figure 2 The dashed lines indicate a portion of the modules (or devices); or, the first communication device 110 or the second communication device 120 may include, except for... Figure 2 Other modules (or devices) besides those shown in the embodiments are not limited in this application.

[0142] For example, Figure 3 Another schematic block 3 of the system 100 provided in this application embodiment is shown. The first communication device 110 may include a constellation mapping module 111, a modulation mapping module 112, a first serial-to-parallel conversion module 113, an IFFT module 114, a first parallel-to-serial conversion module 115, a DAC 116, an up-conversion module 117, and a PA 118. The second communication device 110 may include a down-conversion module 121, an ADC 122, a second serial-to-parallel conversion module 123, an FFT module 124, a second parallel-to-serial conversion module 125, a modulation demapping module 126, and a constellation demapping module 127.

[0143] First, let's introduce the functions of each module (or device) in the first communication device 110.

[0144] The constellation mapping module 111 is used to obtain the original bit sequence; according to the constellation diagram, the original bit sequence is mapped into the original modulation symbol sequence.

[0145] The modulation mapping module 112 is used to map the first target modulation symbol block in the original modulation symbol sequence to a first modulation symbol block set. The first modulation symbol block set includes N second modulation symbol blocks, wherein M of the N second modulation symbol blocks obtained by mapping the first target modulation symbol block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0146] The first serial-to-parallel conversion module 113 is used to perform serial-to-parallel conversion on the N second modulation symbol blocks to obtain the converted N second modulation symbol blocks.

[0147] The IFFT module 114 is used to perform IFFT on the N converted second modulation symbol blocks to obtain N time-domain sampling points.

[0148] The first parallel-to-serial conversion module 115 is used to perform parallel-to-serial conversion on the N time-domain sampling points to obtain an OFDM baseband symbol, the length of which is N.

[0149] The DAC116 is used to perform DAC on the OFDM baseband symbol to obtain the OFDM baseband signal.

[0150] The upconversion module 117 is used to upconvert the OFDM bandpass signal to obtain an OFDM bandpass signal.

[0151] PA118 is used to transmit the OFDM bandpass signal.

[0152] Optionally, the constellation mapping module 111 and the modulation mapping module 112 can be two independent modules, or they can be integrated together. This application embodiment does not limit this.

[0153] Next, we will introduce the functions of each module (or device) in the second communication device 110.

[0154] The downconversion module 121 is used to acquire the OFDM bandpass signal; and to downconvert the OFDM bandpass signal to obtain the OFDM baseband signal and the baseband symbol sequence.

[0155] The ADC122 is used to perform digital-to-analog conversion on the OFDM baseband symbol to obtain the OFDM baseband symbol.

[0156] The second serial-to-parallel conversion module 123 is used to perform serial-to-parallel conversion on the OFDM baseband symbol to obtain N time-domain sampling points.

[0157] FFT module 124 is used to perform FFT on the N time-domain sampling points to obtain the modulation symbols on each subcarrier in the frequency domain.

[0158] The second parallel-to-serial conversion module 125 is used to perform parallel-to-serial conversion on the modulation symbols on each subcarrier of the frequency domain to obtain at least one set of modulation symbol blocks. The at least one set of modulation symbol blocks includes a first set of modulation symbol blocks, which includes N second modulation symbol blocks. M of the N second modulation symbol blocks are the same, where N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0159] The modulation demapping module 126 is used to map the N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block.

[0160] The constellation demapping module 127 is used to map the first target modulation symbol block into the first target bit block according to the constellation diagram.

[0161] Optionally, the modulation demapping module 126 and the constellation demapping module 127 can be two independent modules or they can be integrated together. This application embodiment does not limit this.

[0162] Optionally, embodiments of this application provide for Figure 3 The specific form of each module (or device) is not limited.

[0163] In one possible implementation, Figure 3 Each module (or device) can be in the form of software (or virtual module), hardware (or physical device), or a combination of software and hardware.

[0164] For example, at least one of DAC116, PA118, or ADC122 may be hardware.

[0165] For example, at least one of the constellation mapping module 111, modulation mapping module 112, first serial-to-parallel conversion module 113, IFFT module 114, first parallel-to-serial conversion module 115, up-conversion module 117, down-conversion module 121, second serial-to-parallel conversion module 123, FFT module 124, second parallel-to-serial conversion module 125, modulation demapping module 126, and constellation demapping module 127 can be software or hardware.

[0166] It should be noted that, Figure 3 The first communication device 110 is shown as an example only, including a constellation mapping module 111, a first serial-to-parallel conversion module 113, an IFFT module 114, a first parallel-to-serial conversion module 115, a DAC 116, an up-conversion module 117, and a PA 118. The second communication device 110 includes a down-conversion module 121, an ADC 122, a second serial-to-parallel conversion module 123, an FFT module 124, a second parallel-to-serial conversion module 125, and a constellation demapping module 127. However, the embodiments of this application are not limited to this.

[0167] Optionally, the first communication device 110 or the second communication device 120 may include only Figure 3 The dashed lines indicate a portion of the modules (or devices); or, the first communication device 110 or the second communication device 120 may include, except for... Figure 3 Other modules (or devices) besides those shown in the embodiments are not limited in this application.

[0168] Optionally, Figures 1 to 3 The illustration only shows that the system 100 includes two communication devices, but the embodiments of this application do not limit this.

[0169] Optionally, the system 100 may also include a number of other communication devices, which can communicate with each other or be powered at least once.

[0170] For example, taking communication system 100 as an O-RAN system, the O-RAN system includes: core network (CN) equipment, access network equipment (RAN, such as eNB, gNB, or next-generation access network equipment) and UE. Figure 4 A schematic architecture diagram of the O-RAN system provided in an embodiment of this application is shown.

[0171] like Figure 4 As shown, the access network device communicates with the core network device through a backhaul link, and communicates with or charges the user equipment (UE) through an air interface, at least one of the following:

[0172] Optionally, the access network equipment may include a baseband unit (BBU) and a radio unit (RU).

[0173] For example, the baseband unit may communicate with or power at least one of the core network equipment via a backhaul link, and communicate with at least one radio frequency unit via a fronthaul link. The radio frequency unit may communicate with or power at least one UE via an air interface.

[0174] Optionally, the baseband unit and the radio frequency unit may or may not be co-located, and this application embodiment does not limit this.

[0175] Optionally, the baseband unit may include at least one control unit (CU) and at least one distributed unit (DU), and the CU and DU may communicate with each other via at least one midhaul link.

[0176] Optionally, Figure 4 The illustration only shows the baseband unit communicating with a radio frequency unit and the radio frequency unit communicating with a user equipment, but the embodiments of this application are not limited thereto.

[0177] Optionally, the O-RAN system may also include, in addition to Figure 4 Other components besides those shown are not limited in this application embodiment.

[0178] Optionally, the technical solutions provided in this application can be used in application scenarios for simultaneous data and energy transmission between communication devices, such as simultaneous data and energy transmission between network devices and terminal devices, simultaneous data and energy transmission between network devices, and simultaneous data and energy transmission between terminals.

[0179] For example, Figure 5 The illustration shows a schematic diagram of an application scenario provided by an embodiment of this application, wherein, Figure 5 Figure (a) shows a scenario where the base station and UE perform simultaneous data transmission. Figure 5 Figure (b) illustrates a scenario where the base station and UE perform simultaneous data transmission across multiple hops / multiple relays. Figure 5 Figure (c) illustrates a scenario where multiple base stations and UEs transmit data and energy simultaneously via DC (Dual Connectivity). Figure 5 Figure (d) illustrates a scenario where multiple base stations and UEs transmit data simultaneously through multiple connections.

[0180] For example, Figure 6 A schematic diagram illustrating the charging principle provided in an embodiment of this application is shown. Figure 6 As shown, the electromagnetic waves emitted by the base station are converted into AC signals by the receiver antenna and enter the rectifier. The rectifier rectifies and filters the AC signals into DC signals, which are then sent to the power management module. Finally, the power management module sends the DC signals to the battery to achieve energy storage.

[0181] In existing technologies, the transmitting communication device sends communication signals, such as QPSK signals, to the receiving communication device. QPSK signals are themselves electromagnetic waves, meaning they can carry both data and energy. The receiving end achieves both communication and energy charging by receiving this communication signal.

[0182] For example, Figure 7 The following is a schematic diagram of the waveform of the QPSK signal provided in an embodiment of this application, as shown in the figure. Figure 7As shown, this communication signal is a random signal with rapidly changing and irregular signal strength, which cannot match the charging and discharging time of the rectifier's capacitor. This causes the rectifier to be unable to capture energy from the rapidly changing signal, resulting in low charging efficiency. Furthermore, the envelope of the QPSK signal also fluctuates randomly, i.e., it is not a stationary envelope, which also affects charging efficiency.

[0183] To address the aforementioned problems, this application provides a mapping method and apparatus. The mapping method may include: acquiring a bit sequence, the bit sequence including a first target bit block; mapping the first target bit block into N second bit blocks, wherein M of the N second bit blocks obtained by mapping the first target bit block are identical, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N. In other words, the first target bit block is mapped into a first bit block set, the first bit block set including N second bit blocks, and M of the N second bit blocks are identical.

[0184] The mapping method provided in this application includes M identical second bit blocks and other second bit blocks in the first bit block set. This ensures that the modulated and mapped signal is a non-deterministic signal that can be used for communication and power charging. Furthermore, the presence of M identical second bit blocks in the first bit block set, where M is greater than or equal to a first threshold and less than N, improves the stability of the modulated and mapped signal and its envelope, thereby increasing power charging efficiency.

[0185] It should be noted that the demapping method is the inverse process of the mapping method, which will not be elaborated here.

[0186] The communication system and application scenarios in which the methods and apparatus provided in the embodiments of this application are applied have been introduced above. The mapping method and demapping method provided in the embodiments of this application will be described in detail below.

[0187] Figure 8 A schematic flowchart of the mapping method 200 provided in an embodiment of this application is shown. Figure 8 As shown, method 200 can be used as follows: Figure 1 or Figure 2 The system 100 shown, the method 200 may include the following steps S201 to S202. The steps of method 200 will be described in detail below.

[0188] S201. Obtain a bit sequence, which includes the first target bit block.

[0189] In one possible implementation, the method 200 can be executed by a first communication device, such as a bit mapping module in the first communication device.

[0190] For example, the first communication device can be as follows: Figure 1 or Figure 2 The first communication device 110 shown is illustrated.

[0191] For example, the bit mapping module can be as follows: Figure 2 The bit mapping module 111 shown.

[0192] For example, the bit mapping module may be located in the physical layer of the communication protocol architecture.

[0193] Optionally, the "bit sequence" in this application embodiment may also be referred to as "original bit sequence", "bit stream", or "bit string"; the "bit block" (such as the first target bit block) in this application embodiment may also be referred to as "bit set", "bit block group", or "bit group". This application embodiment does not limit this.

[0194] Optionally, the first communication device may acquire the bit sequence in a variety of ways, and this application embodiment does not limit this.

[0195] In one possible implementation, taking method 200 as an example, it is executed by a bit mapping module that can receive a bit sequence from the MAC layer.

[0196] In another possible implementation, the first communication device can receive a bit sequence from a bit sequence generation device.

[0197] Optionally, the first target bit block may include at least one bit.

[0198] S202. Map the first target bit block to a first bit block set, which includes N second bit blocks, wherein M of the N second bit blocks obtained by mapping the first target bit block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0199] For example, the first threshold can be N-1.

[0200] Optionally, S202 may include: mapping the first target bit block to the first bit block set based on a bit mapping relationship, wherein the bit mapping relationship is used to indicate the correspondence between P first bit blocks and P bit block sets, wherein the P first bit blocks include the first target bit block, and the P bit block set includes the first bit block set, where P is an integer greater than 1.

[0201] Optionally, the number of bits in the first bit block is determined at least based on P.

[0202] For example, taking the number of bits in the first bit block as S, 2S =P, where S is an integer greater than 0.

[0203] Optionally, the number of bits in the second bit block is determined at least based on the modulation order.

[0204] For example, if the modulation order of BPSK is 1, then the number of bits in the second bit block is 1; if the modulation order of QPSK is 2, then the number of bits in the second bit block is 2.

[0205] Optionally, the bit mapping relationship can be determined at least based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

[0206] Optionally, the value of one or more of P, N or M can be preset or indicated by the first indication information.

[0207] It should be noted that the values ​​of N and M are related by the fact that M is as close to N as possible, but less than N. In other words, the goal is to maximize the probability of the same second bit block appearing among the N second bit blocks. As a result, since there are different second bit blocks among the N second bit blocks, the signal after modulation and mapping of the first bit block set is a nondeterministic signal, which can be used for simultaneous data and energy transmission. In addition, since M of the N second bit blocks are the same, the signal has less fluctuation (i.e., better stability), which can improve the charging efficiency.

[0208] Optionally, the specific form of the bit mapping relationship is not limited in the embodiments of this application.

[0209] For example, the bit mapping relationship can be a bit mapping table.

[0210] Optionally, the first communication device may obtain the bit mapping relationship in a variety of ways, and the embodiments of this application do not limit this.

[0211] In one possible implementation, the first communication device may receive second indication information from the mapping relationship generation device, the second indication information being used to indicate the bit mapping relationship.

[0212] In another possible implementation, the bit mapping relationship can be preset.

[0213] In another possible implementation, the first communication device may determine the bit mapping relationship based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

[0214] Optionally, the method 200 may further include: the first communication device sending the bit mapping relationship to the second communication device.

[0215] In one possible implementation, the second communication device may be the second communication device 110 in the system 100 described above.

[0216] The following uses BPSK as an example to illustrate the bit mapping relationship in the embodiments of this application.

[0217] For example, the modulation mapping rules of BPSK are shown in Table 1 below.

[0218] Table 1

[0219]

[0220] As shown in Table 1, the modulation mapping rule for BPSK in the prior art is as follows: bit "0" is mapped to a modulation symbol. Bit "1" is mapped to a modulation symbol

[0221] Since the modulation mapping rule of BPSK maps one bit to one symbol, i.e., the modulation order is 1, the number of bits in the second bit block is 1. Furthermore, according to the aforementioned relationship between N and M, after bit mapping, in every 4 second bit blocks (i.e., N=4), the bit "0" appears 3 times (i.e., M=3), meaning that in every 4 modulation symbols after modulation mapping, the modulation symbol... Taking the occurrence of 3 times as an example, the 4 bits after mapping can represent 4 states: "0 0 0 1", "0 0 1 0", "0 1 00" and "1 0 0 0". Therefore, the maximum value of P can be 4 and the minimum value can be 2.

[0222] For example, taking P=4 as an example, the number of bits S in the first target bit block is 2, and the bit mapping relationship can be shown in Table 2 below.

[0223] Table 2

[0224] First bit block First bit block set 00 1 0 0 0 01 0 1 0 0 10 0 0 1 0 11 0 0 0 1

[0225] As shown in Table 2, the bit mapping relationship in this embodiment can be achieved by mapping the first bit block "0 0" to the first bit block set "1 0 0 0" before modulation mapping, the first bit block "0 1" to the first bit block set "0 1 0 0", the first bit block "1 0" to the first bit block set "0 0 1 0", and the first bit block "1 1" to the first bit block set "0 0 0 1". Thus, the probability of bit "0" appearing in the mapped first bit block set is 3 / 4. Furthermore, after the first bit block set is modulated using the BPSK modulation mapping rules shown in Table 1, the modulation symbol... The probability of it occurring is 3 / 4.

[0226] For example, taking P=2 as an example, the number of bits S in the first target bit block is 1, and the bit mapping relationship can be shown in Table 3 below.

[0227] Table 3

[0228] First bit block First bit block set 0 1 0 0 0 1 0 1 0 0

[0229] As shown in Table 3, the bit mapping relationship in this embodiment can map the first bit block "0" in the bit sequence to the first bit block set "1 0 0 0" and the first bit block "1" to the first bit block set "0 1 0 0" before modulation mapping. Thus, the probability of bit "0" appearing in the mapped first bit block set is 3 / 4. Furthermore, after the first bit block set is modulated using the BPSK modulation mapping rules shown in Table 1, the modulation symbol... The probability of it occurring is 3 / 4.

[0230] Using the mapping method provided in this application embodiment, the larger the value of P, the longer the length of the first bit block, and therefore the faster the mapping rate, and thus the faster the transmission rate; the smaller the value of P, the smaller the amount of data in the bit mapping table, and therefore the less memory and channel resources are occupied.

[0231] The following uses QPSK as an example to illustrate the bit mapping relationship in the embodiments of this application.

[0232] For example, the modulation mapping rules of QPSK are shown in Table 4 below.

[0233] Table 4

[0234]

[0235] As shown in Table 1, the modulation mapping rule of QPSK in the prior art is: bit "00" is mapped to modulation symbol. Bits "0" and "1" are mapped to modulation symbols Bit "10" is mapped to a modulation symbol Bit "11" is mapped to a modulation symbol

[0236] Since QPSK's modulation mapping rule maps 2 bits to 1 symbol, i.e., the modulation order is 2, the number of bits in the second bit block is 2. Furthermore, based on the aforementioned relationship between N and M, after bit mapping, in every 8 second bit blocks (i.e., N=8), the bit "00" appears 7 times (i.e., M=7). This means that in every 8 modulation symbols after modulation mapping, the modulation symbol... Taking the occurrence 7 times as an example, the mapped 8 bits can represent: "00 00 00 00 00 00 00 01", "00 00 00 00 00 00 00 10", "00 00 00 00 00 00 00 0011", "00 00 00 00 00 00 01 00", "00 00 00 00 00 00 10 00", "00 00 00 00 00 00 11 00"... "01 00 00 0000 00 0000", "10 00 00 00 00 00 00 00", "11 00 00 00 00 00 00 00 Given the 24 states "00", the maximum value of P can be 24 and the minimum value can be 2.

[0237] For example, taking P=4 as an example, the number of bits S in the first target bit block is 2, and the bit mapping relationship can be shown in Table 5 below.

[0238] Table 5

[0239] First bit block First bit block set 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00 00 10 10 00 00 00 00 00 00 00 11 11 00 00 00 00 00 00 01 00

[0240] As shown in Table 5, the bit mapping relationship in this embodiment can be achieved by mapping the first bit block "00" in the bit sequence to the first bit block set "00 00 00 00 00 00 00 01" before modulation mapping, the first bit block "01" to the first bit block set "00 00 00 00 00 00 00 10", the first bit block "10" to the first bit block set "00 00 00 00 00 00 00 11", and the first bit block "11" to the first bit block set "00 0000 00 00 00 01 00". Thus, the probability of bit "00" appearing in the mapped first bit block set is 7 / 8. Furthermore, after the first bit block set is modulated using the QPSK modulation mapping rules shown in Table 4, the modulation symbol... The probability of it occurring is 7 / 8.

[0241] For example, taking P=2 as an example, the number of bits S in the first target bit block is 1, and the bit mapping relationship can be shown in Table 6 below.

[0242] Table 6

[0243] First bit block First bit block set 0 00 00 00 00 00 00 00 01 1 00 00 00 00 00 00 00 10

[0244] As shown in Table 6, the bit mapping relationship in this embodiment can map the first bit block "0" in the bit sequence to the first bit block set "00 00 00 00 00 00 00 01" and the first bit block "1" to the first bit block set "00 00 00 00 00 00 00 10" before modulation mapping. Thus, the probability of bit "00" appearing in the mapped first bit block set is 7 / 8. Furthermore, after the first bit block set is modulated using the QPSK modulation mapping rules shown in Table 4, the modulation symbol... The probability of it occurring is 7 / 8.

[0245] Optionally, the bit sequence may further include a second target bit block, and the method 200 may further include: mapping the second target bit block to a set of second bit blocks, the set of second bit blocks including N second bit blocks, K of the N second bit blocks obtained by mapping the second target bit block are the same, K is greater than the first threshold and less than N.

[0246] Optionally, the values ​​of K and M can be the same or different, and this application embodiment does not limit this.

[0247] Using the mapping method provided in this application, the values ​​of K and M are the same, which can reduce the complexity of the bit mapping relationship; the values ​​of K and M are different, which can flexibly adjust the communication or charging efficiency.

[0248] Optionally, prior to S202, the first communication device may divide the bit sequence into multiple first bit blocks, the multiple first bit blocks including the first target bit block and the second target bit block.

[0249] It should be noted that the above description only uses the example of the bit sequence including the first target bit block and the second target bit block, but the embodiments of this application do not limit this.

[0250] Optionally, the bit sequence may also include other numbers of first bit blocks, and the other first bit blocks may be processed using a similar process to the first target bit block, which will not be elaborated here.

[0251] Optionally, the method 200 may further include: mapping the N second bit blocks to N modulation symbols.

[0252] It should be noted that since M of the N second bit blocks are the same, M of the N modulation symbols obtained by mapping are also the same.

[0253] Optionally, the method 200 may further include: sending the N modulation symbols to a second communication device.

[0254] In one possible implementation, the N modulation symbols can be used for at least one of communication or power charging. For example, the N modulation symbols are used for simultaneous data and power transmission.

[0255] Figure 9 A schematic flowchart of the demapping method 300 provided in an embodiment of this application is shown. Figure 9 As shown, method 300 can be used as follows: Figure 1 or Figure 2 The system 100 shown, and the method 300 may include the following steps S301 to S302. The steps of method 300 will be described in detail below.

[0256] It should be noted that the demapping method 300 is the process corresponding to the mapping method 200 described above. Therefore, the parts not described in detail in method 300 can be referred to the description of the corresponding parts in method 200.

[0257] S301. Obtain at least one set of bit blocks, the at least one set of bit blocks including a first set of bit blocks, the first set of bit blocks including N second bit blocks, M of the N second bit blocks being the same, N being an integer greater than 1, and M being greater than or equal to a first threshold and less than N.

[0258] In one possible implementation, the method 300 can be executed by a second communication device, such as a bit demapping module in the second communication device.

[0259] For example, the second communication device can be as follows: Figure 1 or Figure 2 The second communication device 120 shown.

[0260] For example, the bit demapping module can be as follows: Figure 2 The bit demapping module 127 shown is illustrated.

[0261] For example, the bit demapping module can be located in the physical layer of the communication protocol architecture.

[0262] Optionally, the second communication device may acquire the at least one set of bit blocks in a variety of ways, and the embodiments of this application do not limit this.

[0263] In one possible implementation, taking method 300 as an example, the bit demapping module may receive the at least one set of bit blocks from the second parallel / serial conversion module.

[0264] In another possible implementation, the second communication device can receive N modulation symbols from the first communication device and demap the N modulation symbols into N second bit blocks included in the first bit block set.

[0265] For example, the first threshold can be N-1.

[0266] S302. Demap the first bit block set to the first target bit block.

[0267] Optionally, S302 may include: the second communication device demaps the first bit block set to the first target bit block based on a bit mapping relationship, the bit mapping relationship being used to indicate the correspondence between P first bit blocks and P bit block sets, the P first bit blocks including the first target bit block, the P bit block sets including the first bit block set, and P being an integer greater than 1.

[0268] Optionally, the second communication device may obtain the bit mapping relationship in a variety of ways, and this application embodiment does not limit this.

[0269] In one possible implementation, the second communication device can receive the bit mapping relationship from the first communication device.

[0270] In one possible implementation, the first communication device may be the first communication device 110 in the system 100 described above.

[0271] In another possible implementation, the bit mapping relationship can be preset.

[0272] In another possible implementation, the second communication device can determine the bit mapping relationship based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

[0273] Optionally, the at least one set of bit blocks may further include a second set of bit blocks, the second set of bit blocks including N second bit blocks, K of the N second bit blocks included in the second set of bit blocks being the same, K being greater than the first threshold and less than N, and the method 300 may further include: the second communication device demapping the second set of bit blocks into a second target bit block.

[0274] Optionally, K and M may be equal or unequal, and this application does not limit this.

[0275] Figure 10 A schematic flowchart of a mapping method 400 provided in an embodiment of this application is shown. Figure 10 As shown, method 400 can be used as follows: Figure 1 or Figure 3 The system 100 shown, and the method 400, may include the following steps S401 to S402. The steps of method 400 will be described in detail below.

[0276] S401. Obtain a modulation symbol sequence, which includes a first target modulation symbol block.

[0277] In one possible implementation, the method 400 may be executed by a first communication device, such as a modulation mapping module in the first communication device.

[0278] For example, the first communication device can be as follows: Figure 1 or Figure 3 The first communication device 110 shown is illustrated.

[0279] For example, the modulation mapping module can be as follows: Figure 3 The modulation mapping module 112 shown is shown.

[0280] For example, the modulation mapping module may be located in the physical layer of the communication protocol architecture.

[0281] Optionally, the “modulation symbol sequence” in this application embodiment may also be referred to as the “original modulation symbol sequence”, “modulation symbol stream”, or “modulation symbol string”; the “modulation symbol block” (such as the first target modulation symbol block) in this application embodiment may also be referred to as the “modulation symbol block set”, “modulation symbol block group”, or “modulation symbol block group”. This application embodiment does not limit this.

[0282] Optionally, the first communication device may acquire the modulation symbol sequence in a variety of ways, and the embodiments of this application do not limit this.

[0283] In one possible implementation, taking method 400 as an example, the modulation mapping module can receive the modulation symbol sequence from the constellation mapping module.

[0284] In another possible implementation, the first communication device can acquire a bit sequence and map the bit sequence to the modulation symbol sequence.

[0285] S402. Map the first target modulation symbol block to a first modulation symbol block set, the first modulation symbol block set including N second modulation symbol blocks, wherein M of the N second modulation symbol blocks obtained by mapping the first target modulation symbol block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0286] For example, the first threshold can be N-1.

[0287] Optionally, S402 may include: the first communication device mapping the first target modulation symbol block to the first modulation symbol set based on the modulation symbol mapping relationship, wherein the modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and P first modulation symbol block sets, the P first modulation symbol blocks include the first target modulation symbol block, and the P modulation symbol block sets include the first modulation symbol block sets, where P is an integer greater than 1.

[0288] Optionally, the modulation symbol mapping relationship is determined at least based on P, N, and M.

[0289] Optionally, the value of one or more of P, N or M can be preset or indicated by the first indication information.

[0290] Optionally, P is determined at least based on the number of modulation symbols and the modulation order of the first modulation symbol block.

[0291] For example, taking the number of modulation symbols in the first modulation symbol block as x and the modulation order as y, P = (2 y ) x Both x and y are integers greater than 0.

[0292] Optionally, the second modulation symbol block may include a modulation symbol.

[0293] Optionally, the first modulation symbol block may include at least one modulation symbol.

[0294] It should be noted that the values ​​of N and M are related by the fact that M is as close to N as possible, but less than N. In other words, the goal is to maximize the probability of the same second modulation symbol block appearing among the N second modulation symbol blocks. As a result, since there are different second modulation symbol blocks among the N second modulation symbol blocks, the signal formed by these N second modulation symbol blocks is a non-deterministic signal, which can be used for simultaneous data and energy transmission. In addition, since M of the N second modulation symbol blocks are the same, the signal has less fluctuation (i.e., better stability), which can improve the charging efficiency.

[0295] Optionally, the embodiments of this application do not limit the specific form of the modulation mapping relationship.

[0296] For example, the modulation mapping relationship can be a modulation mapping table.

[0297] Optionally, the first communication device may obtain the modulation mapping relationship in a variety of ways, and the embodiments of this application do not limit this.

[0298] In one possible implementation, the first communication device may receive second indication information from the mapping relationship generation device, the second indication information being used to indicate the modulation mapping relationship.

[0299] In another possible implementation, the modulation mapping relationship can be preset.

[0300] In another possible implementation, the first communication device may determine the modulation mapping relationship based on P, N, and M.

[0301] Optionally, the method 400 may further include: the first communication device sending the modulation mapping relationship to the second communication device.

[0302] In one possible implementation, the second communication device may be the second communication device 110 in the system 100 described above.

[0303] The following uses BPSK as an example to introduce the modulation mapping relationship in the embodiments of this application.

[0304] As shown in Table 1 above, the modulation mapping rule for BPSK in the prior art is: bit "0" is mapped to a modulation symbol. Bit "1" is mapped to a modulation symbol That is, with a modulation order of 1, 2 can be represented by 1 bit. 1 A type of modulation symbol state.

[0305] Furthermore, based on the aforementioned relationship between the values ​​of N and M, the modulation symbols are used in every four second modulation symbol blocks (i.e., N=4) after modulation mapping. The modulation symbol appears 3 times (i.e., M=3). Taking "occurring once" as an example, the four mapped second modulation symbol blocks can be represented as:

[0306]

[0307] and These are the four states.

[0308] For example, taking the first modulation symbol block with a modulation symbol count of 2 and a modulation order of 1 as an example, then P = (2 2 ) 1 =4, and the modulation mapping relationship can be shown in Table 7 below.

[0309] Table 7

[0310]

[0311] As can be seen from Table 7, the modulation mapping relationship in the embodiments of this application can map the first modulation symbol block in the modulation symbol sequence. Mapped to the first set of modulation symbol blocks The first modulation symbol block Mapped to the first set of modulation symbol blocks Thus, the modulation symbols in the first set of modulation symbol blocks after mapping The probability of it occurring is 3 / 4.

[0312] For example, taking the first modulation symbol block with a modulation symbol count of 1 and a modulation order of 1 as an example, then P = (2 1 ) 1 =2 (meaning any two of the above four states can be selected), and the modulation mapping relationship can be shown in Table 8 below.

[0313] Table 8

[0314]

[0315] As can be seen from Table 8, the modulation mapping relationship in the embodiments of this application can map the first modulation symbol block in the modulation symbol sequence. Mapped to the first set of modulation symbol blocks The first modulation symbol block Mapped to the first set of modulation symbol blocks Thus, the modulation symbols in the first set of modulation symbol blocks after modulation mapping The probability of it occurring is 3 / 4.

[0316] The modulation mapping relationship in the embodiments of this application is described below using QPSK as an example.

[0317] As shown in Table 4 above, the modulation mapping rule of QPSK in the prior art is: bit "00" is mapped to modulation symbol. Bits "0" and "1" are mapped to modulation symbols Bit "10" is mapped to a modulation symbol Bit "11" is mapped to a modulation symbol That is, the modulation order is 2, which can be represented by 2 bits. 2 A type of modulation symbol state.

[0318] Furthermore, based on the aforementioned relationship between the values ​​of N and M, the modulation symbols are in every 8 second modulation symbol blocks (i.e., N=8) after modulation mapping. It appears 7 times (i.e., M=7). or Taking a single occurrence as an example, the eight mapped second modulation symbol blocks can represent 3·8 = 24 states, which will not be listed here.

[0319] For example, taking the first modulation symbol block with a modulation symbol count of 1 and a modulation order of 2 as an example, then P = (2 1 )2 =4 (meaning that any 4 states can be selected from the above 24 states), and the modulation mapping relationship can be shown in Table 9 below.

[0320] Table 9

[0321]

[0322]

[0323] As can be seen from Table 9, the modulation mapping relationship in the embodiments of this application can map the first modulation symbol block in the modulation symbol sequence. Mapped to the first set of modulation symbol blocks The first modulation symbol block Mapped to the first set of modulation symbol blocks The first modulation symbol block Mapped to the first set of modulation symbol blocks The first modulation symbol block Mapped to the first set of modulation symbol blocks

[0324]

[0325] Thus, the modulation symbols in the first set of modulation symbol blocks after mapping The probability of it occurring is 7 / 8.

[0326] Optionally, the modulation symbol sequence may further include a second target modulation symbol block, and the method 400 may further include: the first communication device mapping the second target modulation symbol block to a second modulation symbol block set, the second modulation symbol block set including N second modulation symbol blocks, K of the N second modulation symbol blocks obtained by mapping the second target modulation symbol block are the same, K is greater than the first threshold and less than N.

[0327] Optionally, the values ​​of K and M can be the same or different, and this application embodiment does not limit this.

[0328] Optionally, prior to S402, the first communication device may divide the modulation symbol sequence into a plurality of first modulation symbol blocks, the plurality of first modulation symbol blocks including the first target modulation symbol block and the second target modulation symbol block.

[0329] It should be noted that the above description only uses the example of the bit sequence including the first target modulation symbol block and the second target modulation symbol block, but the embodiments of this application do not limit this.

[0330] Optionally, the bit sequence may also include other numbers of first modulation symbol blocks, and the other first modulation symbol blocks may be processed using a similar process to the first target modulation symbol block, which will not be elaborated here.

[0331] Optionally, the method 400 may further include: sending the first set of modulation symbol blocks to a second communication device.

[0332] In one possible implementation, the N second modulation symbol blocks included in the first modulation symbol block set can be used for at least one of communication or power charging. For example, the N second modulation symbol blocks are used for simultaneous data and power transmission.

[0333] Figure 11 A schematic flowchart of the demapping method 500 provided in an embodiment of this application is shown. Figure 11 As shown, this method 500 can be used as follows: Figure 1 or Figure 3 The system 100 shown, the method 500 may include the following steps S501 to S502. The various steps in method 500 will be described in detail below.

[0334] It should be noted that the demapping method 500 is the inverse process of the mapping method 400 described above. Therefore, the parts not described in detail in method 500 can be referred to the corresponding parts in method 400.

[0335] S501. Obtain at least one set of modulation symbol blocks, the at least one set of modulation symbol blocks including a first set of modulation symbol blocks, the first set of modulation symbol blocks including N second modulation symbol blocks, M of the N second modulation symbol blocks being the same, N being an integer greater than 1, and M being greater than or equal to a first threshold and less than N.

[0336] In one possible implementation, the method 200 can be executed by a second communication device, such as a modulation / demapping module in the second communication device.

[0337] For example, the second communication device can be as follows: Figure 1 or Figure 3 The second communication device 120 shown.

[0338] For example, the modulation demapping module can be as follows: Figure 3 The modulation and demapping module 126 shown is illustrated.

[0339] For example, the modulation and demapping module may be located in the physical layer of the communication protocol architecture.

[0340] Optionally, the second communication device may acquire the at least one set of modulation symbol blocks in a variety of ways, and the embodiments of this application do not limit this.

[0341] In one possible implementation, taking method 500 as an example, the modulation and demapping module may receive the at least one set of modulation symbol blocks from the second parallel-to-serial conversion module.

[0342] In another possible implementation, the second communication device can receive N modulation symbols from the first communication device and demap the N modulation symbols into N second bit blocks included in the first bit block set.

[0343] For example, the first threshold can be N-1.

[0344] S502. Demap the N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block.

[0345] Optionally, S502 may include: the second communication device demapping N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block based on the modulation symbol mapping relationship, wherein the modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and the P modulation symbol block set, wherein the P first modulation symbol blocks include the first target modulation symbol block, and the P modulation symbol block set includes the first modulation symbol block set, where P is an integer greater than 1.

[0346] Optionally, the embodiments of this application do not limit the specific form of the modulation mapping relationship.

[0347] For example, the modulation mapping relationship can be a modulation mapping table.

[0348] Optionally, the second communication device may obtain the modulation mapping relationship in various ways, and this application embodiment does not limit this.

[0349] In one possible implementation, the second communication device can receive the modulation mapping relationship from the first communication device.

[0350] In one possible implementation, the first communication device may be the first communication device 110 in the system 100 described above.

[0351] In another possible implementation, the modulation mapping relationship can be preset.

[0352] In another possible implementation, the second communication device can determine the modulation mapping relationship based on P, N, and M.

[0353] Optionally, the at least one modulation symbol block set further includes a second modulation symbol block set, which includes N second modulation symbol blocks, wherein K of the N second modulation symbol blocks included in the second modulation symbol block set are the same, K is greater than the first threshold and less than N, and the method 500 may further include: the second communication device demapping the N second modulation symbol blocks included in the second modulation symbol block set into a second target modulation symbol block.

[0354] Optionally, K and M may be equal or unequal, and this application does not limit this.

[0355] Optionally, the method 500 may include: the second communication device demapping the first target modulation symbol block into a first target bit block.

[0356] The above combination Figures 8 to 11 The mapping and demapping methods provided in the embodiments of this application have been introduced. The communication apparatus provided in the embodiments of this application will be further described below.

[0357] Figure 12 A schematic block diagram of a communication device 600 provided in an embodiment of this application is provided. Figure 8 As shown, the device 600 may include an acquisition unit 601 and a mapping unit 602.

[0358] In one possible implementation, the acquisition unit 601 is used to acquire a bit sequence, the bit sequence including a first target bit block; the mapping unit 602 is used to map the first target bit block into a first bit block set, the first bit block set including N second bit blocks, wherein M of the N second bit blocks obtained by mapping the first target bit block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0359] In another possible implementation, the acquisition unit 601 is used to acquire a modulation symbol sequence, which includes a first target modulation symbol block; the mapping unit 602 is used to map the first target modulation symbol block into a first modulation symbol block set, which includes N second modulation symbol blocks, wherein M of the N second modulation symbol blocks obtained by mapping the first target modulation symbol block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0360] Optionally, the device 600 can be used in the system 100 described above. Further, the device 600 can be used in the first communication device 110 in the system 100, such as a virtual device formed by software executed by the processor or controller on the first communication device 110.

[0361] It should be noted that the information interaction and execution process between the above-mentioned devices are based on the same concept as the embodiments of method 200 or method 400 of this application. Their specific functions and technical effects can be found in the method embodiment section, and will not be repeated here. In an optional example, the device 600 may specifically be the first communication device in the embodiments of method 200 or method 400 above. The device 600 can be used to execute the various processes and / or steps corresponding to the first communication device in the embodiments of method 200 or method 400 above. To avoid repetition, these will not be described again here.

[0362] Figure 12 One or more of the modules in the illustrated embodiments can be implemented by software, hardware, firmware, or a combination thereof. The software or firmware includes, but is not limited to, computer program instructions or code, and can be executed by a hardware processor. The hardware includes, but is not limited to, various integrated circuits such as central processing units (CPUs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs), or application-specific integrated circuits (ASICs).

[0363] Figure 13 A schematic block diagram of a communication device 700 provided in an embodiment of this application is provided. For example... Figure 13 As shown, the device 700 may include a processor 701 and a communication interface 702, the processor 701 and the communication interface 702 being coupled.

[0364] For example, the communication device 700 can be a mapping device.

[0365] In an alternative example, those skilled in the art will understand that the device 700 can be the first communication device in the embodiments of method 200 or method 400 described above, and the device 700 can be the physical hardware structure of the first communication device. The device 700 can be used to execute the various processes and / or steps corresponding to the first communication device in the embodiments of method 200 or method 400 described above, and will not be described again here to avoid repetition.

[0366] The processor 701 in this embodiment may include one or more processing units. Optionally, the processing unit may include, but is not limited to, a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor may be a microprocessor, a microcontroller, or any conventional processor.

[0367] For example, the processor 701 is used to obtain a bit sequence through the communication interface 702, the bit sequence including a first target bit block; and to map the first target bit block into a first bit block set, the first bit block set including N second bit blocks, wherein M of the N second bit blocks obtained by mapping the first target bit block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0368] For example, the processor 701 is used to acquire a modulation symbol sequence through the communication interface 702, the modulation symbol sequence including a first target modulation symbol block; the mapping unit 602 is used to map the first target modulation symbol block into a first modulation symbol block set, the first modulation symbol block set including N second modulation symbol blocks, wherein M of the N second modulation symbol blocks obtained by mapping the first target modulation symbol block are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

[0369] Optionally, the device 700 may also include a memory 703.

[0370] The memory 703 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DRRAM).

[0371] Specifically, memory 703 is used to store program code and instructions of storage device 700. Optionally, memory 703 is also used to store data obtained by processor 701 during the execution of method 200 or method 400 described above, such as bit sequences or modulation symbol sequences.

[0372] Alternatively, the memory 703 may be a separate device or integrated into the processor 701.

[0373] It should be noted that, Figure 13 Only a simplified design of the device 700 is shown. In practical applications, the device 700 may also include other necessary components, including but not limited to any number of communication interfaces, processors, selectors, memories, etc., and all devices 700 that can implement this application are within the protection scope of this application.

[0374] In one possible design, the device 700 can be a chip. Optionally, the chip may further include one or more memories for storing computer-executable instructions. When the chip device is running, the processor can execute the computer-executable instructions stored in the memories to cause the chip to perform the steps performed by the first communication device as described in method 200 or method 400 above.

[0375] Optionally, the chip device can be a field-programmable gate array, a dedicated integrated circuit, a system-on-a-chip, a central processing unit, a network processor, a digital signal processing circuit, a microcontroller, or a programmable controller or other integrated chip to implement the relevant functions.

[0376] Figure 14 A schematic block diagram of a communication device 800 provided in an embodiment of this application is provided. Figure 14 As shown, the device 800 may include an acquisition unit 801 and a demapping unit 802.

[0377] Optionally, the device 800 can be used in the system 100 described above. Further, the device 800 can be used in the second communication device 120 in the system 100, such as a virtual device formed by software executed by a processor or controller on the second communication device 120.

[0378] In one possible implementation, the acquisition unit 801 is used to acquire at least one set of bit blocks, the at least one set of bit blocks including a first set of bit blocks, the first set of bit blocks including N second bit blocks, M of the N second bit blocks being the same, N being an integer greater than 1, M being greater than or equal to a first threshold and less than N; the demapping unit 802 is used to demapping the first set of bit blocks into a first target bit block.

[0379] In another possible implementation, the acquisition unit 801 is used to acquire at least one set of modulation symbol blocks, the at least one set of modulation symbol blocks including a first set of modulation symbol blocks, the first set of modulation symbol blocks including N second modulation symbol blocks, M of the N second modulation symbol blocks being identical, N being an integer greater than 1, and M being greater than or equal to a first threshold and less than N; the demapping unit 802 is used to demapping the N second modulation symbol blocks included in the first set of modulation symbol blocks into a first target modulation symbol block.

[0380] It should be noted that the information interaction and execution process between the above-mentioned devices are based on the same concept as the embodiments of method 300 or method 500 of this application. Their specific functions and technical effects can be found in the method embodiments section, and will not be repeated here. In an optional example, the device 800 may specifically be the second communication device in the embodiments of method 300 or method 500. The device 800 can be used to execute the various processes and / or steps corresponding to the second communication device in the embodiments of method 300 or method 500. To avoid repetition, these will not be described again here.

[0381] Figure 14 One or more of the modules in the illustrated embodiments can be implemented by software, hardware, firmware, or a combination thereof. The software or firmware includes, but is not limited to, computer program instructions or code, and can be executed by a hardware processor. The hardware includes, but is not limited to, various integrated circuits such as CPUs, DSPs, FPGAs, or ASICs.

[0382] Figure 15 A schematic block diagram of a communication device 900 provided in an embodiment of this application is provided. For example... Figure 15 As shown, the device 900 may include a processor 901 and a communication interface 902, the processor 901 and the communication interface 902 being coupled.

[0383] For example, the communication device 900 can be a demapping device.

[0384] In an optional example, those skilled in the art will understand that the device 900 may specifically be the second communication device in the embodiments of method 300 or method 500 described above, and the device 900 may be the physical hardware structure of the second communication device. The device 900 may be used to execute the various processes and / or steps corresponding to the second communication device in the embodiments of method 300 or method 500 described above, and will not be repeated here to avoid repetition.

[0385] The processor 901 in this embodiment may include one or more processing units. Optionally, the processing unit may include, but is not limited to, a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor may be a microprocessor, a microcontroller, or any conventional processor.

[0386] For example, the processor 901 is used to obtain at least one set of bit blocks through the communication interface 902, the at least one set of bit blocks including a first set of bit blocks, the first set of bit blocks including N second bit blocks, M of the N second bit blocks being the same, N being an integer greater than 1, M being greater than or equal to a first threshold and less than N; and demapping the first set of bit blocks into a first target bit block.

[0387] For example, the processor 901 is used to obtain at least one set of modulation symbol blocks through the communication interface 902. The at least one set of modulation symbol blocks includes a first set of modulation symbol blocks, the first set of modulation symbol blocks includes N second modulation symbol blocks, M of the N second modulation symbol blocks are the same, N is an integer greater than 1, M is greater than or equal to a first threshold and less than N; and demaps the N second modulation symbol blocks included in the first set of modulation symbol blocks into a first target modulation symbol block.

[0388] Optionally, the device 900 may also include a memory 903.

[0389] Memory 903 may include volatile memory or non-volatile memory, or both. Non-volatile memory may be ROM, PROM, EPROM, EEPROM, or flash memory. Volatile memory may be RAM, used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as SRAM, DRAM, SDRAM, DDR SDRAM, ESDRAM, SLDRAM, and DR RAM.

[0390] Specifically, memory 903 is used to store program code and instructions of storage device 900. Optionally, memory 903 is also used to store data obtained by processor 901 during the execution of the above-described method 300 or method 500 embodiments, such as at least one set of bit blocks or at least one set of modulation symbol blocks.

[0391] Alternatively, the memory 903 can be a separate device or integrated into the processor 901.

[0392] It should be noted that, Figure 15Only a simplified design of the device 900 is shown. In practical applications, the device 900 may also include other necessary components, including but not limited to any number of communication interfaces, processors, selectors, memories, etc., and all devices 900 that can implement this application are within the protection scope of this application.

[0393] In one possible design, the device 900 can be a chip. Optionally, the chip may further include one or more memories for storing computer-executable instructions. When the chip device is running, the processor can execute the computer-executable instructions stored in the memories to cause the chip to perform the steps performed by the second communication device as described in method 300 or method 500 above.

[0394] Optionally, the chip device can be a field-programmable gate array, a dedicated integrated circuit, a system-on-a-chip, a central processing unit, a network processor, a digital signal processing circuit, a microcontroller, or a programmable controller or other integrated chip to implement the relevant functions.

[0395] For example, taking the communication device (such as a mapping device) provided in the embodiments of this application as an example, the RAN chip may include CU, DU, and RU. CU is used to perform upper layer (layer 2, L2) and L3 functions; DU is used to perform L1 and some L2 functions; RU is used to perform L1 calculation and RF digital part functions. The midhaul and backhaul interfaces are used to carry traffic between CU and DU, and between CU and core network; the fronthaul and backhaul interfaces are used to carry traffic between RU and DU, and between CU and DU.

[0396] For example, an integrated DU may include the functions of the DU and RU described above.

[0397] Optionally, the CU / DU hardware includes a chassis platform, motherboard, peripherals, and cooling system. The motherboard contains processing units, memory, internal I / O interfaces, and external connection ports. Its hardware accelerator is designed with interfaces, and hardware functional components include: storage for software, hardware, and system debugging interfaces, and a single-board management controller.

[0398] Optionally, the DU system is typically implemented using a multi-core processor and one or more hardware accelerators. Parts of the DU protocol stack can be implemented in software running on the multi-core processor, while computationally intensive L1 and L2 functions can be offloaded to an FPGA / GPU-based hardware accelerator; or all L1 functions can be offloaded to an FPGA / GPU-based hardware accelerator, while other protocol stack components are implemented in software running on the processor; or the entire protocol stack can be implemented in software running on the processor. The hardware accelerator supports interconnection with x86 or non-x86 processors. Similarly, the accelerator has a multi-channel PCIe (peripheral component interconnect express) interface pointing to the CPU and external connections via GbE (gigabit Ethernet) connectivity.

[0399] Optionally, the RU may include three parts: OPU (O-RAN Processing Unit), DPU (O-RU Digital Processing Unit), and O-RU radio frequency (RF) processing unit.

[0400] Optionally, the OPU is used to receive eCPRI frames from the O-RAN fronthaul and perform fronthaul interface, the lowest level L1 (encoding, scrambling, modulation, layer mapping, precoding), synchronization, beamforming, and resource unit mapping.

[0401] Alternatively, the OPU can be implemented as a CPU, FPGA, or ASIC.

[0402] Optionally, the DPU is used to perform synchronization, DDC (Digital Down Converter in UL), DUC (Digital Up Converter in DL), CF (Crest Factor Reduction), and digital pre-distortion (DPD) to improve power amplifier efficiency by reducing the peak-to-average power ratio (PAPR) / adjacent channel leakage ratio (ACLR) of the RF front end.

[0403] Alternatively, the DPU can be implemented as an FPGA or an ASIC.

[0404] Optionally, the RF processing unit of the O-RU includes a transceiver module, up / down converter, power amplifier (PA), low noise amplifier (LNA), and Tx / Rx filter. All conversions between the analog and digital domains (such as DAC and ADC) are performed within the transceiver module.

[0405] Optionally, the physical and logical partitions within the RF processing unit do not require specific boundaries.

[0406] This application also provides a computer-readable storage medium storing computer instructions that, when executed on a computer, implement the method described in the above method embodiments.

[0407] This application also provides a computer program product that, when run on a processor, implements the method described in the above method embodiments.

[0408] The communication device, computer-readable storage medium, computer program product, or chip provided in the embodiments of this application are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects described in the corresponding methods provided above, and will not be repeated here.

[0409] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0410] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0411] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0412] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0413] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0414] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0415] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0416] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A mapping method, characterized in that, include: Obtain a bit sequence, the bit sequence including a first target bit block; The first target bit block is mapped to a first bit block set, which includes N second bit blocks. Among the N second bit blocks obtained by mapping the first target bit block, M second bit blocks are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

2. The method according to claim 1, characterized in that, The step of mapping the first target bit block to the first bit block set includes: Based on the bit mapping relationship, the first target bit block is mapped to the first bit block set. The bit mapping relationship is used to indicate the correspondence between P first bit blocks and P bit block sets. The P first bit blocks include the first target bit block, and the P bit block sets include the first bit block set, where P is an integer greater than 1.

3. The method according to claim 2, characterized in that, The bit mapping relationship is determined at least based on the number of bits in the first bit block, the number of bits in the second bit block, N, and M.

4. The method according to claim 2 or 3, characterized in that, The number of bits in the first bit block is determined at least based on P.

5. The method according to any one of claims 1-4, characterized in that, The number of bits in the second bit block is determined at least based on the modulation order.

6. The method according to any one of claims 1-5, characterized in that, The bit sequence further includes a second target bit block, and the method further includes: The second target bit block is mapped to a set of second bit blocks, the set of second bit blocks includes N second bit blocks, K of the N second bit blocks obtained by mapping the second target bit block are the same, K is greater than the first threshold and less than N, and K is not equal to M.

7. The method according to any one of claims 1-6, characterized in that, The method further includes: The N second bit blocks are mapped to N modulation symbols.

8. The method according to claim 7, characterized in that, The N modulation symbols are used for simultaneous digital and energy transmission.

9. A demapping method, characterized in that, include: Obtain at least one set of bit blocks, the at least one set of bit blocks including a first set of bit blocks, the first set of bit blocks including N second bit blocks, M of the N second bit blocks being the same, N being an integer greater than 1, and M being greater than or equal to a first threshold and less than N; Demap the first set of bit blocks to the first target bit block.

10. The method according to claim 9, characterized in that, The step of demapping the first set of bit blocks into the first target bit block includes: Based on the bit mapping relationship, the first bit block set is demapped to the first target bit block. The bit mapping relationship is used to indicate the correspondence between P first bit blocks and P bit block sets. The P first bit blocks include the first target bit block, and the P bit block sets include the first bit block set, where P is an integer greater than 1.

11. The method according to claim 9 or 10, characterized in that, The at least one set of bit blocks further includes a second set of bit blocks, the second set of bit blocks comprising N second bit blocks, wherein K of the N second bit blocks in the second set of bit blocks are identical, K is greater than the first threshold and less than N, and K is not equal to M. The method further includes: Demap the second set of bit blocks to the second target bit block.

12. The method according to any one of claims 9-11, characterized in that, The acquisition of at least one set of bit blocks includes: Obtain N modulation symbols; The N modulation symbols are demapped into N second bit blocks included in the first bit block set.

13. A mapping method, characterized in that, include: Obtain a modulation symbol sequence, the modulation symbol sequence including a first target modulation symbol block; The first target modulation symbol block is mapped to a first modulation symbol block set, which includes N second modulation symbol blocks. Among the N second modulation symbol blocks obtained by mapping the first target modulation symbol block, M second modulation symbol blocks are the same, N is an integer greater than 1, and M is greater than or equal to a first threshold and less than N.

14. The method according to claim 13, characterized in that, The step of mapping the first target modulation symbol block to the first modulation symbol set includes: Based on the modulation symbol mapping relationship, the first target modulation symbol block is mapped to the first modulation symbol set. The modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and P sets of first modulation symbol blocks. The P first modulation symbol blocks include the first target modulation symbol block, and the P sets of modulation symbol blocks include the first modulation symbol block set. P is an integer greater than 1.

15. The method according to claim 14, characterized in that, P is determined at least based on the number of modulation symbols and the modulation order of the first modulation symbol block, and the modulation symbol mapping relationship is determined at least based on P, N, and M.

16. The method according to any one of claims 13-15, characterized in that, The modulation symbol sequence further includes a second target modulation symbol block, and the method further includes: The second target modulation symbol block is mapped to a set of second modulation symbol blocks, which includes N second modulation symbol blocks. K of the N second modulation symbol blocks obtained by mapping the second target modulation symbol block are the same, where K is greater than the first threshold and less than N, and K is not equal to M.

17. The method according to any one of claims 13-16, characterized in that, The acquisition of the modulation symbol sequence includes: Obtain the bit sequence; The bit sequence is mapped to the modulation symbol sequence.

18. The method according to any one of claims 13-17, characterized in that, The N second modulation symbol blocks are used for simultaneous data and energy transmission.

19. A demapping method, characterized in that, include: Obtain at least one set of modulation symbol blocks, the at least one set of modulation symbol blocks including a first set of modulation symbol blocks, the first set of modulation symbol blocks including N second modulation symbol blocks, M of the N second modulation symbol blocks being the same, N being an integer greater than 1, and M being greater than or equal to a first threshold and less than N; Demap the N second modulation symbol blocks included in the first modulation symbol block set to the first target modulation symbol block.

20. The method according to claim 19, characterized in that, The step of demapping the N second modulation symbol blocks included in the first modulation symbol block set into the first target modulation symbol block includes: Based on the modulation symbol mapping relationship, the N second modulation symbol blocks included in the first modulation symbol block set are demapped into the first target modulation symbol block. The modulation symbol mapping relationship is used to indicate the correspondence between P first modulation symbol blocks and P modulation symbol block sets. The P first modulation symbol blocks include the first target modulation symbol block, and the P modulation symbol block sets include the first modulation symbol block sets, where P is an integer greater than 1.

21. The method according to claim 19 or 20, characterized in that, The at least one set of modulation symbol blocks further includes a second set of modulation symbol blocks, the second set of modulation symbol blocks including N second modulation symbol blocks, wherein K of the N second modulation symbol blocks in the second set of modulation symbol blocks are the same, K is greater than the first threshold and less than N, and K is not equal to M. The method further includes: The N second modulation symbol blocks included in the second modulation symbol block set are demapped into the second target modulation symbol block.

22. The method according to any one of claims 19-21, characterized in that, The method further includes: Demap the first target modulation symbol block to the first target bit block.

23. A communication device, characterized in that, The device includes a processor and a communication interface, the processor and the communication interface being coupled, the processor being used to perform the method of any one of claims 1-8; or to perform the method of any one of claims 13-18.

24. A communication device, characterized in that, The device includes a processor and a communication interface, the processor and the communication interface being coupled, the processor being used to perform the method of any one of claims 9-12; or to perform the method of any one of claims 19-22.

25. A computer-readable storage medium, characterized in that, Used to store a computer program, which, when executed by a processor, implements the method as described in any one of claims 1-22.

26. A computer program product, characterized in that, When the computer program product is run on a processor, it implements the method as described in any one of claims 1-22.

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