Image acquisition PCB board for microscopes, imaging system and method

Abstract

The application discloses an image acquisition PCB board for a miniature microscope, an imaging system and a method. The PCB board is a 6-layer rigid-flex board with a size of 11.50mm*83.46mm and a thickness of 0.80mm±10%, and signal integrity is ensured through impedance control (single-ended 50Ω±10%, differential 100Ω±10%) and coplanar layer reference design. The board integrates an AR0830 monochrome sensor, a MAX96793 serializer, an LED driver and a power management circuit, supports 3840*2160@60fps, 1920*1080@30 / 60fps multi-mode acquisition. The system includes a matching adapter board and integrates a deserializer to realize protocol conversion from GMSL3 to MIPI CSI-2, supports connection with an NVIDIA Jetson AGX Orin platform and synchronous input of four cameras. Tests prove that the system supports multi-mode acquisition, can stably realize a nominal frame rate in a 1080P mode, and needs to be combined with Gstreamer h265 coding to realize long-time recording in a 4K mode. The system has the characteristics of miniaturization, low noise and multi-channel synchronous acquisition, and is suitable for biological tissue imaging.

Description

Technical Field

[0001] This invention belongs to the fields of biomedical engineering, electronic hardware, and image processing technology, specifically relating to a high-resolution image acquisition PCB design and its imaging system for a miniscope. The PCB employs rigid-flex PCB technology, integrating a high-speed GMSL3 interface and an image sensor. It is suitable for real-time image acquisition and analysis of living or ex vivo biological tissues, and has significant application value, particularly in neuroscience research and cell microscopy imaging. It can be attached to a miniscope to achieve high signal-to-noise ratio fluorescence imaging. Background Technology

[0002] Miniature microscopes are crucial tools in biomedical research, used to observe tiny tissue or cellular structures. Current image acquisition PCBs often suffer from the following problems:

[0003] First, traditional PCB boards are large in size and difficult to integrate into miniaturized devices such as Miniscope, resulting in excessive overall size and weight of the device, which is not suitable for live animal experiments.

[0004] Secondly, insufficient interface bandwidth (such as the standard MIPI interface) leads to a bottleneck in high-resolution image transmission, making it difficult to achieve real-time acquisition of 4K@60fps.

[0005] Third, it lacks multi-mode support and cannot adapt to the needs of different imaging scenarios (such as high-speed dynamic observation or high-resolution static imaging).

[0006] Fourth, the circuit design is not optimized for impedance matching, resulting in poor signal integrity and introducing noise that affects the quality of fluorescence imaging. The signal-to-noise ratio is usually below 35dB. In particular, impedance mismatch caused by a sudden change in dielectric constant in the transition region between rigid and flexible plates is a recognized problem in the industry.

[0007] Fifth, the heat dissipation design is insufficient, and the LED lighting module is prone to overheating and jamming during long-term operation;

[0008] Sixth, it has poor compatibility with mainstream computing platforms, requires customized complex software drivers, has a long development cycle, and is unstable.

[0009] Modern commercially available circuit boards often only support a single resolution and lack specific optimizations for fluorescence microscopy applications. This invention addresses these bottlenecks, particularly the signal integrity challenges at rigid-flexible interfaces. Through a rigid-flex board structure with specific dielectric constant matching, combined with a GMSL3 high-speed interface, it achieves miniaturization while ensuring stable transmission of high-bandwidth signals under bending conditions. Based on the NVIDIA Jetson AGX Orin platform, through hardware innovation and system-level integration, it achieves miniaturization, multi-mode acquisition, low-noise imaging, and long-term stability. Summary of the Invention

[0010] The purpose of this invention is to provide an image acquisition PCB board, imaging system and method for a miniature microscope, which solves the problems of large PCB board size, single function and poor compatibility in the prior art.

[0011] An image acquisition PCB board for a miniature microscope achieves the following solution through hardware innovation and software collaboration:

[0012] The PCB is a rigid-flex PCB, with differential pair traces using a coplanar layer reference design. The PCB has six layers, with an outer copper thickness of 1.00 oz. The surface treatment is electroless gold, the ink color is matte black, and the silkscreen color is white. The rigid and flexible areas of the PCB use different copper thicknesses. The PCB's stack-up structure includes a TOP layer, GND02 layer, ART03 layer, ART04 layer, GND05 layer, and BOTTOM layer, with a total thickness of 31.49 mil and dimensions of 11.50 mm × 83.46 mm. It is a single-board panel. The PCB integrates a serial interface, monochrome sensor, serializer, digital potentiometer, amplifier, LED driver circuit, and power management circuit; the electronic components on the PCB use a zoned functional layout. The flexible area has a copper thickness of 0.5 oz, and the rigid area has an inner copper thickness of 1.00 oz. The manufacturing process of the PCB board requires that the flexible area be made of FPC material, with a bending angle of 180°, a minimum bending radius of 3.00mm, and a bending life of greater than or equal to 100 cycles.

[0013] Furthermore, the monochrome sensor supports three operating modes: Mode 0: 3840×2160@60fps; Mode 1: 1920×1080@30fps; Mode 2: 1920×1080@60fps.

[0014] The register configurations for Mode 1 and Mode 2 are loaded via the I2C interface, and the configuration parameters are stored in the non-volatile memory of the PCB board. The specific implementations of Mode 1 and Mode 2 are as follows:

[0015] Mode 1 achieves a 30fps frame rate at 1920×1080 resolution by configuring the vertical channel prescaler to 3, the multiplier to 50, setting the pixel clock to 180MHz, the line length to 2916 pixel cycles, the frame length to 2056 lines, and the MIPI interface rate to 450Mbps. Mode 2 achieves a 60fps frame rate at 1920×1080 resolution by configuring the vertical channel prescaler to 3, the multiplier to 100, the pixel clock to 360MHz, the line length to remain at 2916 pixel cycles, the frame length to remain at 2056 lines, and the MIPI interface rate to 900Mbps.

[0016] Furthermore, the PCB board's component functional layout adopts a partitioned design, including a sensor area, a serializer area, an LED driver area, and a power management area. The MIPI differential traces between the sensor area and the serializer area adopt a coplanar layer reference design, with a trace length matching error of less than 5 mil, ensuring the integrity of the high-speed signal output by the sensor during transmission to the serializer. The GMSL3 signal path between the serializer area and the external interface adopts 50Ω impedance control and maintains a 3.2 mil dielectric thickness isolation from adjacent layers. The power management area and the LED driver area are powered through an independent power plane, and a 10 mil wide isolation strip is set at the partition boundary. The power supply path of the LED driver circuit is connected in series with inductors L1 and L2, effectively isolating the interference of GMSL3 high-speed switching noise on the sensor's analog power supply.

[0017] The sensor area includes a monochrome sensor U6 and its peripheral circuitry. The monochrome sensor U6 is connected to the serializer area via a 4-channel MIPI interface. The MIPI interface includes clock pairs MIPI1_CP / CN and data pairs MIPI1_D0P / D0N, D1P / D1N, D2P / D2N, and D3P / D3N, with differential impedance controlled at 100Ω±10%. The monochrome sensor U6 receives configuration commands via the I2C bus CAM_SDA / CAM_SCL and supports external reset signals CAM_RST_N and shutdown control signals XSHUTDOWN. The power supply for the monochrome sensor U6 is provided by the power management area.

[0018] The serializer area includes serializer U2 and its peripheral circuitry. Serializer U2 receives MIPI signals from the sensor area and converts them into GMSL3 high-speed signal outputs, supporting a transmission rate of 12Gbps. The I2C interface of serializer U2 is configured via the CFG0 / CFG1 pins, with a device address of 0x84. Serializer U2 uses VCC 1.2V core power and VCC 1.8V interface power, both provided by the power management area. The GMSL3 output port of serializer U2 needs to be matched with a 50Ω ± 10% single-ended impedance and configured with a 49.9Ω termination resistor.

[0019] The LED driving area includes an LED driving circuit that supports independent control of both blue and yellow-green LEDs. Brightness is adjusted via the I2C signal from the TPL0102 digital potentiometer. The LED driving circuit includes a digital potentiometer U4, LED driver chips U1 and U10, a blue LED device D1, a yellow-green LED device D2, a high-frequency choke inductor L1, and a power inductor L2. The high-frequency choke inductor L1 (560nH) and the power inductor L2 (22μH) in the LED driving circuit have been experimentally verified to provide extremely high noise suppression ratios at the high-speed switching ripple frequency of the GMSL3, playing a crucial role in maintaining system power stability. The digital potentiometer U4 receives host control commands via the I2C bus, and its output is connected to the current setting pins of LED driver chips U1 and U10 respectively. The output channel of LED driver chip U1 drives D1, and the output channel of LED driver chip U10 drives D2. The high-frequency choke inductor L1 is connected in series in the power supply path of U1 and D1, and the power inductor L2 is connected in series in the power supply path of U10 and D2. The power supply voltage of the LED driver circuit is VCC 3.3V, which is provided independently by the power management circuit.

[0020] The power management area includes a multi-voltage domain output power management circuit, which contains power management chips U11, U12, and U13, and multiple low-dropout linear regulators. Enabled by two resistors, it outputs dual voltages of 1.05V and 2.8V, with a maximum current of 500mA. U13 outputs 1.2V, with a maximum current of 500mA. In the power management circuit, U11 receives an external 5V input, while U12 and U13 receive a VCC 3.3V input. After independent voltage regulation by each power management chip, they supply power to the sensor area, serializer area, and LED driver area, respectively. The power rails are filtered by a combination of 2.2μF and 0.1μF ceramic capacitors to ensure that the power ripple is below 30mV.

[0021] Furthermore, the peripheral circuits described in this invention are all existing circuits and are not the core of this invention.

[0022] Furthermore, the present invention also provides an adapter board for use with a PCB board, which integrates a MAX96792 deserializer, a POC power input circuit, a MIPI interface conversion circuit, and a status indicator circuit. The adapter board is connected to the power management circuit on the PCB board via a coaxial cable. The deserializer on the adapter board converts the GMSL3 signal into a MIPI SI-2 signal that can be recognized by the Jetson platform, realizing hardware-level signal adaptation and protocol conversion for synchronous input from four cameras. The adapter board is configured with resistors R9 (5.1K) and R13~R16 (4.7K) to set the I2C address and GMSL3 mode.

[0023] Furthermore, the present invention also provides an image acquisition system for a miniature microscope, the system comprising a PCB board, an adapter board, an NVIDIA Jetson AGX Orin platform, a miniature microscope, and a power module; the PCB board is attached to the miniature microscope through the bending characteristics of a rigid-flex board, and is connected to the NVIDIA Jetson AGX Orin platform via the adapter board; the power module adopts dual power supply of 19V DC and 5V DC, with a measured power ripple of less than 20mV, supports high-resolution imaging, automatic exposure, automatic gain adjustment, and manual parameter setting, and achieves high signal-to-noise ratio and low-noise imaging under fluorescence illumination conditions.

[0024] Furthermore, the present invention also provides an image acquisition method for a miniature microscope, such as... Figure 8 As shown, the specific steps include:

[0025] Step 1, Hardware Connection: Attach the PCB board to the miniature microscope by bending it through the rigid-flex area. Connect the serializer output interface of the PCB board to the adapter board via a coaxial cable. Insert the adapter board into the CSI interface of the NVIDIA Jetson AGX Orin platform.

[0026] Step 2, Software Environment Initialization: Flash the R35.4.1 system (JetPack 5.1.2) on the NVIDIA Jetson AGX Orin platform, load the drivers in sequence, and confirm that the green light on the adapter board is lit as an indication of successful hardware connection after loading;

[0027] Step 3: Multi-mode image acquisition: Real-time preview and multi-channel video stream recovery are performed using the Argus software on the platform. The sensor working mode is selected according to the imaging requirements.

[0028] Its command format is argus_camera --device=X --sensormode=Y, where X∈{0,1,2,3} corresponds to the J1-J4 interface, and Y∈{0,1,2} corresponds to the working mode;

[0029] Alternatively, you can use the V4L2 tool to capture RAW data. The commands include v4l2-ctl --set-fmt-video=width=3840,height=2160,pixelformat=BA10 --stream-mmap --stream-count=N --stream-to=output.raw;

[0030] Alternatively, you can use Gstreamer to record H.265 encoded video. A typical command is: `gst-launch-1.0nvarguscamerasrc sensor-mode=2 ! nvv4l2h265enc insert-vui=1 insert-sps-pps=1idrinterval=15 ! h265parse ! matroskamux streamable=1 ! filesink location=video.mkv`. It supports switching and synchronous acquisition of multiple ports (J1, J2, J3, J4) by modifying the device node ( / dev / videoX). For the 3840×2160@60fps mode, it is recommended to use Gstreamer h265 encoding for stable long-term recording.

[0031] Step 4, Illumination and Control: Adjust the LED brightness (range 0x00~0xFF) and HV892 amplifier parameters via input I2C commands. The AMP value is set in the range of 01h~FFh. The voltage output calculation formula is V_OUT = 9.8 + AMP ×0.205 (V_RMS), and the maximum voltage limit is 62.075V_RMS. This achieves precise control of the fluorescent illumination intensity and focal length. The LED brightness adjustment command follows a three-step process: first disable the shutdown mode, then enable the LED, and finally adjust the brightness.

[0032] Step 5, Post-processing: Use FFmpeg to convert the video format. The command format is ffmpeg -ss START -toEND -i INPUT.mkv -vf "format=gray16le" -compression_algo raw OUTPUT.tiff, or you can use a self-compiled script to achieve multi-channel asynchronous recording and automatic storage.

[0033] Furthermore, the image acquisition method adopts the clock synchronization mechanism of the GMSL3 interface, supports hardware synchronous triggering acquisition of multiple cameras, and can continuously record for 1 hour in three-channel 3840×2160@60fps mode with stable frame rate and no drift, complete file writing, and no freezing phenomenon after 20 power-on and power-off cycles.

[0034] Furthermore, the image acquisition method is applicable to biological tissue imaging, including ex vivo or in vivo clinical samples and animal tissues.

[0035] Furthermore, the signal-to-noise ratio (SNR) testing method is as follows: under fluorescence illumination conditions, fluorescent microspheres and brain slice cell samples are collected. After removing outlier data points, the average SNR is calculated. The test results show that the average SNR of the fluorescent microspheres is 39.65 dB, the average SNR of the brain slice cells is 38.03 dB, and the system PSF (a resolution measurement standard that measures the full width at half maximum (FWHM) of the fluorescent microspheres relative to the microsphere's own dimensions) is 1.089 ± 0.244 μm.

[0036] The beneficial effects of this invention are as follows:

[0037] 1. Miniaturization and high integration: 6-layer rigid-flex board, measuring 11.50mm × 83.46mm, with flexible areas that can be bent 180°, suitable for mounting on curved surfaces of micro microscopes, solving the problem of miniaturization difficulties in traditional PCBs.

[0038] 2. High bandwidth transmission and signal integrity: Integrated 12Gbps GMSL3 interface, impedance control (single-ended 50Ω±10%, differential 100Ω±10%), adopting a coplanar interlayer reference design, differential pair trace length matching error is less than 5mil, ensuring signal integrity in high-resolution image transmission and under bending conditions.

[0039] 3. Multi-mode acquisition adaptation: Supports three modes (native 4K@60fps, 1080p@30fps low power, 1080p@60fps high-speed cropping), which can be automatically switched via I2C to meet different imaging scenarios.

[0040] 4. Power Stability and Noise Suppression: The power management uses a TLV751 series chip for independent power supply, with ripple <30mV. The combination of L1 (560nH) and L2 (22μH) inductors provides an extremely high noise suppression ratio under the high-speed switching of GMSL3.

[0041] 5. System stability: No freezing after 20 power cycles; frame rate fluctuation less than ±2Hz during 1 hour of continuous recording. Stable frame rate during 1 hour of continuous recording with three channels at 4K@60fps; no stuttering during simultaneous recording with four channels.

[0042] 6. High signal-to-noise ratio (SNR) imaging: Fluorescent sphere SNR 39.65 dB, brain slice cell SNR 38.03 dB, system PSF 1.089 ± 0.244 μm. The average SNR after removing outliers in a long-term 910-frame dataset is 38.79 dB. The SNR testing method is as follows: Fluorescent sphere and brain slice cell samples are acquired under fluorescence illumination conditions, and the average SNR is calculated after removing outlier data points.

[0043] 7. Precise Control and Compatibility: LED brightness with 256 levels of I2C adjustment (0x00-0xFF), HV892 focus control accuracy of 0.205V / level. The adapter board integrates a MAX96792 deserializer, compatible with the Jetson AGX Orin platform, and supports 4-channel synchronization. Attached Figure Description

[0044] Figure 1 : PCB board structure diagram, showing the rigid-software integrated layout, component positions and dimensions (11.50mm×83.46mm).

[0045] Figure 2 The circuit block diagram shows the connection relationships of modules such as the AR0830 sensor, MAX96793 serializer, TPL0102 digital potentiometer control circuit, LED driver circuit, and power management circuit.

[0046] Figure 3-1 Serializer area circuit diagram.

[0047] Figure 3-2 Power management area.

[0048] Figure 4 LED driver circuit diagram.

[0049] Figure 5 The sensor area circuit diagram shows the detailed circuit connections of the image sensor U6 (AR0830), including the configuration of the MIPI data transmission interface and the I2C control interface.

[0050] Figure 6: Circuit diagram of the deserializer area.

[0051] Figure 7-1 MIPI interface conversion circuit.

[0052] Figure 7-2 : Adapter board power management circuit.

[0053] Figure 8 Image acquisition software flowchart, including driver installation, Argus, V4L2, Gstreamer toolchain and data processing steps.

[0054] Figure 9 Example of a biological tissue imaging application, showing a high-resolution image of mouse brain tissue acquired using this PCB board.

[0055] Figure 10 The signal-to-noise ratio test data shows that the average signal-to-noise ratio of the fluorescent beads is 39.65dB.

[0056] Figure 11: Overall structural diagram, illustrating the integration of the PCB board into the Miniscope for mouse in vivo imaging. Detailed Implementation

[0057] The invention will now be described in detail with reference to specific implementation examples.

[0058] I. PCB Board Hardware Design

[0059] 1. Innovative rigid-flex PVC panel structure:

[0060] This invention relates to a 6-layer rigid-flex PCB structure, using FPC material for the bending areas and standard PP lamination technology for the rigid areas. The total thickness is 31.49 mil (0.80 mm). Through the stack-up design, the impedance fluctuation of differential pair traces under bending conditions is less than 5%, ensuring the integrity of the 12Gbps GMSL3 signal. The board thickness tolerance is ±10%, and the dimensions are 11.50 mm × 83.46 mm. The stack-up structure includes TOP (1.40 mil), GND02 (1.20 mil), ART03 (0.60 mil), ART04 (0.60 mil), GND05 (1.20 mil), and BOTTOM (1.40 mil) layers. The bending area uses FPC material with a copper thickness of 0.5OZ (1.00oz for the outer layer and 1.00oz for the inner layer in the rigid area), allowing the PCB to bend 180° in a designated area. The minimum bending radius is 3.00mm, and the bending life is ≥100 cycles, perfectly adapting to the curved surface mounting requirements of the Miniscope. This structure solves the impedance mismatch problem caused by material differences in the rigid-flexible transition area. The differential pair trace length matching error is <5mil, and actual testing has verified that the signal integrity meets the design requirements.

[0061] 2. Impedance control and signal integrity design:

[0062] The core function is to ensure the integrity of 12Gbps high-speed signal transmission. A coplanar interlayer reference design is employed. This design uses a coplanar reference structure for the single-ended impedance traces on the TOP and BOTTOM layers. Reference ground planes are placed on both sides of the signal lines, while adjacent GND02 and GND05 layers provide interlayer references, forming a dual reference structure. Single-ended impedance is strictly controlled at 50Ω ± 10% (trace width 10.10mil), and differential impedance is 100Ω ± 10% (trace width / spacing 4.10mil / 4.90mil). The specific implementation of the coplanar interlayer reference design is as follows: continuous ground planes are placed on both sides of the signal lines on the TOP and BOTTOM layers, with the distance from the signal lines strictly controlled within the impedance calculation requirements. Adjacent GND02 and GND05 layers are used as a second reference plane to ensure a stable reference potential even when the PCB is bent, effectively suppressing signal crosstalk and radiated interference. The GMSL3 differential pair trace length matching error is < 5mil. The coplanar interlayer reference design ensures the integrity of the 12Gbps GMSL3 high-speed signal under bending conditions. Even when bent at 180°, the impedance fluctuation can still be controlled within ±5%, which is far better than the ±15% fluctuation range of traditional designs.

[0063] 3. Component integration and partition layout:

[0064] Its core function is to achieve multi-functional integration and electromagnetic compatibility. It employs a partitioned, optimized layout.

[0065] Sensor area: The AR0830 monochrome sensor (model AR0830CSSM11SMKA0-CP-E) is located at the front of the PCB and is connected to the serializer via short, equal-length MIPI traces; such as Figure 5As shown, sensor U6 is packaged in AR0830-ODCSP59-6_4X3_9. Its power supply pins receive VCC 1.05V core voltage, VCC 2.8V analog voltage, and VCC 1.8V digital I / O voltage, respectively. The analog and digital power supplies are filtered by an independent decoupling capacitor network (C7, C10, etc.). U6 outputs image data through a 4-channel MIPI interface, including clock pairs MIPI1_CP / CN (pins B7 / A7) and data pairs MIPI1_D0P / D0N (B9 / A9) to MIPI1_D3P / D3N (B5 / A5). It is configured with I2C bus interfaces CAM_SDA (pin C5) / CAM_SCL (pin C4) for register configuration and supports external reset signal CAM_RST_N (pin D8) and hardware shutdown control signal XSHUTDOWN (pin A2). The MIPI interface between the sensor area and the serializer area... Differential traces also employ a coplanar interlayer reference design to ensure the integrity of the high-speed signal output from the sensor during transmission to the serializer;

[0066] Serializer area: such as Figure 3-1As shown, the MAX96793GTJ / VY+ serializer processes the GMSL3 signal, uses a TQFN32_5X5 package, and integrates clock recovery and equalization functions. U2 receives 4 channels of data and clock signals from the sensor area via the MIPI interface. Its pins D0P / D0N (25 / 26), D1P / D1N (29 / 30), D2P / D2N (23 / 24), D3P / D3N (20 / 21), and CKP / CKN (27 / 28) are respectively connected to the sensor MIPI output. U2 is connected to an external 25MHz crystal oscillator Y1 (ECX-2236Q type), which, together with 15pF load capacitors C111 and C112, forms a Pierce circuit. An oscillation circuit provides a stable system clock for the serializer. The U2's I2C interface connects to the control bus via MFP2 (pin 17, configured as CAM_SDA) and MFP3 (pin 18, configured as CAM_SCL) pins, and the I2C device address is configured to 0x84 via the CFG0 / CFG1 pins (corresponding to MFP0 / MFP1). The U2 uses a VCC 1.2V core power supply (VDD pin) and a VCC 1.8V interface power supply (VDDIO / VDD18 pins). The GMSL3 differential output ports SDON / SDOP (pins 12 / 13) must be strictly matched to a 50Ω ± 10% single-ended impedance, and configured with a 49.9Ω termination resistor R9 and a 0.1μF coupling capacitor C17. The PCB layout requires C17 and connector J2 to be as close as possible to the U2 chip to reduce signal stub. The GMSL3 signal path between the serializer area and the external interface uses a 50Ω impedance control and maintains a 3.2mil distance from adjacent layers. For dielectric thickness isolation, a coplanar interlayer reference design is also adopted;

[0067] LED driving area: such as Figure 4As shown, the main drive channel is implemented by U1 (LTC3218EDDB#PBF), and the backup drive channel is implemented by U10 (LTC3218EDDB#PBF). Both channels achieve 256 levels of brightness adjustment through the TPL0102-100RUCR digital potentiometer U4. U4 receives host control commands via the I2C bus (SDA / SCL), and its two output terminals WA and WB are connected to the ISET current setting pins (pin 6) of U1 and U10 respectively via resistors R11 (10.2KΩ) and R174 (10.2KΩ). The output channel of U1 (ILED pin, pin 3) drives the blue LED device D1 (model LXZ1-PB01), and the backup drive channel of U10... The output channel drives the yellow-green LED device D2 (model LXZ1-PX01); a high-frequency choke inductor L1 (PFL1005-561, 560nH) is connected in series in the power supply path of U1 and D1, and a power inductor L2 (1210POC-223MRC, 22μH) is connected in series in the power supply path of U10 and D2. The specific inductance values ​​of L1 and L2 form an LC filter network, which effectively suppresses the high-frequency ripple generated by the high-speed switching of GMSL3 from coupling to the power plane; the LED driver circuit uses VCC 3.3V independent power supply, and the input terminal is equipped with 2.2μF filter capacitors (C28, C76) and enable control resistors (R10, R173, 10KΩ) to ensure driving stability;

[0068] Power management area: such as Figure 3-2As shown, a multi-chip collaborative architecture is used to achieve multi-voltage domain power supply. Among them, the TLV751180330PDSQR chip U11 provides dual outputs of 1.8V and 3.3V. The input terminal receives an external 5V power supply (VCC5V), which is regulated by the internal LDO and outputs VCC1.8V through the OUT1 pin (pin 10) and VCC3.3V through the OUT2 pin (pin 8). The maximum load capacity is 500mA. Both the input and output terminals are equipped with 1μF ceramic filter capacitors (C3, C4, C5, C39). The TLV75101PDSQR chip U12 controls the two enable channels through resistors R191 (OR) and R192 (OR) respectively. The input VCC3.3V is fed through the feedback network R193 (10KΩ) / R194 (11KΩ) and R195 (45). After voltage division by R196 (11KΩ) and R3KΩ, the output provides dual voltages of VCC 1.05V (1V05) and VCC 2.8V (2V8A), with a maximum current of 500mA. A 1μF capacitor (C116, C117) is configured at the input, and a 1μF capacitor (C118, C119) is configured at the output. The NCP177AMX120TCG chip U13 receives a VCC input of 3.3V. With the enable pin shorted to the input, it outputs a VCC 1.2V (1V2) voltage with a maximum current of 500mA. An input capacitor C44 (1μF) and an output capacitor C41 (1μF) are configured. Each power management chip is independently regulated and powered independently by a TLV751 series chip. The power rails are filtered by a combination of 2.2μF and 0.1μF ceramic capacitors to ensure power ripple is below 30mV.

[0069] Key component characteristics: The specific combination of inductance values ​​of the high-frequency choke inductor (560nH) and the power inductor (22μH), verified by simulation and actual measurement, can provide an extremely high noise suppression ratio at a specific ripple frequency generated by the high-speed switching of GMSL3. This specific value is crucial to the stability of the system power supply.

[0070] 4. Development of matching adapter boards:

[0071] Its core function is to solve the industry problem of incompatibility between GMSL3 signals and standard computing platforms. The accompanying design includes the FV-MAX96792-IPX-DESER adapter board, such as... Figure 6 , Figure 7-1 and Figure 7-2 As shown, the adapter board integrates a MAX96792AGTM / VY+ deserializer, a POC power input circuit, a MIPI interface conversion circuit, and a status indicator circuit. It is connected to the power management circuit on the PCB board via a coaxial cable to convert the GMSL3 signal into a MIPI CSI-2 signal that can be recognized by the Jetson platform, thereby realizing hardware-level signal adaptation and protocol conversion for synchronous input from four cameras.

[0072] like Figure 6 As shown, the deserializer area mainly includes deserializer U1 and its peripheral circuitry. U1 is model MAX96792AGTM / VY+, packaged in a TQFN40_5X5 package. U1 receives a GMSL3 high-speed signal from the PCB board via a coaxial input port, supporting a transmission rate of 12Gbps, and converts it into two MIPI channels. CSI-2 signal output; the MIPI interface includes clock pairs MIPI1_CP / CN, MIPI2_CP / CN and data pairs MIPI1_D0P / D0N~D3P / D3N, MIPI2_D0P / D0N~D3P / D3N, with differential impedance controlled at 100Ω±10%; U1 receives configuration commands via the I2C bus CMOS_SDA / CMOS_SCL and supports the external reset signal CMOS1_RST; the power supply of U1 includes VCC1.2V core voltage, VCC1.8V analog voltage and VCC1.8V interface voltage, all provided by the power management circuit of the adapter board; U1 is connected to an external 25MHz crystal oscillator Y1 to provide the system clock, and is configured with 15pF load capacitors C12 and C13.

[0073] like Figure 6 As shown, the POC power input circuit includes a POC power interface J3, a filter inductor network, and a protection circuit; J3 is a 3.5mm pitch connector that receives an external 12V power input; the filter inductor network includes eight inductors L1 to L8, of which L1, L2, L5, and L6 are PFL1609-471 (470Ω@100MHz), L3 and L7 are 1210POC-682 (680Ω@100MHz), and L4 and L8 are MSS613. 2T-223 (22μH); The inductor network achieves power purification through multi-stage LC filtering (with capacitors C18~C23, C50~C53, with capacitance values ​​including 0.1μF / 25V, 10μF / 25V, and 0.01μF), and provides stable remote power supply to the PCB board through coaxial connectors J1 and J2 (FA1-NARP-PCB-8); The protection circuit includes transient suppression diode B2 (RON7R21357) and voltage divider resistors R8, R30, and R32.

[0074] like Figure 6As shown, the status indication circuit includes a green LED D1 (model LTST-C191KGKT) and its driving transistor Q3 (model BSS138W-7-F); the anode of D1 is connected to VCC3.3V through a current-limiting resistor R46 (1.5KΩ), and the cathode is connected to the drain of Q3; the gate of Q3 is connected to the MFP0 control signal through a resistor R42 (22Ω), and the source is grounded through a resistor R43 (100KΩ); when the GMSL3 link is established normally, the MFP0 outputs a high level to drive Q3 to conduct, lighting up the green LED and realizing a visual indication of the link status.

[0075] like Figure 7-1 As shown, the MIPI interface conversion circuit mainly includes two I-PEX 0.4mm pitch connectors J4 and J5 (model 20525-030E-02) to convert the MIPI signal output by the deserializer to the Jetson platform; J4 corresponds to the MIPI1 interface, and J5 corresponds to the MIPI2 interface; the connector has 38 pins, supports 4-channel MIPI CSI-2 data pairs and differential clock pairs, and integrates an I2C bus (CMOS_SDA, CMOS_SCL, pulled up to VCC 1.8V via R9 and R10 4.7KΩ), a reset signal (CMOS1_RST), and multi-function control signals (MFP0~MFP6); the adapter board sets the deserializer I2C address to 0x50 and GMSL3 input mode by configuring resistors R13~R16 (4.7KΩ) and R9 (5.1KΩ).

[0076] like Figure 7-2As shown, the power management circuit of the adapter board includes two DC-DC step-down converters, U2 and U3, both model RT8016GQW, in SOT23-6 package. U2 has an input VCC of 3.3V, controlled by the enable terminal EN, and an output VCC of 1.2V with a maximum current of 1A. The feedback network consists of R34 (150KΩ) and R36 (150KΩ, 1%). U3 has an input VCC of 3.3V, an output VCC of 1.8V, and a maximum current of 1A. The feedback network consists of R35 (300KΩ) and R37 (300KΩ, 1%). The power management circuit also includes input filter capacitors (C42~C47, including 4.7μF and 0.1μF) and output filter capacitors (C44, C45, C48, C49, including 10μF and 0.1μF) to ensure that the power ripple is below 50mV. This adapter board supports simultaneous input from four cameras (J1~J4 interfaces, using FAKRA and IPEX connectors), achieving register-level control via the I2C interface (device address 0x50). An onboard green LED indicates the link status. Power is supplied via a 12V POC coaxial power supply, with a built-in RT8016GQW DC-DC circuit generating multiple voltage domains of 1.2V / 1.8V / 3.3V, providing a load capacity of up to 1000mA. Configuration pins CFG0 / CFG1 enable address expansion and function multiplexing, while the reset signal CMOS1_RST ensures reliable initialization. The adapter board's output interface perfectly matches the Jetson AGX Orin's CSI interface, supporting four independent or simultaneous acquisition channels with a stable frame rate of 60fps. Real-world testing verified no freezing after 20 power-on / off cycles, frame rate fluctuation ≤ ±2Hz during one hour of continuous recording, and smooth four-channel simultaneous image output.

[0077] II. Imaging Systems and Methods

[0078] 1. System Composition:

[0079] The imaging system includes: the PCB board of this invention, an adapter board, a commercially available NVIDIA Jetson AGX Orin platform (R35.4.1 system), a miniature microscope optical module, a 19V / 5V DC power supply module, and a graphene heat sink. The system achieves high-performance imaging through hardware and software collaboration.

[0080] 2. Software environment initialization:

[0081] Its core function is to ensure long-term stable system operation. After flashing the R35.4.1 image, load the drivers in sequence (first sudo insmod max929x.ko, then sudo insmod ar0830.ko). After loading, ensure the green light on the adapter board is lit. Actual testing verified that there were no freezes after 20 consecutive power cycles, and the frame rate fluctuation during 1 hour of continuous recording was ≤±2Hz, meeting long-term stability requirements.

[0082] 3. Multi-mode acquisition method:

[0083] Its core function is to adapt to the needs of different imaging scenarios. It supports three acquisition modes:

[0084] Mode 0: 3840×2160@60fps, suitable for high-resolution dynamic imaging;

[0085] Mode 1: 1920×1080@30fps, suitable for low-power observation;

[0086] Mode 2: 1920×1080@60fps, suitable for high-speed dynamic cropping of the field of view imaging.

[0087] By modifying the device nodes ( / dev / video0~3), four cameras can be used for independent or synchronous acquisition, with different exposure times and gains set for each channel. Hardware development and testing reports have verified that continuous recording for one hour in 3840×2160@60fps mode on three channels maintained a stable frame rate without drift, and the files were written completely.

[0088] 4. Lighting and control methods:

[0089] Its core function is to achieve precise control of fluorescent illumination intensity and focal length. LED brightness adjustment uses I2C commands and follows this process:

[0090] LED D1 (Blue Light):

[0091] `i2ctransfer -y -f 30 w2@0x50 0x10 0x40` / / Disable shutdown mode

[0092] i2ctransfer -y -f 30 w3@0x42 0x02 0xc7 0x90 / / Turn on LED1

[0093] i2ctransfer -y -f 30 w2@0x50 0x01 0x40 / / Adjust brightness (the last number "0x40" controls the brightness, 0x00 is the brightest, and 0xFF is the darkest)

[0094] i2ctransfer -y -f 30 w3@0x42 0x02 0xc7 0x80 / / Turn off LED1

[0095] LED D2 (yellow-green light):

[0096] `i2ctransfer -y -f 30 w2@0x50 0x10 0x40` / / Disable shutdown mode

[0097] i2ctransfer -y -f 30 w3@0x42 0x02 0xd3 0x90 / / Turn on LED2

[0098] i2ctransfer -y -f 30 w2@0x50 0x00 0x80 / / Adjust brightness (the middle number "0x00" controls the brightness, 0x00 is the brightest, 0xFF is the darkest)

[0099] i2ctransfer -y -f 30 w3@0x42 0x02 0xd3 0x80 / / Turn off LED2

[0100] The brightness setting range of 0x00~0x40 can balance the lighting intensity and heat dissipation requirements. It is combined with a graphene heat sink attached to the heat-generating area of ​​the PCB and connected to a metal heat-conducting pillar. In actual testing, after working continuously for 1 hour in 4K@60fps mode, the temperature rise ΔT of the sensor area was less than 15℃, avoiding image quality degradation caused by thermal noise.

[0101] 5. Heat dissipation optimization methods:

[0102] A graphene thermally conductive patch is attached to the heat-generating area of ​​the PCB, with one end connected to a metal heat sink. The LED brightness should not be maintained at 0x00 for extended periods; it is recommended to keep it around 0x10 (lower values ​​indicate higher brightness). The graphene patch needs to be cut into long strips and wrapped around the heat source to ensure full contact. In actual testing, this solution operated continuously for one hour in 4K@60fps mode without any overheating or freezing.

[0103] Example 1: Manufacturing and Testing of PCB Board and Adapter Board

[0104] PCB manufacturing and testing

[0105] The PCB board of this invention adopts a rigid-flex PCB process, with 6 layers and a thickness of 0.80mm (tolerance ±10%). The FPC area has a copper thickness of 0.5oz, a bending cycle of ≥100 times, a bending angle of 180°, and a minimum bending radius of 3.00mm. The manufacturing process includes: lamination (core board thickness 0.60mil, PP layer 3.20mil), and impedance control is achieved through linewidth adjustment. The layer stack structure strictly follows the board manufacturing instructions: TOP layer 1.40mil, GND02 layer 1.20mil, ART03 layer 0.60mil, ART04 layer 0.60mil, GND05 layer 1.20mil, BOTTOM layer 1.40mil, with a total thickness of 31.49mil (0.80mm). Matte black ink is used, and white screen printing is used to ensure clear markings and reduce glare. The actual structural layout of the PCB board is as follows. Figure 1As shown, its combination of rigid and flexible design and dimensions of 11.50mm × 83.46mm can be used to visually verify the manufacturing precision.

[0106] Component soldering: Refer to the FV-AR0830-GMSL3-ZJU V1.0 BOM table and solder the following key components: sensor U6 (AR0830CSSM11SMKA0-CP-E, in AR0830-ODCSP59-6_4X3_9 package), serializer U2 (MAX96793GTJ / VY+, in TQFN32_5X5 package), digital potentiometer U4 (TPL0102-100RUCR), LED driver chips U1 and U10 (LTC3218EDDB#PBF), blue LED D1 (LXZ1-PB01), yellow-green LED D2 (LXZ1-PX01), high-frequency choke inductor L1 (PFL1005-561, 560nH), and power inductor L2 (1210POC-223MRC, 22μH). Special attention must be paid to the following during soldering: The high-frequency choke inductor L1 and power inductor L2 are specific selections and cannot be substituted. They must be connected in series in the power supply circuits of U1-D1 and U10-D2 respectively; the 25MHz crystal Y1 and load capacitors C111 and C112 (15pF) connected to the serializer U2 must be placed close to pins 8 / 9 of the chip; the 49.9Ω matching resistor R9 and coupling capacitor C17 at the GMSL3 output of U2 must be close to pins 12 / 13 and maintain the shortest possible trace distance from the coaxial connector J2. The circuit block diagram is as follows. Figure 2 As shown, the circuit adopts a modular hierarchical connection architecture. The core connection relationships and soldering layout guidelines are as follows:

[0107] 1. Power supply link and serializer hub: such as Figure 3-2 As shown, the main power supply regulator module U11 (TLV751180330PDSQR) serves as the core of the system power supply. It connects to a 5V power supply via an external interface and outputs VCC1.8V and VCC3.3V. The secondary regulator modules U12 (TLV75101PDSQR) and U13 (NCP177AMX120TCG) further output multiple precise voltages. U12 is enabled by resistors R191 and R192, outputting 1.05V and 2.8V respectively, while U13 outputs 1.2V to power various functional units. The serializer U2 (MAX96793) serves as the connection core, coordinating data transmission and module control. Figure 3-1As shown, this page presents detailed circuit details of the serializer and power module, including the connection of the 25MHz crystal oscillator Y1 to the XTALIN_25M and XTALOUT_25M pins, as well as the connection relationship of the MIPI1_CP / CN clock pair and the MIPI1_D0P / D0N~D3P / D3N data pair, providing a precise reference for the routing and layout of the two during soldering.

[0108] 2. LED Control and Driver Module Connection: The LED control module (including digital potentiometer U4, LED driver chips U1 and U10) receives I2C commands from the main controller. The WA pin of U4 is connected to the ISET pin of U1 via R11, and the WB pin is connected to the ISET pin of U10 via R174, realizing the brightness adjustment of LEDs D1 and D2. The ILED pins of U1 and U10 are connected to D1 and D2 respectively through inductors L1 and L2; Figure 4 As shown in the figure, the wiring relationship of U1, U10, U4, D1, D2 and inductors L1 and L2 is clearly defined. In particular, the topology of L1 being connected in series between U1 and D1 and L2 being connected in series between U10 and D2 must be strictly followed during soldering to ensure that the high-frequency noise suppression function is normal.

[0109] 3. Image Sensor Connection: Image sensor U6 (AR0830) is connected to serializer U2 via short-pitch, equal-length MIPI traces. Specifically, the MIPI1_D0P / D0N~D3P / D3N and MIPI1_CP / CN pins of U6 are connected to the D0P / D0N~D3P / D3N and CKP / CKN pins of U2, respectively, with differential impedance controlled at 100Ω±10%. The I2C interfaces CAM_SDA / CAM_SCL of U6 are connected to the MFP2 / MFP3 pins of U2. The reset signal CAM_RST_N is connected to the network near the XRES pin of U2, and the shutdown signal XSHUTDOWN is independently output. The power supply pins of U6 are connected to VCC1.05V (core), VCC2.8V (analog), and VCC1.8V (I / O) respectively, enabling high-speed image data transmission, such as... Figure 5 As shown in the diagram, the specific configuration of the MIPI pins B5-B9 / A5-A9, I2C pins C4 / C5, reset pin D8, and shutdown pin A2 of U6 is marked. When soldering, it is necessary to ensure that the interface is firmly soldered. The decoupling capacitors of each power domain (such as C7, C10, etc.) should be placed close to the power pins of the chip, and the traces should conform to the coplanar interlayer reference design requirements.

[0110] The welding layout should follow the principle of "centralized layout of power modules to reduce power interference, central placement of serializer U2 as the connection hub to shorten signal transmission paths, and functional modules arranged around serializer U2," combined with... Figure 3-1 , Figure 3-2 , Figure 4, Figure 5 The circuit details ensure that the input and output capacitors of each power chip (such as C3 / C4 / C5 / C39 of U11, C116 / C117 / C118 / C119 of U12, and C41 / C44 of U13) are close to the chip pins. The layout of the high-frequency choke inductor L1 and the power inductor L2 meets the requirements of high-frequency signal and power transmission. The serializer crystal Y1 is close to pins 8 / 9 to avoid signal interference affecting system performance.

[0111] Adapter board assembly soldering: Refer to the adapter board BOM (Bill of Materials) to solder the key components: Deserializer U1 (MAX96792AGTM / VY+), Power Management Chip U2 (RT8016GQW), U3 (RT8016GQW), and LED D1 (green). Special attention must be paid to the layout of the Power Management Chip and Deserializer during soldering to ensure proper power and signal paths. The circuit principle and soldering layout guidelines are as follows:

[0112] 1. Power supply link and deserializer hub: such as Figure 6 As shown, the main power supply is connected to the 12V power supply through the POC power interface J3. After multi-stage LC filtering by the filter inductor network L1~L8 and capacitors C18~C23 and C50~C53, it provides stable remote power to the PCB board through coaxial connectors J1 and J2 (FA1-NARP-PCB-8). At the same time, the 12V input is processed by the protection circuit (transient suppression diode B2 and voltage divider resistors R8, R30, R32) to become the POC power supply. The deserializer U1 (MAX96792AGTM / VY+, in TQFN40_5X5 package) serves as the connection core, receiving the GMSL3 high-speed signal from the PCB board through the coaxial input port, supporting a transmission rate of 12Gbps, and converting it into two MIPI channels. CSI-2 signal output; the MIPI interface includes clock pairs MIPI1_CP / CN, MIPI2_CP / CN and data pairs MIPI1_D0P / D0N~D3P / D3N, MIPI2_D0P / D0N~D3P / D3N, with differential impedance controlled at 100Ω±10%; U1 is connected to an external 25MHz crystal oscillator Y1 and 15pF load capacitors C12 and C13 to provide the system clock, receives configuration commands through the I2C bus CMOS_SDA / CMOS_SCL, and supports the external reset signal CMOS1_RST; the power supply VCC1.2V core voltage, VCC1.8V analog voltage, and interface voltage of U1 are all provided by the adapter board power management circuit.

[0113] 2. Status indicators and interface connections: such as Figure 6As shown, the status indication circuit includes a green LED D1 (LTST-C191KGKT) and its driving transistor Q3 (BSS138W-7-F). The anode of D1 is connected to VCC 3.3V through a current-limiting resistor R46 (1.5KΩ), the cathode is connected to the drain of Q3, the gate of Q3 is connected to the MFP0 control signal through a resistor R42 (22Ω), and the source is grounded through a resistor R43 (100KΩ). When the GMSL3 link is established normally, the MFP0 outputs a high level to drive Q3 to conduct, realizing a visual indication of the link status; as Figure 7-1 As shown, the adapter board connects to the Jetson platform's MIPI CSI-2 signal via I-PEX 0.4mm pitch connectors J4 and J5 (model 20525-030E-02). J4 corresponds to the MIPI1 interface, and J5 corresponds to the MIPI2 interface. The connector has 38 pins, supports 4-channel MIPI CSI-2 data pairs and differential clock pairs, and integrates an I2C bus (CMOS_SDA, CMOS_SCL, pulled up to VCC 1.8V via R9 and R10 4.7KΩ), a reset signal (CMOS1_RST), and multi-function control signals (MFP0~MFP6). The adapter board sets the deserializer I2C address to 0x50 and GMSL3 input mode by configuring resistors R13~R16 (4.7KΩ) and R9 (5.1KΩ).

[0114] 3. Adapter board power management circuit: such as Figure 7-2 As shown, the power management circuit includes two DC-DC buck converters, U2 and U3, both model RT8016GQW, packaged in SOT23-6. U2 has an input VCC of 3.3V, controlled by the enable terminal EN, and an output VCC of 1.2V with a maximum current of 1A. Its feedback network consists of R34 (150KΩ) and R36 (150KΩ, 1%). U3 has an input VCC of 3.3V, an output VCC of 1.8V, and a maximum current of 1A. Its feedback network consists of R35 (300KΩ) and R37 (300KΩ, 1%). The power management circuit also includes input filter capacitors (C42~C47, including 4.7μF and 0.1μF) and output filter capacitors (C44, C45, C48, C49, including 10μF and 0.1μF) to ensure that the power ripple is below 50mV, which power the deserializer U1 and the interface circuit, respectively.

[0115] The welding layout should follow the principle of "centralized layout of power modules to reduce power interference, and central placement of deserializer U1 as the connection hub to shorten the signal transmission path". Combined with the circuit details in Figures 6 and 7, ensure that the power and signal paths are reasonable and avoid signal interference affecting system performance.

[0116] PCB Board and Adapter Board Function Verification: The performance of the PCB board and adapter board was verified through the following tests: The nvgstcapture-1.0 command was used to test image output, ensuring normal image preview; the Argus test was run to verify multiple video streams; and a V4L2 RAW capture test was performed to check frame rate stability. Test results show that the PCB board and adapter board meet the performance standards. Recording at 3840×2160@60Hz and 1920×1080@60fps for 1-3 channels both meet acceptance requirements, with stable frame rates and no frame drops. No freezing occurred after 20 power-on / off tests, and the frame rate fluctuation during 1 hour of continuous recording was ≤±2Hz.

[0117] Example 2: Imaging System Setup and Imaging

[0118] Try the following hardware connection:

[0119] Connect the PCB board described in this invention to the Jetson AGX Orin platform via an adapter board. Power is supplied using 19VDC (host) and 5VDC (camera), and the monitor is connected via HDMI. Ensure the adapter board's green indicator light is on; otherwise, check the connections of cables such as the GMSL3 coaxial cable.

[0120] Graphene heat sinks can be cut into long strips and wrapped around the most heat-generating area of ​​the PCB, connected to external wiring points, and the remaining part can be attached to metal pillars to enhance heat dissipation. If the power is low, an additional graphene heat dissipation solution may not be necessary.

[0121] The software deployment process is shown in Figure 8, and includes:

[0122] System flashing: Download the R35.4.1 image from the NVIDIA website and flash it to the Orin platform using the flash command;

[0123] Driver installation: Copy the binary files (Image and dtb) to the / boot directory, and load the drivers in order. Max929x.ko must be loaded first, followed by ar0830.ko.

[0124] Software installation: Install Argus Multimedia API, V4L2 tools, and Gstreamer plugin. The image acquisition software flowchart is as follows: Figure 4 As shown, the complete process from driver installation to data processing is intuitively demonstrated.

[0125] Imaging Operation: Real-time Preview: Run `argus_camera --device=0 --sensormode=0` to view 3840×2160@60fps video. Alternatively, you can choose the Gstreamer framework for real-time preview and recording.

[0126] RAW data capture: Use v4l2-ctl --set-fmt-video=width=3840,height=2160 --stream-mmap --stream-count=500 --stream-to=output.raw;

[0127] Video recording: Recording is done via gst-launch-1.0 nvarguscamerasrc sensor-mode=2 !nvv4l2h265enc !filesink location=video.mkv. Previewing and recording of multiple simultaneous video streams can also be achieved using a .sh script.

[0128] Post-processing: Use Ffmpeg to perform subsequent operations such as video format conversion.

[0129] Control functions: Focus and brightness can be controlled separately by adjusting the LED and HV892 amplifier via I2C. The AMP value setting must follow the formula V_OUT = 9.8 + AMP × 0.205 and be strictly controlled below 62.075V_RMS.

[0130] Example 3: Application of biological tissue imaging

[0131] Sample preparation: Obtain mouse brain tissue specimens (after fixation).

[0132] Imaging process: A PCB board is integrated into a miniature microscope for tissue image acquisition. Argus software is used to set relevant preview parameters and adjust the gain range to ensure the image is not overexposed. An example of biological tissue imaging is shown below. Figure 9 As shown, high-resolution images of mouse brain tissue are presented, validating the system's imaging clarity. The average signal-to-noise ratio of the fluorescent spheres was verified to be 39.65 dB. Figure 10 As shown, the average signal-to-noise ratio (SNR) of brain slice cells reached 38.03 dB, and the system's PSF measurement result was 1.089 ± 0.244 μm, both significantly better than the previous system. The SNR test data for fluorescent microspheres are shown in the figure below. Figure 10 As shown, it intuitively supports the signal-to-noise ratio metric.

[0133] Results Analysis: The acquired images showed no screen distortion or cracking issues, and the mouse brain tissue specimens were clearly imaged, with cells distinguishable to the naked eye. In the long-term recording test (910 frames), after removing 8.35% of outlier data points, the average SNR was 38.79 dB, reflecting the system's good long-term stability.

[0134] Example 4: Adapter Board Function Verification

[0135] The adapter board integrates a MAX96792 deserializer, supporting the conversion of four GMSL3 inputs to MIPI CSI-2 outputs. During testing, four PCBs were connected to interfaces J1-J4 of the adapter board; a green LED indicated good contact. Simultaneous image output across the four channels was verified sequentially using `argus_camera --device=0~3`, with a stable frame rate of 60fps and no stuttering. A schematic diagram of the overall structure is shown below. Figure 11 The diagram illustrates the integration of the PCB board into the Miniscope for liveness imaging, demonstrating system compatibility. No freezing occurred during 20 power-on / off cycles, and no abnormalities were observed during one hour of recording.

[0136] Through the above-described embodiments, this invention demonstrates the high efficiency and reliability of PCB boards in microscopic imaging. Those skilled in the art can adjust parameters (such as resolution mode) as needed without departing from the scope of this invention.

[0137] Any equivalent substitutions based on the design principles of this invention should be included: adjustments to the PCB stack-up structure and impedance parameters; pin-to-pin compatible replacements for the core chip; expansion of LED wavelength and quantity; changes to the adapter board interface (such as changing to PCIe), but the protocol conversion function from GMSL3 to MIPI must be retained; and process optimization of the number of bends and angles.

[0138] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the claims of this application.

[0139] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. An image acquisition PCB board for a micro microscope, characterized in that, The PCB board is a rigid-flex board, and the differential pair traces adopt a coplanar layer reference design. The PCB board has 6 layers, with an outer copper layer thickness of 1.00oz, a surface treatment of electroless gold, a matte black ink color, and a white silkscreen color. The rigid and flexible areas of the PCB board use different copper thicknesses; The PCB board has a stacked structure including a TOP layer, a GND02 layer, an ART03 layer, an ART04 layer, a GND05 layer, and a BOTTOM layer, with a total thickness of 31.49 mil and dimensions of 11.50 mm × 83.46 mm. The board is a single board. The PCB board integrates a serial interface, a monochrome sensor, a serializer, a digital potentiometer, an amplifier, an LED driver circuit, and a power management circuit; the electronic components of the PCB board adopt a partitioned functional layout.

2. The image acquisition PCB board for a miniature microscope according to claim 1, characterized in that, The copper thickness of the flexible region is 0.5 oz, and the copper thickness of the inner layer of the rigid region is 1.00 oz.

3. The image acquisition PCB board for a miniature microscope according to claim 1, characterized in that, The manufacturing process of the PCB board requires that the flexible area be made of FPC material, with a bending angle of 180°, a minimum bending radius of 3.00mm, and a bending life of greater than or equal to 100 cycles.

4. The image acquisition PCB board for a miniature microscope according to claim 1, characterized in that, The monochrome sensor supports three operating modes: Mode 0: 3840×2160@60fps; Mode 1: 1920×1080@30fps; Mode 2: 1920×1080@60fps.

5. The image acquisition PCB board for a miniature microscope according to claim 4, characterized in that, The register configurations for Mode 1 and Mode 2 are loaded via the I2C interface, and the configuration parameters are stored in the non-volatile memory of the PCB board. The specific implementations of Mode 1 and Mode 2 are as follows: Mode 1 sets the vertical channel prescaler to 3, the multiplier to 50, the pixel clock to 180MHz, the line length to 2916 pixel cycles, the frame length to 2056 lines, and the MIPI interface rate to 450Mbps, thereby achieving a 30fps frame rate output at 1920×1080 resolution. Mode 2 achieves 60fps frame rate output at 1920×1080 resolution by configuring the vertical channel prescaler value to 3, the multiplier value to 100, the pixel clock to 360MHz, the line length to 2916 pixel cycles, the frame length to 2056 lines, and the MIPI interface rate to 900Mbps.

6. The image acquisition PCB board for a miniature microscope according to claim 1, characterized in that, The PCB board's component functional layout adopts a partitioned design, including a sensor area, a serializer area, an LED driver area, and a power management area. The MIPI differential traces between the sensor area and the serializer area use a coplanar interlayer reference design, with a trace length matching error of less than 5 mil, ensuring the integrity of the high-speed signal output from the sensor during transmission to the serializer. The GMSL3 signal path between the serializer area and the external interface uses 50Ω impedance control and maintains a 3.2 mil dielectric thickness isolation from adjacent layers. The power management area and the LED driver area are powered through an independent power plane, with a 10 mil wide isolation strip at the partition boundary. The power supply path of the LED driver circuit uses inductors L1 and L2 in series to effectively isolate the interference of GMSL3 high-speed switching noise on the sensor's analog power supply. The sensor area includes a monochrome sensor U6 and its peripheral circuitry. The monochrome sensor U6 is connected to the serializer area via a 4-channel MIPI interface. The MIPI interface includes clock pairs MIPI1_CP / CN and data pairs MIPI1_D0P / D0N, D1P / D1N, D2P / D2N, and D3P / D3N, with differential impedance controlled at 100Ω±10%. The monochrome sensor U6 receives configuration commands via the I2C bus CAM_SDA / CAM_SCL and supports external reset signals CAM_RST_N and shutdown control signals XSHUTDOWN. The power supply for the monochrome sensor U6 is provided by the power management area.

7. The image acquisition PCB board for a miniature microscope according to claim 6, characterized in that, The serializer area includes serializer U2 and its peripheral circuitry. Serializer U2 receives MIPI signals from the sensor area and converts them into GMSL3 high-speed signal outputs, supporting a transmission rate of 12Gbps. The I2C interface of serializer U2 is configured via the CFG0 / CFG1 pins, with a device address of 0x84. Serializer U2 uses VCC 1.2V core power and VCC 1.8V interface power, both provided by the power management area. The GMSL3 output port of serializer U2 needs to be matched with a 50Ω ± 10% single-ended impedance and configured with a 49.9Ω termination resistor.

8. The image acquisition PCB board for a miniature microscope according to claim 6, characterized in that, The LED driving area includes an LED driving circuit that supports independent control of both blue LEDs and yellow-green LEDs. The brightness is adjusted via the I2C signal of the TPL0102 digital potentiometer. The LED driving circuit includes a digital potentiometer U4, LED driving chips U1 and U10, a blue LED device D1, a yellow-green LED device D2, a high-frequency choke inductor L1, and a power inductor L2. The digital potentiometer U4 receives host control commands via the I2C bus, and its output is connected to the current setting pins of LED driver chips U1 and U10 respectively. The output channel of LED driver chip U1 drives D1, and the output channel of LED driver chip U10 drives D2. The high-frequency choke inductor L1 is connected in series in the power supply path of U1 and D1, and the power inductor L2 is connected in series in the power supply path of U10 and D2. The power supply voltage of the LED driver circuit is VCC 3.3V, which is provided independently by the power management circuit.

9. The image acquisition PCB board for a miniature microscope according to claim 6, characterized in that, The power management area includes a multi-voltage domain output power management circuit, which contains power management chips U11, U12, and U13, and multiple low-dropout linear regulators. Enabled by two resistors, it outputs dual voltages of 1.05V and 2.8V, with a maximum current of 500mA. U13 outputs 1.2V, with a maximum current of 500mA. In the power management circuit, U11 receives an external 5V input, while U12 and U13 receive a VCC 3.3V input. After independent voltage regulation by each power management chip, they supply power to the sensor area, serializer area, and LED driver area, respectively. The power rails are filtered by a combination of 2.2μF and 0.1μF ceramic capacitors to ensure that the power ripple is below 30mV.

10. The image acquisition PCB board for a miniature microscope according to claim 6, characterized in that, The adapter board used with the PCB board integrates a MAX96792 deserializer, a POC power input circuit, a MIPI interface conversion circuit, and a status indicator circuit. The adapter board is connected to the power management circuit on the PCB board via a coaxial cable. The deserializer on the adapter board converts the GMSL3 signal into a MIPI CSI-2 signal that can be recognized by the Jetson platform, realizing hardware-level signal adaptation and protocol conversion for simultaneous input from four cameras.

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