Display device

Abstract

A display device according to one exemplary embodiment of the present disclosure includes a substrate divided into a display area and a non-display area; a planarization layer disposed over the substrate in the display area and extending into the non-display area; an anode disposed on the planarization layer in the display area; a bank including a bank hole exposing a portion of the anode; an organic layer disposed on the bank including the bank hole; a cathode disposed on the organic layer and extending into the non-display area; a first step relaxation layer disposed on the cathode and filling in the bank hole; an inorganic layer disposed on the first step relaxation layer and extending into the non-display area to cover the cathode; and an encapsulation unit disposed over the inorganic layer, thereby minimizing permeation of moisture and oxygen.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0173321, filed on November 28, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more particularly, to display devices that minimize the penetration of moisture and oxygen. Background Technology

[0004] Currently, with the advent of the information age, the field of display devices that visually express electrical information signals has been rapidly developed, and continuous research is being conducted to improve the performance of various display devices, such as thinness, lightness, and low power consumption.

[0005] Representative display devices include liquid crystal displays (LCDs), electrowetting displays (EWDs), and organic light-emitting diode displays (OLEDs).

[0006] Organic light-emitting diode (OLED) displays are self-emissive, eliminating the need for a separate light source, unlike liquid crystal displays (LCDs). Therefore, OLEDs can be manufactured to be lightweight and thin. Furthermore, OLEDs are attracting attention as a next-generation display device because they offer advantages not only in terms of power consumption due to low-voltage operation, but also in color reproduction, response speed, viewing angle, and contrast ratio (CR).

[0007] However, organic light-emitting display devices suffer from the problem that the organic layers that make up the light-emitting diodes are susceptible to the effects of heat, moisture, and oxygen. Summary of the Invention

[0008] One objective of this disclosure is to provide a display device that minimizes the infiltration of moisture and oxygen.

[0009] Another objective of this disclosure is to provide a display device that suppresses cracks in the cathode and inorganic layers caused by bubbles generated when the encapsulation units are bonded.

[0010] Another objective of this disclosure is to provide a display device with improved light extraction efficiency.

[0011] The purpose of this disclosure is not limited to the above-mentioned purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0012] To achieve the objectives described above, according to one aspect of this disclosure, a display device may include: a substrate divided into a display area and a non-display area; a planarization layer disposed over the substrate in the display area and extending into the non-display area; an anode disposed on the planarization layer in the display area; a dam including a dam hole exposing a portion of the anode; an organic layer disposed on the dam including the dam hole; a cathode disposed on the organic layer and extending into the non-display area; a first step mitigation layer disposed on the cathode and filling the dam hole; an inorganic layer disposed on the first step mitigation layer and extending into the non-display area to cover the cathode; and an encapsulation unit disposed over the inorganic layer.

[0013] Further details of the exemplary implementation are included in the detailed description and accompanying drawings.

[0014] According to this disclosure, a groove pattern is formed in the edge of the non-display area to minimize the penetration of moisture and oxygen.

[0015] According to this disclosure, a step-reduction layer is provided between the cathode and the inorganic layer in the light-emitting region to remove the steps caused by the taper of the embankment, thereby minimizing the penetration of moisture and oxygen into the light-emitting diode. According to this disclosure, a step-reduction layer is provided on the side surface of the trench pattern to block moisture and oxygen from penetrating into the display device, thereby improving the lifespan and reliability of the display device.

[0016] According to this disclosure, a plurality of recesses are formed on the surface of the planarization layer to improve light extraction efficiency, thereby achieving low power consumption. Furthermore, ESG (Environmental, Social, and Governance) can be achieved by reducing greenhouse gas emissions through decreasing the use of fossil fuels for power generation.

[0017] The effects of this disclosure are not limited to those illustrated above, and many more different effects are included in this specification. Attached Figure Description

[0018] The above and other aspects, features and advantages of this disclosure will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings:

[0019] Figure 1 A plan view of a display device according to a first exemplary embodiment of the present disclosure is shown schematically;

[0020] Figure 2 For along Figure 1 A cross-sectional view taken by line A-A';

[0021] Figure 3 For along Figure 1 A cross-sectional view taken from line B-B';

[0022] Figure 4A plan view of a display device according to a second exemplary embodiment of the present disclosure is shown for illustrative purposes.

[0023] Figure 5 For along Figure 4 A cross-sectional view taken from line C-C';

[0024] Figure 6 A cross-sectional view of a display device according to a third exemplary embodiment of the present disclosure is shown for illustrative purposes.

[0025] Figure 7 A plan view of a display device according to a fourth exemplary embodiment of the present disclosure is shown for illustrative purposes.

[0026] Figure 8 For along Figure 7 A cross-sectional view taken from line D-D';

[0027] Figure 9 For along Figure 7 A cross-sectional view taken from line E-E';

[0028] Figure 10 A cross-sectional view of a display device according to a fifth exemplary embodiment of the present disclosure is shown for illustrative purposes.

[0029] Figure 11 A cross-sectional view of a display device according to a sixth exemplary embodiment of the present disclosure is shown for illustrative purposes.

[0030] Figure 12 A plan view of a display device according to a seventh exemplary embodiment of the present disclosure is shown for illustrative purposes; and

[0031] Figure 13 For along Figure 12 The cross-sectional view taken by line F-F'. Detailed Implementation

[0032] The advantages and features of this disclosure, as well as methods for achieving said advantages and features, will become clear from the following detailed description of exemplary embodiments, together with the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in a variety of forms. The exemplary embodiments are provided by way of example only to enable those skilled in the art to fully understand the disclosure and scope of this disclosure.

[0033] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements. Furthermore, in the following description of this disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless such terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0034] Even if not explicitly stated, components are interpreted as including the normal error range.

[0035] When using terms such as “on,” “above,” “below,” and “near” to describe the positional relationship between two components, one or more components may be positioned between the two components unless the term is used in conjunction with the terms “immediately following” or “directly.”

[0036] When an element or layer is placed "on" another element or layer, the other layer or element may be placed directly on top of or between the other element.

[0037] Although the terms "first," "second," etc., are used to describe a wide variety of components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component referred to below can be considered a second component in the technical concept of this disclosure.

[0038] Throughout the specification, the same reference numerals generally denote the same elements.

[0039] The dimensions and thicknesses of the various components shown in the accompanying drawings are illustrated for ease of description, and this disclosure is not limited to the dimensions and thicknesses of the components shown.

[0040] Features of the various embodiments of this disclosure may be partially or completely adhered to or combined with each other and may be interlocked and operated in technically different ways, and the embodiments may be implemented independently or in connection with each other.

[0041] In the following, an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0042] Figure 1 A plan view of a display device according to a first exemplary embodiment of the present disclosure is shown schematically.

[0043] Reference Figure 1The display device 100 according to the first exemplary embodiment of the present disclosure may include a display panel, a flexible film 180, a printed circuit board 170, and a groove pattern 190.

[0044] The display panel is a panel used to display images to the user.

[0045] The display panel can be simply composed of a substrate 101 and a packaging unit, the packaging unit including a sealing member and a reinforcing substrate 160 above the substrate 101.

[0046] A display panel may include display elements for displaying images, driving elements for driving the display elements, and wiring for transmitting various signals to the display elements and driving elements. Depending on the type of display panel, the display elements may be defined in different ways. For example, when the display panel is an organic light-emitting display panel, the display element may be an organic light-emitting diode (OLED) comprising an anode, an organic light-emitting layer, and a cathode. Similarly, when the display panel is a liquid crystal display panel, the display element may be a liquid crystal display element.

[0047] In the following text, although the display panel is considered to be an organic light-emitting display panel, the display panel is not limited to organic light-emitting display panels.

[0048] The display panel can include a display area AA and a non-display area NA.

[0049] Display area AA is the area in the display panel where the image is displayed.

[0050] In the display area AA, a plurality of sub-pixels SP constituting a plurality of pixels and circuitry for driving the plurality of sub-pixels SP may be provided. The plurality of sub-pixels SP are the smallest units constituting the display area AA, and a display element may be provided in each of the plurality of sub-pixels SP. The plurality of sub-pixels SP may constitute a pixel. For example, an organic light-emitting diode (OLED) including an anode, an organic light-emitting layer, and a cathode may be provided in each of the plurality of sub-pixels SP, but this is not limited to this. Furthermore, the circuitry for driving the plurality of sub-pixels SP may include driving elements and wiring. For example, the circuitry may be composed of thin-film transistors, storage capacitors, gate lines, and data lines, but this is not limited to this.

[0051] The non-display area NA is the area where no image is displayed.

[0052] Although Figure 1 The diagram shows a non-display area NA surrounding a quadrilateral display area AA, but the shape and arrangement of the display area AA and the non-display area NA are not limited to these. Figure 1 The example shown is shown in the image.

[0053] The display area AA and the non-display area NA can have shapes suitable for the design of electronic devices that include display devices. For example, the display area AA can have a variety of shapes, such as pentagons, hexagons, circles, or ellipses.

[0054] In the non-display area NA, various wiring and circuits for driving the organic light-emitting diodes of the display area AA can be provided. For example, in the non-display area NA, there can be connection lines or driving ICs such as gate driver ICs or data driver ICs that transmit signals to the plurality of sub-pixels SP and circuits of the display area AA, but are not limited thereto.

[0055] The display device 100 may include a variety of additional components to generate various signals or to drive pixels in the display area AA. Additional components for driving pixels may include inverter circuitry, multiplexers, or electrostatic discharge (ESD) circuitry. The display device 100 may also include additional components associated with functions other than driving pixels. For example, the display device 100 may include additional components providing touch sensing functionality, user authentication functionality (e.g., fingerprint recognition), multi-level pressure sensing functionality, or haptic feedback functionality. These additional components may be located in the non-display area NA and / or in external circuitry connected to a connection interface.

[0056] The flexible film 180 is a film in which various components are disposed on a base film having a stretchability. For example, the flexible film 180 is a film that supplies signals to a plurality of sub-pixels SP and circuits in the display area AA and is electrically connected to the display panel. The flexible film 180 is disposed at one end of the non-display area NA of the display panel to supply power voltage or data voltage to the plurality of sub-pixels SP and circuits in the display area AA. The number of flexible films 180 can vary depending on the design and is not limited thereto.

[0057] Simultaneously, for example, a driver IC, such as a gate driver IC or a data driver IC, can be disposed on the flexible film 180. The driver IC is a component that processes data for displaying images and drive signals for processing that data. Depending on the mounting method, the driver IC can be disposed via chip-on-glass (COG), chip-on-film (COF), or tape carrier package (TCP).

[0058] A printed circuit board 170 is disposed on one end of the flexible film 180 for connection to the flexible film 180. The printed circuit board 170 is a component for supplying signals to a driver IC. The printed circuit board 170 can supply various signals to the driver IC, such as drive signals or data signals. For example, a data driver that generates data signals can be mounted in the printed circuit board 170, and the generated data signals can be supplied through the flexible film 180 to a plurality of sub-pixels SP and circuitry of the display panel. The number of printed circuit boards 170 can vary depending on the design and is not limited thereto.

[0059] Meanwhile, according to a first exemplary embodiment of this disclosure, a trench pattern 190 is provided in the non-display area NA, in which the planarization layer is partially removed, and a cathode and an inorganic layer extend over it to cover the trench pattern 190. Therefore, according to the first exemplary embodiment of this disclosure, the rate of permeation of moisture and oxygen through the side surface of the display device is slowed down.

[0060] The groove pattern 190 can be formed as a quadrilateral frame shape along the non-display area NA of the display panel. That is, as shown... Figure 1 As shown, the groove pattern 190 can be set on the four edges of the display panel, but is not limited thereto. For example, in Figure 1 In the process, due to the placement of the driver IC and the connection of the flexible film 180, it is not easy to form the groove pattern 190 on the lower side of the display panel, so the groove pattern 190 cannot be formed on the lower side of the display panel.

[0061] As described above, the packaging unit may include a sealing member and a reinforcing substrate 160.

[0062] According to this disclosure, a packaging structure having a multilayer structure including a thicker reinforcing substrate 160 can be employed. In this case, rigidity and heat dissipation can be adequately ensured, but this disclosure is not limited thereto.

[0063] Meanwhile, according to a first exemplary embodiment of this disclosure, a step buffer layer 140 is provided between the cathode and the inorganic layer in the light-emitting region to remove the step caused by the taper of the embankment, thereby minimizing the penetration of moisture and oxygen into the light-emitting diode.

[0064] The step softening layer 140 of the first exemplary embodiment of this disclosure may be disposed over the entire display area AA, but is not limited thereto. The step softening layer 140 may be disposed in strip form on sub-pixels SP disposed in one direction, or disposed in matrix form in each sub-pixel SP.

[0065] In the following text, reference will be made to Figure 2 and Figure 3 The step buffer layer 140 and the groove pattern 190 according to the first exemplary embodiment are described in detail.

[0066] Figure 2 For along Figure 1 A cross-sectional view taken from line A-A'.

[0067] Figure 3 For along Figure 1 A cross-sectional view taken from line B-B'.

[0068] Figure 2 A cross-sectional view of a sub-pixel in a display device 100 according to a first exemplary embodiment of the present disclosure, and Figure 3 A cross-section of the upper side of a side portion of a display panel in which a groove pattern 190 is formed is shown. Figure 3 For ease of description, pixel unit 115 in display area AA is shown schematically.

[0069] Reference Figure 2 and Figure 3 In a display panel according to a first exemplary embodiment of the present disclosure, a driving element 120 is disposed above a substrate 101.

[0070] A planarization layer 106 may be provided above the drive element 120.

[0071] Furthermore, a light-emitting diode 130 electrically connected to the driving element 120 is disposed above the planarization layer 106, and a step mitigation layer 140 and an inorganic layer 108 are disposed above the light-emitting diode 130 to minimize the penetration of oxygen and moisture into the light-emitting diode 130.

[0072] A sealing member 150 and a reinforcing substrate 160 are sequentially disposed above the inorganic layer 108. However, the display panel according to the first exemplary embodiment of this disclosure is not limited to this laminated structure.

[0073] The sealing member 150 is referred to as the adhesive layer, and the reinforcing substrate 160 is referred to as the encapsulation substrate.

[0074] The substrate 101 can be a glass or plastic substrate.

[0075] When the substrate 101 is a plastic substrate, a polyimide-based or polycarbonate-based material is used, which allows the substrate to be flexible.

[0076] Polyimide can be used in high-temperature processes and is a coatable material, making it frequently used in plastic substrates.

[0077] A buffer layer 102 may be provided on the substrate 101.

[0078] The buffer layer 102 is a functional layer that protects various electrodes and wirings from impurities, such as alkali metal ions, leaking from the substrate 101 or layers below it, and has a multilayer structure formed by a first buffer layer and a second buffer layer, but is not limited thereto. For example, the buffer layer 102 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or multiple layers thereof.

[0079] The buffer layer 102 delays the diffusion of moisture and / or oxygen that permeates the substrate 101. Furthermore, the buffer layer 102 may include multiple buffer layers and / or active buffer layers.

[0080] For example, the buffer layer 102 extends to the end of the substrate 101 to the non-display area NA, but is not limited thereto.

[0081] A light-shielding layer 125 may be provided on the buffer layer 102. The light-shielding layer 125 is formed to suppress external light from entering the active layer 124 of the drive element 120 disposed thereon.

[0082] When the light-shielding layer 125 is disposed on the buffer layer 102, an active buffer layer 103 is disposed on the light-shielding layer 125. The active buffer layer 103 can perform the function of protecting the active layer 124 of the driving element 120 made of semiconductor and blocking various types of defects introduced from the substrate 101. For example, the active buffer layer 103 can be formed of amorphous silicon (a-Si).

[0083] The driving element 120 can be positioned above the active buffer layer 103.

[0084] For example, in the driving element 120, an active layer 124, a gate insulating layer 104, a gate electrode 121, a source electrode 123 and a drain electrode 122 are sequentially disposed, and the driving element 120 is electrically connected to the light-emitting diode 130 to transmit current or signal to the light-emitting diode 130.

[0085] The active layer 124 can be set on the active buffer layer 103.

[0086] The active layer 124 can be made of polycrystalline silicon (p-Si). In this case, the predetermined region can also be doped with impurities. Alternatively, the active layer 124 can be formed of amorphous silicon (a-Si) or a variety of organic semiconductor materials such as pentacene. Furthermore, the active layer 124 can be formed of oxide.

[0087] The gate insulating layer 104 can be disposed on the active layer 124.

[0088] The gate insulating layer 104 can be formed of an insulating inorganic material such as silicon oxide (SiOx) or silicon nitride (SiNx), and can also be formed of an insulating organic material. The gate insulating layer 104 is disposed in an island shape on the active layer 124 below the gate electrode 121, the source electrode 123 and the drain electrode 122, but is not limited thereto, and is disposed on the entire substrate 101.

[0089] The gate electrode 121, source electrode 123 and drain electrode 122 may be disposed on the gate insulating layer 104, but are not limited thereto, and the gate electrode 121, source electrode 123 and drain electrode 122 may be disposed on different layers having an interlayer insulating layer therebetween.

[0090] The gate electrode 121, source electrode 123, and drain electrode 122 can be formed of a variety of conductive materials, such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0091] The gate insulating layer 104 is selectively removed to form a contact hole through which the source and drain regions of the active layer 124 are exposed.

[0092] The source and drain regions of the active layer 124 are electrically connected to the source electrode 123 and the drain electrode 122 through contact holes.

[0093] A portion of the drain electrode 122 is electrically connected to the light-shielding layer 125 via another contact hole formed by removing the active buffer layer 103, but is not limited thereto.

[0094] As needed, a protective layer 105 made of inorganic insulating material may be provided above the gate electrode 121, source electrode 123 and drain electrode 122 to cover the gate electrode 121, source electrode 123 and drain electrode 122.

[0095] Meanwhile, a color filter CF may be provided on the protective layer 105, but it is not limited to this, and the color filter CF may be omitted depending on the type of the light-emitting diode 130.

[0096] The color filter CF for each subpixel can be any of red, green, and blue. Furthermore, a color filter CF may not be set for the subpixel where white is implemented. Red, green, and blue can be set in a variety of ways.

[0097] In the case of bottom-emitting type, the color filter CF can be located below the anode 131.

[0098] A planarization layer 106 may be provided on the drive element 120 configured as described above.

[0099] The planarization layer 106 may have a multilayer structure consisting of at least two layers.

[0100] For example, the planarization layer 106 may extend to the end of the substrate 101 to the non-display area NA, but is not limited thereto, and may also be configured to be spaced apart from the end of the substrate 101 at a predetermined distance.

[0101] The thickness of the planarization layer 106 is approximately 2 μm, but is not limited to this.

[0102] The planarization layer 106 can be an outer coating layer, but is not limited to this.

[0103] As the resolution of the display panel increases, so does the variety of signal lines, therefore the planarization layer 106 consists of two layers. It is therefore difficult to place all wiring on a single layer while ensuring minimum spacing, hence the need for additional layers. Adding these additional layers provides leeway in wiring placement, making it easier to design wire / electrode setups. Furthermore, when using a dielectric material for the planarization layer 106, which consists of multiple layers, capacitance can be formed between the metal layers using the planarization layer 106.

[0104] The planarization layer 106 and the protective layer 105 can be formed to expose a portion of the drain electrode 122, and the drain electrode 122 of the drive element 120 and the anode 131 of the light-emitting diode 130 can be electrically connected through another contact hole.

[0105] A light-emitting diode 130 is disposed above a planarization layer 106. The light-emitting diode 130 can be constructed by sequentially arranging an anode 131, a plurality of organic layers 132, and a cathode 133. The light-emitting diode 130 can be constructed by an anode 131 disposed on the planarization layer 106, an organic layer 132 disposed on the anode 131, and a cathode 133 disposed on the organic layer 132.

[0106] The display device can be implemented as either a top-emitting or bottom-emitting type. In the case of a top-emitting type, a reflective layer may be additionally formed below the anode 131 to allow light emitted from the organic layer 132 to be reflected by the anode 131 and guided upward, for example, to the cathode 133 above it. The reflective layer may be formed of an opaque conductive material with high reflectivity (e.g., silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof). In contrast, in the case of a bottom-emitting type, the anode 131 may be formed only of a transparent conductive material (e.g., indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO)). Hereinafter, the display panel of this disclosure is considered to be of the bottom-emitting type.

[0107] A dam 107 may be provided in the remaining area of ​​the planarization layer 106, excluding the light-emitting area. That is, the dam 107 may have a dam hole H that exposes the anode 131 corresponding to the light-emitting area. For example, the dam 107 may be formed of an inorganic insulating material (e.g., silicon nitride (SiNx) or silicon oxide (SiOx)) or an organic insulating material (e.g., BCB, acrylic resin or imide resin).

[0108] The thickness of the embankment 107 is approximately 1 μm, but is not limited to this.

[0109] The organic layer 132 can be disposed on the anode 131 exposed by the embankment 107. The organic layer 132 may include a light-emitting layer, an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer.

[0110] For example, the organic layer 132 may be disposed above the dam 107 including the dam hole H of the dam 107, but is not limited thereto, and part of the organic layer 132 may also be disposed only on the anode 131.

[0111] The organic layer 132 can extend into the non-display area NA.

[0112] The cathode 133 can be disposed on the organic layer 132.

[0113] In the case of a top-emitting type, the cathode 133 may comprise a transparent conductive material. For example, the cathode 133 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO). In the case of a bottom-emitting type, the cathode 133 may comprise any of a metallic material such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), magnesium (Mg), palladium (Pd), copper (Cu), and alloys thereof. Alternatively, the cathode 133 may be constructed by laminating a layer formed of a transparent conductive layer (e.g., indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO)) with a layer formed of a metallic material (e.g., gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), magnesium (Mg), palladium (Pd), copper (Cu), or alloys thereof), but is not limited thereto.

[0114] The cathode 133 can extend into the non-display area NA.

[0115] In the non-display area NA, the cathode 133 is spaced apart from the end of the planarization layer 106 by a predetermined distance and contacts a portion of the top surface of the planarization layer 106, but is not limited thereto.

[0116] The cathode 133 may be configured to cover the side surface of the organic layer 132 in the non-display area NA. The organic layer 132 may be configured to be spaced apart from the end of the cathode 133 at a predetermined distance, but is not limited thereto.

[0117] The inorganic layer 108 can be disposed on the light-emitting diode 130.

[0118] The inorganic layer 108 can extend to the non-display area NA.

[0119] The inorganic layer 108 may be configured to cover the side surface of the cathode 133 at a predetermined distance from the end of the planarization layer 106 in the non-display area NA. The cathode 133 may be configured to be spaced apart from the end of the inorganic layer 108 at a predetermined distance, but this disclosure is not limited thereto.

[0120] A cover layer (not shown) made of a material with high refractive index and high light absorption rate may be disposed between the light-emitting diode 130 and the inorganic layer 108 to reduce irregular reflection of external light.

[0121] Meanwhile, according to a first exemplary embodiment of this disclosure, a portion of the planarization layer 106 is removed to form a trench pattern 190 in the non-display area NA. For example, the trench pattern 190 may be disposed in the non-display area NA on the outer periphery of the display area AA.

[0122] In the plan view, the groove pattern 190 can be formed as a quadrilateral frame shape along the non-display area NA of the display panel. For example, the groove pattern 190 can be provided on the four edges of the display panel, but this disclosure is not limited thereto, and the groove pattern 190 may not be formed on the underside to which the flexible film of the display panel is attached.

[0123] For example, the trench pattern 190 can be formed by removing the planarization layer 106 of the non-display area NA on the periphery of the display area AA via a photolithography process, but this disclosure is not limited thereto.

[0124] Although Figure 3 The illustration shows one groove pattern 190, but is not limited to this. That is, two or more groove patterns 190 can be provided, and are not limited to this. Figure 3 The number of groove patterns 190 shown in the figure.

[0125] The groove pattern 190 can delay or partially block the penetration of moisture and oxygen from the outside through the planarization layer 106, which is an organic membrane.

[0126] As described above, a cathode 133 made of metallic material and an inorganic layer 108 made of inorganic insulating material are deposited in the trench pattern 190 to minimize the penetration of moisture and oxygen.

[0127] Meanwhile, according to a first exemplary embodiment of this disclosure, a step buffer layer 140 is disposed in the display area AA prior to the deposition of the inorganic layer 108.

[0128] For example, step transition layer 140 ( Figure 1 and Figure 2 This includes the embankment hole H on the cathode 133, which is to be set on the entire surface of the display area AA.

[0129] Meanwhile, dummy pixels can be set on the edge of the display area AA, and in this case, it is not necessary to apply the step softening layer 140 to the dummy pixels, but it is not limited to this.

[0130] As described above, the step mitigation layer 140 is configured to fill the dam hole H, thereby mitigating the step caused by the dam hole H and flattening the upper part of the dam hole H. Therefore, cracking of the cathode 133 and inorganic layer 108 in the dam hole H caused by bubbles generated during the bonding process of the packaging unit can be effectively suppressed.

[0131] Specifically, during the bonding process of the packaging unit, bubbles ranging from tens to several μm in size may be generated. At this time, due to the taper of the dam 107, the cathode 133 and inorganic layer 108 in the dam hole H have poorer film quality compared to the cathode 133 and inorganic layer 108 in other areas, and may develop fine cracks due to the steps. Moisture and oxygen from the bubbles permeate through the fine cracks in the cathode 133 and inorganic layer 108, causing negative offset of the drive element 120 or damage to the light-emitting diode 130.

[0132] Therefore, according to a first exemplary embodiment of this disclosure, a step mitigation layer 140 is disposed between the cathode 133 and the inorganic layer 108 to fill the embankment hole H, thereby removing the step caused by the taper of the embankment 107 and minimizing the penetration of moisture and oxygen into the light-emitting diode 130. Thus, the lifespan and reliability of the display device can be improved.

[0133] Furthermore, the step-mitigation layer 140 may be formed of an organic material. For example, the step-mitigation layer 140 may contain a resin formed of an organic material and a getter dispersed in the resin, but is not limited thereto, and may not contain a getter.

[0134] In addition, for example, the step buffer layer 140 can be formed of a thermosetting resin or a UV-curable resin.

[0135] The resin of the step-mitigation layer 140 can be formed from organic materials. For example, the step-mitigation layer 140 may include epoxy resin, acrylic resin, and silicon oxy carbon (SiOC) resin.

[0136] The step-modulation layer 140 may contain a getter. The getter may be dispersed in the resin described above. The getter may include at least one of barium oxide (BaO), calcium oxide (CaO), magnesium oxide (MgO), magnesium sulfate (MgSO4), sodium oxide (Na2O), sodium sulfate (Na2SO4), lithium sulfate (Li2SO4), calcium sulfate (CaSO4), potassium oxide (K2O), lithium oxide (Li2O), gallium sulfate (Ga2(SO4)3), calcium chloride (CaCl2), magnesium chloride (MgCl2), calcium bromide (CaBr2), cerium bromide (CeBr3), vanadium bromide (VBr5), and calcium nitrate (Ca(NO3)2). The getter may be made of a transparent material, but is not limited thereto.

[0137] For example, the step-gradient layer 140 can be implemented in the form of a membrane.

[0138] An inorganic layer 108 formed of inorganic insulating material can be disposed on the step buffer layer 140. The inorganic layer 108 delays the penetration of moisture from the upper part and inhibits defects caused by dents or foreign matter.

[0139] The inorganic layer 108 may be configured to contact the top surface of the step mitigation layer 140. Furthermore, the inorganic layer 108 may cover the top and side surfaces of the step mitigation layer 140 to seal the step mitigation layer 140, but is not limited thereto.

[0140] To slow down water penetration, the inorganic layer 108 may be composed of silicon oxide (SiOx), silicon nitride (SiNx), or multiple layers thereof, but is not limited thereto.

[0141] The sealing member 150 and the reinforcing substrate 160 can be disposed above the inorganic layer 108.

[0142] The sealing member 150 and the reinforcing substrate 160 may extend into the non-display area NA to cover a portion of the inorganic layer 108 and the planarization layer 106.

[0143] The sealing member 150 may be configured to surround the inorganic layer 108, the cathode 133, and the pixel unit 115, including a trench pattern 190. The sealing member 150, together with the inorganic layer 108 and the reinforcing substrate 160, may protect the light-emitting diode 130 of the pixel unit 115 from external moisture, oxygen, and impact.

[0144] The sealing member 150 may also include an absorbent. The absorbent may be hygroscopic particles that absorb moisture and oxygen, thereby minimizing the penetration of moisture and oxygen into the pixel unit 115.

[0145] The reinforcing substrate 160 can be disposed on the sealing member 150. The reinforcing substrate 160, together with the sealing member 150, can protect the light-emitting diode 130 of the pixel unit 115. The reinforcing substrate 160 can protect the light-emitting diode 130 from external moisture, oxygen and impact.

[0146] For example, the reinforcing substrate 160 may be made of Invar alloy, which is an iron / nickel alloy, but is not limited thereto. As a packaging structure of this disclosure, a multilayer structure including a barrier layer such as a thin-film metal layer or aluminum foil (Al foil) and a reinforcing substrate such as a plurality of adhesive layers and aluminum sheets can be applied.

[0147] That is, the encapsulation structure having a multilayer structure consisting of a sealing member 150 and a reinforcing substrate 160 can be disposed above the inorganic layer 108. Alternatively, the reinforcing substrate 160 can be omitted.

[0148] In small-sized display panels used in mobile or portable devices, the small area allows for rapid heat dissipation from the device and virtually eliminates adhesion issues. However, in large-sized display panels used in monitors, tablets, or television receivers, the large area necessitates a robust encapsulation structure for optimal heat dissipation and adhesion.

[0149] Furthermore, to ensure sufficient rigidity, the display device can also include a separate inner plate above the encapsulation substrate. In this case, the problem lies in ensuring sufficient space for the separate inner plate, and the weight of the inner plate limits the thinning and weight reduction of the display device. Additionally, the air gap created between the encapsulation substrate and the inner plate creates a vertical space, which is as large as the thickness of the adhesive tape used to bond the encapsulation substrate and the inner plate, reducing heat dissipation performance.

[0150] Therefore, according to this disclosure, a packaging structure having a multilayer structure including a sealing member 150 can be applied, which secures a relatively thick reinforcing substrate 160 while removing a separate inner plate and suppressing process defects.

[0151] For example, the sealing member 150 of this disclosure may include a first adhesive layer opposite to the substrate 101, a second adhesive layer opposite to the reinforcing substrate 160, and a barrier layer between the first adhesive layer and the second adhesive layer, but is not limited thereto.

[0152] The first and second adhesive layers can be formed from adhesive polymer materials. For example, the first adhesive layer can be formed from any of olefin-based, epoxy-based, and acrylate-based polymer materials. The second adhesive layer can be formed from any of olefin-based, epoxy-based, acrylate-based, amine-based, phenol-based, and anhydride-based polymer materials that do not contain carboxyl groups. Specifically, for the sake of film uniformity and the corrosion resistance of the barrier layer, the second adhesive layer is preferably composed of a polymer material that does not contain carboxyl groups.

[0153] To dissipate heat from the substrate 101, at least the first adhesive layer, of the first and second adhesive layers, may be formed from a mixture comprising adhesive polymer material and metal material particles. For example, the metal material particles may be a powder formed of nickel (Ni). That is, the first adhesive layer in direct contact with the substrate 101 is composed of a mixture comprising adhesive polymer material and metal material particles, such that its thermal conductivity can be higher than that of the adhesive polymer material.

[0154] Similarly, the second adhesive layer is also formed of a mixture containing particles of adhesive polymer material and metallic material, so that its thermal conductivity can be higher than that of the adhesive polymer material.

[0155] As a result, the speed at which the driving heat generated in the substrate 101 is released through the sealing member 150 is improved, thereby improving the heat dissipation effect of the substrate 101.

[0156] Furthermore, to prevent moisture from penetrating into the pixel unit 115, the first adhesive layer may be formed by further comprising a mixture containing a hygroscopic inorganic filler. For example, the hygroscopic inorganic filler may be at least one of barium oxide (BaO), calcium oxide (CaO), and magnesium oxide (MgO).

[0157] Unlike the first adhesive layer, the second adhesive layer does not directly contact the pixel unit 115, making it unnecessary to include inorganic fillers for inhibiting moisture penetration into the pixel unit 115. Therefore, the second adhesive layer does not contain hygroscopic inorganic fillers, but only adhesive polymer materials and metal particles. This reduces the amount of expensive hygroscopic inorganic fillers injected into the sealing member 150, thereby lowering the manufacturing cost of the sealing member 150.

[0158] Furthermore, since it does not contain hygroscopic inorganic fillers, the mixing ratio of polymer materials in the second adhesive layer is increased compared to the first adhesive layer. Therefore, the adhesion of the second adhesive layer can be improved more significantly than that of the first adhesive layer. Consequently, the bonding reliability between the substrate 101 and the reinforcing substrate 160 can be further improved because the reinforcing substrate 160 is more firmly fixed to the second adhesive layer.

[0159] Furthermore, since the first adhesive layer and the second adhesive layer are formed in a multi-layer structure, the reliability of reducing warping that causes the display panel to bend can also be improved.

[0160] The thickness of each of the first and second adhesive layers can be limited to a threshold thickness or lower to suppress process defects. Furthermore, the sum of the thicknesses of the first and second adhesive layers can be limited to a threshold thickness or higher to ensure the reliability of the reinforcement substrate 160.

[0161] For example, the thickness of the first adhesive layer and the second adhesive layer can be in the range of 10 μm to 100 μm.

[0162] The barrier layer can be formed of a metallic material. That is, the barrier layer can be formed to contain a metallic material, such as Al, Cu, Sn, Ag, Fe, or Zn.

[0163] A barrier layer can be introduced to achieve a laminated structure that enhances the bond with the first and second adhesive layers and reduces warping.

[0164] Specifically, the first and second adhesive layers are configured to contain an adhesive polymer material. Therefore, a barrier layer with a harder material is disposed between the first and second adhesive layers, such that the first and second adhesive layers bond to one surface and the other surface of the barrier layer, thereby improving adhesion.

[0165] In this case, the thickness of the barrier layer can be limited to a value less than the thickness of the first adhesive layer and the second adhesive layer, so as to minimize the thickness of the sealing member 150 due to the increase of the barrier layer. For example, the thickness of the barrier layer can be in the range of greater than 10 μm and less than the thickness of the first adhesive layer and the second adhesive layer.

[0166] According to a first exemplary embodiment of this disclosure, the sealing member 150 includes a first adhesive layer and a second adhesive layer separated by a barrier layer, such that it is implemented to be approximately twice the thickness of a single-layer adhesive material without causing process defects. Therefore, the reinforcing substrate 160 fixed by the sealing member 150 is fabricated to have a greater thickness, which facilitates easier improvement in stiffness and heat dissipation. For example, when the thickness of the sealing member 150 is in the range of 30 μm to 300 μm, the thickness of the reinforcing substrate 160 can be implemented to be in the range of 0.1 mm to 1.5 mm.

[0167] For example, the reinforcing substrate 160 can be formed from any material, such as glass or a plastic polymer (e.g., PET).

[0168] For example, the sealing member 150 and the reinforcing substrate 160 may extend into the non-display area NA to cover a portion of the inorganic layer 108 and the planarization layer 106.

[0169] Furthermore, according to this disclosure, the step easing layer of the display area is set in a matrix in each sub-pixel to minimize the process, which will be described in detail with reference to the accompanying drawings.

[0170] Figure 4 A plan view of a display device according to a second exemplary embodiment of the present disclosure is shown schematically.

[0171] Figure 5 For along Figure 4 A cross-sectional view taken from line C-C'.

[0172] Apart from the stepped transition layer 240 Figure 4 and Figure 5 The second exemplary embodiment of this disclosure has the same as Figures 1 to 3 The first exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. In the following descriptions of the same reference numerals, refer to... Figures 1 to 3 .

[0173] Figure 5 A cross-sectional view of a sub-pixel SP of a display device 200 according to a second exemplary embodiment of the present disclosure.

[0174] Reference Figure 4 and Figure 5 In a display panel according to a second exemplary embodiment of the present disclosure, a driving element 120 may be disposed above a substrate 101.

[0175] A planarization layer 106 may be provided above the drive element 120.

[0176] In addition, a light-emitting diode 130 electrically connected to the driving element 120 is disposed above the planarization layer 106, and a step mitigation layer 240 and an inorganic layer 208 are disposed above the light-emitting diode 130 to suppress oxygen and moisture from penetrating into the light-emitting diode 130.

[0177] A sealing member 150 and a reinforcing substrate 160 may be sequentially disposed above the inorganic layer 208. However, the display panel according to the second exemplary embodiment of this disclosure is not limited to this laminated structure.

[0178] The light-emitting diode 130 can be disposed above the planarization layer 106. The light-emitting diode 130 can be composed of an anode 131 disposed on the planarization layer 106, an organic layer 132 disposed on the anode 131, and a cathode 133 disposed on the organic layer 132.

[0179] A dam 107 may be provided in the remaining area of ​​the planarization layer 106, excluding the light-emitting area. That is, the dam 107 may have a dam hole H that exposes the anode 131 corresponding to the light-emitting area.

[0180] The organic layer 132 can be disposed on the anode 131 exposed by the embankment 107. The organic layer 132 may include a light-emitting layer, an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer.

[0181] For example, the organic layer 132 may be disposed above the dam 107, which includes, but is not limited to, the dam 107 with dam holes H, and a portion of the organic layer 132 may be disposed only on the anode 131.

[0182] The cathode 133 can be disposed on the organic layer 132.

[0183] The step transition layer 240 can be positioned above the light-emitting diode 130.

[0184] In the second exemplary embodiment of this disclosure, the step mitigation layer 240 is disposed only in the embankment hole H. For example, the step mitigation layer 240 is disposed in a matrix in each sub-pixel SP, thereby minimizing process and cost.

[0185] For example, the step mitigation layer 240 may be formed to partially protrude from the top of the cathode 133 while filling the embankment hole H, but is not limited thereto. In this case, for example, the step mitigation layer 240 may cover a portion of the cathode 133 above the embankment 107.

[0186] For example, the step transition layer 240 may also have an upwardly convex shape.

[0187] For example, in a plan view, the step softening layer 240 may have a shape substantially the same as the shape of the sub-pixel SP. In a plan view, the step softening layer 240 may have a shape substantially the same as the shape of the embankment hole H.

[0188] As described above, the step mitigation layer 240 is configured to fill the dam hole H, thereby removing the step caused by the taper of the dam 107. This suppresses cracks in the cathode 133 and inorganic layer 108 in the dam hole H caused by bubbles generated during the bonding process of the packaging unit, thus minimizing the penetration of moisture and oxygen into the light-emitting diode 130.

[0189] Furthermore, the step-mitigation layer 240 can be formed of an organic material. For example, the step-mitigation layer 240 may contain a resin formed of an organic material and a getter dispersed in the resin, but is not limited thereto, and may not contain a getter.

[0190] In addition, for example, the step buffer layer 240 can be formed of a thermosetting resin or a UV-curable resin.

[0191] An inorganic layer 208 formed of inorganic insulating material can be disposed on the step transition layer 240.

[0192] According to a second exemplary embodiment of this disclosure, the inorganic layer 208 may be configured to contact the cathode 133 above the embankment 107 and the top surface of the step buffer layer 240. The inorganic layer 208 may cover the cathode 133 above the embankment 107, including the step buffer layer 240.

[0193] The sealing member 150 and the reinforcing substrate 160 can be disposed above the inorganic layer 208.

[0194] Furthermore, according to this disclosure, a plurality of recesses are formed on the surface of the planarization layer corresponding to the embankment holes to improve light extraction efficiency, which will be described with reference to the accompanying drawings.

[0195] Figure 6 A cross-sectional view of a display device according to a third exemplary embodiment of the present disclosure is shown schematically.

[0196] In addition to the planarization layer 306, the light-emitting diode 330, and the step-softening layer 340, Figure 6 The third exemplary embodiment of this disclosure has the same characteristics as Figure 4 and Figure 5 The second exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. In the following descriptions of the same reference numerals, refer to... Figures 1 to 5 .

[0197] Figure 6 A cross-sectional view of a sub-pixel of a display device according to a third exemplary embodiment of the present disclosure;

[0198] Reference Figure 6 In the display panel according to the third exemplary embodiment of the present disclosure, a driving element 120 may be disposed above the substrate 101.

[0199] A planarization layer 306 may be provided above the drive element 120.

[0200] Furthermore, a light-emitting diode 330 electrically connected to the driving element 120 may be disposed above the planarization layer 306, and a step-softening layer 340 and an inorganic layer 208 may be disposed above the light-emitting diode 330.

[0201] A sealing member 150 and a reinforcing substrate 160 may be sequentially disposed above the inorganic layer 208. However, the display panel according to the third exemplary embodiment of this disclosure is not limited to this laminated structure.

[0202] The planarization layer 306 according to a third exemplary embodiment of the present disclosure includes a plurality of recesses formed on the top surface to overlap with the color filter CF.

[0203] Multiple recesses may have hemispherical or semi-ellipsoidal shapes, but are not limited to these.

[0204] The light-emitting diode 330 can be disposed above the planarization layer 306 having a plurality of recesses. The light-emitting diode 330 can be composed of an anode 331 disposed on the planarization layer 306, an organic layer 332 disposed on the anode 331, and a cathode 333 disposed on the organic layer 332.

[0205] The top surface of the light-emitting diode 330, namely the top surface of the anode 331, the organic layer 332 and the cathode 333, may have a plurality of recesses according to the shape of the recesses in the planarization layer 306.

[0206] Specifically, based on the light propagation path, the light emitted from the emissive layer of a bottom-emitting display device can be broadly categorized into ITO / organic film mode (hereinafter referred to as "ITO" mode), substrate mode, and air mode. Air mode refers to light emitted from the emissive layer that is extracted and emitted to the outside of the display device, while substrate mode refers to light emitted from the emissive layer that is trapped within the display device through total internal reflection and light absorption in the substrate. ITO mode refers to light emitted from the emissive layer that is trapped within the display device through total internal reflection and light absorption in the anode, typically formed of ITO. Currently, in bottom-emitting display devices, approximately 50% of the light emitted from the emissive layer is trapped within the display device in ITO mode, and approximately 30% in substrate mode. Therefore, only about 80% of the light emitted from the emissive layer is trapped within the display device, and only about 20% is extracted to the outside, making it crucial to improve the light extraction efficiency of the display device.

[0207] The recesses in the planarization layer 306 and the light-emitting diode 330 can form a microlens array (MLA) structure. Therefore, the angle of incidence of light emitted from the light-emitting layer at the interface of the planarization layer 306 is likely to be less than the critical angle for total internal reflection, thereby reducing the amount of light trapped in the display device in ITO mode. Furthermore, light emitted from the light-emitting layer passes through the interface of the planarization layer 306 and travels at an angle almost perpendicular to the bottom surface of the substrate 101. Therefore, the angle of incidence of light passing through the interface of the planarization layer 306 is likely to be less than the critical angle for total internal reflection in substrate mode, thereby reducing the amount of light trapped in the display device in substrate mode. Moreover, multiple reflections of light emitted from the interface of the planarization layer 306 can be achieved to increase the number of times light circulates and encounters the MLA structure of the planarization layer 306 and the light-emitting diode 330. As described above, the amount of light trapped in the display device in both ITO and substrate modes is reduced, thereby improving light extraction efficiency and the lifetime of the light-emitting diode 330, and thus improving power efficiency. Therefore, ESG (Environmental, Social, and Governance) can be achieved by reducing greenhouse gas emissions through reducing the use of fossil fuels for power generation.

[0208] Meanwhile, when the MLA structure is formed in the light-emitting diode 330, the thickness of the cathode 333 and inorganic layer 208 deposited above the cone (approximately 30 to 40 degrees) of the embankment 107 may be reduced. In this case, the possibility of cracks appearing in the cathode 333 and inorganic layer 208 due to bubbles generated during the bonding of the packaging unit may be further increased. Therefore, oxygen in the bubbles may cause degradation of the light-emitting diode 330.

[0209] Therefore, according to a third exemplary embodiment of this disclosure, a step mitigation layer 340 is applied over the light-emitting diode 330 having a recess to remove the step. This suppresses cracking of the cathode 333 and inorganic layer 208 due to air bubbles, thereby minimizing the penetration of moisture and oxygen into the light-emitting diode 330.

[0210] In the third exemplary embodiment of this disclosure, the step mitigation layer 340 is disposed only in the embankment hole H. That is, for example, the step mitigation layer 340 is disposed in a matrix in each sub-pixel, thereby minimizing process and cost.

[0211] The step-gradient layer 340 can be formed to partially protrude from the top of the cathode 333 while filling the embankment hole H, wherein the light-emitting diode 330 has a recess, but is not limited thereto.

[0212] For example, the step transition layer 340 can have an upwardly convex shape.

[0213] Furthermore, the step-mitigation layer 340 can be formed of organic materials. For example, the step-mitigation layer 340 may contain a resin formed of organic materials and a getter dispersed in the resin, but is not limited thereto, and may not contain a getter.

[0214] In addition, for example, the step buffer layer 340 can be formed of a thermosetting resin or a UV-curable resin.

[0215] An inorganic layer 208 formed of inorganic insulating material can be disposed on the step transition layer 340.

[0216] The sealing member 150 and the reinforcing substrate 160 can be disposed above the inorganic layer 208.

[0217] Furthermore, according to this disclosure, a step-gradient buffer layer is also provided on the side surface of the groove pattern, which can more effectively prevent moisture and oxygen from penetrating into the display device, as will be described with reference to the accompanying drawings.

[0218] Figure 7 A plan view of a display device according to a fourth exemplary embodiment of the present disclosure is shown schematically.

[0219] Figure 8 For along Figure 7 The cross-sectional view taken by line D-D'.

[0220] Figure 9 For along Figure 7 The cross-sectional view taken from line E-E'.

[0221] In addition to providing a second step buffer layer 440b on the side surface of the groove pattern 190, Figures 7 to 9 The fourth exemplary embodiment of this disclosure has the same Figure 4 and Figure 5 The second exemplary implementation and Figure 6 The third exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. In the following descriptions of the same reference numerals, refer to... Figures 1 to 6 .

[0222] Figure 8 This is a cross-sectional view of a sub-pixel SP of a display device 400 according to a fourth exemplary embodiment of the present disclosure.

[0223] Figure 9 This is a cross-sectional view of the non-display area NA in the display device 400 of the fourth exemplary embodiment of this disclosure, and also shows a cross-section of the upper side of the side of the display panel in which the groove pattern 190 is formed. Figure 9 For ease of description, pixel unit 115 in display area AA is shown schematically.

[0224] Reference Figures 7 to 9 In the display panel according to the fourth exemplary embodiment of the present disclosure, a driving element 120 may be disposed above the substrate 101.

[0225] A planarization layer 306 may be provided above the drive element 120.

[0226] A light-emitting diode 430 electrically connected to the driving element 120 may be disposed above the planarization layer 306. In addition, a first step mitigation layer 440a and an inorganic layer 408 may be disposed above the light-emitting diode 430.

[0227] A sealing member 150 and a reinforcing substrate 160 may be sequentially disposed above the inorganic layer 408. However, the display panel according to the fourth exemplary embodiment of this disclosure is not limited to this laminated structure.

[0228] Similar to the third exemplary embodiment described above, the planarization layer 306 of the fourth exemplary embodiment of this disclosure may include a plurality of recesses formed on the top surface to overlap with the color filter CF.

[0229] Multiple recesses may have hemispherical or semi-ellipsoidal shapes, but are not limited to these.

[0230] Furthermore, the planarization layer 306 may extend to the end of the substrate 101 to the non-display area NA, but is not limited thereto, and may also be configured to be spaced apart from the end of the substrate 101 by a predetermined distance.

[0231] The light-emitting diode 430 can be disposed above the planarization layer 306 having a plurality of recesses. The top surfaces of the anode 431, the organic layer 432, and the cathode 433 can have a plurality of recesses according to the shape of the recesses in the planarization layer 306.

[0232] The organic layer 432 can extend into the non-display area NA.

[0233] The cathode 433 can extend into the non-display area NA.

[0234] The ends of the cathode 433 and the planarization layer 306 are spaced apart by a predetermined distance in the non-display area NA so as to contact a portion of the side surface of the planarization layer 306 in the trench pattern 190, but are not limited thereto.

[0235] The cathode 433 may be configured to cover the side surface of the organic layer 432 in the non-display area NA. The organic layer 432 may be configured to be spaced apart from the end of the cathode 433 by a predetermined distance, but is not limited thereto.

[0236] The cathode 433 according to the fourth exemplary embodiment of the present disclosure may be configured to expose a portion of the trench pattern 190 and cover another portion, but is not limited thereto.

[0237] The first step buffer layer 440a can be set above the light-emitting diode 430.

[0238] Therefore, according to a fourth exemplary embodiment of the present disclosure, a first step mitigation layer 440a is applied over the light-emitting diode 430 having a recess to remove the step.

[0239] The first step mitigation layer 440a of the fourth exemplary embodiment of this disclosure is disposed only in the embankment hole H. For example, the first step mitigation layer 440a may be disposed in a matrix in each sub-pixel SP.

[0240] The first step buffer layer 440a can be formed to partially protrude from the top of the cathode 433 while filling the embankment hole H, wherein the light-emitting diode 430 has a recess, but is not limited thereto.

[0241] For example, the first step buffer layer 440a can have an upwardly convex shape.

[0242] Meanwhile, according to the fourth exemplary embodiment of this disclosure, a second step buffer layer 440b is provided on the side surface of the groove pattern 190.

[0243] For example, the second step buffer layer 440b may be provided only on the side surface inside the groove pattern 190, but is not limited thereto, and may also be provided on the side surface inside or outside the groove pattern 190.

[0244] For example, the second step buffer layer 440b can be configured to cover the end of the cathode 433 in the trench pattern 190.

[0245] As described above, according to the fourth exemplary embodiment of this disclosure, the second step mitigation layer 440b is formed to cover the cathode 433 in the stepped trench pattern 190, thereby more effectively preventing moisture and oxygen from penetrating into the display device 400. Therefore, the lifespan and reliability of the display device 400 can be further improved.

[0246] The first step buffer layer 440a and the second step buffer layer 440b can be formed of organic materials. For example, the first step buffer layer 440a and the second step buffer layer 440b can contain a resin formed of organic materials and a getter dispersed in the resin, but are not limited thereto, and may not contain a getter.

[0247] Furthermore, for example, the first step buffer layer 440a and the second step buffer layer 440b can be formed from a thermosetting resin or a UV-curable resin.

[0248] An inorganic layer 408 may be provided on the first step buffer layer 440a and the second step buffer layer 440b.

[0249] The inorganic layer 408 can extend to the non-display area NA.

[0250] The inorganic layer 408 may be configured to be spaced apart from the end of the planarization layer 306 in the non-display area NA by a predetermined distance to cover the side surface of the cathode 433 in the trench pattern 190. The cathode 433 may be configured to be spaced apart from the end of the inorganic layer 408 by a predetermined distance, but this disclosure is not limited thereto.

[0251] The inorganic layer 408 may be configured to contact the top and side surfaces of the second step mitigation layer 440b. Furthermore, the inorganic layer 408 may cover the top and side surfaces of the second step mitigation layer 440b to seal the second step mitigation layer 440b, but this disclosure is not limited thereto.

[0252] Meanwhile, the second step buffer layer of this disclosure can be formed to fill the groove pattern, which will be described in detail with reference to the accompanying drawings.

[0253] Figure 10 A cross-sectional view of a display device according to a fifth exemplary embodiment of the present disclosure is shown schematically.

[0254] In addition to the configuration of the second step buffer layer 540b, Figure 10 The fifth exemplary embodiment of this disclosure has the same characteristics as Figures 7 to 9 The fourth exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. In the following descriptions of the same reference numerals, refer to... Figures 1 to 9 .

[0255] Figure 10 This is a cross-sectional view of the non-display area NA in a display device according to a fifth exemplary embodiment of the present disclosure, and shows a cross-section of the upper side of the side of the display panel in which the groove pattern 190 is formed. Figure 10 For ease of description, pixel unit 115 in display area AA is shown schematically.

[0256] Reference Figure 10 Similar to the fourth exemplary embodiment described above, the planarization layer 306 of the fifth exemplary embodiment of this disclosure may extend to the end of the substrate 101 to the non-display area NA, but is not limited thereto.

[0257] The organic layer 432 can extend into the non-display area NA.

[0258] The cathode 433 can extend into the non-display area NA.

[0259] The ends of the cathode 433 and the planarization layer 306 are spaced apart by a predetermined distance in the non-display area NA so as to contact a portion of the side surface of the planarization layer 306 in the trench pattern 190, but are not limited thereto.

[0260] The cathode 433 may be configured to cover the side surface of the organic layer 432 in the non-display area NA. The organic layer 432 may be configured to be spaced apart from the end of the cathode 433 by a predetermined distance, but is not limited thereto.

[0261] The cathode 433 according to the fifth exemplary embodiment of this disclosure may be configured to expose a portion of the trench pattern 190 and cover another portion, but is not limited thereto.

[0262] Meanwhile, according to the fifth exemplary embodiment of this disclosure, the second step buffer layer 540b is configured to fill the groove pattern 190.

[0263] For example, the second step buffer layer 540b is configured to fill the trench pattern 190 and cover the side surfaces of the planarization layer 306 and the ends of the cathode 433 on both sides of the trench pattern 190, but is not limited thereto.

[0264] As described above, according to the fifth exemplary embodiment of this disclosure, the second step mitigation layer 540b is formed to cover the side surface of the planarization layer 306 and the end of the cathode 433 in a stepped trench pattern 190. Therefore, moisture and oxygen can be more effectively prevented from penetrating into the display device. Consequently, the lifespan and reliability of the display device can be further improved.

[0265] An inorganic layer 508 may be provided above the second step transition layer 540b.

[0266] The inorganic layer 508 can extend to the non-display area NA.

[0267] The inorganic layer 508 can be configured to be spaced apart from the end of the planarization layer 306 in the non-display area NA by a predetermined distance to cover the second step mitigation layer 540b.

[0268] The inorganic layer 508 can be configured to contact the top surface of the second step buffer layer 540b.

[0269] A sealing member 150 and a reinforcing substrate 160 may be disposed above the inorganic layer 508.

[0270] Meanwhile, the second step mitigation layer of this disclosure can be formed between the planarization layer and the cathode, which will be described in detail with reference to the accompanying drawings.

[0271] Figure 11 A cross-sectional view of a display device according to a sixth exemplary embodiment of the present disclosure is shown schematically.

[0272] In addition to the second step mitigation layer 640b being disposed between the planarization layer 306 and the cathode 633, Figure 11 The sixth exemplary embodiment of this disclosure has the same characteristics as Figure 10 The fifth exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. Here, the description of the same reference numerals can be found by referring to... Figures 1 to 10 .

[0273] Figure 11 This is a cross-sectional view of the non-display area NA in a display device according to a sixth exemplary embodiment of the present disclosure, and a cross-section of the upper side of the side of the display panel in which the groove pattern 190 is formed is shown. Figure 11 For ease of description, pixel unit 115 in display area AA is shown schematically.

[0274] Reference Figure 11 Similar to the fifth exemplary embodiment described above, the planarization layer 306 of the sixth exemplary embodiment of this disclosure may extend to the end of the substrate 101 to the non-display area NA, but is not limited thereto.

[0275] The organic layer 432 can extend into the non-display area NA.

[0276] Meanwhile, in the non-display area NA, a portion of the planarization layer 306 is removed to form a trench pattern 190.

[0277] Organic layer 432 is in contact with the top surface of planarization layer 306 in trench pattern 190.

[0278] Meanwhile, according to a sixth exemplary embodiment of this disclosure, the second step mitigation layer 640b is configured to cover the side surface of the planarization layer 306 in the trench pattern 190.

[0279] For example, a second step mitigation layer 640b covers the side surface of the planarization layer 306 to mitigate the step. For example, the second step mitigation layer 640b is configured to cover the side surface of the planarization layer 306 in the groove pattern 190. However, this disclosure is not limited thereto, and the second step mitigation layer extends to fill the groove pattern 190.

[0280] The cathode 633 extends into the non-display area NA to be disposed on the second step buffer layer 640b.

[0281] The ends of the cathode 633 and the planarization layer 306 are spaced apart by a predetermined distance in the non-display area NA to contact the side surface of the second step buffer layer 640b in the trench pattern 190, but are not limited thereto.

[0282] For example, in the non-display area NA, the cathode 633 can be configured to cover the organic layer 432 and the second step buffer layer 640b.

[0283] The cathode 633 according to the sixth exemplary embodiment of this disclosure may be configured to expose a portion of the trench pattern 190 and cover another portion, but is not limited thereto.

[0284] An inorganic layer 608 can be provided on the cathode 633.

[0285] The inorganic layer 608 can extend to the non-display area NA.

[0286] The inorganic layer 608 can be configured to be spaced apart from the end of the planarization layer 306 in the non-display area NA by a predetermined distance to cover the end of the cathode 633.

[0287] Meanwhile, the first step easing layer of this disclosure can be set in a strip shape on a sub-pixel that is set in one direction, which will be described in detail with reference to the accompanying drawings.

[0288] Figure 12 A plan view of a display device according to a seventh embodiment of the present disclosure is shown schematically.

[0289] Figure 13 For along Figure 12 The cross-sectional view taken by line F-F'.

[0290] Apart from the placement shape of the first step buffer layer 740a Figure 12 and Figure 13 The seventh exemplary embodiment of this disclosure has the same characteristics as Figures 7 to 9 The fourth exemplary embodiment has essentially the same configuration, therefore redundant descriptions will be omitted. The same configuration will be indicated by the same reference numerals. Here, the description of the same reference numerals can be found by referring to... Figures 1 to 11 .

[0291] Figure 13 This is a cross-sectional view of a sub-pixel SP of a display device 700 according to a seventh exemplary embodiment of the present disclosure.

[0292] Reference Figure 12 and Figure 13 Similar to the fourth exemplary embodiment described above, the planarization layer 306 of the seventh exemplary embodiment of this disclosure may include a plurality of recesses formed on the top surface to overlap with the color filter CF.

[0293] Multiple recesses may have hemispherical or semi-ellipsoidal shapes, but are not limited to these.

[0294] The light-emitting diode 430 can be disposed above the planarization layer 306 having a plurality of recesses. The top surfaces of the anode 431, the organic layer 432, and the cathode 433 can have a plurality of recesses according to the shape of the recesses in the planarization layer 306.

[0295] A first step buffer layer 740a may be provided above the light-emitting diode 430.

[0296] According to a seventh exemplary embodiment of the present disclosure, a first step mitigation layer 740a is applied over a light-emitting diode 430 having a recess to remove the step.

[0297] In a seventh exemplary embodiment of this disclosure, a first step mitigation layer 740a is disposed above a light-emitting diode 430 including a dam hole H. Furthermore, for example, the first step mitigation layer 740a is disposed in a strip shape on a sub-pixel SP disposed in one direction.

[0298] An inorganic layer 708 may be provided on the first step buffer layer 740a.

[0299] Exemplary embodiments of this disclosure can also be described as follows:

[0300] According to one aspect of this disclosure, a display device is provided. The display device includes: a substrate divided into a display area and a non-display area; a planarization layer disposed over the substrate in the display area and extending into the non-display area; an anode disposed on the planarization layer in the display area; a dam including a dam hole exposing a portion of the anode; an organic layer disposed on the dam including the dam hole; a cathode disposed on the organic layer and extending into the non-display area; a first step mitigation layer disposed on the cathode and filling the dam hole; an inorganic layer disposed on the first step mitigation layer and extending into the non-display area to cover the cathode; and an encapsulation unit disposed over the inorganic layer.

[0301] The first step buffer layer is positioned above the cathode across the entire display area, including the embankment openings.

[0302] The first step buffer layer can be set in a strip shape across multiple sub-pixels set along one direction.

[0303] The first step softening layer can be set in each sub-pixel as a matrix, and in the planar diagram, the first step softening layer can have a shape corresponding to the shape of the sub-pixel.

[0304] The first step buffer layer can partially protrude from the top of the cathode while filling the embankment holes.

[0305] The first step transition layer can have an upward convex shape.

[0306] The inorganic layer can be configured as the top surface of the cathode above the contact dam and the first step buffer layer.

[0307] The first step of the gradient layer can overlap with the color filter below it.

[0308] The planarization layer may include a plurality of recesses formed on the top surface to overlap with the color filter, and the plurality of recesses may have a hemispherical shape or a semi-ellipsoidal shape.

[0309] The top surfaces of the anode, organic layer, and cathode may have a plurality of recesses corresponding to the shape of the recesses in the planarization layer.

[0310] The display device may also include a groove pattern formed by removing a portion of the planarization layer of the non-display area.

[0311] In a plan view, the groove pattern can have a quadrilateral frame shape along the non-display area.

[0312] The cathode can be configured to expose a portion of the trench pattern and cover another portion of the trench pattern.

[0313] The display device may also include a second step buffer layer disposed on the side surface of the groove pattern.

[0314] The second step buffer layer can be configured to cover the end of the cathode in the trench pattern.

[0315] The inorganic layer can extend into the non-display area to cover the top and side surfaces of the second step mitigation layer.

[0316] The second step buffer layer can be configured to cover the sides of the planarization layer and the ends of the cathode on both sides of the trench pattern while filling the trench pattern.

[0317] The second step mitigation layer can be configured to cover the side surface of the planarization layer in the trench pattern, and the cathode can extend to the non-display area to be disposed on the second step mitigation layer.

[0318] The first and second step buffer layers can be formed from thermosetting resins or UV-curable resins.

[0319] The packaging unit may include a sealing member disposed above the inorganic layer and a reinforcing substrate disposed on the sealing member, and the sealing member and the reinforcing substrate may extend into the non-display area to cover a portion of the inorganic layer and the planarization layer.

[0320] While exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the content of the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be construed as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: A substrate, wherein the substrate is divided into a display area and a non-display area; A planarization layer disposed in the display area above the substrate and extending into the non-display area; An anode is disposed on the planarization layer in the display area; The embankment includes a embankment hole that exposes a portion of the anode; An organic layer disposed on the embankment including the embankment openings; A cathode disposed on the organic layer and extending into the non-display area; A first step buffer layer is disposed on the cathode and filled in the embankment hole; An inorganic layer is disposed on the first step buffer layer and extends into the non-display area to cover the cathode; as well as The encapsulation unit is disposed above the inorganic layer.

2. The display device according to claim 1, wherein the first step buffer layer is disposed on the cathode over the entire display area including the embankment hole.

3. The display device according to claim 1, wherein the first step buffer layer is arranged in a strip shape across a plurality of sub-pixels disposed in one direction.

4. The display device according to claim 1, wherein the first step softening layer is arranged in a matrix in each sub-pixel, and wherein in a plan view, the first step softening layer has a shape corresponding to the shape of the sub-pixel.

5. The display device according to claim 4, wherein the first step buffer layer partially protrudes from the top of the cathode while filling the embankment hole.

6. The display device according to claim 5, wherein the first step buffer layer has an upwardly convex shape.

7. The display device according to claim 4, wherein the inorganic layer is configured to contact the cathode above the embankment and the top surface of the first step buffer layer.

8. The display device according to claim 1, wherein the first step buffer layer overlaps with the color filter below it.

9. The display device of claim 8, wherein the planarization layer comprises a plurality of recesses formed on the top surface to overlap with the color filter, and wherein the plurality of recesses have a hemispherical shape or a semi-ellipsoidal shape.

10. The display device of claim 9, wherein the top surfaces of the anode, the organic layer, and the cathode include a plurality of recesses corresponding to the shape of the recesses in the planarization layer.

11. The display device according to any one of claims 1 to 4, further comprising: A groove pattern is formed by removing a portion of the planarization layer from the non-display area.

12. The display device of claim 11, wherein in a plan view, the groove pattern has a quadrilateral frame shape along the non-display area.

13. The display device of claim 11, wherein the cathode is configured to expose a portion of the trench pattern and cover another portion of the trench pattern.

14. The display device according to claim 13, further comprising: A second step buffer layer is disposed on the side surface of the groove pattern.

15. The display device of claim 14, wherein the second step buffer layer is configured to cover the end of the cathode in the trench pattern.

16. The display device of claim 14, wherein the inorganic layer extends into the non-display area to cover the top and side surfaces of the second step mitigation layer.

17. The display device of claim 14, wherein the second step buffer layer is configured to cover the side surfaces of the planarization layer and the ends of the cathode on both sides of the trench pattern while filling the trench pattern.

18. The display device of claim 14, wherein the second step mitigation layer is configured to cover the side surface of the planarization layer in the trench pattern, and the cathode extends to the non-display area to be disposed on the second step mitigation layer.

19. The display device according to claim 14, wherein the first step mitigation layer and the second step mitigation layer are formed of a thermosetting resin or a UV-curable resin.

20. The display device according to claim 1, wherein the packaging unit comprises: A sealing member disposed above the inorganic layer; as well as The reinforcing substrate disposed on the sealing member The sealing member and the reinforcing substrate extend into the non-display area to cover a portion of the inorganic layer and the planarization layer.

Images