Display panel, preparation method of display panel and electronic device
By designing an isolation structure in the OLED display panel and employing a double etching technique, the problem of discontinuous evaporation electrodes was solved, improving the density of light-emitting devices and display effect, and realizing a high-resolution display panel.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BLACK COW FOOD
- Filing Date
- 2024-11-29
- Publication Date
- 2026-05-29
Smart Images

Figure CN122121450A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the display panel, and an electronic device. Background Technology
[0002] Organic light-emitting diodes (OLEDs) are considered the next generation of display technology after liquid crystal displays. Due to their excellent color and image quality, they are widely used in various consumer electronic devices such as smartphones, televisions, laptops, desktop computers, automotive displays, and wearable devices, and have become the mainstream technology in display panels.
[0003] However, the current manufacturing process of OLED display products still needs further improvement. Summary of the Invention
[0004] In order to overcome the technical problems mentioned in the above background, this application provides a display panel, a method for manufacturing the display panel, and an electronic device.
[0005] A first aspect of this application provides a display panel, the display panel including a display area, the display panel further including:
[0006] substrate;
[0007] A pixel defining layer is located on one side of the substrate in the display area. The pixel defining layer includes a pixel opening. In a direction perpendicular to the plane of the substrate, the pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is close to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate.
[0008] An isolation structure is located on the side of the pixel defining layer away from the substrate, and the isolation structure encloses an isolation opening, which is connected to the corresponding pixel opening;
[0009] The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0.
[0010] In one possible implementation of this application, in the direction away from the substrate, the pixel defining layer in the display area includes a first pixel defining layer and a second pixel defining layer stacked together, the first pixel opening penetrates the first pixel defining layer, the second pixel opening penetrates the second pixel defining layer, the surface of the first pixel defining layer away from the substrate is a first surface, and the surface of the second pixel defining layer away from the substrate is a second surface.
[0011] The angle between the sidewall of the second pixel opening and the first surface near the first pixel opening is 110°-160°.
[0012] In one possible implementation of this application, the isolation structure includes a first isolation portion and a second isolation portion. The first isolation portion and the second isolation portion are stacked sequentially in a direction away from the substrate, and the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate.
[0013] Preferably, the cross-sectional shape of the isolation structure is T-shaped on a cross-section perpendicular to the plane of the substrate and passing through the center of the isolation opening;
[0014] Preferably, the isolation structure further includes a third isolation portion, wherein the third isolation portion, the first isolation portion, and the second isolation portion are stacked sequentially in a direction away from the substrate;
[0015] Preferably, the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate;
[0016] Preferably, the cross-sectional shape of the isolation structure is I-shaped on a cross-section perpendicular to the plane of the substrate and passing through the center of the isolation opening;
[0017] Preferably, the material of the first isolation part includes aluminum, silver or copper, and / or the material of the second isolation part includes titanium or molybdenum, and / or the material of the third isolation part includes molybdenum or titanium.
[0018] In one possible implementation of this application, the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is less than the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the first pixel opening on the substrate. Specifically, the orthographic projection of the isolation structure on the substrate is the orthographic projection of the second isolation portion on the substrate, the orthographic projection of the second pixel opening on the substrate is the orthographic projection of the sidewall of the second pixel opening closest to the first surface on the substrate, and the orthographic projection of the first pixel opening on the substrate is the orthographic projection of the sidewall of the first pixel opening closest to the substrate on the substrate.
[0019] Preferably, the distance between the orthographic projection of the second pixel opening on the substrate and the orthographic projection of the first pixel opening on the substrate is 0.5μm-4μm.
[0020] In one possible embodiment of this application, the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is 0.5μm-3μm.
[0021] In one possible implementation of this application, the distance between the orthographic projection of the sidewall of the second pixel opening near the second surface on the substrate and the orthographic projection of the isolation structure on the substrate is smaller than the distance between the orthographic projection of the sidewall of the second pixel opening near the first surface on the substrate and the orthographic projection of the isolation structure on the substrate.
[0022] Preferably, the distance between the orthographic projection of the sidewall of the second pixel opening closest to the second surface on the substrate and the orthographic projection of the isolation structure on the substrate is greater than 0.
[0023] In one possible implementation of this application, the isolation structure is located on the side of the second pixel defining layer away from the substrate;
[0024] Preferably, the pixel defining layer includes an inorganic pixel defining layer;
[0025] Preferably, the material of the first pixel defining layer and the material of the second pixel defining layer are the same or different.
[0026] In one possible implementation of this application, in a plane direction perpendicular to the substrate, the first pixel defining layer has a first thickness, and the second pixel defining layer has a second thickness, wherein the second thickness is 10%-25% of the first thickness.
[0027] In one possible implementation of this application, the orthographic projection shape of the first pixel opening on the substrate is the same as the orthographic projection shape of the second pixel opening on the substrate;
[0028] Preferably, the distance between the geometric center of the orthographic projection of the first pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding second pixel opening on the substrate is greater than or equal to 0.
[0029] Preferably, the distance between the geometric center of the orthographic projection of at least one first pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding second pixel opening on the substrate is greater than 0; preferably, the distance between the geometric center of the orthographic projection of the second pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding isolation opening on the substrate is greater than or equal to 0.
[0030] Preferably, the distance between the geometric center of the orthographic projection of at least one second pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding isolation opening on the substrate is greater than 0.
[0031] In one possible implementation of this application, the display panel further includes a non-display area surrounding at least a portion of the display area, and the substrate includes a substrate and an array of traces on the substrate, wherein the array of traces includes power signal traces located in the non-display area;
[0032] In the non-display area, the pixel defining layer includes vias, and the isolation structure is connected to the power signal traces in the array trace layer through the vias.
[0033] In one possible implementation of this application, the display panel further includes a light-emitting device;
[0034] In a direction away from the substrate, the light-emitting device includes a first electrode, a light-emitting material layer, and a second electrode stacked together. The first electrode is located on the side of the pixel defining layer facing the substrate. The first pixel opening partially exposes the first electrode. The second electrode is at least partially overlapped with the isolation structure.
[0035] In one possible implementation of this application, the display panel further includes a first encapsulation layer. In the display area, the first encapsulation layer includes a plurality of encapsulation units, and different encapsulation units encapsulate light-emitting devices within different isolation openings.
[0036] Preferably, two adjacent packaging units that encapsulate different color light-emitting devices are disconnected on the side of the isolation structure away from the substrate, and there is a gap between the packaging unit located on the side of the isolation structure away from the substrate and the isolation structure;
[0037] Preferably, two adjacent packaging units that encapsulate light-emitting devices of the same color are connected to each other on the side of the isolation structure away from the substrate;
[0038] Preferably, the display panel further includes a second encapsulation layer, the second encapsulation layer at least covering the encapsulation unit;
[0039] Preferably, the second encapsulation layer has a flat surface on the side away from the substrate;
[0040] Preferably, the display panel further includes a third encapsulation layer, the third encapsulation layer being located on the side of the second encapsulation layer away from the substrate;
[0041] Preferably, the materials of the first encapsulation layer and the third encapsulation layer include inorganic encapsulation materials, and the material of the second encapsulation layer includes organic encapsulation materials.
[0042] A second aspect of this application also provides a display panel, the display panel including a display area, the display panel further including:
[0043] substrate;
[0044] A pixel defining layer is located on one side of the substrate in the display area. The pixel defining layer includes a pixel opening. In a direction perpendicular to the plane of the substrate, the pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is close to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate.
[0045] An isolation structure is located on the side of the pixel defining layer away from the substrate, and the isolation structure encloses an isolation opening, which is connected to the corresponding pixel opening;
[0046] The angle between the sidewall of the second pixel opening and the surface of the pixel defining layer near the first pixel opening is 110°-160°, wherein the surface of the pixel defining layer near the first pixel opening is connected to the sidewall of the second pixel opening.
[0047] In one possible implementation of this application, the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0.
[0048] A third aspect of this application also provides a method for manufacturing a display panel, the display panel including a display area, the method comprising:
[0049] Provide a substrate;
[0050] A pixel defining material layer is formed on one side of the substrate;
[0051] The pixel defining material layer located in the display area is patterned using a first mask, and the pixel defining material layer in a certain area is thinned, with the thinned pixel defining material layer serving as an etching protection layer.
[0052] An isolation structure material layer is fabricated on the side of the pixel defining material layer away from the substrate. The isolation structure material layer is patterned to obtain an isolation structure and an isolation opening. The orthographic projection of the etched protective layer on the substrate is located within the orthographic projection of the isolation opening on the substrate.
[0053] The pixel defining material layer in the isolation opening is patterned using a second mask, and the etched protective layer is removed to form a pixel defining layer including the pixel opening. The pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is closer to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate. The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0. The first mask opening of the first mask corresponds to the first pixel opening, and the second mask opening of the second mask corresponds to the second pixel opening.
[0054] In one possible implementation of this application, the display panel further includes a non-display area surrounding at least a portion of the display area, the substrate includes a substrate and an array wiring layer located on the substrate, wherein the array wiring layer includes power signal wirings located in the non-display area, and prior to the steps of patterning the pixel defining material layer located in the display area using a first mask, thinning the pixel defining material layer at a portion of the location, and using the thinned pixel defining material layer as an etching protection layer, the method further includes:
[0055] The pixel defining material layer located in the non-display area is patterned using a third mask to form vias in the pixel defining material layer located in the non-display area, so as to expose the power signal traces in the array trace layer.
[0056] The step of fabricating an isolation structure material layer on the side of the pixel defining material layer away from the substrate, and patterning the isolation structure material layer to obtain the isolation structure and the isolation opening, further includes:
[0057] An isolation structure material layer is formed on the side of the pixel defining layer away from the substrate, and is connected to the power signal traces in the array trace layer through the via.
[0058] A fourth aspect of this application also provides an electronic device, the electronic device comprising a display panel in any possible implementation of the first or second aspect, or a display panel prepared by the preparation method of the third aspect. Attached Figure Description
[0059] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0060] Figure 1 This embodiment illustrates a schematic diagram of the area distribution of the display panel.
[0061] Figure 2 A schematic diagram illustrating the distribution of the isolation structure and isolation openings in the display area provided in this embodiment is shown.
[0062] Figure 3 Example Figure 2 One of the schematic diagrams of the cross-section at position AA in the middle;
[0063] Figure 4 Example Figure 2 Second cross-sectional diagram at position AA;
[0064] Figure 5 A schematic diagram illustrating another film structure for array wiring layers is shown;
[0065] Figure 6 A schematic diagram of a membrane structure for a shielding layer is shown;
[0066] Figure 7 A cross-sectional schematic diagram of the non-display area is shown in the example;
[0067] Figure 8 Example Figure 2 Schematic diagram of the cross-section at position AA (part 3);
[0068] Figure 9 Example Figure 2 Fourth cross-sectional diagram at position AA;
[0069] Figure 10 A flowchart illustrating the method for manufacturing the display panel provided in this embodiment is shown.
[0070] Figure 11a and Figure 11b for Figure 10 A corresponding process flow diagram;
[0071] Figure 12 for Figure 10 The corresponding alternative process flow diagram.
[0072] Icons: 1-Display panel; 11-Substrate; 111-Substrate; 112-Array trace layer; 12-Pixel defining layer; 1201-Pixel opening; 12011-First pixel opening; 12012-Second pixel opening; 13-Isolation structure; 1301-Isolation opening; 131-First isolation portion; 132-Second isolation portion; 133-Third isolation portion; 14-Light-emitting device; 141-First electrode; 142-Light-emitting material layer; 143-Second electrode; 151-First encapsulation layer; 1511-Encapsulation unit; 152-Second encapsulation layer; 153-Third encapsulation layer; 20-Pixel defining material layer; 201-Etching protection layer; 202-Through hole; 30-Isolation structure material layer; 310-First mask; 320-Second mask; 330-Third mask; 3101-First mask opening; 3201-Second mask opening. Detailed Implementation
[0073] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0074] In the description of this application, it should be noted that the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this application is usually placed when in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0075] Increasing the density of light-emitting devices (i.e., pixel density) in display panels is a crucial way to improve display quality. However, current display panels manufactured using Fine Metal Mask (FMM) technology are limited by technological constraints that prevent further increases in the density of light-emitting devices. Through long-term research, the inventors discovered that to address the technical challenge of limiting the density of light-emitting devices, an isolation structure can be incorporated into some display panels. During the full-layer deposition of the light-emitting material layer and cathode, the light-emitting material layer and cathode can be separated at the isolation structure location. Through multiple deposition and etching processes, light-emitting devices of different colors can be formed in different isolation openings. This process is known as light-emitting device patterning.
[0076] Patent CN118251982A, Patent 202410864269.8, Patent PCT / CN2024 / 098407, Patent PCT / CN2024 / 102783, Patent PCT / CN2024 / 098217, PCT / CN2024 / 099419, Patent PCT / CN2024 / 099072, Patent CN117979755A, Patent CN117998900A, Patent CN Patents CN117062489A, CN117580403A, CN116583155A, CN116669477A, CN117396039A, CN116669480A, CN116600606A, and CN117500332A describe relevant technical solutions for isolation structures (or partition structures or isolation pillars) and encapsulation layers, the contents of which are incorporated herein by reference.
[0077] In the aforementioned display panel, the inventors discovered a problem with dark spots. Analysis revealed that this was due to the discontinuous distribution of the vapor-deposited electrodes, leading to poor electrical connection between the electrodes and the isolation structure. The inventors further discovered that the fractures in the vapor-deposited electrodes were generally located below the isolation structure.
[0078] To address the aforementioned problems, the inventors have innovatively designed the following technical solutions, which will be described in detail below with reference to the accompanying drawings. It should be noted that the deficiencies in the existing solutions are the result of the inventors' practical experience and careful research. Therefore, the discovery process of the aforementioned technical problems and the solutions proposed in this embodiment below are contributions made by the inventors to this application during the invention process, and should not be construed as technical content known to those skilled in the art.
[0079] Please refer to Figure 1 , Figure 2 and Figure 3 , Figure 1 This embodiment illustrates the area distribution diagram of the display panel. Figure 2 This embodiment illustrates the distribution of the isolation structure and isolation openings. Figure 3 Example Figure 2 A cross-sectional schematic diagram of position AA. In this embodiment, the display panel 1 includes a display area AA and a non-display area AB, wherein the non-display area AB at least partially surrounds the display area AA.
[0080] In this embodiment, the display panel 1 further includes a substrate 11, a pixel defining layer 12, and an isolation structure 13. The pixel defining layer 12 is located on one side of the substrate 11 in the display area AA. The pixel defining layer 12 includes a pixel opening 1201. In order to prevent the electrode below the pixel opening 1201 from being etched and damaged during the etching process to form the isolation structure 13, the pixel defining layer 12 can be etched twice to form the pixel opening 1201. The first etching thins the film layer and protects the electrode below from the influence of etching to form the isolation structure 13 through the thinned film layer. After etching to form the isolation structure 13, a second etching is performed to remove the thinned film layer and finally form the pixel opening 1201.
[0081] In this embodiment, in a direction perpendicular to the plane of the substrate 11, the pixel opening 1201 includes a connected first pixel opening 12011 and a second pixel opening 12012. The first pixel opening 12011 is located on the side of the second pixel opening 12012 closest to the substrate 11. The orthographic projection of the first pixel opening 12011 onto the substrate 11 lies within the orthographic projection of the second pixel opening 12012 onto the substrate 11; that is, the orthographic projection area of the first pixel opening 12011 onto the substrate 11 is smaller than the orthographic projection area of the second pixel opening 12012 onto the substrate 11. The first pixel opening 12011 is obtained by removing the thinned pixel defining layer film during the second etching process. The second pixel opening 12012 is obtained by removing a portion of the pixel defining layer 12 away from the substrate 11 during the second etching process.
[0082] The isolation structure 13 is located on the side of the pixel defining layer 12 away from the substrate 11. The isolation structure 13 encloses and forms an isolation opening 1301, which is connected to the corresponding pixel opening 1201. In this embodiment, the distance d1 between the orthographic projection of the isolation structure 13 on the substrate 11 and the orthographic projection of the second pixel opening 12012 on the substrate 11 is greater than 0. That is, at least part of the sidewall of the second pixel opening 12012 is located below the isolation structure 13. Since the film thickness of the vapor-deposited electrode below the isolation structure 13 is relatively thin, this design facilitates the continuous film formation of the electrodes of the vapor-deposited light-emitting devices at the sidewall position of the second pixel opening 12012 when a high-resolution display panel is formed using a patterned light-emitting device technology. This ensures the electrical connection between the electrodes of the light-emitting device and the isolation structure 13 and avoids the generation of dark spot defects.
[0083] In this embodiment, please refer to Figure 4In the direction away from the substrate 11, the pixel defining layer 12 located in the display area AA includes a first pixel defining layer 121 and a second pixel defining layer 122 stacked together. The first pixel opening 12011 penetrates the first pixel defining layer 121, and the second pixel opening 12012 penetrates the second pixel defining layer 122. The surface of the first pixel defining layer 121 away from the substrate 11 is a first surface 12a, and the surface of the second pixel defining layer 122 away from the substrate 11 is a second surface 12b. The first surface 12a is the surface of the pixel defining layer 12 close to the first pixel opening 12011, and the first surface 12a is connected to the sidewall of the second pixel opening 12012.
[0084] The included angle α between the sidewall of the second pixel opening 12012 and the first surface 12a near the first pixel opening 12011 is 110°-160°. For example, the included angle α includes 110°, 115°, 123°, 128°, 135°, 142°, 150°, 155° or 160°, etc. With this design, a relatively gentle slope is formed between the sidewall and the first surface 12a, which facilitates the continuous deposition of the vapor-deposited film layer (e.g., vapor-deposited electrode) on it.
[0085] In this embodiment, the pixel defining layer 12 can be an organic pixel defining layer or an inorganic pixel defining layer. Preferably, the pixel defining layer 12 is an inorganic pixel defining layer. When the pixel defining layer 12 is an inorganic pixel defining layer, it can be a single-layer structure of silicon oxide (SiOx) or silicon nitride (SiNx), or a stacked structure formed by alternating silicon oxide and silicon nitride. The materials of the first pixel defining layer 121 and the second pixel defining layer 122 can be the same; for example, both the first pixel defining layer 121 and the second pixel defining layer 122 can be silicon oxide layers or silicon nitride layers. Alternatively, the materials of the first pixel defining layer 121 and the second pixel defining layer 122 can be different; for example, the first pixel defining layer 121 can be a silicon oxide layer, and the second pixel defining layer 122 can be a silicon nitride layer.
[0086] In this embodiment, in the plane direction perpendicular to the substrate 11 (Z direction in the figure), the pixel defining layer 121 has a first thickness h1, and the second pixel defining layer 122 has a second thickness h2, wherein the second thickness h2 is 10%-25% of the first thickness h1. For example, the second thickness h2 can be 10%, 10.2%, 10.8%, 11.6%, 12.2%, 13.5%, 14.6%, 15.7%, 16.2%, 17.6%, 18.6%, 19.8%, 20%, 21.6%, 22.8%, 23.2%, 24.8%, or 25% of the first thickness h1. With this design, the second pixel defining layer 122 is thinner, resulting in a shorter etching time when the thinned film layer is etched away, and less photoresist layer retreat (it will not retreat below the isolation structure 13). The sidewall of the formed second pixel opening 12012 has a gentler slope, which facilitates the continuous film formation of the electrodes of the light-emitting device at the sidewall position of the second pixel opening 12012, ensuring the electrical connection between the electrodes of the light-emitting device and the isolation structure 13.
[0087] In one possible implementation of this embodiment, the orthographic projection shape of the first pixel opening 12011 on the substrate 11 is the same as the orthographic projection shape of the second pixel opening 12012 on the substrate 11. For example, the orthographic projection shapes of both can be rectangles or rounded rectangles.
[0088] In this embodiment, the distance between the geometric center of the orthographic projection of the first pixel opening 12011 on the substrate 11 and the geometric center of the orthographic projection of the corresponding second pixel opening 12012 on the substrate 11 is greater than or equal to 0. Optionally, the distance between at least one geometric center of the orthographic projection of the first pixel opening 12011 on the substrate 11 and the geometric center of the orthographic projection of the corresponding second pixel opening 12012 on the substrate 11 is greater than 0. That is, the mask used in the two etching processes to form the pixel opening 1201 is different, and the mask opening size of the mask may be different. At the same time, the alignment position of the two masks is different, so the geometric center of the orthographic projection of the first pixel opening 12011 and the geometric center of the orthographic projection of the second pixel opening 12012 may not coincide. Specifically, the mask opening of the mask used in the first etching corresponds to the first pixel opening 12011, and the mask opening of the mask used in the second etching corresponds to the second pixel opening 12012. For example, the mask opening of the mask used in the second etching can be larger than the mask opening of the mask used in the first etching.
[0089] Since the second pixel opening 12012 formed by the second etching uses a separate mask instead of the isolation structure 13 as a mask, the distance between the geometric center of the orthographic projection of the second pixel opening 12012 on the substrate 11 and the geometric center of the orthographic projection of the corresponding isolation opening 1301 on the substrate 11 is greater than or equal to 0. Optionally, the distance between the geometric center of the orthographic projection of at least one second pixel opening 12012 on the substrate 11 and the geometric center of the orthographic projection of the corresponding isolation opening 1301 on the substrate 11 is greater than 0.
[0090] In this embodiment, please refer to Figure 5 In the direction away from the substrate 11, the isolation structure 13 includes a first isolation portion 131 and a second isolation portion 132 stacked together, wherein the orthographic projection of the first isolation portion 131 on the substrate 11 lies within the orthographic projection of the second isolation portion 132 on the substrate 11. That is, in the direction toward the isolation opening 1301, the second isolation portion 132 extends relative to the first isolation portion 131. In the direction perpendicular to the plane of the substrate 11 and along the line connecting the geometric centers of two adjacent isolation openings 1301, the cross-section of the isolation structure 13 may be T-shaped.
[0091] Further, please refer to Figure 6 The isolation structure 13 also includes a third isolation portion 133. In the direction away from the substrate 11, the third isolation portion 133, the first isolation portion 131, and the second isolation portion 132 are sequentially stacked. The orthographic projection of the first isolation portion 131 onto the substrate 11 lies within the orthographic projection of the third isolation portion 133 onto the substrate 11. The orthographic projection of the third isolation portion 133 onto the substrate 11 lies within the orthographic projection of the second isolation portion 132 onto the substrate 11. The cross-section of the isolation structure 13 can be I-shaped, perpendicular to the plane of the substrate 11 and along the line connecting the geometric centers of two adjacent isolation openings 1301.
[0092] In this embodiment, the material of the first isolation part 131 includes aluminum, silver or copper, the material of the second isolation part 132 includes titanium or molybdenum, and the material of the third isolation part 133 includes molybdenum or titanium.
[0093] Please refer to this again. Figure 4The distance d1 between the orthographic projection of the isolation structure 13 on the substrate 11 and the orthographic projection of the second pixel opening 12012 on the substrate 11 is less than the distance d2 between the orthographic projection of the isolation structure 13 on the substrate 11 and the orthographic projection of the first pixel opening 12011 on the substrate 11. Specifically, the orthographic projection of the isolation structure 13 on the substrate 11 is the orthographic projection of the second isolation portion 132 on the substrate 11; the orthographic projection of the second pixel opening 12012 on the substrate 11 is the orthographic projection of the sidewall of the second pixel opening 12012 closest to the first surface 12a on the substrate 11; and the orthographic projection of the first pixel opening 12011 on the substrate 11 is the orthographic projection of the sidewall of the first pixel opening 12011 closest to the substrate 11 on the substrate 11.
[0094] Optionally, the distance d3 between the orthographic projection of the second pixel opening 12012 on the substrate 11 and the orthographic projection of the first pixel opening 12011 on the substrate 11 is 0.5μm-4μm. For example, the distance d3 includes 0.5μm, 0.65μm, 0.82μm, 0.95μm, 1.05μm, 1.28μm, 1.45μm, 1.65μm, 1.76μm, 1.84μm, 1.96μm, 2.25μm, 2.72μm, 3.12μm, 3.45μm, 3.76μm, 3.92μm, or 4μm, etc.
[0095] In this embodiment, please refer again. Figure 4 The distance d1 between the orthographic projection of the isolation structure 13 on the substrate 11 and the orthographic projection of the second pixel opening 12012 on the substrate 11 is 0.5μm-3μm. For example, the distance d1 includes 0.5μm, 0.65μm, 0.82μm, 0.95μm, 1.05μm, 1.28μm, 1.45μm, 1.5μm, 1.81μm, 1.92μm, 2.41μm, 2.75μm or 3μm, etc.
[0096] Furthermore, the distance d4 between the orthographic projection of the side wall of the second pixel opening 12012 near the second surface 12b on the substrate 11 and the orthographic projection of the isolation structure 13 on the substrate 11 is smaller than the distance d1 between the orthographic projection of the side wall of the second pixel opening 12012 near the first surface 12a on the substrate 11 and the orthographic projection of the isolation structure 13 on the substrate 11.
[0097] Optionally, the distance d4 between the orthographic projection of the sidewall of the second pixel opening 12012 closest to the second surface 12b onto the substrate 11 and the orthographic projection of the isolation structure 13 onto the substrate 11 is greater than 0. This design allows the sidewall of the second pixel opening 12012 to be located outside the isolation structure 13. During the evaporation of the film layer, the thickness of the evaporated film layer at the sidewall of the second pixel opening 12012 can be relatively large. This ensures that the evaporated film layer is continuously distributed at the sidewall of the second pixel opening 12012, which is beneficial for the overlap between the evaporated electrode and the isolation structure 13.
[0098] Further, please refer to Figure 7 The substrate 11 includes a substrate 111 and an array wiring layer 112 located on the substrate 111. The array wiring layer 112 includes a power signal wiring 1121 located in the non-display area AB. In the non-display area AB, the pixel defining layer 12 includes a via 202. An isolation structure 13 is connected to the power signal wiring 1121 in the array wiring layer 112 through the via 202. The power signal wiring 1121 provides a stable power voltage signal to the electrode of the light-emitting device through the isolation structure 13. For example, the power signal wiring 1121 provides an ELVSS power voltage signal to the cathode of the light-emitting device through the isolation structure 13.
[0099] Further, please refer to Figure 8 The display panel 1 also includes a light-emitting device 14. In the direction away from the substrate 11, the light-emitting device 14 includes a first electrode 141, a light-emitting material layer 142, and a second electrode 143 stacked together. The first electrode 141 is located on the side of the pixel defining layer 12 facing the substrate 11. A first pixel opening 12011 partially exposes the first electrode 141. The second electrode 143 is at least partially overlapped with the isolation structure 13. The first electrode 141 can be the anode of the light-emitting device 14, and the second electrode 143 can be the cathode of the light-emitting device 14.
[0100] Further, please refer to Figure 9 In this embodiment, the display panel 1 further includes a first encapsulation layer 151. In the display area AA, the first encapsulation layer 151 includes a plurality of encapsulation units 1511 for encapsulating different light-emitting devices 14. The encapsulation units 1511 are located on the side of the light-emitting device 14 away from the substrate 11. The encapsulation units 151 extend from the surface of the light-emitting device 14 through the isolation structure 13 toward the sidewall of the isolation opening 1301 to the side of the isolation structure 13 away from the substrate 11. Optionally, two adjacent encapsulation units 1511 for encapsulating light-emitting devices 14 of different colors are disconnected on the side of the isolation structure 13 away from the substrate 11, and there is a gap between the encapsulation units 1511 located on the side of the isolation structure 13 away from the substrate 11 and the isolation structure 13. Two adjacent encapsulation units 1511 for encapsulating light-emitting devices 14 of the same color are connected to each other on the side of the isolation structure 13 away from the substrate 11.
[0101] Further, please refer to Figure 9 The display panel 1 further includes a second encapsulation layer 152, which is located on the side of the encapsulation unit 1511 away from the substrate 11, and at least covers the encapsulation unit 1511. Optionally, the second encapsulation layer 152 has a flat surface on the side away from the substrate 11.
[0102] Furthermore, the display panel 1 also includes a third encapsulation layer 153, which is located on the side of the second encapsulation layer 152 away from the substrate 11.
[0103] Optionally, the materials of the first encapsulation layer 151 and the third encapsulation layer 153 include inorganic encapsulation materials, and the material of the second encapsulation layer 152 includes organic encapsulation materials. That is, the first encapsulation layer 151 and the third encapsulation layer 153 are inorganic encapsulation layers, and the second encapsulation layer 152 is an organic encapsulation layer. For example, the first encapsulation layer 151 and the third encapsulation layer 153 can be formed by chemical vapor deposition (CVD), and the second encapsulation layer 152 can be formed by inkjet printing (IJP).
[0104] It is understood that the display panel 1 may also include a touch function layer, an optical adhesive layer, a polarizer and a cover plate, etc., which are stacked sequentially on the side of the third encapsulation layer 153 away from the substrate 11. The above-mentioned film layers are conventional film layers of the display panel, and will not be described in detail here.
[0105] Based on the same inventive concept, this embodiment also provides a method for manufacturing a display panel, please refer to... Figure 10 , Figure 11a and Figure 11b ,in Figure 10 This embodiment illustrates a flowchart of the method for manufacturing a display panel. Figure 11a and Figure 11b Example Figure 10 The corresponding process flow diagram is shown below. Figure 10 , Figure 11a and Figure 11b The method for manufacturing the display panel provided in this embodiment will be described in detail.
[0106] Step S11: Provide a substrate 11.
[0107] The substrate 11 has a multi-layer structure, including at least a plurality of conductive layers and an insulating layer located between adjacent conductive layers. The pixel circuit 111 in the substrate 11 is used to provide driving signals to the light-emitting device 13. For example, the conductive layer includes a metal conductive layer.
[0108] Step S12: A pixel defining material layer 20 is formed on one side of the substrate 11.
[0109] Step S13: The pixel defining material layer 20 located in the display area AA is patterned using the first mask 310, and the pixel defining material layer 20 in some areas is thinned, and the thinned pixel defining material layer 20 is used as the etching protection layer 201.
[0110] In this step, firstly, a photoresist layer is coated on the side of the pixel defining material layer 20 away from the substrate 11. Then, an etching window is formed on the photoresist layer by exposure through the first mask 310. Then, the pixel defining material layer 20 is etched and thinned through the etching window to obtain the protective layer 201.
[0111] Step S14: An isolation structure material layer 30 is fabricated on the side of the pixel defining material layer 20 away from the substrate. The isolation structure material layer 30 is patterned to obtain an isolation structure 13 and an isolation opening 1301.
[0112] The orthographic projection of the etch protection layer 201 on the substrate 11 is located within the orthographic projection of the isolation opening 1301 on the substrate 11. The etch protection layer 201 is used to protect the electrodes of the light-emitting device and prevent them from being etched and damaged during the formation of the isolation structure 13 and the isolation opening 1301.
[0113] In step S15, the pixel defining material layer 20 in the isolation opening 1301 is patterned using the second mask 320, and the etch protection layer 201 is removed to form a pixel defining layer 12 including the pixel opening 1201.
[0114] The process of patterning the pixel defining material layer 20 in the isolation opening 1301 using the second mask 320 is similar to the process of patterning the pixel defining material layer 20 using the first mask 310, and will not be described again here.
[0115] The pixel opening 1201 includes a first pixel opening 12011 and a second pixel opening 12012 that are connected. The first pixel opening 12011 is located on the side of the second pixel opening 12012 closer to the substrate 11. The orthographic projection of the first pixel opening 12011 on the substrate 11 is within the orthographic projection of the second pixel opening 12012 on the substrate 11. The distance between the orthographic projection of the isolation structure 13 on the substrate 11 and the orthographic projection of the second pixel opening 12012 on the substrate 11 is greater than 0. The first mask opening of the first mask corresponds to the first pixel opening, and the second mask opening of the second mask corresponds to the second pixel opening. The first mask opening 3101 of the first mask 310 corresponds to the first pixel opening 12011, and the second mask opening 3201 of the second mask 320 corresponds to the second pixel opening 12012. That is, the shape of the first mask opening 3101 determines the shape of the first pixel opening 12011, and the shape of the second mask opening 3201 determines the shape of the second pixel opening 12012. The shape of the first mask opening 3101 is the same as the shape of the second mask opening 3201. For example, the size of the first mask opening 3101 may be smaller than the size of the second mask opening 3201, and the size of the second mask opening 3201 may be smaller than the size of the mask opening corresponding to the isolation opening 1301.
[0116] Further, please refer to Figure 12 The substrate 11 includes a substrate 111 and an array wiring layer 112 located on the substrate 111. The array wiring layer 112 includes power signal wiring 1121 located in the non-display area AB. Before step S13, the display panel fabrication method provided in this embodiment further includes:
[0117] The pixel defining material layer 20 located in the non-display area AB is patterned using a third mask 330, and a via 202 is formed on the pixel defining material layer 20 located in the non-display area AB to expose the power signal traces 1121 in the array trace layer 112.
[0118] Step S14 further includes fabricating an isolation structure material layer 30 on the side of the pixel defining material layer 20 away from the substrate 11, and connecting it to the power signal trace 1121 in the array trace layer 112 through a via 202.
[0119] The method for fabricating the display panel provided in this embodiment first uses a first mask 310 to pattern the pixel defining material layer 20 to form an etchable protective layer 201. The etchable protective layer 201 protects the electrodes underneath. After forming the isolation structure 13, the etchable protective layer 201 is removed by etching using a second mask 310 to form a pixel opening 1201. In this way, the distance d1 between the orthographic projection of the second pixel opening 12012 on the substrate 11 and the orthographic projection of the isolation structure 13 on the substrate 11 is greater than 0. That is, at least part of the sidewall of the second pixel opening 12012 is not located below the isolation structure 13. In this way, when the electrodes of the light-emitting device are subsequently deposited, a film can be continuously formed at the sidewall position of the second pixel opening 12012, ensuring the electrical connection between the electrodes of the light-emitting device and the isolation structure 13 and avoiding the generation of dark spot defects.
[0120] Based on the same inventive concept, this application also provides an electronic device, which includes the display panel provided in the above embodiments, or a display panel prepared by the preparation method of the display panel provided in the above embodiments. The electronic device may include smartphones, tablets, in-vehicle display devices, smart wearable devices, televisions, laptops and other devices with display functions.
[0121] This application provides a display panel, a method for manufacturing the display panel, and an electronic device. In the display panel, the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0, that is, at least part of the sidewall of the second pixel opening is not located below the isolation structure. Since the film thickness of the vapor-deposited electrode below the isolation structure is relatively thin, this design facilitates the continuous film formation of the electrodes of the vapor-deposited light-emitting device at the sidewall position of the second pixel opening when a high-resolution display panel is formed using a patterned light-emitting device technique. This ensures the electrical connection between the electrodes of the light-emitting device and the isolation structure and avoids the generation of dark spot defects.
[0122] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A display panel, characterized in that, The display panel includes a display area, and the display panel further includes: substrate; A pixel defining layer is located on one side of the substrate in the display area. The pixel defining layer includes a pixel opening. In a direction perpendicular to the plane of the substrate, the pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is close to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate. An isolation structure is located on the side of the pixel defining layer away from the substrate, and the isolation structure encloses an isolation opening, which is connected to the corresponding pixel opening; The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0.
2. The display panel as described in claim 1, characterized in that, In the direction away from the substrate, the pixel defining layer in the display area includes a first pixel defining layer and a second pixel defining layer stacked together. The first pixel opening penetrates the first pixel defining layer, and the second pixel opening penetrates the second pixel defining layer. The surface of the first pixel defining layer away from the substrate is a first surface, and the surface of the second pixel defining layer away from the substrate is a second surface. The angle between the sidewall of the second pixel opening and the first surface near the first pixel opening is 110°-160°.
3. The display panel as described in claim 2, characterized in that, The isolation structure includes a first isolation portion and a second isolation portion. In the direction away from the substrate, the first isolation portion and the second isolation portion are stacked in sequence, and the orthogonal projection of the first isolation portion on the substrate is located within the orthogonal projection of the second isolation portion on the substrate. Preferably, the cross-sectional shape of the isolation structure is T-shaped on a cross-section perpendicular to the plane of the substrate and passing through the center of the isolation opening; Preferably, the isolation structure further includes a third isolation portion, wherein the third isolation portion, the first isolation portion, and the second isolation portion are stacked sequentially in a direction away from the substrate; Preferably, the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate; Preferably, the cross-sectional shape of the isolation structure is I-shaped on a cross-section perpendicular to the plane of the substrate and passing through the center of the isolation opening; Preferably, the material of the first isolation part includes aluminum, silver or copper, and / or the material of the second isolation part includes titanium or molybdenum, and / or the material of the third isolation part includes molybdenum or titanium.
4. The display panel as described in claim 3, characterized in that, The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is less than the distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the first pixel opening on the substrate. The orthographic projection of the isolation structure on the substrate is the orthographic projection of the second isolation portion on the substrate. The orthographic projection of the second pixel opening on the substrate is the orthographic projection of the side wall of the second pixel opening closest to the first surface on the substrate. The orthographic projection of the first pixel opening on the substrate is the orthographic projection of the side wall of the first pixel opening closest to the substrate on the substrate. Preferably, the distance between the orthographic projection of the second pixel opening on the substrate and the orthographic projection of the first pixel opening on the substrate is 0.5μm-4μm.
5. The display panel as described in claim 4, characterized in that, The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is 0.5μm-3μm.
6. The display panel as described in claim 2, characterized in that, The distance between the orthographic projection of the sidewall of the second pixel opening near the second surface on the substrate and the orthographic projection of the isolation structure on the substrate is smaller than the distance between the orthographic projection of the sidewall of the second pixel opening near the first surface on the substrate and the orthographic projection of the isolation structure on the substrate. Preferably, the distance between the orthographic projection of the sidewall of the second pixel opening closest to the second surface on the substrate and the orthographic projection of the isolation structure on the substrate is greater than 0.
7. The display panel as described in claim 2, characterized in that, The isolation structure is located on the side of the second pixel defining layer away from the substrate; Preferably, the pixel defining layer includes an inorganic pixel defining layer; Preferably, the material of the first pixel defining layer and the material of the second pixel defining layer are the same or different.
8. The display panel as described in claim 2, characterized in that, In a plane direction perpendicular to the substrate, the first pixel defining layer has a first thickness, and the second pixel defining layer has a second thickness, wherein the second thickness is 10%-25% of the first thickness.
9. The display panel as described in claim 2, characterized in that, The orthographic projection shape of the first pixel opening on the substrate is the same as the orthographic projection shape of the second pixel opening on the substrate; Preferably, the distance between the geometric center of the orthographic projection of the first pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding second pixel opening on the substrate is greater than or equal to 0. Preferably, the distance between the geometric center of the orthographic projection of at least one first pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding second pixel opening on the substrate is greater than 0. Preferably, the distance between the geometric center of the orthographic projection of the second pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding isolation opening on the substrate is greater than or equal to 0. Preferably, the distance between the geometric center of the orthographic projection of at least one second pixel opening on the substrate and the geometric center of the orthographic projection of the corresponding isolation opening on the substrate is greater than 0.
10. The display panel as claimed in claim 2, characterized in that, The display panel further includes a non-display area surrounding at least a portion of the display area, and the substrate includes a substrate and an array of traces on the substrate, wherein the array of traces includes power signal traces located in the non-display area; In the non-display area, the pixel defining layer includes vias, and the isolation structure is connected to the power signal traces in the array trace layer through the vias.
11. The display panel as described in any one of claims 1-10, characterized in that, The display panel also includes light-emitting devices; In a direction away from the substrate, the light-emitting device includes a first electrode, a light-emitting material layer, and a second electrode stacked together. The first electrode is located on the side of the pixel defining layer facing the substrate. The first pixel opening partially exposes the first electrode. The second electrode is at least partially overlapped with the isolation structure.
12. The display panel as claimed in claim 11, characterized in that, The display panel further includes a first encapsulation layer. In the display area, the first encapsulation layer includes multiple encapsulation units, and different encapsulation units encapsulate light-emitting devices within different isolation openings. Preferably, two adjacent packaging units that encapsulate different color light-emitting devices are disconnected on the side of the isolation structure away from the substrate, and there is a gap between the packaging unit located on the side of the isolation structure away from the substrate and the isolation structure; Preferably, two adjacent packaging units that encapsulate light-emitting devices of the same color are connected to each other on the side of the isolation structure away from the substrate; Preferably, the display panel further includes a second encapsulation layer, the second encapsulation layer at least covering the encapsulation unit; Preferably, the second encapsulation layer has a flat surface on the side away from the substrate; Preferably, the display panel further includes a third encapsulation layer, the third encapsulation layer being located on the side of the second encapsulation layer away from the substrate; Preferably, the materials of the first encapsulation layer and the third encapsulation layer include inorganic encapsulation materials, and the material of the second encapsulation layer includes organic encapsulation materials.
13. A display panel, characterized in that, The display panel includes a display area, and the display panel further includes: substrate; A pixel defining layer is located on one side of the substrate in the display area. The pixel defining layer includes a pixel opening. In a direction perpendicular to the plane of the substrate, the pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is close to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate. An isolation structure is located on the side of the pixel defining layer away from the substrate, and the isolation structure encloses an isolation opening, which is connected to the corresponding pixel opening; The angle between the sidewall of the second pixel opening and the surface of the pixel defining layer near the first pixel opening is 110°-160°, wherein the surface of the pixel defining layer near the first pixel opening is connected to the sidewall of the second pixel opening.
14. The display panel as claimed in claim 13, characterized in that, The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0.
15. A method for manufacturing a display panel, characterized in that, The display panel includes a display area, and the method includes: Provide a substrate; A pixel defining material layer is formed on one side of the substrate; The pixel defining material layer located in the display area is patterned using a first mask, and the pixel defining material layer in a certain area is thinned, with the thinned pixel defining material layer serving as an etching protection layer. An isolation structure material layer is fabricated on the side of the pixel defining material layer away from the substrate. The isolation structure material layer is patterned to obtain an isolation structure and an isolation opening. The orthographic projection of the etched protective layer on the substrate is located within the orthographic projection of the isolation opening on the substrate. The pixel defining material layer in the isolation opening is patterned using a second mask, and the etched protective layer is removed to form a pixel defining layer including the pixel opening. The pixel opening includes a first pixel opening and a second pixel opening that are connected. The first pixel opening is located on the side of the second pixel opening that is closer to the substrate. The orthographic projection of the first pixel opening on the substrate is located within the orthographic projection of the second pixel opening on the substrate. The distance between the orthographic projection of the isolation structure on the substrate and the orthographic projection of the second pixel opening on the substrate is greater than 0. The first mask opening of the first mask corresponds to the first pixel opening, and the second mask opening of the second mask corresponds to the second pixel opening.
16. The method for manufacturing a display panel as described in claim 15, characterized in that, The display panel further includes a non-display area surrounding at least a portion of the display area, the substrate includes a substrate and an array wiring layer located on the substrate, wherein the array wiring layer includes power signal wirings located in the non-display area, and prior to the steps of patterning the pixel defining material layer located in the display area using a first mask, thinning the pixel defining material layer at a portion of the location, and using the thinned pixel defining material layer as an etching protection layer, the method further includes: The pixel defining material layer located in the non-display area is patterned using a third mask to form vias in the pixel defining material layer located in the non-display area, so as to expose the power signal traces in the array trace layer. The step of fabricating an isolation structure material layer on the side of the pixel defining material layer away from the substrate, and patterning the isolation structure material layer to obtain the isolation structure and the isolation opening, further includes: An isolation structure material layer is formed on the side of the pixel defining layer away from the substrate, and is connected to the power signal traces in the array trace layer through the via.
17. An electronic device, characterized in that, The electronic device includes a display panel as described in any one of claims 1-14, or a display panel prepared by the method of preparing a display panel as described in any one of claims 15-16.
Citation Information
Patent Citations
Display panel
CN116583155A
Display panel and display device
CN116600606A
Display panel, manufacturing method thereof and display device
CN116669477A
Display panel and display device
CN116669480A
Display panel and display device
CN117062489A