Bandwidth resource allocation method and device, equipment and storage medium

Abstract

This invention relates to the field of network communication and discloses a bandwidth resource allocation method, apparatus, device, and storage medium. The bandwidth resource allocation method provided in this invention includes: obtaining a first bandwidth efficiency of the current network interface card (NIC); calculating memory bandwidth utilization when the first bandwidth efficiency is less than a first bandwidth efficiency threshold but greater than a second bandwidth efficiency threshold; performing first-level memory pooling optimization on the current physical machine node when the memory bandwidth utilization is greater than the memory utilization threshold, and calculating the optimized memory bandwidth utilization; if the optimized memory bandwidth utilization is still greater than the memory utilization threshold, then performing next-level memory pooling optimization on the current node again, until the optimized memory bandwidth utilization is less than the memory utilization threshold. The bandwidth resource allocation method provided in this invention can balance the memory bandwidth and NIC bandwidth requirements under high load scenarios, achieving accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

Description

Technical Field

[0001] This invention relates to the field of network communication, and in particular to a bandwidth resource allocation method, apparatus, device, and storage medium. Background Technology

[0002] With the development of cloud computing and big data technologies, data center networks are evolving towards high-speed Ethernet technology. The theoretical transmission rate of a single-node network interface device has exceeded the carrying capacity limit of the memory subsystem in traditional architectures. Currently, typical high-speed network interface devices generally adopt a queued parallel processing architecture, with bidirectional aggregated bandwidth reaching hundreds of Gbps. While the multi-channel memory architecture of a single node can achieve a certain degree of linear expansion of theoretical bandwidth by increasing the number of physical channels, it still faces the problem of insufficient bandwidth in complex workload scenarios.

[0003] Most existing bandwidth testing solutions employ a static memory bandwidth allocation strategy. While this can ultimately achieve the goal of expanding network I / O bandwidth, it still suffers from the following problems: 1. Unable to dynamically detect memory bandwidth bottlenecks.

[0004] 2. It is difficult to balance the bandwidth requirements of memory and network card under high load scenarios, and it is impossible to establish a dynamic memory resource allocation mechanism based on real-time network I / O bandwidth characteristics. Summary of the Invention

[0005] This invention provides a bandwidth resource allocation method, apparatus, device, and storage medium to solve at least one of the above-mentioned problems.

[0006] In a first aspect, embodiments of the present invention provide a bandwidth resource allocation method, comprising: obtaining a first bandwidth efficiency of the current network interface card; calculating memory bandwidth utilization when the first bandwidth efficiency is less than a first bandwidth efficiency threshold but greater than a second bandwidth efficiency threshold; when the memory bandwidth utilization is greater than the memory utilization threshold, performing first-level memory pooling optimization of the current physical machine node and calculating the optimized memory bandwidth utilization; if the optimized memory bandwidth utilization is still greater than the memory utilization threshold, then performing next-level memory pooling optimization of the current node again, mapping or sharing the memory of adjacent physical machines or adjacent racks of the current physical machine to or sharing the memory address space of the current physical machine, until the optimized memory bandwidth utilization is less than the memory utilization threshold.

[0007] The bandwidth resource allocation method provided in this invention uses a multi-level memory pooling optimization architecture to dynamically perceive memory bandwidth bottlenecks. It can continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming a multi-level memory expansion capability. It balances the memory bandwidth and network card bandwidth requirements under high load scenarios, and achieves accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0008] Optionally, the bandwidth resource allocation method further includes: when the first bandwidth efficiency is less than the second efficiency threshold, traversing all processor cores, sequentially binding the network card interrupt number of the current network card to each processor core, and detecting the second bandwidth efficiency after each binding; calculating the bandwidth efficiency improvement value after each binding based on the second bandwidth efficiency after each binding; binding the network card interrupt number to the processor core corresponding to the largest bandwidth efficiency improvement value, and calculating the bandwidth efficiency after binding.

[0009] Optionally, when the memory bandwidth is greater than the memory utilization threshold, the step of performing memory pooling optimization of the current node and calculating the optimized memory bandwidth utilization includes: when the memory bandwidth utilization is greater than the memory utilization threshold, performing first-level memory pooling optimization of the current node to obtain the memory bandwidth of the current node channel, and calculating the optimized memory bandwidth utilization after first-level optimization.

[0010] Optionally, the memory pooling optimization of the current node is performed again until the optimized memory bandwidth utilization is less than the memory utilization threshold. The steps for outputting the optimized bandwidth efficiency include: if the optimized memory bandwidth utilization after the first-level optimization is still greater than the memory utilization threshold, then the second-level memory pooling optimization of the current node is performed to map the memory of the adjacent physical machine to the memory address space of the current node, and the optimized memory bandwidth utilization after the second-level optimization is calculated; if the optimized memory bandwidth utilization after the second-level optimization is still greater than the memory utilization threshold, then the third-level memory pooling optimization of the current node is performed again to obtain the memory pool of the adjacent rack, so that the optimized memory bandwidth utilization after the third-level optimization is less than the memory utilization threshold.

[0011] Optionally, if the memory bandwidth utilization rate after the third-level tuning is still greater than the memory utilization threshold, the memory pooling tuning steps of the current node are re-executed until the memory bandwidth utilization rate after the third-level tuning is less than the memory utilization threshold.

[0012] Optionally, after the step where the optimized memory bandwidth utilization rate is less than the memory utilization rate threshold after three-level optimization, the bandwidth resource allocation method further includes: calculating the third bandwidth efficiency under the optimized memory bandwidth utilization rate; and calculating the bandwidth efficiency improvement value after memory pooling optimization based on the first bandwidth efficiency and the third bandwidth efficiency.

[0013] Optionally, the memory bandwidth utilization rate is calculated based on the following steps: obtaining the total theoretical memory bandwidth of the node where the current network card is located, as well as the first memory bandwidth passing through the processor core and the second memory bandwidth not passing through the processor core; calculating the total actual memory bandwidth based on the first memory bandwidth and the second memory bandwidth; and calculating the memory bandwidth utilization rate based on the total actual memory bandwidth and the total theoretical memory bandwidth.

[0014] Secondly, embodiments of the present invention provide a bandwidth resource allocation device, comprising: a data acquisition module for acquiring a first bandwidth efficiency of the current network interface card; a calculation module for calculating memory bandwidth utilization when the first bandwidth efficiency is less than a first bandwidth efficiency threshold but greater than a second bandwidth efficiency threshold; a first memory optimization module for performing first-level memory pooling optimization of the current physical machine node when the memory bandwidth is greater than the memory utilization threshold, and calculating the optimized memory bandwidth utilization; and a second memory optimization module for performing next-level memory pooling optimization of the current node again when the optimized memory bandwidth utilization is still greater than the memory utilization threshold, mapping or sharing the memory of adjacent physical machines or adjacent racks of the current physical machine to or sharing the memory address space of the current physical machine, until the optimized memory bandwidth utilization is less than the memory utilization threshold.

[0015] The bandwidth resource allocation device provided in this embodiment of the invention dynamically senses memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture. It can continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming a multi-level memory expansion capability. It balances the memory bandwidth and network card bandwidth requirements under high load scenarios, and realizes accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0016] Thirdly, embodiments of the present invention provide a bandwidth resource allocation device, comprising: a processor and a memory, wherein the memory stores instructions; the processor invokes the instructions in the memory to cause the processor to execute the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the present invention.

[0017] The bandwidth resource allocation method of the first aspect of the present invention includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold; when the memory bandwidth utilization rate is greater than the memory utilization rate threshold, performing first-level memory pooling optimization of the current physical machine node and calculating the optimized memory bandwidth utilization rate; if the optimized memory bandwidth utilization rate is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to or sharing the memory address space of the current physical machine, until the optimized memory bandwidth utilization rate is less than the memory utilization rate threshold.

[0018] The processor of the bandwidth resource allocation device provided in this embodiment of the invention executes the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the invention by calling instructions in the memory. It can dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture, continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance memory bandwidth and network card bandwidth requirements under high load scenarios, and realize accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0019] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing instructions that, when executed by a processor, implement the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the present invention.

[0020] The bandwidth resource allocation method of the first aspect of the present invention includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold; when the memory bandwidth utilization rate is greater than the memory utilization rate threshold, performing first-level memory pooling optimization of the current physical machine node and calculating the optimized memory bandwidth utilization rate; if the optimized memory bandwidth utilization rate is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to or sharing the memory address space of the current physical machine, until the optimized memory bandwidth utilization rate is less than the memory utilization rate threshold.

[0021] The instructions stored in the computer-readable storage medium provided in the embodiments of the present invention can be called by a processor and executed by the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the present invention. It can dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture, continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance memory bandwidth and network card bandwidth requirements under high load scenarios, and realize accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0022] Fifthly, embodiments of the present invention provide a computer program product, which includes a computer program that, when executed by a processor, implements the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the present invention.

[0023] The bandwidth resource allocation method of the first aspect of the present invention includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold; when the memory bandwidth utilization rate is greater than the memory utilization rate threshold, performing first-level memory pooling optimization of the current physical machine node and calculating the optimized memory bandwidth utilization rate; if the optimized memory bandwidth utilization rate is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to or sharing the memory address space of the current physical machine, until the optimized memory bandwidth utilization rate is less than the memory utilization rate threshold.

[0024] When the computer program in the computer program product provided in the embodiments of the present invention is executed by the processor, it can implement the bandwidth resource allocation method of any of the foregoing embodiments of the first aspect of the present invention, so that the computer program product can dynamically perceive the memory bandwidth bottleneck with a multi-level memory pooling optimization architecture, continuously expand the effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance the memory bandwidth and network card bandwidth requirements under high load scenarios, and realize accurate identification and hierarchical optimization of memory bandwidth bottleneck. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0026] Figure 1 This is a flowchart of the first embodiment of the bandwidth resource allocation method of the present invention; Figure 2 This is a flowchart of step S120 in the first embodiment of the bandwidth resource allocation method of the present invention; Figure 3 This is a flowchart of step S140 in the first embodiment of the bandwidth resource allocation method of the present invention; Figure 4 This is a flowchart of a second embodiment of the bandwidth resource allocation method of the present invention; Figure 5 This is a flowchart of one embodiment of the bandwidth resource allocation method of the present invention; Figure 6 This is a structural block diagram of one embodiment of the bandwidth resource allocation device of the present invention; Figure 7 This is a structural block diagram of one embodiment of the bandwidth resource allocation device of the present invention.

[0027] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0029] It should be noted that all directional indications in the embodiments of the present invention, such as up, down, left, right, front, back, etc., are only used to explain the relative positional relationship and movement of the components in a specific posture as shown in the attached figure. If the specific posture changes, the directional indication will also change accordingly.

[0030] Furthermore, the use of terms such as "first" and "second" in this invention is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0031] For ease of understanding, the bandwidth resource allocation method of this invention will be described below according to embodiments. Figure 1 This is a flowchart of the first embodiment of the bandwidth resource allocation method of the present invention, as follows: Figure 1 As shown, the bandwidth resource allocation method in this embodiment of the invention includes steps S110 to S140.

[0032] In step S110, the first bandwidth efficiency of the current network card is obtained.

[0033] In this embodiment, before testing the current network card, the first bandwidth efficiency of the network card of the current network node is first calculated. The bandwidth efficiency Unet of the network card is calculated as follows: network card actual bandwidth / network card theoretical bandwidth × 100%.

[0034] In this embodiment, the network card's bandwidth efficiency Unet is defined as the ratio of the maximum amount of data actually transmitted by the network card per unit time to the theoretical amount of data. That is, bandwidth efficiency = (actual bandwidth / theoretical bandwidth) * 100%. The theoretical bandwidth is generally the manufacturer's advertised maximum speed (e.g., gigabit network card = 1Gbps). Due to physical layer protocol limitations, the theoretical bandwidth is the ideal upper limit of the network card's data transmission speed, which is difficult to achieve in practice. The actual bandwidth is the data transmission speed of the network card in real-world applications.

[0035] In step S120, under the condition that the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold, the memory bandwidth utilization is calculated.

[0036] In this application, the memory bandwidth utilization rate refers to the read / write bandwidth utilization rate of the memory controller. Since memory pooling can simultaneously improve the bandwidth utilization efficiency of the system level (the entire system memory bus) and the bandwidth utilization rate of the memory controller, this embodiment selects only the bandwidth utilization rate of the memory controller as the judgment condition in order to facilitate monitoring and reduce unnecessary cost investment.

[0037] like Figure 2 As shown, in this embodiment, the memory bandwidth utilization is calculated based on the following steps: Step S121: Obtain the total theoretical memory bandwidth of the node where the current network card is located, as well as the first memory bandwidth passing through the processor core and the second memory bandwidth not passing through the processor core.

[0038] Step S122: Calculate the total actual memory bandwidth based on the first memory bandwidth and the second memory bandwidth.

[0039] Step S123: Calculate the memory bandwidth utilization rate based on the actual total memory bandwidth and the theoretical total memory bandwidth.

[0040] In this embodiment, the first bandwidth efficiency threshold is 95% and the second bandwidth efficiency threshold is 70%. The specific values ​​of the first and second bandwidth efficiency thresholds can be set as needed, and this application does not limit them. If the calculated first bandwidth efficiency is greater than or equal to the first bandwidth efficiency threshold, that is, the first bandwidth efficiency Unet≥95%, it proves that the bandwidth efficiency of the current network card meets the standard, and the resource allocation test result is directly output, ending the resource allocation test.

[0041] When the calculated first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold, i.e., 70% < first bandwidth efficiency Unet < 95%, the memory bandwidth utilization is calculated, where memory bandwidth utilization Umem = actual memory bandwidth / theoretical memory bandwidth × 100%.

[0042] Specifically, the steps for calculating the total memory bandwidth of the current node channel are as follows: Enable PCM monitoring tools; #. / pcm-df.x –r –cm: View the real-time memory bandwidth A initiated by the CPU and passing through the CPU cache; #. / pcm-df.x –r –iom: View the real-time memory bandwidth (B) initiated by the CPU or PCIe, without going through the CPU cache; This leads to the conclusion that the total actual physical memory bandwidth Umx = real-time memory bandwidth A + real-time memory bandwidth B, while the theoretical memory bandwidth can be obtained based on the hardware configuration of the current network node.

[0043] By utilizing memory bandwidth utilization and calculating the current first bandwidth efficiency, appropriate memory bandwidth is allocated to perform memory pooling optimization on the current node in order to expand network bandwidth. The specific steps are as follows.

[0044] In step S130, when the memory bandwidth is greater than the memory utilization threshold, the first-level memory pooling optimization of the current physical machine node is performed, and the memory bandwidth utilization after optimization is calculated.

[0045] In some optional embodiments, when the memory bandwidth utilization is greater than the memory utilization threshold, the first-level memory pooling optimization of the current node is performed to obtain the memory bandwidth of the current node channel, and the optimized memory bandwidth utilization after the first-level optimization is calculated.

[0046] In this embodiment, the memory utilization threshold is 90%. The specific value of the memory utilization threshold can be set as needed, and this application does not limit it.

[0047] When the calculated memory bandwidth utilization rate Umem≥90%, it is determined that the physical memory bandwidth of the current node limits the network card performance. CXL level 1 memory pooling optimization is performed, and a high-bandwidth memory module is connected through the internal PCIe slot of the network node to improve the memory bandwidth of the current node channel and expand the network bandwidth.

[0048] In step S140, if the memory bandwidth utilization rate is still greater than the memory utilization rate threshold after optimization, the next level of memory pooling optimization of the current node is performed again, and the memory of the adjacent physical machines or adjacent racks of the current physical machine is mapped to or shared to the memory address space of the current physical machine until the memory bandwidth utilization rate is less than the memory utilization rate threshold after optimization.

[0049] like Figure 3 As shown, in some optional embodiments, step S140 includes steps S141 to S142.

[0050] In step S141, if the memory bandwidth utilization rate after the first-level tuning is still greater than the memory utilization threshold, then the second-level memory pooling tuning of the current node is performed to map the memory of the adjacent physical machine to the memory address space of the current node, and the memory bandwidth utilization rate after the second-level tuning is calculated.

[0051] In step S142, if the memory bandwidth utilization rate after the second-level optimization is still greater than the memory utilization threshold, then the third-level memory pooling optimization of the current node is performed again to obtain the memory pool of the adjacent rack, so that the memory bandwidth utilization rate after the third-level optimization is less than the memory utilization threshold.

[0052] Furthermore, if the memory bandwidth utilization rate after the third-level tuning is still greater than the memory utilization threshold, the memory pooling tuning steps for the current node are re-executed until the memory bandwidth utilization rate after the third-level tuning is less than the memory utilization threshold.

[0053] In this embodiment, after the first-level memory pooling optimization, the memory bandwidth utilization Umem is recalculated. If the memory bandwidth utilization Umem is still greater than 90%, it is determined that the physical memory bandwidth of the current node still limits the network card performance. Then, the second-level memory pooling optimization of CXL is performed. A memory pool is created using the CXL switch, the memory access path is reconstructed, and the memory of the adjacent physical machine is mapped to the memory address space of this node, thereby diverting the memory pressure of the current network node and expanding the memory bandwidth of the current network node.

[0054] After secondary memory pooling optimization, the memory bandwidth utilization Umem is recalculated. If the memory bandwidth utilization Umem is still greater than 90%, it is determined that the physical memory bandwidth of the current node still limits the network card performance. CXL tertiary memory pooling optimization is then performed. By using multi-layer switch topology, rack-level memory pools are connected to build a memory network to achieve cross-rack memory sharing, thereby expanding the memory bandwidth of the current network node until the memory bandwidth utilization is less than the memory utilization threshold after optimization.

[0055] Specifically, the steps for utilizing CXL memory pooling are as follows: Level 1 pooling: Start the CXL driver and directly use the extended memory of the PCIe slot through the NUMA node allocation interface.

[0056] Secondary pooling: Connect the current network node and the adjacent physical machine node through the CXL switch, enable the system's CXL mode, configure the memory controller to "Flexible Mode", create a logical memory pool, bind the adjacent physical machine node to the memory pool and allocate the required capacity, and map the CXL memory pool to the current network node to expand memory bandwidth.

[0057] Three-level pooling: The CXL memory manager is used to allocate memory capacity and bandwidth to the current network node, and a memory network is built to achieve cross-rack memory sharing, thereby expanding the memory bandwidth of the current network node.

[0058] In other words, the target of memory pooling tuning is always the current physical machine. In the first level of memory pooling tuning, extended memory is allocated from the current physical machine. The second level of memory pooling tuning allocates memory from neighboring physical machines to the current physical machine. When the memory allocation from neighboring physical machines still does not meet the demand, the third level of memory pooling tuning is performed, which shares memory from the entire rack containing multiple physical machines to the current physical machine.

[0059] Furthermore, after the step where the memory bandwidth utilization rate is less than the memory utilization threshold after three levels of optimization, the bandwidth resource allocation method also includes steps S143 to S144.

[0060] In step S143, the third bandwidth efficiency under the optimized memory bandwidth utilization is calculated.

[0061] In step S144, the bandwidth efficiency improvement value after memory pooling optimization is calculated based on the first bandwidth efficiency and the third bandwidth efficiency.

[0062] In this embodiment, after memory pooling optimization, the network interface bandwidth and memory bandwidth after memory pooling are re-detected and calculated. Based on the first bandwidth efficiency before memory pooling optimization and the third bandwidth efficiency after memory pooling optimization, the percentage improvement of memory pooling optimization is calculated, and the bandwidth resource allocation result is output.

[0063] This application achieves accurate identification and hierarchical optimization of memory bandwidth bottlenecks by integrating network interface card (NIC) core binding technology with the CXL multi-level memory pooling architecture. By establishing a complete NIC testing benchmark, a performance evaluation model is constructed using hardware configuration checks and theoretical bandwidth calculations. Real-time bandwidth monitoring is then used to obtain key indicators such as memory controller utilization and NIC bandwidth efficiency.

[0064] When network interface card (NIC) bandwidth efficiency is detected to be below a threshold, a tiered optimization mechanism is automatically triggered. During the NIC core binding phase, precise allocation of computing resources is achieved by matching NIC interrupt numbers with NUMA nodes, effectively reducing communication latency between the CPU and NIC. When memory bandwidth becomes a bottleneck, a three-tiered CXL memory pooling strategy is adopted. First, the high-speed PCIe channel of the local network node is used to expand high-bandwidth memory modules to overcome the physical limitations of the motherboard. Then, a cross-physical machine memory pool is built through the CXL switch to achieve resource distribution. Finally, a cross-node shared architecture is formed based on the rack-level memory network. This multi-level optimization mechanism can dynamically sense changes in memory pressure and continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming elastic memory expansion capabilities from single machine to rack level.

[0065] Figure 4 This is a flowchart of a second embodiment of the bandwidth resource allocation method of the present invention. Figure 5 This is a flowchart illustrating one embodiment of the bandwidth resource allocation method of the present invention. Some steps of the second embodiment are the same as those of the first embodiment; the differences between the two will be described below, while the similarities will not be detailed further.

[0066] like Figure 4 and Figure 5 As shown, in the second embodiment of this application, the bandwidth resource allocation method includes steps S2110 to S230.

[0067] In step S210, when the first bandwidth efficiency is less than the second efficiency threshold, all processor cores are traversed, and the network card interrupt number of the current network card is sequentially bound to each processor core, and the second bandwidth efficiency after each binding is detected.

[0068] In step S220, the bandwidth efficiency improvement value after each binding is calculated based on the second bandwidth efficiency after each binding.

[0069] In step S230, the network card interrupt number is bound to the processor core corresponding to the maximum bandwidth efficiency improvement value, and the bandwidth efficiency after binding is calculated.

[0070] In this embodiment, if the first bandwidth efficiency is less than 70%, the network card core binding optimization test is performed directly. The NUMA node to which the network card belongs is determined based on the network card interrupt number and the currently allocated processor core.

[0071] By iterating through all processor cores, the network interface card (NIC) terminal number is bound to one, two, or more processor cores. For example, the NIC interrupt number is bound to a specified CPU core: node0, node0~1, node0~2, ..., node0~m, and so on, until all CPU node resources are bound. Each binding is followed by a NIC bandwidth test. The NIC bandwidth test data after each binding is collected, and the percentage improvement of the first test result by each binding optimization is calculated to obtain the bandwidth efficiency after binding. From this, the network bandwidth allocation scheme with the optimal bandwidth efficiency is determined.

[0072] When memory bandwidth is insufficient, the current method is generally to expand memory bandwidth by increasing the number of physical memory modules within the node, thereby overcoming the network card bandwidth limitation caused by memory bottlenecks. However, the traditional method of manually adding memory modules to expand bandwidth requires stopping the system and opening the case, which not only increases labor costs and reduces testing efficiency, but is also limited by the number of physical memory slots on the motherboard, and there is a theoretical upper limit to the number of physical memory modules that can be expanded.

[0073] The methods and steps described in this application ensure that the optimization effect can be quantified and evaluated through a real-time performance feedback mechanism. This achieves coordinated optimization of network card throughput and memory bandwidth, significantly enhancing resource utilization efficiency and system scalability in complex computing scenarios. It enables automated testing, hierarchical multi-method optimization, and visualized result display, reducing manual parameter adjustments and maximizing network I / O bandwidth performance. By constructing a closed-loop optimization framework, it automatically performs bandwidth stress testing and parameter scanning, allowing testers to intuitively locate bottlenecks and verify optimization effects.

[0074] The bandwidth resource allocation method provided in this embodiment of the invention includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold; when the memory bandwidth utilization rate is greater than the memory utilization rate threshold, performing first-level memory pooling optimization of the current physical machine node and calculating the optimized memory bandwidth utilization rate; if the optimized memory bandwidth utilization rate is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to the memory address space of the current physical machine, until the optimized memory bandwidth utilization rate is less than the memory utilization rate threshold.

[0075] The bandwidth resource allocation method provided in this invention uses a multi-level memory pooling optimization architecture to dynamically perceive memory bandwidth bottlenecks. It can continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming a multi-level memory expansion capability. It balances the memory bandwidth and network card bandwidth requirements under high load scenarios, and achieves accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0076] The following is a specific embodiment of the bandwidth resource allocation method of the present invention, which includes the following steps: Taking server equipment as an example, before performing memory pooling optimization on the server, test and optimization environment preparation is carried out.

[0077] First, prepare the testing and optimization environment: (1) Data acquisition: Check the server hardware configuration and calculate the theoretical memory bandwidth and network card bandwidth of the local node of the server.

[0078] (2) Bandwidth monitoring: Perform network card bandwidth test to obtain network card bandwidth efficiency Unet, and use PCM tool to monitor the memory bandwidth of this node in real time to obtain the memory bandwidth utilization rate Umem of the memory controller.

[0079] Memory bandwidth utilization Umem = Actual memory bandwidth / Theoretical memory bandwidth × 100%; Network interface card (NIC) bandwidth efficiency Unet = (Actual NIC bandwidth / Theoretical NIC bandwidth) × 100%; Second, NIC core binding optimization test: (1) When the calculated NIC bandwidth efficiency Unet < 70%, it is determined that the NIC bandwidth test result can be optimized, and NIC core binding optimization is preferentially performed.

[0080] (2) Determine the NIC interrupt number and the currently allocated CPU cores, and confirm the NUMA node to which the NIC belongs.

[0081] (3) Traverse the optimization, and bind the NIC interrupt number to the specified CPU cores respectively, for example: node0, node0~1, node0~2,..., node0~m, incrementing successively until all CPU node resources, and perform a NIC bandwidth test after binding the cores respectively.

[0082] (4) Collect the NIC bandwidth test data after each core binding, and calculate the percentage increase in the first test result after each core binding optimization.

[0083] (5) Output the test results and end the test.

[0084] If the test result is that the NIC bandwidth efficiency Unet > 95%, it is determined that the NIC bandwidth test result meets the standard, and no memory pooling optimization is required, and the test ends.

[0085] If the NIC bandwidth efficiency Unet < 95%, for example, when the NIC bandwidth efficiency is in the range of 70% < Unet < 95%, it is determined that the NIC bandwidth efficiency can be further optimized, and the memory pooling optimization test is started.

[0086] Third, refer to Figure 5 , and perform CXL memory pooling optimization test: (1) When the NIC bandwidth efficiency 70% < Unet < 95%, it is determined that the NIC bandwidth test result can be further optimized.

[0087] (2) Calculate the memory bandwidth Umem. When Umem > 90%, it is determined that the physical memory bandwidth of the current node limits the NIC performance.

[0088] The steps to calculate the total physical memory bandwidth of the current node channel are as follows: Enable the PCM monitoring tool: #. / pcm-df.x –r –cm: View the real-time memory bandwidth A initiated by the CPU and passing through the CPU Cache; #. / pcm-df.x –r –iom: View the real-time memory bandwidth B initiated by the CPU or PCIe and not passing through the CPU Cache; This leads to the conclusion that the total actual physical memory bandwidth Umx = real-time memory bandwidth A + real-time memory bandwidth B, while the theoretical memory bandwidth can be obtained based on the hardware configuration of the current network node.

[0089] (3) First, perform CXL Level 1 memory pooling optimization: Connect a high-bandwidth memory module to the PCIe slot inside the application server node, start the CXL driver, and directly use the extended memory of the PCIe slot through the NUMA node allocation interface to break the motherboard memory bandwidth limitation. For example, after installing the CXL memory extension module in the PCIe slot and connecting it to the CPU through the PCIe link, use the numactl command of the CXL management tool or the CXL driver to map the local DDR memory and the CXL extended memory to a unified address space.

[0090] (4) Recalculate the memory bandwidth Umem. When Umem > 90%, it is determined that the physical memory bandwidth of the current node still limits the network card performance.

[0091] (5) Perform CXL secondary memory pooling optimization: Use the CXL switch to create a memory pool, reconstruct the memory access path, and map the memory of the nearby physical machine to the memory address space of this node, thereby diverting the memory pressure of this node and expanding the memory bandwidth of this node.

[0092] This embodiment connects the local node with neighboring physical machine nodes by deploying a CXL switch. Based on the CXL 2.0 protocol, it introduces memory pooling and switch functionality to achieve memory pooling, tiering, and dynamic resource allocation. For example, by enabling CXL mode in the device BIOS and configuring the memory controller to "Flexible Mode," a logical memory pool is created. Neighboring physical machine nodes are bound to the memory pool, and the required memory capacity for the local node is allocated. The CXL memory pool is then mapped to the extended memory bandwidth of the local node.

[0093] (6) Recalculate the memory bandwidth Umem. When Umem > 90%, it is determined that the physical memory bandwidth of the current node still limits the network card performance.

[0094] (7) Perform CXL three-level memory pooling optimization: Utilize the multi-layer switch topology to connect the memory pool on the rack-level physical machine, use the CXL memory manager to allocate memory capacity and bandwidth to the nodes of this physical machine, build a memory network to realize cross-rack memory sharing, thereby expanding the memory bandwidth of this node.

[0095] For example, using the CXL 3.0 Fabric architecture, a multi-layer switch topology connects the rack-level memory pool core layer switch to the aggregation layer, the aggregation layer connects to the access layer, the access layer directly connects the nodes and memory modules, and CXL memory extenders are deployed inside the nodes.

[0096] According to the CXL3.0 protocol, distributed memory management software (such as MemVerga Qos) is used to perform cross-node memory mapping and dynamic data placement, and UVM unified virtual memory is used to achieve cross-node data consistency.

[0097] (8) After the third-level memory pooling optimization, the performance feedback is carried out, the network card bandwidth and memory bandwidth are tested again, the improvement of network card bandwidth and memory bandwidth after memory pooling is monitored, and the test results and the percentage improvement of pooling optimization are output.

[0098] Through the above-described method embodiments of this application, a complete network card testing benchmark is established by integrating network card core binding technology and CXL multi-level memory pooling architecture. By checking hardware configuration and obtaining theoretical bandwidth, key indicators such as memory controller utilization and network card bandwidth efficiency are calculated, thus achieving accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0099] When network interface card (NIC) bandwidth efficiency is detected to be below a threshold, a tiered optimization mechanism is automatically triggered: During the NIC core binding phase, precise allocation of computing resources is achieved by matching the NIC interrupt number with the NUMA node, effectively reducing communication latency between the CPU and the NIC. When memory bandwidth becomes a bottleneck, a three-tiered CXL memory pooling strategy is adopted. First, the high-speed PCIe channel of this node is used to expand high-bandwidth memory modules to overcome the physical limitations of the motherboard. Then, a cross-physical machine memory pool is built through the CXL switch to achieve resource distribution. Finally, a cross-node shared architecture is formed based on the rack-level memory network. This multi-level optimization mechanism can dynamically sense changes in memory pressure and continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming elastic memory expansion capabilities from single machine to rack level.

[0100] In practical applications, the method provided in this embodiment can achieve coordinated optimization of network card throughput and memory bandwidth. Through a real-time performance feedback mechanism, it ensures that the optimization effect can be quantitatively evaluated, providing a full-process solution from diagnosis to optimization for improving data center network performance. This significantly enhances resource utilization efficiency and system scalability in complex computing scenarios.

[0101] In addition to the above method embodiments, the present invention also provides, for example, Figure 6 The bandwidth resource allocation device shown includes a data acquisition module 201, a calculation module 202, a first memory optimization module 203, and a second memory optimization module 204.

[0102] The data acquisition module 201 is used to obtain the first bandwidth efficiency of the current network card. The calculation module 202 is used to calculate the memory bandwidth utilization when the first bandwidth efficiency is less than the first bandwidth efficiency threshold but greater than the second bandwidth efficiency threshold. The first memory tuning module 203 is used to perform first-level memory pooling tuning of the current physical machine node when the memory bandwidth is greater than the memory utilization threshold, and calculate the memory bandwidth utilization after tuning. The second memory tuning module 204 is used to perform the next-level memory pooling tuning of the current node again when the memory bandwidth utilization after tuning is still greater than the memory utilization threshold, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to the memory address space of the current physical machine, until the memory bandwidth utilization after tuning is less than the memory utilization threshold.

[0103] Each module in the bandwidth resource allocation device of this invention implements the steps of the bandwidth resource allocation method in the above embodiments of this application, enabling the bandwidth resource allocation device provided by this invention to dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture. It can continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, forming a multi-level memory expansion capability, balancing memory bandwidth and network card bandwidth requirements under high load scenarios, and realizing accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0104] In addition to the above method embodiments, the present invention also provides, for example, Figure 7 The bandwidth resource allocation device shown includes a processor 301 and a memory 302, wherein the memory 302 stores instructions; the processor 301 calls the instructions in the memory 302 to cause the processor 301 to execute the bandwidth resource allocation method of any of the above embodiments of the present invention.

[0105] The bandwidth resource allocation method in the above embodiments of this application includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold but greater than the second bandwidth efficiency threshold; performing first-level memory pooling optimization of the current node when the memory bandwidth is greater than the memory utilization rate threshold, and calculating the memory bandwidth utilization rate after optimization; if the memory bandwidth utilization rate after optimization is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, until the memory bandwidth utilization rate after optimization is less than the memory utilization rate threshold.

[0106] The bandwidth resource allocation device provided in this embodiment of the invention, by implementing the above method, can dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture, continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance memory bandwidth and network card bandwidth requirements under high load scenarios, and achieve accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0107] Furthermore, the bandwidth resource allocation device provided in this embodiment of the invention may also include a communication interface 303 and a bus 304, with the processor 301, memory 302 and communication interface 303 electrically connected via the bus 304.

[0108] The memory 302 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 303 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc. The bus 304 can be an ISA bus, PCI bus, or EISA bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 7 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0109] Specifically, the bandwidth resource allocation device provided in this embodiment of the invention can be a computer device, which can be a server. This computer device includes a processor 301, a communication interface 303, a memory 302, and a database (not shown in the figure) connected via a bus 304. The processor 301 of the computer device provides computing and control capabilities. The memory 302 of the computer device includes internal memory and a non-volatile storage medium. The non-volatile storage medium stores an operating system, computer programs, and a database (not shown in the figure). The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database of the computer device stores data for executing the steps of the above-described method. The communication interface 303 of the computer device is used for communication with external terminals via a network connection. When the computer program is executed by the processor 301, it implements the bandwidth resource allocation method described above in this application.

[0110] Processor 301 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of processor 301 or by instructions in software form. The processor 301 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application-Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software module can reside in a readily available storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory 302. The processor 301 reads the information from memory 302 and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiments.

[0111] This invention also provides a computer-readable storage medium, which can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to perform the steps of the bandwidth resource allocation method described above.

[0112] The bandwidth resource allocation method in the above embodiments of this application includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold but greater than the second bandwidth efficiency threshold; performing first-level memory pooling optimization of the current node when the memory bandwidth is greater than the memory utilization rate threshold, and calculating the memory bandwidth utilization rate after optimization; if the memory bandwidth utilization rate after optimization is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, until the memory bandwidth utilization rate after optimization is less than the memory utilization rate threshold.

[0113] The computer-readable storage medium provided in this embodiment of the invention stores data and computer-executable instructions for the bandwidth resource allocation method described above. The bandwidth resource allocation method includes: obtaining a first bandwidth efficiency of the current network card; calculating memory bandwidth utilization when the first bandwidth efficiency is less than a first bandwidth efficiency threshold but greater than a second bandwidth efficiency threshold; performing memory pooling optimization on the current node when the memory bandwidth is greater than the memory utilization threshold, and calculating the optimized memory bandwidth utilization; if the optimized memory bandwidth utilization is still greater than the memory utilization threshold, then performing memory pooling optimization on the current node again, until the optimized memory bandwidth utilization is less than the memory utilization threshold.

[0114] The computer-readable storage medium provided in this embodiment of the invention, by implementing the above method, can dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture, continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance memory bandwidth and network card bandwidth requirements under high load scenarios, and achieve accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0115] The present invention also provides a computer program product that, when executed on a data processing device, is adapted to execute a program having the following steps for initializing a bandwidth resource allocation method.

[0116] The bandwidth resource allocation method includes: obtaining the first bandwidth efficiency of the current network card; calculating the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold but greater than the second bandwidth efficiency threshold; performing first-level memory pooling optimization of the current node when the memory bandwidth is greater than the memory utilization rate threshold, and calculating the memory bandwidth utilization rate after optimization; if the memory bandwidth utilization rate after optimization is still greater than the memory utilization rate threshold, then performing next-level memory pooling optimization of the current node again, until the memory bandwidth utilization rate after optimization is less than the memory utilization rate threshold.

[0117] The computer program product provided in this embodiment of the invention, by implementing the above method, can dynamically perceive memory bandwidth bottlenecks with a multi-level memory pooling optimization architecture, continuously expand effective bandwidth through memory access path reconstruction and resource pooling technology, form a multi-level memory expansion capability, balance memory bandwidth and network card bandwidth requirements under high load scenarios, and achieve accurate identification and hierarchical optimization of memory bandwidth bottlenecks.

[0118] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0119] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0120] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bandwidth resource allocation method, characterized in that, include: Get the current network interface card's first bandwidth efficiency; Calculate memory bandwidth utilization when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold; When the memory bandwidth utilization rate is greater than the memory utilization rate threshold, perform first-level memory pooling optimization on the current physical machine node and calculate the optimized memory bandwidth utilization rate. If the optimized memory bandwidth utilization is still greater than the memory utilization threshold, then the next level of memory pooling optimization for the current node is performed again, mapping or sharing the memory of the current physical machine's neighboring physical machines or adjacent racks to the memory address space of the current physical machine, until the optimized memory bandwidth utilization is less than the memory utilization threshold.

2. The bandwidth resource allocation method according to claim 1, characterized in that, The method further includes: When the first bandwidth efficiency is less than the second efficiency threshold, all processor cores are traversed, and the network card interrupt number of the current network card is sequentially bound to each of the processor cores, and the second bandwidth efficiency after each binding is detected. Calculate the bandwidth efficiency improvement value for each binding based on the second bandwidth efficiency after each binding; Bind the network card interrupt number to the processor core corresponding to the largest bandwidth efficiency improvement value, and calculate the bandwidth efficiency after binding.

3. The bandwidth resource allocation method according to claim 1, characterized in that, When the memory bandwidth utilization rate is greater than the memory utilization rate threshold, the steps of performing first-level memory pooling optimization on the current node and calculating the optimized memory bandwidth utilization rate include: When the memory bandwidth utilization rate is greater than the memory utilization rate threshold, perform first-level memory pooling optimization of the current node to obtain the memory bandwidth of the current node channel, and calculate the optimized memory bandwidth utilization rate after first-level optimization.

4. The bandwidth resource allocation method according to claim 3, characterized in that, The steps of performing the next level of memory pooling optimization on the current node again, until the optimized memory bandwidth utilization is less than the memory utilization threshold, and outputting the optimized bandwidth efficiency include: If the memory bandwidth utilization rate after the first-level tuning is still greater than the memory utilization threshold, then the second-level memory pooling tuning of the current node is performed to map the memory of the adjacent physical machine to the memory address space of the current node, and the memory bandwidth utilization rate after the second-level tuning is calculated. If the memory bandwidth utilization rate after the second-level optimization is still greater than the memory utilization threshold, then the third-level memory pooling optimization of the current node is performed again to obtain the memory pool of the adjacent rack, so that the memory bandwidth utilization rate after the third-level optimization is less than the memory utilization threshold.

5. The bandwidth resource allocation method according to claim 4, characterized in that, If the optimized memory bandwidth utilization rate after the third-level optimization is still greater than the memory utilization threshold, then the memory pooling optimization steps of the current node are re-executed until the optimized memory bandwidth utilization rate after the third-level optimization is less than the memory utilization threshold.

6. The bandwidth resource allocation method according to claim 4, characterized in that, After the step where the optimized memory bandwidth utilization is less than the memory utilization threshold following the third-level optimization, the method further includes: Calculate the third bandwidth efficiency under the optimized memory bandwidth utilization; Based on the first bandwidth efficiency and the third bandwidth efficiency, calculate the bandwidth efficiency improvement value after memory pooling optimization.

7. The bandwidth resource allocation method according to claim 1, characterized in that, The memory bandwidth utilization rate is calculated based on the following steps: Obtain the total theoretical memory bandwidth of the node where the current network card is located, as well as the first memory bandwidth passing through the processor core and the second memory bandwidth not passing through the processor core; Calculate the total actual memory bandwidth based on the first memory bandwidth and the second memory bandwidth; The memory bandwidth utilization rate is calculated based on the actual total memory bandwidth and the theoretical total memory bandwidth.

8. A bandwidth resource allocation device, characterized in that, The bandwidth resource allocation device includes: The data acquisition module is used to obtain the current network card's first bandwidth efficiency; The calculation module is used to calculate the memory bandwidth utilization rate when the first bandwidth efficiency is less than the first bandwidth efficiency threshold and greater than the second bandwidth efficiency threshold. The first memory tuning module is used to perform first-level memory pooling tuning of the current node when the memory bandwidth utilization is greater than the memory utilization threshold, and to calculate the memory bandwidth utilization after tuning. The second memory tuning module is used to perform the next level memory pooling tuning of the current node again when the memory bandwidth utilization after tuning is still greater than the memory utilization threshold, until the memory bandwidth utilization after tuning is less than the memory utilization threshold.

9. A bandwidth resource allocation device, characterized in that, The bandwidth resource allocation device includes: a processor and a memory, wherein the memory stores instructions; The processor invokes the instructions in the memory to cause the bandwidth resource allocation device to implement the bandwidth resource allocation method as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing instructions thereon, characterized in that, When the instruction is executed by the processor, it implements the bandwidth resource allocation method as described in any one of claims 1 to 7.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the bandwidth resource allocation method as described in any one of claims 1 to 7.

Images