A method for fabricating Ga2O3 / GeO2 lateral heterojunction devices
By employing a method for fabricating Ga2O3/GeO2 lateral heterojunction devices, the issues of uniformity and interface stability in Ga2O3-based heterojunction devices have been resolved, achieving high-quality carrier transport and reverse leakage suppression, which is suitable for planar device integration.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NINGBO UNIV
- Filing Date
- 2026-01-22
- Publication Date
- 2026-06-02
AI Technical Summary
Existing Ga2O3-based heterojunction devices suffer from poor consistency and unstable interface states during fabrication, making it difficult to achieve high-quality p-type doping. This limits the improvement of the device's reverse breakdown capability. Furthermore, the narrow vertical stacking process window easily introduces interface contamination and defects.
The fabrication method of Ga2O3/GeO2 lateral heterojunction device involves forming a Ga2O3 layer on the substrate surface and etching it to form a stepped structure, depositing SiO2 and GeO2 layers to form a lateral splicing interface, and promoting interdiffusion and bonding of the interface through annealing treatment. Finally, a metal electrode is deposited to form a lateral heterojunction.
It achieves a highly consistent and stable lateral heterojunction, improves carrier transport modulation and reverse leakage current suppression capabilities, is suitable for planar device process integration, and avoids interface contamination and defects introduced by multiple depositions.
Smart Images
Figure CN122138443A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor materials, and more particularly to a method for fabricating a Ga2O3 / GeO2 lateral heterojunction device. Background Technology
[0002] With the increasing application of power electronic devices, more stringent operating conditions such as high temperature, high voltage, high electric field, and low power consumption place higher demands on the devices themselves, leading to widespread attention on power devices, represented by diodes. Simultaneously, the main semiconductor materials used in device fabrication are also constantly evolving: from first-generation semiconductor materials represented by silicon (Si) and germanium (Ge), to third-generation semiconductor materials such as gallium nitride (GaN) and silicon carbide (SiC), which are currently widely used. In recent years, ultra-wide bandgap semiconductor materials such as gallium oxide (Ga2O3) have gradually entered the research and industrial field of vision. Compared with previous generations of semiconductor materials, Ga2O3 has a wider bandgap (4.6–4.9 eV) and a higher breakdown field strength (approximately 8 MV / cm), with a Baliga figure of merit reaching 3000, approximately four times that of gallium nitride (GaN) and ten times that of silicon carbide (SiC), respectively. Meanwhile, Ga2O3 exhibits relatively stable electrical and luminescent physicochemical properties and can be grown over large areas under low dislocation conditions, offering significant cost advantages. Therefore, it is considered a preferred material for ultra-wide bandgap power devices. However, in practical applications, β-Ga2O3 often contains numerous donor defects, naturally exhibiting a certain degree of n-type conductivity, making it easy to achieve high-quality n-type modulation. In contrast, high-quality p-type doping or the construction of p-type regions is more difficult, thus limiting the realization of Ga2O3-based PN junctions and further improvement in the reverse breakdown capability of devices.
[0003] Furthermore, for semiconductor devices, heterojunction structures are a crucial foundation for achieving rectification, selective carrier transport, and suppression of reverse leakage. Existing heterojunctions are mostly constructed using a vertical stacking method, which typically requires continuous deposition of multiple thin films and control of interlayer interfaces. This results in a narrow process window, and the interlayer interfaces are sensitive to contamination, defects, and thickness fluctuations, easily introducing interface states and leading to a decrease in device uniformity. At the same time, vertical structures also have certain limitations in planar interconnection and array integration. Summary of the Invention
[0004] This invention provides a method for fabricating Ga2O3 / GeO2 lateral heterojunction devices, which can help obtain higher fabrication consistency.
[0005] This invention provides a method for fabricating a Ga2O3 / GeO2 lateral heterojunction device, comprising the following steps: forming a Ga2O3 layer on a substrate surface. The Ga2O3 layer has a first region and a second region adjacent to each other in a planar direction. A photoresist mask is formed on the surface of the second region. The first region is then etched to form a stepped structure. The photoresist mask is subsequently removed. A SiO2 layer is deposited on the surface of the second region. A GeO2 layer is deposited on the surfaces of the first region and the SiO2 layer, such that the GeO2 layer above the first region and the Ga2O3 layer in the second region are adjacent to each other in a planar direction, forming a lateral splicing interface to obtain a sample. The sample is annealed to form a first intermixed layer between the Ga2O3 layer in the first region and the GeO2 layer above it, and a second intermixed layer between the SiO2 layer and the GeO2 layer above it. The second intermixed layer has a third region and a fourth region adjacent to each other in a planar direction. A photoresist mask is formed on the surface of the first intermixed layer and the surface of the fourth region. The third region is then etched to form a window, exposing the Ga2O3 layer. The photoresist mask is then removed. Metal electrodes are deposited on the surface of the first intermixed layer, inside the window, and on the surface of the second intermixed layer to obtain a lateral heterojunction device.
[0006] Furthermore, the Ga2O3 layer has a thickness of 200-1000 nm. The height of the stepped structure is 100-500 nm. The SiO2 layer has a thickness of 30-100 nm. The GeO2 layer has a thickness of 100-500 nm. The metal electrode is an Ag electrode with a thickness of 80 nm, or the metal electrode includes a Ti electrode and an Au electrode disposed above the Ti electrode, with the Ti electrode having a thickness of 10 nm and the Au electrode having a thickness of 80 nm.
[0007] Further, before forming the Ga2O3 layer on the substrate surface, the substrate was ultrasonically cleaned sequentially in acetone and isopropanol for 10 min each. It was then rinsed with deionized water and dried with N2. Subsequently, it was baked on a hot plate at 120°C for 5 min to remove moisture. Finally, it was treated with O2 plasma at an O2 flow rate of 50 sccm, an RF power of 100 W, a cavity pressure of 30 Pa, and a treatment time of 3 min.
[0008] Furthermore, during the formation of the Ga2O3 layer on the substrate surface, the Ga2O3 layer is deposited using radio frequency magnetron sputtering. The target material is a Ga2O3 ceramic target, the sputtering gases are Ar and O2, the Ar flow rate is 40 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.6 Pa, the radio frequency power is 120 W, and the substrate temperature is 25℃ or 200℃.
[0009] Furthermore, during the formation of the photoresist mask on the surface of the second region, the photoresist used was S1813, the spin-coating speed was 4000 rpm, the spin-coating time was 40 s, the soft-bake temperature was 115℃, and the soft-bake time was 90 s. The exposure light source was i-line, and the exposure dose was 90-120 mJ·cm⁻¹. -2 The developer was MF-319, and the development time was 60 seconds.
[0010] Furthermore, during the etching process in the first region, reactive ion etching is performed using chlorine-based plasma. The etching gases are BCl3, Cl2, and Ar, with a flow rate of 10 sccm for BCl3, 20 sccm for Cl2, and 5 sccm for Ar. The chamber pressure is 5 Pa, the bias power is 100 W, and the etching time is 60-180 s.
[0011] Furthermore, during the removal of the photoresist mask, a resist remover is used to remove the photoresist mask. Then, O2 plasma is used to remove residual resist, wherein the O2 flow rate is 50 sccm, the RF power is 100W, and the processing time is 60s.
[0012] Furthermore, during the deposition of the SiO2 layer on the surface of the second region, the SiO2 layer was deposited using radio frequency magnetron sputtering, wherein the substrate temperature was 300 ℃, the cavity pressure was 900 mTorr, the radio frequency power was 20 W, and the reaction gases were Ar and O2.
[0013] Furthermore, during the deposition of the GeO2 layer on the surface of the first region and the SiO2 layer, the GeO2 layer was deposited by radio frequency magnetron sputtering. The target material was a GeO2 ceramic target, and the sputtering gases were Ar and O2. The Ar flow rate was 30 sccm, the O2 flow rate was 5 sccm, the working pressure was 0.8 Pa, and the radio frequency power was 80 W.
[0014] Furthermore, during the annealing process, the samples were annealed under an O2 atmosphere at a heating rate of 10 °C·s. -1 The heat preservation temperature is 900℃ and the heat preservation time is 120min.
[0015] Furthermore, during the formation of photoresist masks on the surfaces of the first intermixed layer and the fourth region, the photoresists used were LOR 3A and S1813. For LOR 3A, the spin-coating speed was 3000 rpm, the spin-coating time was 40 s, the soft-bake temperature was 180℃, and the soft-bake time was 5 min. For S1813, the spin-coating speed was 4000 rpm, the spin-coating time was 40 s, the soft-bake temperature was 115℃, and the soft-bake time was 90 s. The exposure light source was i-line, and the exposure dose was 90-120 mJ·cm⁻¹. -2 The developer was MF-319, and the development time was 60 seconds.
[0016] Furthermore, during the etching process in the third region, the GeO2 layer is etched. Then, the SiO2 layer is etched using a mixed solution of hydrofluoric acid and ammonium fluoride with a volume ratio of 7:1 for 30-120 seconds.
[0017] Furthermore, during the removal of the photoresist mask, acetone stripping is performed for 20-60 minutes.
[0018] Furthermore, during the deposition of metal electrodes on the surface of the first intermixed layer, within the window, and on the surface of the second intermixed layer, the substrate vacuum is <5×10⁻⁶. -6 Torr.
[0019] The present invention has the following beneficial effects: 1. The Ga2O of the present invention 3 / In GeO2 lateral heterojunction devices, rutile germanium oxide (GeO2) and Ga2O3 share similar bandgap characteristics and possess both good chemical stability and potential for fabrication. GeO2 and Ga2O3 exhibit excellent complementarity in wide-bandgap power device applications: on one hand, GeO2 acts as a functional / regulation layer, forming a heterojunction with Ga2O3, enabling carrier transport modulation through interface bandgap alignment and defect state manipulation; on the other hand, the introduction of GeO2 allows for PN junction-like rectification, barrier regulation, and reverse leakage suppression without relying on high-quality p-type doping of Ga2O3. Furthermore, the lateral heterojunction allows for adjacent splicing of the two material regions within the same plane, enabling the design of the heterojunction's position and geometry via photolithography / masks. This facilitates integration with planar device fabrication processes and yields longer interface lengths and higher fabrication consistency.
[0020] 2. In the fabrication method of this invention, the lateral interface is defined by the mask pattern boundary, and its position and geometric dimensions can be precisely controlled. Furthermore, the deposition + mask partitioning method avoids deep damage and contamination residue caused by strong implantation or heavy etching. In addition, annealing is used to achieve lateral heterojunction and defect control, improving the stability and reproducibility of the built-in electric field formation in the lateral heterojunction. Attached Figure Description
[0021] Figure 1 This is a flowchart illustrating the fabrication process of the Ga2O3 / GeO2 lateral heterojunction device in this invention. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this disclosure and to fully convey the scope of this disclosure to those skilled in the art. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0023] In existing technologies, multilayer vertical stacking processes have narrow processing windows and are sensitive to interfaces. Vertical stacking typically requires multiple consecutive depositions and interlayer interface control. Interlayer interfaces are highly susceptible to contamination, adsorption residues, and thickness fluctuations, leading to an increase in interface states and unstable potential barriers, thus causing a decrease in device uniformity. Interface defects and point defects such as oxygen vacancies are difficult to control. Ga2O3 naturally contains many donor defects, and new defects and interface trap states may be introduced during stacking or processing, making it difficult to stabilize the band alignment and built-in potential barriers of heterojunctions, resulting in weak rectification effects or performance drift.
[0024] In response to the above situation, please refer to Figure 1 This invention provides a method for fabricating a Ga2O3 / GeO2 lateral heterojunction device, comprising the following steps: (1) A Ga2O3 layer is formed on the surface of a substrate. The Ga2O3 layer has a first region and a second region that are adjacent to each other in the planar direction.
[0025] In the above steps, the substrate can be a c-plane sapphire (Al2O3) substrate.
[0026] Before forming a Ga2O3 layer on the substrate surface, the substrate can be ultrasonically cleaned sequentially in acetone and isopropanol for 10 min each. It is then rinsed with deionized water and dried with N2. Subsequently, it is baked on a hot plate at 120℃ for 5 min to remove moisture. Finally, surface activation is achieved using O2 plasma treatment, with an O2 flow rate of 50 sccm, an RF power of 100 W, a cavity pressure of 30 Pa, and a treatment time of 3 min.
[0027] During the formation of a Ga2O3 layer on the substrate surface, the Ga2O3 layer can be deposited using radio frequency magnetron sputtering. In this method, the target material is a Ga2O3 ceramic target, the sputtering gases are Ar and O2, the Ar flow rate is 40 sccm, the O2 flow rate is 5 sccm, the operating pressure is 0.6 Pa, the radio frequency power is 120 W, and the substrate temperature is 25℃ or 200℃. Alternatively, the Ga2O3 layer can be formed using hydride epitaxial growth.
[0028] The thickness of the Ga2O3 layer can be 200-1000 nm, such as 200 nm, 500 nm, 800 nm, and 1000 nm, with 500 nm being preferred. The thickness of the Ga2O3 layer can be measured by a profilometer or an ellipsometry. The orientation of the Ga2O3 crystal plane is not limited.
[0029] (2) A photoresist mask is formed on the surface of the second region. Then, the first region is etched to form a stepped structure. The photoresist mask is then removed.
[0030] In the above steps, during the formation of the photoresist mask on the surface of the second region, the photoresist can be set to S1813, the spin-coating speed to 4000 rpm, the spin-coating time to 40 s, the soft-bake temperature to 115℃, and the soft-bake time to 90 s. The exposure light source is i-line, and the exposure dose is 90-120 mJ·cm⁻¹. -2 For example, 90mJ·cm -2 100mJ·cm -2 120mJ·cm -2 The developer was MF-319, and the development time was 60 seconds.
[0031] During the etching process in the first region, chlorine-based plasma can be used for reactive ion etching. The etching gases are BCl3, Cl2, and Ar. The flow rate of BCl3 is 10 sccm, the flow rate of Cl2 is 20 sccm, the flow rate of Ar is 5 sccm, the cavity pressure is 5 Pa, the bias power is 100 W, and the etching time is 60-180 s, such as 60 s, 100 s, and 180 s.
[0032] During the removal of the photoresist mask, a photoresist remover solution can be used. Then, O2 plasma is used to remove residual photoresist, with an O2 flow rate of 50 sccm, an RF power of 100 W, and a processing time of 60 s.
[0033] The height of the stepped structure can be 100-500 nm, such as 100 nm, 200 nm, 300 nm, or 500 nm, preferably 200-400 nm. The height of the stepped structure can be determined by AFM or a step meter.
[0034] (3) Deposit a SiO2 layer on the surface of the second region.
[0035] In the above steps, during the deposition of the SiO2 layer on the surface of the second region, the SiO2 layer can be deposited by radio frequency magnetron sputtering, wherein the substrate temperature is 300 ℃, the cavity pressure is 900 mTorr, the radio frequency power is 20 W, and the reaction gases are Ar and O2.
[0036] The thickness of the SiO2 layer can be 30-100 nm, such as 30 nm, 50 nm, 80 nm, or 100 nm, with 50-80 nm being preferred. The SiO2 layer is used for isolation, hard masking, and enhancing deposition selectivity.
[0037] (4) Deposit a GeO2 layer on the surface of the first region and the SiO2 layer, so that the GeO2 layer above the first region and the Ga2O3 layer in the second region are adjacent in the planar direction and form a transverse splicing interface to obtain the sample.
[0038] In the above steps, during the deposition of the GeO2 layer in the first region and on the surface of the SiO2 layer, the GeO2 layer can be deposited by radio frequency magnetron sputtering. The target material is a GeO2 ceramic target, the sputtering gas is Ar and O2, the Ar flow rate is 30 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.8 Pa, and the radio frequency power is 80 W.
[0039] The thickness of the GeO2 layer can be 100-500nm, such as 100nm, 200nm, 300nm, 500nm, preferably 200-400nm.
[0040] (5) The sample is annealed to form a first intermixed layer between the Ga2O3 layer in the first region and the GeO2 layer above it, and a second intermixed layer between the SiO2 layer and the GeO2 layer above it. The second intermixed layer has a third region and a fourth region that are adjacent to each other in the planar direction.
[0041] In the above steps, the annealing of the sample can be performed under an O2 atmosphere at a heating rate of 10℃·s. -1 The annealing temperature was 900℃, and the holding time was 120 min. After annealing, a lateral heterojunction structure containing Ga-doped GeO2 and Ge-doped Ga2O3 was formed at the interface. The Ga / Ge atomic ratio was 0.001-10%, which was specifically quantified by XPS depth profiling or SIMS.
[0042] The annealing process described above promotes interdiffusion and bonding at the interface. Specifically, the annealing process can promote atomic rearrangement and enhanced bonding between the Ga2O3 layer and GeO2 at the interface, reducing adsorption residues and defect state density at the interface. On the other hand, it can regulate the distribution of point defects such as oxygen vacancies near the interface, making the interface band arrangement and built-in electric field more stable, thereby obtaining a stable and reproducible lateral heterojunction interface. The lateral heterojunction formed in this way can be used to realize device functions such as selective carrier transport, rectification, or suppression of reverse leakage current.
[0043] (6) A photoresist mask is formed on the surface of the first intermixed layer and the surface of the fourth region. Then, the third region is etched to form a window, exposing the Ga2O3 layer. The photoresist mask is then removed.
[0044] In the above steps, during the formation of photoresist masks on the surfaces of the first intermixed layer and the fourth region, the photoresists can be LOR 3A and S1813. For LOR 3A, the spin-coating speed is 3000 rpm, the spin-coating time is 40 s, the soft-bake temperature is 180℃, and the soft-bake time is 5 min. For S1813, the spin-coating speed is 4000 rpm, the spin-coating time is 40 s, the soft-bake temperature is 115℃, and the soft-bake time is 90 s. The exposure light source is i-line, and the exposure dose is 90-120 mJ·cm⁻¹. -2 For example, 90mJ·cm -2 100mJ·cm -2 120mJ·cm -2 The developer was MF-319, and the development time was 60 seconds.
[0045] During the etching process in the third region, the GeO2 layer can be etched. Then, a mixed solution of hydrofluoric acid and ammonium fluoride (volume ratio 7:1) is used to etch the SiO2 layer for 30-120 seconds, such as 30s, 80s, or 120s, depending on the thickness of the SiO2 layer. The GeO2 layer can be etched using a CHF3 / Ar dry etching method or a suitable wet etching method.
[0046] During the removal of the photoresist mask, acetone stripping can be used for 20-60 minutes, such as 20 minutes, 40 minutes, or 60 minutes.
[0047] (7) Deposit metal electrodes on the surface of the first intermixed layer, inside the window, and on the surface of the second intermixed layer to obtain a lateral heterojunction device.
[0048] In the above steps, the metal electrode can be an Ag electrode with a thickness of 80 nm, or the metal electrode can include a Ti electrode and an Au electrode disposed above the Ti electrode with a thickness of 10 nm and a thickness of 80 nm.
[0049] During the deposition of metal electrodes on the surface of the first intermixed layer, within the window, and on the surface of the second intermixed layer, the substrate vacuum can be set to <5×10⁻⁶. -6 Torr. Metal electrodes can be deposited using thermal evaporation / electron beam evaporation. The deposition rate for Ag electrodes can be ~1 Å·s. -1 .
[0050] The Ga2O of the present invention 3 / GeO2 lateral heterojunction devices are used for electrical characterization. GeO2 and Ga2O3 have similar band structure characteristics and possess good chemical stability and potential for fabrication. GeO2 and Ga2O3 exhibit good complementarity in wide bandgap power device applications: on the one hand, GeO2, as a functional / regulation layer, forms a heterojunction with Ga2O3, achieving carrier transport modulation through interface band alignment and defect state manipulation; on the other hand, the introduction of GeO2, without relying on high-quality p-type doping of Ga2O3, enables PN junction-like rectification, barrier regulation, and reverse leakage suppression through the heterojunction structure. Moreover, the lateral heterojunction allows for adjacent splicing of the two material regions within the same plane. The position and geometry of the heterojunction can be designed using photolithography / masks, facilitating integration with planar device fabrication and resulting in longer interface lengths and higher fabrication consistency.
[0051] It should be noted that Ga2O 3 / GeO2 lateral heterojunctions face the challenge of reproducible fabrication: on the one hand, controllable distribution and clear boundaries between Ga2O3 and GeO2 regions on the same substrate are required to avoid interfacial contamination and defects introduced by multiple processes; on the other hand, uncontrolled distribution of adsorption residues, interfacial defect states, and oxygen vacancies introduced during deposition can lead to heterojunction instability, insignificant rectification effects, or electrical performance drift over time. Based on this, this invention proposes a method for fabricating Ga2O3 / GeO2 lateral heterojunctions, which is compatible with micro / nano fabrication processes and allows for precise control of Ga2O3 and GeO2 regions. 3 / GeO2 achieves a stable lateral heterojunction effect at the lateral interface position.
[0052] The present invention has the following beneficial effects: 1) The horizontal interface position can be designed and has high repeatability: The horizontal interface is defined by the mask pattern boundary, and the position and geometric dimensions can be precisely controlled.
[0053] 2) Clean interface and minimal damage: It is formed by deposition + mask partitioning, avoiding deep damage and contamination residue caused by strong injection or heavy etching.
[0054] 3) Junction effect stability: Annealing enables the control of lateral heterojunctions and defects, thereby improving the stability and reproducibility of the built-in electric field formation in lateral heterojunctions.
[0055] 4) Strong process compatibility and easy integration: It is compatible with conventional micro-nano fabrication processes (photolithography, thin film deposition, annealing), which is conducive to large-scale fabrication and subsequent device integration.
[0056] The following detailed description is provided with reference to specific embodiments: Example 1 (1) The substrate was ultrasonically cleaned in acetone and isopropanol for 10 min in sequence, then rinsed with deionized water and dried with N2; then baked on a hot plate at 120℃ for 5 min to dehumidify; finally, O2 plasma treatment was used to activate the surface, wherein the O2 flow rate was 50 sccm, the radio frequency power was 100 W, the cavity pressure was 30 Pa, and the treatment time was 3 min.
[0057] (2) A Ga2O3 layer is deposited on the substrate surface by radio frequency magnetron sputtering; wherein the target material is a Ga2O3 ceramic target, the sputtering gas is Ar and O2, the Ar flow rate is 40 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.6 Pa, the radio frequency power is 120 W, the substrate temperature is 200 °C, the substrate is a c-plane sapphire substrate, the thickness of the Ga2O3 layer is 500 nm, and the Ga2O3 layer has a first region and a second region that are adjacent to each other in the planar direction.
[0058] (3) A photoresist mask is formed on the surface of the second region; wherein the photoresist is S1813, the spin coating speed is 4000 rpm, the spin coating time is 40 s, the soft baking temperature is 115℃, and the soft baking time is 90 s. The exposure light source is i-line, and the exposure dose is 90 mJ·cm⁻¹. -2 The developer was MF-319, and the development time was 60 s. Then, chlorine-based plasma was used to perform reactive ion etching on the first region to form a stepped structure. The etching gases were BCl3, Cl2, and Ar, with a BCl3 flow rate of 10 sccm, a Cl2 flow rate of 20 sccm, an Ar flow rate of 5 sccm, a cavity pressure of 5 Pa, a bias power of 100 W, an etching time of 60 s, and a step structure height of 50 nm. Subsequently, the photoresist mask was removed using a resist remover, and then residual resist was removed using O2 plasma. The O2 flow rate was 50 sccm, the RF power was 100 W, and the processing time was 60 s.
[0059] (4) A SiO2 layer is deposited on the surface of the second region by radio frequency magnetron sputtering; wherein the substrate temperature is 300 ℃, the cavity pressure is 900 mTorr, the radio frequency power is 20 W, the reaction gases are Ar and O2, and the thickness of the SiO2 layer is 100 nm.
[0060] (5) A GeO2 layer is deposited on the surface of the first region and the SiO2 layer by radio frequency magnetron sputtering, so that the GeO2 layer above the first region and the Ga2O3 layer in the second region are adjacent in the planar direction and form a transverse splicing interface to obtain the sample; wherein, the target material is a GeO2 ceramic target, the sputtering gas is Ar and O2, the Ar flow rate is 30 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.8 Pa, the radio frequency power is 80 W, and the thickness of the GeO2 layer is 200 nm.
[0061] (6) The sample is annealed to form a first intermixed layer between the Ga2O3 layer in the first region and the GeO2 layer above it, and a second intermixed layer between the SiO2 layer and the GeO2 layer above it; wherein, annealing is performed in an O2 atmosphere at a heating rate of 10℃·s. -1 The insulation temperature is 900℃ and the insulation time is 120min. The second mixed layer has a third region and a fourth region that are adjacent to each other in the planar direction.
[0062] (7) A photoresist mask is formed on the surface of the first intermixed layer and the surface of the fourth region; wherein the photoresist is LOR 3A and S1813, the spin coating speed of LOR3A is 3000 rpm, the spin coating time is 40 s, the soft baking temperature is 180℃, and the soft baking time is 5 min. The spin coating speed of S1813 is 4000 rpm, the spin coating time is 40 s, the soft baking temperature is 115℃, and the soft baking time is 90 s. The exposure light source is i-line, and the exposure dose is 90 mJ·cm. -2 The developer was MF-319, and the development time was 60s. Then, the GeO2 and SiO2 layers in the third region were etched to form a window, exposing the Ga2O3 layer. The SiO2 layer was etched using a mixed solution of hydrofluoric acid and ammonium fluoride with a volume ratio of 7:1 for 50s. The photoresist mask was then removed, and acetone was used for stripping for 20min.
[0063] (8) Ag electrodes were deposited on the surface of the first intermixed layer, inside the window, and on the surface of the second intermixed layer using electron beam evaporation deposition to obtain a lateral heterojunction device; wherein the substrate vacuum is <5×10 -6 The deposition rate of the Torr Ag electrode is ~1 Å·s. -1 The thickness of the Ag electrode is 80 nm.
[0064] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for fabricating a Ga2O3 / GeO2 lateral heterojunction device, characterized in that, Includes the following steps: A Ga2O3 layer is formed on the surface of a substrate; wherein the Ga2O3 layer has a first region and a second region disposed adjacent to each other in a planar direction; A photoresist mask is formed on the surface of the second region; then the first region is etched to form a stepped structure; subsequently, the photoresist mask is removed. A SiO2 layer is deposited on the surface of the second region; A GeO2 layer is deposited on the surface of the first region and the SiO2 layer, such that the GeO2 layer above the first region and the Ga2O3 layer in the second region are adjacent in the planar direction and form a transverse splicing interface to obtain a sample; The sample is annealed to form a first intermixed layer between the Ga2O3 layer in the first region and the GeO2 layer above it, and a second intermixed layer between the SiO2 layer and the GeO2 layer above it; wherein the second intermixed layer has a third region and a fourth region that are adjacent to each other in the planar direction; A photoresist mask is formed on the surface of the first intermixed layer and the surface of the fourth region; then, the third region is etched to form a window, exposing the Ga2O3 layer; subsequently, the photoresist mask is removed. Metal electrodes are deposited on the surface of the first intermixed layer, inside the window, and on the surface of the second intermixed layer to obtain a lateral heterojunction device.
2. The preparation method according to claim 1, characterized in that, The thickness of the Ga2O3 layer is 200-1000 nm; The height of the stepped structure is 100-500 nm; The thickness of the SiO2 layer is 30-100 nm; The thickness of the GeO2 layer is 100-500 nm; The metal electrode is an Ag electrode with a thickness of 80 nm, or the metal electrode includes a Ti electrode and an Au electrode disposed above the Ti electrode, wherein the Ti electrode has a thickness of 10 nm and the Au electrode has a thickness of 80 nm.
3. The preparation method according to claim 1, characterized in that, Before forming a Ga2O3 layer on the substrate surface, the substrate was ultrasonically cleaned in acetone and isopropanol for 10 min in sequence; then rinsed with deionized water and dried with N2; subsequently baked on a hot plate at 120℃ for 5 min to remove moisture; finally treated with O2 plasma, wherein the O2 flow rate was 50 sccm, the radio frequency power was 100 W, the cavity pressure was 30 Pa, and the treatment time was 3 min.
4. The preparation method according to claim 1, characterized in that, During the formation of the Ga2O3 layer on the substrate surface, the Ga2O3 layer is deposited by radio frequency magnetron sputtering. The target material is a Ga2O3 ceramic target, the sputtering gases are Ar and O2, the Ar flow rate is 40 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.6 Pa, the radio frequency power is 120 W, and the substrate temperature is 25℃ or 200℃.
5. The preparation method according to claim 1, characterized in that, During the formation of the photoresist mask on the surface of the second region, the photoresist is S1813, the spin coating speed is 4000 rpm, the spin coating time is 40 s, the soft baking temperature is 115℃, and the soft baking time is 90 s; the exposure light source is i-line, and the exposure dose is 90-120 mJ·cm⁻¹. -2 The developer is MF-319, and the development time is 60 seconds. During the etching process in the first region, chlorine-based plasma is used for reactive ion etching. The etching gases are BCl3, Cl2 and Ar. The flow rate of BCl3 is 10 sccm, the flow rate of Cl2 is 20 sccm, the flow rate of Ar is 5 sccm, the cavity pressure is 5 Pa, the bias power is 100 W, and the etching time is 60-180 s. During the removal of the photoresist mask, a photoresist remover is used to remove the photoresist mask; then, O2 plasma is used to remove residual photoresist, wherein the O2 flow rate is 50 sccm, the radio frequency power is 100W, and the processing time is 60s.
6. The preparation method according to claim 1, characterized in that, During the deposition of the SiO2 layer on the surface of the second region, the SiO2 layer is deposited by radio frequency magnetron sputtering, wherein the substrate temperature is 300 ℃, the cavity pressure is 900 mTorr, the radio frequency power is 20 W, and the reaction gases are Ar and O2.
7. The preparation method according to claim 1, characterized in that, During the deposition of the GeO2 layer in the first region and on the surface of the SiO2 layer, the GeO2 layer is deposited by radio frequency magnetron sputtering. The target material is a GeO2 ceramic target, the sputtering gas is Ar and O2, the Ar flow rate is 30 sccm, the O2 flow rate is 5 sccm, the working pressure is 0.8 Pa, and the radio frequency power is 80 W.
8. The preparation method according to claim 1, characterized in that, During the annealing process of the sample, annealing was performed under an O2 atmosphere at a heating rate of 10°C·s. -1 The heat preservation temperature is 900℃ and the heat preservation time is 120min.
9. The preparation method according to claim 1, characterized in that, During the formation of photoresist masks on the surfaces of the first mixed layer and the fourth region, the photoresists used are LOR 3A and S1813. For LOR 3A, the spin-coating speed is 3000 rpm, the spin-coating time is 40 s, the soft-bake temperature is 180℃, and the soft-bake time is 5 min. For S1813, the spin-coating speed is 4000 rpm, the spin-coating time is 40 s, the soft-bake temperature is 115℃, and the soft-bake time is 90 s. The exposure light source is i-line, and the exposure dose is 90-120 mJ·cm⁻¹. -2 The developer is MF-319, and the development time is 60 seconds. During the etching process in the third region, the GeO2 layer is etched; then, the SiO2 layer is etched using a mixed solution of hydrofluoric acid and ammonium fluoride with a volume ratio of 7:1 for 30-120 seconds. During the removal of the photoresist mask, acetone stripping is performed for 20-60 minutes.
10. The preparation method according to claim 1, characterized in that, During the deposition of metal electrodes on the surface of the first intermixed layer, within the window, and on the surface of the second intermixed layer, the substrate vacuum is <5×10⁻⁶. -6 Torr.