Single photon avalanche diode array and method thereof, optical ranging system and chip

Abstract

This application provides a single-photon avalanche diode array and method thereof, an optical ranging system and chip, relating to the field of semiconductor technology. The array includes: a plurality of first single-photon avalanche diode units and a plurality of second single-photon avalanche diode units; in the array, each second single-photon avalanche diode unit is independently distributed among the plurality of first single-photon avalanche diode units, or, at least two or all of the plurality of second single-photon avalanche diode units are grouped together and disposed in a target region of the array; each second single-photon avalanche diode unit includes an incident light blocking layer covering the photosensitive region of the second single-photon avalanche diode unit; the first single-photon avalanche diode units are used to receive external incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode units through the substrate or epitaxial layer of the array.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a single-photon avalanche diode array and its method, an optical ranging system and chip. Background Technology

[0002] In ranging technology based on single-photon avalanche diodes (SPADs), the detection accuracy of near-range echo signals is easily affected by stray light and substrate carriers. Existing technologies mainly offer two solutions: one is to use a conventional single-photon avalanche diode structure, directly utilizing the wafer substrate for optical signal reception and carrier transmission. Although this approach has lower manufacturing costs, internal stray light causes broadening of the optical pulse signal, and a large number of carriers generated by the substrate cannot be collected in time, severely reducing the detection accuracy of near-range echo signals. The other approach is to separate the substrate of the single-photon avalanche diode unit from the depletion region through ion implantation. While this approach can improve near-range detection accuracy to some extent, the added ion implantation process increases manufacturing costs, and the isolation design between the substrate and the depletion region sacrifices the substrate's optical detection capability, leading not only to a decrease in the detection performance of long-range echo signals but also to a waste of the substrate's optical detection function.

[0003] In summary, existing technologies cannot simultaneously achieve close-range detection accuracy, long-range detection performance, and manufacturing costs, making it difficult to meet the application requirements of high precision and wide ranging range. Summary of the Invention

[0004] This application provides a single-photon avalanche diode array and its method, an optical ranging system and chip, which can provide a technical solution that can balance short-range detection accuracy, long-range detection performance and process cost.

[0005] In a first aspect, embodiments of this application provide a single-photon avalanche diode array, the array comprising: Multiple first single-photon avalanche diode units and multiple second single-photon avalanche diode units; in the array, each second single-photon avalanche diode unit may be independently distributed among multiple first single-photon avalanche diode units, or at least two or all of the multiple second single-photon avalanche diode units may be grouped together and concentrated in the target area of ​​the array. The second single-photon avalanche diode unit includes an incident light blocking layer, which covers the photosensitive area of ​​the second single-photon avalanche diode unit to block externally incident light signals; The first single-photon avalanche diode unit is used to receive external incident light and generate photogenerated carriers. The photogenerated carriers can propagate to the second single-photon avalanche diode unit through the substrate or epitaxial region of the array. The second single-photon avalanche diode has the same photoresponse capability as the first single-photon avalanche diode.

[0006] In one optional embodiment, the first single-photon avalanche diode unit and the second single-photon avalanche diode unit are formed on the same semiconductor substrate and share the same epitaxial layer; The first single-photon avalanche diode unit includes a first photosensitive region formed in the epitaxial layer, the first photosensitive region being located on the side of the epitaxial layer away from the semiconductor substrate; the first photosensitive region includes a first N-type well region, a first N-type doped region, and a first P-type doped region; the first N-type well region and the first P-type doped region are located on the side of the first N-type doped region away from the semiconductor substrate; the first N-type well region is disposed around the outer periphery of the first P-type doped region and is spaced apart from the first P-type doped region.

[0007] The second single-photon avalanche diode unit further includes a second photosensitive region formed in the epitaxial layer, the second photosensitive region being located on the side of the epitaxial layer away from the semiconductor substrate; the second photosensitive region includes a second N-type well region, a second N-type doped region, and a second P-type doped region; the second N-type well region and the second P-type doped region are located on the side of the second N-type doped region away from the semiconductor substrate; the second N-type well region is disposed around the outer periphery of the second P-type doped region and is spaced apart from the second P-type doped region.

[0008] In one alternative implementation, the array further includes a deep trench isolation structure.

[0009] When the deep trench isolation structure is a metal deep trench isolation structure, the metal deep trench isolation structure is only disposed between the first N-type well regions of adjacent first single-photon avalanche diode units, and the metal deep trench isolation structure extends in a direction perpendicular to the array surface, penetrates the epitaxial layer of the array and extends into the semiconductor substrate of the array, for isolating adjacent first single-photon avalanche diode units to suppress photogenerated carrier crosstalk and optical crosstalk.

[0010] In one optional embodiment, the lateral width of the epitaxial layer between the first N-type well region of the first single-photon avalanche diode unit and the second N-type well region of the adjacent second single-photon avalanche diode unit is greater than the lateral width of the metal deep trench isolation structure between the first N-type well regions of the adjacent first single-photon avalanche diode units.

[0011] In one alternative embodiment, the first single-photon avalanche diode unit and the adjacent second single-photon avalanche diode unit have the same lateral width, and the lateral width of the first P-type doped region of the first single-photon avalanche diode unit is greater than the lateral width of the second P-type doped region of the adjacent second single-photon avalanche diode unit.

[0012] In one alternative implementation, the array further includes a deep trench isolation structure; When the deep trench isolation structure is a non-metallic deep trench isolation structure, the non-metallic deep trench isolation structure is disposed between the first N-type well regions of adjacent first single-photon avalanche diode units, and between the first N-type well regions of adjacent first single-photon avalanche diode units and the second N-type well regions of adjacent second single-photon avalanche diode units.

[0013] In one alternative embodiment, the material filled in the non-metallic deep trench isolation structure is a light-transmitting material.

[0014] Secondly, embodiments of this application also provide a method for fabricating a single-photon avalanche diode array, the method comprising: According to a preset array arrangement, a first single-photon avalanche diode unit is formed in a preset first single-photon avalanche diode unit region, and a second single-photon avalanche diode unit is formed in a preset second single-photon avalanche diode unit region; wherein, the second single-photon avalanche diode unit includes an incident light blocking layer, which covers the photosensitive area of ​​the second single-photon avalanche diode unit and is used to reflect and block externally incident light signals; In the array, each second single-photon avalanche diode unit can be independently distributed among multiple first single-photon avalanche diode units, or at least two or all of the multiple second single-photon avalanche diode units can be grouped together and concentrated in the target area of ​​the array; the first single-photon avalanche diode units are used to receive external incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode units through the substrate or epitaxial layer of the array, wherein the second single-photon avalanche diode has the same photoresponse capability as the first single-photon avalanche diode.

[0015] In one optional implementation, the step of forming a first single-photon avalanche diode unit in the first single-photon avalanche diode unit region and forming a second single-photon avalanche diode unit in the second single-photon avalanche diode unit region according to a preset array arrangement includes: Provide semiconductor substrates; An epitaxial layer is formed on the semiconductor substrate; A first photosensitive region is formed in a first predetermined region of the epitaxial layer to obtain the first single-photon avalanche diode unit, and a second photosensitive region is formed in a second predetermined region of the epitaxial layer; wherein, the first photosensitive region is located on the side of the epitaxial layer away from the semiconductor substrate; the first photosensitive region includes a first N-type well region and a first P-type doped region; the first P-type doped region is disposed around the outer periphery of the first N-type well region and spaced apart from the first N-type well region; the second photosensitive region is located on the side of the epitaxial layer away from the semiconductor substrate; the second photosensitive region includes a second N-type well region and a second P-type doped region; the second P-type doped region is disposed around the outer periphery of the second N-type well region and spaced apart from the second N-type well region; The incident light blocking layer is formed on the second photosensitive region to obtain the second single-photon avalanche diode unit.

[0016] Thirdly, embodiments of this application provide an optical ranging system, the system including a light-emitting component and the single-photon avalanche diode array described in the first aspect; The light-emitting component faces the target and is used to emit a probe light signal to the target. The photosensitive area of ​​the single-photon avalanche diode array faces the target and is used to receive the echo light signal reflected by the target.

[0017] Fourthly, embodiments of this application provide a chip that integrates a single-photon avalanche diode array as described in any of the first aspects.

[0018] With the above technical solution adopted, embodiments of this application provide a single-photon avalanche diode array and its fabrication method, an optical ranging system and a chip. The single-photon avalanche diode array includes: a plurality of first single-photon avalanche diode units and a plurality of second single-photon avalanche diode units; in the array, each second single-photon avalanche diode unit is independently distributed among the plurality of first single-photon avalanche diode units, or the plurality of second single-photon avalanche diode units are concentrated in the target area of ​​the array; the second single-photon avalanche diode unit includes an incident light blocking layer, which covers the photosensitive area of ​​the second single-photon avalanche diode unit and is used to reflect and block externally incident light signals; the first single-photon avalanche diode units are used to receive externally incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode units through the substrate of the array.

[0019] In this embodiment, by completely covering the photosensitive area of ​​the second single-photon avalanche diode unit with the incident light blocking layer, the external incident light signal is blocked from entering the second single-photon avalanche diode unit, thus avoiding the problem of light pulse broadening caused by the combined external incident light and internal stray light in the prior art, and eliminating the interference of stray light on near-field signals. In this embodiment, the second single-photon avalanche diode unit does not directly receive external incident light, but only receives photogenerated carriers generated by the first single-photon avalanche diode unit and propagated directionally through the array substrate. It should be understood that these carriers are effective carriers generated by the first single-photon avalanche diode unit after receiving external light signals, and their number is controllable after propagation through the substrate. This avoids the situation in the prior art where a large number of carriers accumulate on the substrate and cannot be collected in time, thus solving the interference of substrate carriers on near-range signal analysis. Therefore, the second single-photon avalanche diode unit can accurately capture the carrier signal corresponding to the near-range echo, greatly improving the accuracy of near-range ranging.

[0020] Furthermore, since the photosensitive area of ​​the first single-photon avalanche diode unit is not covered by the incident light blocking layer, it can directly receive weak echo light signals from externally incident medium- and long-distance sources, maintaining the high detection efficiency of conventional single-photon avalanche diode units for weak light, and without making any sacrificial design to its structure, ensuring that the medium- and long-distance detection performance is not affected; while the second single-photon avalanche diode unit shields external light interference through the incident light blocking layer, becoming a dedicated short-distance detection unit that only receives carriers propagating from the substrate, forming a functional partition structure with the first single-photon avalanche diode unit; Compared with the prior art where isolating the epitaxial layer leads to the complete loss of substrate detection capability, the embodiments of this application make full use of the carrier propagation characteristics of the substrate and the epitaxial layer, using the substrate and the epitaxial layer as the signal transmission channels of the first and second single-photon avalanche diode units. This not only achieves accurate detection of short-range signals, but also retains the functional value of the substrate and the epitaxial layer, avoiding the waste of detection capability and achieving dual protection of near- and long-range ranging performance.

[0021] Finally, the embodiments of this application can be mass-produced based on the mature manufacturing process of conventional single-photon avalanche diode arrays. Compared with the existing technology that adds ion implantation process to increase costs, this application achieves performance improvement while maintaining the same process complexity as conventional single-photon avalanche diode arrays, without increasing manufacturing costs. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0023] Figure 1 This invention provides a layout structure for a single-photon avalanche diode array. Figure 1 ; Figure 2 This invention provides a layout structure for a single-photon avalanche diode array. Figure 2 ; Figure 3 This invention provides a layout structure for a single-photon avalanche diode array. Figure 3 ; Figure 4 A schematic diagram of a single-photon avalanche diode array provided in an embodiment of the present invention. Figure 1 ; Figure 5 A schematic diagram of a single-photon avalanche diode array provided in an embodiment of the present invention. Figure 2 ; Figure 6 A schematic diagram of the steps in fabricating a single-photon avalanche diode array provided in this embodiment of the invention. Figure 1 ; Figure 7 A schematic diagram of the steps in fabricating a single-photon avalanche diode array provided in this embodiment of the invention. Figure 2 ; Figure 8 A schematic diagram of the steps in fabricating a single-photon avalanche diode array provided in this embodiment of the invention. Figure 3 ; Figure 9 A schematic diagram of the steps in fabricating a single-photon avalanche diode array provided in this embodiment of the invention. Figure 4 . Attached image description: 10 - Semiconductor substrate; 20 - Epitaxial layer 20; 100 - First single-photon avalanche diode unit; 200 - Second single-photon avalanche diode unit; 101 - First N-type doped region; 102 - First P-type doped region; 103 - First N-type well region; 201 - Second N-type doped region; 202 - Second P-type doped region; 203 - Second N-type well region; 204 - Incident light blocking layer; 301 - Metal deep trench isolation structure; 302 - Non-metal deep trench isolation structure. Detailed Implementation

[0025] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. It is understood that the terms “first,” “second,” etc., as used herein may be used to describe various information or data, but these elements are not limited by these terms. These terms are only used to distinguish first information from another type of information. For example, without departing from the scope of this application, first action information may be referred to as second action information, and similarly, second action information may be referred to as first action information. Both first action information and second action information are action information, but they are not the same action information.

[0027] In this document, it should be understood that the terminology used is for convenience of understanding only and does not imply any limitation on its meaning. Furthermore, any number of elements in the accompanying drawings is for illustrative purposes only and not for limitation, and any naming is for distinction only and has no limiting meaning.

[0028] In the field of ranging technology based on single-photon avalanche diodes (SPADs), SPAD arrays are widely used in high-precision ranging scenarios such as lidar and handheld rangefinders due to their single-photon-level detection sensitivity. The detection accuracy of the near-range echo signal directly determines the lower limit of the device's near-range measurement, but it is susceptible to interference from both internal stray light and substrate carrier accumulation, becoming a critical technical bottleneck that urgently needs to be addressed in the industry. Existing technologies mainly offer two types of targeted solutions.

[0029] Option 1 employs a conventional single-photon avalanche diode (SPAD) detection scheme. This scheme utilizes the traditional SPAD manufacturing process, directly leveraging the wafer substrate for optical signal reception and carrier transport without any special optimization to the substrate structure or signal transmission path. Therefore, the process is mature, effectively controlling manufacturing costs and adapting to large-scale mass production needs. However, in close-range ranging scenarios, this scheme has drawbacks: internal stray light can superimpose with the effective echo signal, causing optical pulse signal broadening and resulting in signal timing distortion. Simultaneously, the substrate generates a large number of photogenerated carriers under strong light irradiation. These carriers cannot be collected in time, easily accumulating and diffusing into the depletion region, severely interfering with the resolution of the effective signal. Ultimately, this leads to a significant decrease in the accuracy of close-range echo signal detection, failing to meet the accuracy requirements of high-end ranging equipment.

[0030] Option 2 is a structural optimization scheme. To improve the aforementioned short-range detection defects, some technologies use ion implantation to isolate the substrate of the single-photon avalanche diode unit from the depletion region, blocking the diffusion of substrate carriers to the depletion region and reducing the interference of carrier accumulation on the signal, thereby improving the accuracy of short-range detection to some extent. However, this scheme has a significant performance-cost trade-off: the added ion implantation process not only increases the complexity of semiconductor manufacturing steps but also increases the difficulty of process control and manufacturing costs; more importantly, the isolation design between the substrate and the depletion region sacrifices the substrate's photodetection capability. The substrate is an important receiving carrier for weak echo light signals at medium and long distances. The loss of its function leads to a decrease in long-range detection sensitivity and also causes redundancy and waste of the substrate's photodetection function, failing to meet both short-range and long-range ranging requirements.

[0031] In summary, existing technologies are all caught in a dilemma between performance and cost, and between short-range and long-range capabilities. They either sacrifice short-range detection accuracy for low cost and long-range performance, or increase costs and sacrifice long-range performance to improve short-range accuracy. Neither approach can achieve a balance between short-range detection accuracy, long-range detection performance, and manufacturing costs, making it difficult to meet the demands of high precision, wide ranging range, and low cost in scenarios such as LiDAR and autonomous driving ranging.

[0032] Based on this, the technical concept of this application embodiment is as follows: Several single-photon avalanche diode (SPAD) units are selected in a single-photon avalanche diode (SPAD) array, and an incident light blocking layer is covered over their photosensitive areas, so that the entire SPAD array forms two types of functional SPAD units. One type is a conventional SPAD unit without an incident light blocking layer, which can directly receive external incident light, defined as the first SPAD unit; the other type is a SPAD unit covered with an incident light blocking layer, where the photosensitive area is blocked, defined as the second SPAD unit. In terms of layout, the second SPAD unit can adopt an independent distributed layout, dispersed among the first SPAD units; or it can adopt a centralized layout, uniformly arranged within the target area of ​​the SPAD unit array, adapting to different ranging scenario requirements as needed.

[0033] The technical solutions shown in this application will now be described in detail through specific embodiments. It should be noted that the following embodiments may exist independently or in combination with each other; for identical or similar content, the description will not be repeated in different embodiments.

[0034] Reference Figure 1 Figure 2 and Figure 3 This application provides a single-photon avalanche diode array, the array comprising: Multiple first single-photon avalanche diode units 100 and multiple second single-photon avalanche diode units 200.

[0035] In the array, reference Figure 2 and Figure 3 Each of the second single-photon avalanche diode units 200 is independently distributed among a plurality of the first single-photon avalanche diode units 100, or, referring to Figure 1 At least two or all of the plurality of second single-photon avalanche diode units 200 are grouped together and disposed in the target area of ​​the array.

[0036] Reference Figure 4 and Figure 5 The second single-photon avalanche diode unit 200 includes an incident light blocking layer 204, which covers the photosensitive area of ​​the second single-photon avalanche diode unit 200 and is used to block externally incident light signals.

[0037] The first single-photon avalanche diode unit 100 is used to receive external incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode unit 200 through the substrate or epitaxial layer of the array.

[0038] In this embodiment, the first single-photon avalanche diode unit 100 serves as a conventional detection unit in the array, and is relatively numerous, used for detecting weak light echoes at medium to long distances. The second single-photon avalanche diode unit 200 serves as a dedicated short-range detection unit, and is relatively few in number, used to process short-range echo signals with high photon density.

[0039] With each of the second single-photon avalanche diode units 200 independently distributed among multiple first single-photon avalanche diode units 100, the array can achieve high-precision short-range detection across the entire array range, making it suitable for global ranging scenarios.

[0040] When at least two or all of the plurality of second single-photon avalanche diode units 200 are concentrated in the target area of ​​the array, it is suitable for precise ranging requirements in a specific direction or area.

[0041] Specifically, in this embodiment, the first single-photon avalanche diode unit 100 retains a complete photosensitive region, capable of directly receiving externally incident mid-to-long-range weak echo light signals, and is the main detection unit of the array. Incident photons generate photogenerated carriers in the photosensitive region, triggering an avalanche multiplication effect under a high reverse bias, amplifying the single-photon signal into a detectable electrical pulse. This ensures the sensitivity and detection efficiency of the array for mid-to-long-range ranging, maintaining the detection performance of a conventional single-photon avalanche diode.

[0042] The photosensitive surface of the second single-photon avalanche diode unit 200 is covered by an incident light blocking layer 204. This incident light blocking layer 204 is typically made of a high-reflectivity metal such as aluminum or copper, but can also be an optical thin film or other materials that can block light from directly incident on the second single-photon avalanche diode below. This application embodiment does not impose any special limitations on this. Its function is to completely block external incident light, preventing external light from directly entering the photosensitive area. The second single-photon avalanche diode unit 200 does not directly receive external light signals; it only receives photogenerated carriers generated by the first single-photon avalanche diode unit 100 and laterally diffused from the arrayed semiconductor substrate 10. It is dedicated to short-range, high-precision detection. By shielding external light and receiving directional carriers, it avoids interference from stray light and carrier accumulation.

[0043] Based on the above description, when external echo light is incident on the photosensitive region of the first single-photon avalanche diode unit 100, photogenerated electron-hole pairs are generated, some of which diffuse towards the substrate or epitaxial layer of the array. These electron-hole pairs diffuse laterally in the substrate or epitaxial layer, and when they propagate to below the depletion region of the second single-photon avalanche diode unit 200, they are captured by the strong electric field of the second single-photon avalanche diode unit 200. The captured charge carriers trigger an avalanche multiplication effect under the reverse bias of the second single-photon avalanche diode unit 200, generating an electrical pulse signal. Subsequently, by analyzing the signal timing of the second single-photon avalanche diode unit 200, the arrival time of the near-range echo can be accurately calculated. Meanwhile, the first single-photon avalanche diode unit 100 is responsible for detecting mid- to long-range signals. The combination of the two achieves high-precision detection across the entire ranging range.

[0044] In this embodiment, the incident light blocking layer 204 completely covers the photosensitive area of ​​the second single-photon avalanche diode unit 200, blocking external incident light signals from entering the second single-photon avalanche diode unit 200. This fundamentally avoids the problem of light pulse broadening caused by both external incident light and internal stray light in the prior art, eliminating stray light interference with near-range signals. It is worth noting that in single-photon avalanche diode ranging technology, broadening refers to the phenomenon where the width of the light pulse signal is stretched in the time dimension, and the edges become blurred. This can lead to the inability to accurately determine the arrival time of the echo signal, thereby reducing ranging accuracy.

[0045] Furthermore, since the second single-photon avalanche diode unit 200 does not directly receive external incident light, but only receives photogenerated carriers generated by the first single-photon avalanche diode unit 100 and propagated directionally through the array substrate, it should be understood that these carriers are effective carriers generated by the first single-photon avalanche diode unit 100 after receiving external light signals, and their number is controllable after propagation through the substrate or epitaxial layer. This avoids the situation in the prior art where a large number of carriers accumulate on the substrate and cannot be collected in time, thus solving the interference of substrate carriers on near-range signal analysis. Therefore, the second single-photon avalanche diode unit 200 can accurately capture the carrier signal corresponding to the near-range echo, greatly improving the accuracy of near-range ranging.

[0046] Furthermore, since the photosensitive area of ​​the first single-photon avalanche diode unit 100 is not covered by the incident light blocking layer 204, it can directly receive weak echo light signals from externally incident medium- and long-distance sources, maintaining the high detection efficiency of conventional single-photon avalanche diode units for weak light, and without making any sacrificial design to its structure, ensuring that the medium- and long-distance detection performance is not affected; while the second single-photon avalanche diode unit 200 shields external light interference through the incident light blocking layer 204, becoming a dedicated short-distance detection unit that only receives carriers propagating from the substrate, forming a functional partition structure with the first single-photon avalanche diode unit 100; Compared with the existing technology where the isolation substrate and depletion region lead to the complete loss of substrate detection capability, the embodiments of this application make full use of the carrier propagation characteristics of the substrate and use the substrate as the signal transmission channel of the first and second single-photon avalanche diode units. This not only achieves accurate detection of short-range signals, but also retains the functional value of the substrate, avoids the waste of detection capability, and achieves dual protection of near- and long-range ranging performance.

[0047] Finally, the embodiments of this application can be mass-produced based on the mature manufacturing process of conventional single-photon avalanche diode arrays. Compared with the existing technology that adds ion implantation process to increase costs, this application achieves performance improvement while maintaining the same process complexity as conventional single-photon avalanche diode arrays, without increasing manufacturing costs.

[0048] In one alternative implementation, refer to Figure 4 and Figure 5 The array includes a semiconductor substrate 10 and an epitaxial layer 20 formed on the semiconductor substrate 10. The first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 are both formed on the semiconductor substrate 10 and the epitaxial layer 20.

[0049] The first single-photon avalanche diode unit 100 includes a first photosensitive region formed in the epitaxial layer 20, the first photosensitive region being located on the side of the epitaxial layer 20 away from the semiconductor substrate 10; the first photosensitive region includes a first N-type well region 103, a first N-type doped region 101 and a first P-type doped region 102; the first N-type well region 103 and the first P-type doped region 102 are located on the side of the first N-type doped region 101 away from the semiconductor substrate 10; the first N-type well region 103 is disposed around the outer periphery of the first P-type doped region 102 and is spaced apart from the first P-type doped region 102.

[0050] The second single-photon avalanche diode unit 200 further includes a second photosensitive region formed in the epitaxial layer 20, the second photosensitive region being located on the side of the epitaxial layer 20 away from the semiconductor substrate 10; the second photosensitive region includes a second N-type well region 203, a second N-type doped region 201, and a second P-type doped region 202; the second N-type well region 203 and the second P-type doped region 202 are located on the side of the second N-type doped region 201 away from the semiconductor substrate 10; the second N-type well region 203 is disposed around the outer periphery of the second P-type doped region 202 and is spaced apart from the second P-type doped region 202.

[0051] In this embodiment, the semiconductor substrate 10 can be a P-type semiconductor substrate 10, which serves as the physical support for the entire array and also as the channel for the lateral propagation of charge carriers between the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200.

[0052] The epitaxial layer 20 can be a P-type epitaxial layer 20, grown on a P-type semiconductor substrate 10. It is the core functional layer that forms the photosensitive region of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200. Its doping concentration and thickness determine the electric field distribution and avalanche characteristics of the device.

[0053] The first photosensitive region is formed inside the P-type epitaxial layer 20 and is located on the side of the epitaxial layer 20 away from the P-type semiconductor substrate 10 (i.e., the top layer region of the epitaxial layer 20). This region is the region where photogenerated carriers are generated and avalanche multiplication occurs. It maintains a reasonable distance from the substrate to avoid indiscriminate interference from the intrinsic carriers of the substrate.

[0054] The first photosensitive region consists of three layers: the bottom layer is the first N-type doped region 101, which serves as the basic doping layer of the photosensitive region and provides a stable electric field for the upper well region and P-type doped region.

[0055] The upper layer consists of a first N-type well region 103 and a first P-type doped region 102, both of which are located on the side of the first N-type doped region 101 away from the semiconductor substrate 10. The first P-type doped region 102 is the central region of the photosensitive region. The first N-type well region 103 wraps around the outer periphery of the first P-type doped region 102 in a closed loop, and the two are spaced apart to form a ring-shaped PN junction depletion region.

[0056] The surface of the first photosensitive region has no incident light blocking layer 204 or light-shielding layer, and remains completely open, allowing it to directly receive external incident light signals. It is the main photodetector unit of the array.

[0057] The second single-photon avalanche diode unit 200 is a near-field detection unit of the array, used to receive photogenerated carriers propagated from the first single-photon avalanche diode unit 100 through the substrate. Its structure is basically the same as that of the second single-photon avalanche diode unit 200, only the functional positioning and signal source are different, as detailed below: The second photosensitive region is formed in the same position and with the same interlayer relationship as the first photosensitive region. Both are formed inside the P-type epitaxial layer 20 and are located on the side of the epitaxial layer 20 away from the P-type semiconductor substrate 10. They are at the same process level as the photosensitive region of the first single-photon avalanche diode unit 100, ensuring the consistency of avalanche characteristics between the two types of units.

[0058] The layered doping structure of the second photosensitive region is exactly the same as that of the first photosensitive region, consisting of a three-layer stepped doping design with no process differences. Specifically: The bottom layer is the second N-type doped region 201. The doping concentration, thickness and process steps of the second N-type doped region 201 are consistent with those of the first N-type doped region 101, ensuring the uniformity of the array process. The upper layer consists of a second N-type well region 203 and a second P-type doped region 202: both are located on the side of the second N-type doped region 201 away from the semiconductor substrate 10, consistent with the spatial relationship of the upper doped layer of the first single-photon avalanche diode unit 100; the second N-type well region 203 surrounds the second P-type doped region 202, with the second P-type doped region 202 as the central region, and the second N-type well region 203 encloses its outer periphery in a closed loop, and the two are spaced apart to form a ring-shaped PN junction depletion region consistent with the structure and parameters of the first single-photon avalanche diode unit 100; The surface of the second photosensitive region is covered with an incident light blocking layer 204. The incident light blocking layer 204 can reflect and block external incident light signals, so that the second photosensitive region cannot directly receive external light, but can only receive photogenerated carriers generated by the first single-photon avalanche diode unit 100 and propagated laterally to its depletion region through the P-type substrate.

[0059] Based on the above description, the photosensitive regions of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 adopt the same layered doping structure and ring layout. Only the second single-photon avalanche diode unit 200 adds an incident light blocking layer 204. There are no other additional doping, etching, ion implantation and other process steps. The photosensitive regions of the two types of units can be formed simultaneously through one photolithography and one doping process. There is no need to design an independent process flow for the second single-photon avalanche diode unit 200. It is fully compatible with the mature manufacturing process of conventional single-photon avalanche diode arrays.

[0060] Compared to the existing technology of ion implantation isolation substrate and depletion region, the embodiments of this application do not add any complex processes. The process complexity and manufacturing cost are consistent with conventional single-photon avalanche diode arrays. Performance is improved without increasing manufacturing costs.

[0061] In this embodiment, the complete photosensitive surface and layered doped structure of the first single-photon avalanche diode unit 100 maintain high detection efficiency for weak echo signals at medium to long distances, ensuring that long-range ranging performance is not affected. The incident light blocking layer 204 of the second single-photon avalanche diode unit 200 completely shields external light and stray light, avoiding light pulse broadening; it only receives controllable charge carriers propagating directionally through the substrate, fundamentally solving the problem of substrate charge carrier accumulation and improving short-range ranging accuracy.

[0062] In this embodiment, unlike existing technologies that use ion implantation to isolate the substrate and depletion region, sacrificing the substrate's photodetection capability, the P-type substrate in this solution can normally participate in the generation and transmission of photogenerated carriers in the first single-photon avalanche diode unit 100. This ensures the high detection efficiency of the first single-photon avalanche diode unit 100 for weak echo light signals at medium to long distances, achieving a balance between near- and long-range detection performance without any functional waste. Furthermore, the integrated P-type substrate provides a stable lateral diffusion channel for the photogenerated carriers of the first single-photon avalanche diode unit 100, allowing the carriers to accurately propagate to the depletion region of the second single-photon avalanche diode unit 200. This provides the second single-photon avalanche diode unit 200 with a unique and stable signal source, ensuring the accuracy of near-range detection.

[0063] In the embodiments of this application, reference is made to Figure 4 and Figure 5 The first single-photon avalanche diode unit 100 further includes a first N-type heavily doped region 104 located in the first N-type well region 103, and a first P-type heavily doped region 105 located in the first P-type doped region 102.

[0064] The first heavily doped N-type region 104 serves as the N-type electrode contact region, providing a low-resistance ohmic contact. The N-type well region 103 has a moderate doping concentration; directly leading out the electrode would result in high contact resistance and high signal transmission loss. The high doping of the first heavily doped N-type region 104 forms a low-resistance contact, ensuring efficient transmission of the electrical signal generated by avalanche multiplication to the external circuit.

[0065] The first heavily doped P-type region 105 serves as the P-type electrode contact region, providing a low-resistance ohmic contact. The first P-type doped region 102 has a low doping concentration, while the high doping of the first heavily doped P-type region 105 reduces the contact resistance between the P-type electrode and the doped region, ensuring stable application of bias voltage and efficient extraction of electrical signals.

[0066] Similarly, refer to Figure 4 and Figure 5 The second single-photon avalanche diode unit 200 further includes a second N-type heavily doped region 205 located in the second N-type well region 203, and a second P-type heavily doped region 206 located in the second P-type doped region 202.

[0067] The second heavily doped N-type region 205 serves as the N-type electrode contact region, providing a low-resistance ohmic contact to ensure efficient extraction of the avalanche signal. It should be understood that the second N-type well region 203 is the avalanche multiplication core region of the second single-photon avalanche diode unit 200, with a moderate doping concentration. The high doping of the second heavily doped N-type region 205 forms a low-resistance contact, ensuring that the avalanche signal generated after the second single-photon avalanche diode unit 200 captures charge carriers is transmitted to the external circuit without loss, avoiding signal attenuation due to contact resistance.

[0068] The second heavily doped P-type region 206 serves as the P-type electrode contact region, providing a low-resistance ohmic contact while optimizing the electric field distribution to improve carrier capture efficiency. The second P-type doped region has a lower doping concentration. The high doping concentration of the second heavily doped P-type region 206 reduces the contact resistance between the P-type electrode and the doped region, ensuring stable bias application. Simultaneously, its high doping concentration enhances the electric field gradient between the second P-type doped region 202 and the second N-type well region 203, concentrating the depletion region more at their interface, thus improving the capture efficiency of directional carriers transmitted from the first single-photon avalanche diode unit and adapting to the indirect detection function of the second single-photon avalanche diode unit.

[0069] In an optional example, the array further includes a deep trench isolation structure; Reference Figure 4When the deep trench isolation structure is a metal deep trench isolation structure 301, the metal deep trench isolation structure 301 is only disposed between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100, and the metal deep trench isolation structure 301 extends in a direction perpendicular to the array surface, penetrates the epitaxial layer 20 of the array and extends into the semiconductor substrate 10 of the array, for isolating adjacent first single-photon avalanche diode units 100 to suppress photogenerated carrier crosstalk and optical crosstalk.

[0070] In this embodiment, the metal deep trench isolation structure 301 is only disposed in the gap region between the first N-type well regions 103 of two adjacent first single-photon avalanche diode units 100, and is not disposed between the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200, or between adjacent second single-photon avalanche diode units 200, so as to reserve an unobstructed channel for the lateral propagation of charge carriers from the first single-photon avalanche diode unit 100 to the second single-photon avalanche diode unit 200, thereby ensuring the signal source for close-range detection.

[0071] The metal deep trench isolation structure 301 is opened in a direction perpendicular to the array surface, that is, in a vertical direction from the top layer of the array to the bottom layer of the substrate. The trench of the metal deep trench isolation structure 301 is filled with a highly conductive and highly reflective metal material, such as aluminum, copper, tungsten and other commonly used isolation metals in semiconductor processes. The metal deep trench isolation structure 301 completely penetrates the P-type epitaxial layer 20 of the array and extends downward into the interior of the P-type semiconductor substrate 10 to achieve vertical isolation from the epitaxial layer 20 to the substrate.

[0072] In this embodiment, the metal deep trench isolation structure 301 is used to physically and electrically isolate adjacent first single-photon avalanche diode units 100, thereby solving the photogenerated carrier crosstalk and optical crosstalk between the first single-photon avalanche diode units 100 and ensuring the signal independence and detection accuracy of the first single-photon avalanche diode unit 100 as a core detection unit for medium and long distances.

[0073] Furthermore, the lateral width of the epitaxial layer 20 between the first N-type well region 103 of the first single-photon avalanche diode unit 100 and the second N-type well region 203 of the adjacent second single-photon avalanche diode unit 200 is greater than the lateral width of the metal deep trench isolation structure 301 between the first N-type well regions 103 of the adjacent first single-photon avalanche diode unit 100.

[0074] In this embodiment, the lateral width of the epitaxial layer 20 between the first N-type well region 103 of the first single-photon avalanche diode unit 100 and the second N-type well region 203 of the second single-photon avalanche diode unit 200 refers to the horizontal spacing of the P-type epitaxial layer 20 between the outer edge of the first N-type well region 103 of the adjacent first single-photon avalanche diode unit 100 and the outer edge of the second N-type well region 203 of the second single-photon avalanche diode unit 200.

[0075] The lateral width of the metal deep trench isolation structure 301 between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100 refers to the overall width of the metal deep trench isolation structure 301 disposed between the first N-type well regions 103 of two adjacent first single-photon avalanche diode units 100 along the horizontal direction of the array. This width is the anti-crosstalk isolation width of the array, which is used to form a physical and electrical barrier to block carrier and optical crosstalk between the first single-photon avalanche diode units 100.

[0076] It should be understood that the epitaxial layer 20 region between the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 is used for the directional diffusion and transport of charge carriers. Therefore, sufficient pure epitaxial layer 20 dielectric space is required to ensure that there is no breakdown between the N-type well regions of the two units.

[0077] The deep metal trench isolation structure 301 between adjacent first single-photon avalanche diode units 100 is used to achieve isolation through a metal barrier. It does not need to be too wide (too wide would waste array area and reduce integration), and only needs to meet the basic isolation requirements.

[0078] Based on the above description, when the photogenerated carriers generated by the first single-photon avalanche diode unit 100 diffuse laterally in the semiconductor substrate 10 and the P-type epitaxial layer 20, if the transmission channel is too narrow, the carriers are prone to collision and accumulation in the narrow channel, resulting in a significant decrease in the number of effective carriers. They may not be able to reach the second N-type well region 203 of the second single-photon avalanche diode unit 200, or the number may be insufficient to trigger the avalanche effect. Sufficient channel width ensures that the carriers are transmitted smoothly along the diffusion path, ensuring that the number of carriers reaching the second single-photon avalanche diode unit 200 is within the effective trigger threshold range, providing a stable signal source for the close-range detection of the second single-photon avalanche diode unit 200.

[0079] It should be further understood that when the first single-photon avalanche diode unit 100 receives external optical signals, it generates a small number of stray carriers (carriers generated by non-effective echoes). At the same time, stray light is generated inside the unit. In this embodiment, the wider epitaxial layer 20 region for stray carriers allows some of the stray carriers generated by the first single-photon avalanche diode unit 100 to be absorbed by the intrinsic defects of the epitaxial layer 20 during the diffusion process, and some to diffuse towards directions other than the second single-photon avalanche diode unit 200. As a result, the number of stray carriers reaching the second single-photon avalanche diode unit 200 is greatly reduced, thus avoiding the superposition of stray carriers and effective carriers. When stray light around the first single-photon avalanche diode unit 100 propagates in the epitaxial layer 20, it will be scattered and attenuated due to the dielectric properties of the epitaxial layer 20. The wider lateral width of the epitaxial layer 20 allows for more sufficient scattering and attenuation of the stray light, preventing it from reaching the second N-type well region 203 of the second single-photon avalanche diode unit 200. This avoids the stray light generating invalid carriers in the well region of the second single-photon avalanche diode unit 200, reducing optical interference in near-range detection from the source. At the same time, this width is much larger than the width of the metal deep trench isolation structure 301, preventing stray carriers and stray light from propagating in a directional manner due to an excessively narrow channel. This further improves the purity of the detection signal of the second single-photon avalanche diode unit 200, ensuring the accuracy of near-range ranging.

[0080] Optionally, the first single-photon avalanche diode unit 100 and the adjacent second single-photon avalanche diode unit 200 have the same lateral width, and the lateral width of the first P-type doped region 102 of the first single-photon avalanche diode unit 100 is greater than the lateral width of the second P-type doped region 202 of the adjacent second single-photon avalanche diode unit 200.

[0081] In this embodiment, the first single-photon avalanche diode unit 100 is used to receive external medium-to-long-distance weak echo light, and the second single-photon avalanche diode unit 200 is used to receive charge carriers propagated through the substrate from the first single-photon avalanche diode unit 100. The two have different functions but need to be integrated in the same array. The uniform overall size of the unit is the basis for semiconductor mass production and a prerequisite for the orderly arrangement of the array, avoiding problems such as photolithography alignment deviation, uneven unit spacing, and reduced integration caused by size differences.

[0082] Specifically: The uniform overall lateral width of the unit allows the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 to be fabricated based on the same set of photolithography masks and the same set of process parameters. Only local parameters need to be adjusted when doping the P-type doped region, which can avoid photolithography alignment deviations caused by differences in unit size. In semiconductor manufacturing, the alignment accuracy of the photolithography mask is related to the unit size. Units of different sizes need to be aligned multiple times, which is prone to deviation. Uniform size can realize the photolithography of two types of units in one alignment, which greatly reduces the alignment error. Furthermore, the core process steps such as the etching of the epitaxial layer 20, the preparation of the N-type doped region, and the doping of the N-type well region for both types of units can be completely synchronized. Only the doping dosage needs to be adjusted during the preparation of the P-type doped region. No additional process steps are required, which simplifies the process complexity.

[0083] In the embodiments of this application, the first single-photon avalanche diode unit 100, as a direct photodetector unit, requires a larger P-type doped region to improve the weak light capture and carrier generation capabilities; the second single-photon avalanche diode unit 200, as an indirect carrier detection unit, only requires a smaller P-type doped region to accurately capture directional carriers and avoid interference from invalid carriers. The functional differences between the two determine that the size of the core doped region must be designed differently.

[0084] The first single-photon avalanche diode unit 100, serving as the mid-to-long-range detection unit of the array, needs to receive weak echo light with extremely low photon density. The larger size of the first P-type doped region 102 provides a larger P-type doped region as the central core region of the photosensitive area, possessing a larger effective light-receiving area. This allows for more efficient capture of externally incident weak echo light photons, increasing the probability of photon collisions with the semiconductor lattice, improving the generation efficiency of photogenerated carriers, and solving the problems of low photon density and high detection difficulty in mid-to-long-range echo light. Furthermore, the larger P-type doped region... The reverse ring structure formed with the outer first N-type well region 103 has a wider electric field coupling region. Photogenerated carriers can be captured by the electric field in a larger region and transported to the depletion region, reducing ineffective recombination of carriers and improving the effective utilization rate of carriers. More photogenerated carriers can trigger the avalanche multiplication effect more stably, avoiding problems such as insufficient carrier quantity, low avalanche triggering probability, and signal loss caused by weak light, ensuring the high detection sensitivity and signal capture rate of the first single-photon avalanche diode unit 100 for medium and long distance weak echo light.

[0085] The second single-photon avalanche diode unit 200 serves as a near-field detection unit, receiving only the charge carriers propagated directionally through the substrate from the first single-photon avalanche diode unit 100, without needing to directly receive external light. The smaller size of the second P-type doped region 202 is key to improving its detection accuracy. Specifically, the carriers received by the second single-photon avalanche diode unit 200 are the effective carriers propagated directionally by the first single-photon avalanche diode unit 100. The number is controllable and the direction is clear. The smaller P-type doped region can form a more concentrated strong electric field region, accurately capturing the directionally propagating carriers, while avoiding the accumulation of carriers in an excessively large region, which would cause signal timing distortion and pulse broadening. Furthermore, the smaller P-type doped region can significantly reduce the capture probability of ineffective carriers, avoiding the superposition of ineffective and effective carriers, which would lead to an increase in the dark count of the second single-photon avalanche diode unit 200 and signal baseline drift, thus improving the purity of the near-range detection signal. Moreover, the smaller P-type doped region makes the capture and avalanche triggering of carriers more concentrated, resulting in a sharper electrical pulse signal with clearer timing characteristics. This can accurately reflect the actual arrival time of the near-range echo, significantly improving the time determination accuracy of near-range ranging, and fundamentally solving the problem of low near-range detection accuracy in existing technologies.

[0086] In another alternative example, the array further includes a deep trench isolation structure; Reference Figure 5 When the deep trench isolation structure is not a deep trench isolation structure 302, the non-deep trench isolation structure 302 is disposed between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100, and between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100 and the second N-type well regions 203 of adjacent second single-photon avalanche diode units 200.

[0087] In the embodiments of this application, the trench of the non-metallic deep trench isolation structure 302 is filled with non-metallic insulating materials commonly used in semiconductor processes, such as silicon dioxide, silicon nitride, and polysilicon. Non-metallic insulating materials can effectively block the lateral electrical conduction of charge carriers, achieve basic electrical isolation, and suppress charge carrier crosstalk.

[0088] The transmission characteristics of the non-metallic deep trench isolation structure 302 are that it can transmit charge carriers and photons. Moreover, the lattice structure of the non-metallic material is compatible with the semiconductor lattice of the epitaxial layer 20 / substrate and will not form a continuous physical barrier. The photogenerated charge carriers generated by the first single-photon avalanche diode unit 100 can pass through the non-metallic isolation structure through material gaps and lattice diffusion. At the same time, a small amount of stray light can also pass through the structure, achieving the transmission effect of isolation without blocking.

[0089] Basic electrical isolation is required between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100 to suppress carrier crosstalk between the first single-photon avalanche diode units 100. At the same time, the isolation structure should not block its own photodetection function. The electrical isolation characteristics of non-metallic materials can meet this requirement, and the weak isolation characteristics will not excessively affect the electric field distribution of the first single-photon avalanche diode unit 100.

[0090] The first N-type well region 103 of the first single-photon avalanche diode unit 100 and the second N-type well region 203 of the second single-photon avalanche diode unit 200 form a channel for carrier signal transmission. This channel suppresses the ineffective interference of stray carriers in the array to the second single-photon avalanche diode unit 200 while allowing effective carriers generated by the first single-photon avalanche diode unit 100 to pass through smoothly. The carrier-permeable properties of non-metallic materials meet this requirement, avoiding the defects of strong isolation and complete blocking of metal isolation structures. In other words, the dual-region layout of the non-metallic deep trench isolation structure 302 uses the weak isolation of non-metallic materials to achieve basic anti-crosstalk across the entire array, and uses its transmission characteristics to ensure the smooth signal path from the first single-photon avalanche diode unit 100 to the second single-photon avalanche diode unit 200, while avoiding the carrier transmission blocking problem caused by the metal isolation structure between the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200.

[0091] Optionally, the material filled in the non-deep trench isolation structure 302 is a light-transmitting material.

[0092] In the embodiments of this application, the light-transmitting filling material includes a light-transmitting insulating material compatible with semiconductor processes, such as transparent silicon dioxide, silicon nitride, transparent polyimide, etc.

[0093] The non-deep trench isolation structure 302 can effectively block the lateral electrical conduction of charge carriers, achieve basic electrical isolation of the array, and suppress crosstalk of invalid charge carriers. It also has high transmittance for visible light and near-infrared light (the commonly used wavelength band for single-photon avalanche diode ranging), with no obvious light absorption or reflection, allowing the light signal to pass smoothly through the isolation structure along the original path without light loss or distortion. The material of the non-deep trench isolation structure 302 is compatible with the lattice structure of the P-type epitaxial layer 20 and the P-type substrate of the array, with few interface defects. The photogenerated charge carriers generated by the first single-photon avalanche diode unit 100 can achieve directional diffusion through lattice gaps and material interfaces, without the carrier transport being blocked due to material filling.

[0094] Secondly, embodiments of this application provide a method for fabricating a single-photon avalanche diode array, the method comprising: According to a preset array arrangement, a first single-photon avalanche diode unit 100 is formed in a preset first single-photon avalanche diode unit region, and a second single-photon avalanche diode unit 200 is formed in a preset second single-photon avalanche diode unit region; wherein, the second single-photon avalanche diode unit 200 includes an incident light blocking layer 204, which covers the photosensitive area of ​​the second single-photon avalanche diode unit 200 and is used to block externally incident light signals; In the array, each second single-photon avalanche diode unit 200 can be independently distributed among multiple first single-photon avalanche diode units 100, or at least two or all of the multiple second single-photon avalanche diode units 200 can be grouped together and concentrated in the target area of ​​the array; the first single-photon avalanche diode unit 100 is used to receive external incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode unit 200 through the substrate or epitaxial layer of the array, wherein the second single-photon avalanche diode 200 has the same photoresponse capability as the first single-photon avalanche diode 100.

[0095] In this embodiment of the application, a first single-photon avalanche diode unit 100 is formed in a preset first single-photon avalanche diode unit 100 region based on semiconductor doping, and a second single-photon avalanche diode unit 200 is formed in a preset second single-photon avalanche diode unit 200 region. The two types of units are used to simultaneously complete the fabrication of the photosensitive region, ensuring the consistency of the array process.

[0096] The first single-photon avalanche diode unit 100 is formed in the P-type epitaxial layer 20 in its corresponding region, and the surface of the first photosensitive region has no additional shielding structure and remains open to receive optical signals.

[0097] The second single-photon avalanche diode unit 200 and the first single-photon avalanche diode unit 100 adopt an isomorphic structure and are formed in the corresponding region of the P-type epitaxial layer 20. The second photosensitive region is located on the side of the P-type epitaxial layer 20 away from the semiconductor substrate 10. After the second photosensitive region is fabricated, an incident light blocking layer 204 is deposited on the surface of the second photosensitive region through metal deposition and patterning processes. The incident light blocking layer 204 is a high-reflectivity metal material such as aluminum, copper, or tungsten, or it can be an optical thin film or other materials that can block light from directly incident on the second single-photon avalanche diode below. This application embodiment does not impose any special limitations on this. The incident light blocking layer 204 completely covers the effective photosensitive area of ​​the second photosensitive region, reflecting and blocking externally incident light signals, preventing the second single-photon avalanche diode unit 200 from directly receiving external light signals.

[0098] In this embodiment of the application, the fabricated single-photon avalanche diode array can also meet the preset layout requirements through process calibration and molding treatment: each second single-photon avalanche diode unit 200 is independently distributed among multiple first single-photon avalanche diode units 100, or multiple second single-photon avalanche diode units 200 are centrally arranged in the preset target area of ​​the single-photon avalanche diode array; after the layout molding is completed, the array is subjected to post-processing processes such as annealing to optimize the unit doping interface and lattice structure, so as to ensure the consistency of avalanche characteristics between the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200.

[0099] Subsequently, deep trench isolation structures can be fabricated in the single-photon avalanche diode array according to actual application requirements: if a metal deep trench isolation structure 301 is selected, a full-layer through metal deep trench isolation structure 301 is fabricated only between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100; if a non-metal deep trench isolation structure 302 is selected, a non-metal deep trench isolation structure 302 is fabricated simultaneously between the first N-type well regions 103 of adjacent first single-photon avalanche diode units 100 and between the first N-type well region 103 of the first single-photon avalanche diode unit 100 and the second N-type well region 203 of the second single-photon avalanche diode unit 200, and a light-transmitting insulating material can be selected as the filling material of the non-metallic isolation structure.

[0100] Finally, the single-photon avalanche diode array, after completing the fabrication of the unit and isolation structure, undergoes subsequent processes such as surface passivation and electrode fabrication to form the array's signal extraction electrode and bias electrode. Finally, the electrical and photodetection performance of the single-photon avalanche diode array is tested to verify that the first single-photon avalanche diode unit 100 can normally receive external incident light and generate photogenerated carriers, and that the photogenerated carriers can stably propagate laterally through the array's P-type semiconductor substrate 10 to the second single-photon avalanche diode unit 200. The second single-photon avalanche diode unit 200 can achieve avalanche triggering and signal output by capturing carriers.

[0101] Based on the above description, in this embodiment of the application, the incident light blocking layer 204 completely covers the photosensitive area of ​​the second single-photon avalanche diode unit 200, blocking external incident light signals from entering the second single-photon avalanche diode unit 200, thereby avoiding the problem of light pulse broadening caused by external incident light and internal stray light in the prior art from the root, and eliminating the interference of stray light on near-field signals. In this embodiment, the second single-photon avalanche diode unit 200 does not directly receive external incident light, but only receives photogenerated carriers generated by the first single-photon avalanche diode unit 100 and propagated directionally through the array substrate. It should be understood that these carriers are effective carriers generated by the first single-photon avalanche diode unit 100 after receiving external light signals, and their number is controllable after propagation through the substrate. This avoids the situation in the prior art where a large number of carriers accumulate on the substrate and cannot be collected in time, thus solving the interference of substrate carriers on near-range signal analysis. Therefore, the second single-photon avalanche diode unit 200 can accurately capture the carrier signal corresponding to the near-range echo, greatly improving the accuracy of near-range ranging.

[0102] Furthermore, since the photosensitive area of ​​the first single-photon avalanche diode unit 100 is not covered by the incident light blocking layer 204, it can directly receive weak echo light signals from externally incident medium- and long-distance sources, maintaining the high detection efficiency of conventional single-photon avalanche diode units for weak light, and without making any sacrificial design to its structure, ensuring that the medium- and long-distance detection performance is not affected; while the second single-photon avalanche diode unit 200 shields external light interference through the incident light blocking layer 204, becoming a dedicated short-distance detection unit that only receives carriers propagating from the substrate, forming a functional partition structure with the first single-photon avalanche diode unit 100; Compared with the prior art where the isolation substrate and depletion region lead to the complete loss of substrate detection capability, the embodiments of this application make full use of the carrier propagation characteristics of the substrate or epitaxial layer, and use the substrate or epitaxial layer as the signal transmission channel of the first and second single-photon avalanche diode units. This not only realizes the accurate detection of short-range signals, but also retains the functional value of the substrate, avoids the waste of detection capability, and achieves dual protection of near- and long-range ranging performance.

[0103] Finally, the embodiments of this application can be mass-produced based on the mature manufacturing process of conventional single-photon avalanche diode arrays. Compared with the existing technology that adds ion implantation process to increase costs, this application achieves performance improvement while maintaining the same process complexity as conventional single-photon avalanche diode arrays, without increasing manufacturing costs.

[0104] Optionally, the step of forming a first single-photon avalanche diode unit 100 in the region of the first single-photon avalanche diode unit 100 and a second single-photon avalanche diode unit 200 in the region of the second single-photon avalanche diode unit 200 according to a preset array arrangement includes: Reference Figure 6 First, a semiconductor substrate 10 is provided.

[0105] In this embodiment, a P-type semiconductor substrate 10 is provided as the physical substrate and carrier transport carrier of the single-photon avalanche diode array. The substrate can be made of high-purity single-crystal silicon material and has undergone pretreatment processes such as polishing, cleaning, and impurity removal. The doping concentration, resistivity, and crystal orientation of the substrate can be adjusted according to actual needs to ensure the lattice matching of the subsequent epitaxial layer 20 growth and the stability of the lateral diffusion of carriers.

[0106] It should be understood that the high-purity single-crystal silicon substrate is free of surface defects and impurities after pretreatment, which avoids uneven growth of the subsequent epitaxial layer 20 and distortion of the doped region due to substrate defects, and provides stable physical support for the overall array structure. The precisely controlled P-type doping concentration and resistivity enable the semiconductor substrate 10 to have good hole transport characteristics, while avoiding the increase in dark count caused by excessive intrinsic carriers, ensuring the directional and low-loss transport of carriers from the first single-photon avalanche diode unit 100 to the second single-photon avalanche diode unit 200.

[0107] Reference Figure 7 Then, an epitaxial layer 20 is formed on the semiconductor substrate 10.

[0108] In this embodiment, a vapor phase epitaxy or molecular beam epitaxy process can be used to grow a P-type epitaxial layer 20 on the upper surface of the pretreated P-type semiconductor substrate 10. The thickness of the epitaxial layer 20 is [thickness value missing], and the doping concentration can be set according to actual needs, without special limitation here. After the epitaxial layer 20 is grown, a low-temperature annealing treatment can be performed to eliminate the lattice stress generated during the growth process.

[0109] Reference Figure 8Next, a first photosensitive region is formed in a first predetermined region of the epitaxial layer 20 to obtain the first single-photon avalanche diode unit 100, and a second photosensitive region is formed in a second predetermined region of the epitaxial layer 20; wherein, the first photosensitive region is located on the side of the epitaxial layer 20 away from the semiconductor substrate 10; wherein, the first photosensitive region includes a first N-type well region 103, a first N-type doped region 101, and a first P-type doped region 102; the first N-type well region 103 and the first P-type doped region 102 are located on the side of the first N-type doped region 101 away from the semiconductor substrate 10 ...1 are located on the side of the first N-type doped region 101 away from the semiconductor substrate 10; the first N-type well region 103 and the first P-type doped region 101 are located on the side of the first N-type doped region 101 away from the semiconductor substrate 10; the first N-type well region 103 and 3. A second photosensitive region is disposed around the outer periphery of the first P-type doped region 102 and spaced apart from the first P-type doped region 102; the second photosensitive region is located on the side of the epitaxial layer 20 away from the semiconductor substrate 10; the second photosensitive region includes a second N-type well region 203, a second N-type doped region 201 and a second P-type doped region 202; the second N-type well region 203 and the second P-type doped region 202 are located on the side of the second N-type doped region 201 away from the semiconductor substrate 10; the second N-type well region 203 is disposed around the outer periphery of the second P-type doped region 202 and spaced apart from the second N-type well region 202.

[0110] In this embodiment, through photolithography patterning, ion implantation doping, and high-temperature annealing activation, a first photosensitive region and a second photosensitive region with structural isomorphism are simultaneously formed on the side of the epitaxial layer 20 away from the semiconductor substrate 10, respectively, in a first predetermined region and a second predetermined region. The first photosensitive region, after formation, yields a first single-photon avalanche diode unit 100, and the second photosensitive region, after formation, yields a pre-formed second single-photon avalanche diode unit 200. Specifically, this may include: Using deep lithography, photoresist is spin-coated onto the surface of the N-type epitaxial layer 20. After exposure and development using a mask, photoresist patterns matching the structure of the photosensitive region are formed in the first and second predetermined regions, respectively, accurately defining the fabrication areas of the N-type doped region, N-type well region, and P-type doped region.

[0111] Using phosphorus (P) or arsenic (As) as doping sources, ion implantation is performed on the bottom layer of two types of predetermined regions to form a first N-type doped region 101 and a second N-type doped region 201, which serve as the base doped layer for the two types of photosensitive regions.

[0112] On top of the N-type doped region, high-dose ion implantation is performed using boron (B) as the doping source to form a first P-type doped region 102 and a second P-type doped region 202, respectively.

[0113] Using phosphorus (P) as the doping source, ion implantation is performed on the outer periphery of the first P-type doped region 102 and the second P-type doped region 202 to form the first N-type well region 103 and the second N-type well region 203. Both types of N-type well regions are arranged around the outer periphery of the corresponding P-type doped regions and are spaced apart from the P-type doped regions to form a reverse ring PN junction structure.

[0114] The ion-implanted substrate is placed in an inert gas atmosphere and subjected to high-temperature rapid thermal annealing to activate the implanted impurity ions, form an electroactive doped region, and repair the lattice damage caused by ion implantation, so that the impurity distribution in the doped region is more uniform.

[0115] Based on the above description, reverse ring-shaped photosensitive regions can be simultaneously formed in the regions of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 using the same set of photolithography masks and the same doping process parameters. This ensures that the structure, size, and lattice quality of the two types of photosensitive regions are highly consistent, guaranteeing the matching of core parameters such as avalanche trigger voltage and multiplication factor of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 from a process perspective, avoiding performance differences in units caused by process steps. All sub-steps are conventional processes for mass production of semiconductor integrated circuits and optoelectronic devices. Photolithography, ion implantation, and rapid thermal annealing do not require special equipment, enabling batch preparation. Furthermore, the simultaneous preparation method reduces process steps and improves production efficiency.

[0116] Reference Figure 9 Finally, the incident light blocking layer 204 is formed on the side of the second photosensitive region away from the semiconductor substrate 10 to obtain the second single-photon avalanche diode unit 200.

[0117] In this embodiment, a photolithography process is used to spin-coat photoresist onto the array surface. Exposure and development are performed using a mask to completely cover the region of the first single-photon avalanche diode unit 100 and the non-photosensitive region of the epitaxial layer 20 with photoresist, leaving only the surface of the second photosensitive region of the second single-photon avalanche diode unit 200 fully exposed. In a magnetron sputtering apparatus, a high-reflectivity metal such as aluminum (Al), copper (Cu), or tungsten (W) is selected as the target material to deposit a metal thin film on the exposed surface of the second photosensitive region, completely covering the effective area of ​​the second photosensitive region. A wet etching process is used to remove the photoresist from the array surface, while simultaneously cleaning the metal particles generated during sputtering, resulting in an incident light blocking layer 204 that covers only the second photosensitive region. Low-temperature annealing is performed in an N2 atmosphere to improve the adhesion between the incident light blocking layer 204 and the surface of the epitaxial layer 20, while simultaneously reducing the resistivity of the metal layer and preventing a decrease in light-shielding performance due to metal oxidation.

[0118] Based on the above description, all steps of this implementation method are based on conventional mass production processes for semiconductor integrated circuits and optoelectronic devices, requiring no special equipment or materials. Furthermore, the core structures of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 are fabricated simultaneously, significantly reducing process steps, improving production efficiency, and effectively controlling manufacturing costs. Through isomorphic simultaneous fabrication, the photosensitive region structure, size, and doping parameters of the first single-photon avalanche diode unit 100 and the second single-photon avalanche diode unit 200 are highly consistent, ensuring that the avalanche characteristics and electrical characteristics of the two types of units are matched, improving the overall detection consistency of the array, and reducing the complexity of subsequent signal processing.

[0119] By directionally depositing the incident light blocking layer 204, without changing the core structure, the functional partitioning of the first single-photon avalanche diode unit 100 for direct light detection and the second single-photon avalanche diode unit 200 for indirect carrier detection is achieved. This matches the design goal of near- and far-range coordinated detection of the array, and ensures the directional transport of carriers from the first single-photon avalanche diode unit 100 to the second single-photon avalanche diode unit 200 and the light-shielding requirements of the second single-photon avalanche diode unit 200 from the process level.

[0120] Thirdly, embodiments of this application provide an optical ranging system, the system including a light-emitting component and the single-photon avalanche diode array described in the first aspect; The light-emitting component faces the target and is used to emit a probe light signal to the target. The photosensitive area of ​​the single-photon avalanche diode array faces the target and is used to receive the echo light signal reflected by the target.

[0121] In this embodiment, the optical ranging system is adapted to medium- and high-precision ranging scenarios and can be applied to vehicle-mounted lidar (for short-range obstacle avoidance in autonomous driving and medium- and long-range road condition detection), handheld high-precision rangefinders (for distance measurement in building construction and interior decoration), robot obstacle avoidance radar (for short-range positioning of service robots and industrial robots), and home security radar (for distance measurement of doors and windows and detection of foreign objects intrusion). It is adapted to the actual application environment with complex lighting and multiple interferences, and takes into account the needs of short- and long-range collaborative detection.

[0122] Fourthly, embodiments of this application provide a chip that integrates a single-photon avalanche diode array as described in any of the first aspects.

[0123] In the embodiments of this application, the chip with integrated single-photon avalanche diode array, with its characteristics of near- and far-range collaborative high-precision ranging miniaturized integration, can be applied to consumer electronics, automotive electronics, industrial automation, smart homes, security monitoring and other fields.

[0124] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0125] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A single-photon avalanche diode array, characterized in that, The array includes: Multiple first single-photon avalanche diode units and multiple second single-photon avalanche diode units; in the array, each second single-photon avalanche diode unit may be independently distributed among multiple first single-photon avalanche diode units, or, at least two or all of the multiple second single-photon avalanche diode units may be grouped together and concentrated in the target area of ​​the array. The second single-photon avalanche diode unit includes an incident light blocking layer, which covers the photosensitive area of ​​the second single-photon avalanche diode unit to block externally incident light signals; The first single-photon avalanche diode unit is used to receive external incident light and generate photogenerated carriers. The photogenerated carriers can propagate to the second single-photon avalanche diode unit through the substrate or epitaxial layer of the array. The second single-photon avalanche diode has the same photoresponse capability as the first single-photon avalanche diode.

2. The array according to claim 1, characterized in that, The array includes a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate, wherein the first single-photon avalanche diode unit and the second single-photon avalanche diode unit are both formed on the semiconductor substrate and the epitaxial layer; The first single-photon avalanche diode unit includes a first photosensitive region formed in the epitaxial layer, the first photosensitive region being located on the side of the epitaxial layer away from the semiconductor substrate; the first photosensitive region includes a first N-type well region, a first N-type doped region, and a first P-type doped region; the first N-type well region and the first P-type doped region are located on the side of the first N-type doped region away from the semiconductor substrate; the first N-type well region is disposed around the outer periphery of the first P-type doped region and is spaced apart from the first P-type doped region; The second single-photon avalanche diode unit further includes a second photosensitive region formed in the epitaxial layer, the second photosensitive region being located on the side of the epitaxial layer away from the semiconductor substrate; the second photosensitive region includes a second N-type well region, a second N-type doped region, and a second P-type doped region; the second N-type well region and the second P-type doped region are located on the side of the second N-type doped region away from the semiconductor substrate; the second N-type well region is disposed around the outer periphery of the second P-type doped region and is spaced apart from the second P-type doped region.

3. The array according to claim 2, characterized in that, The array also includes a deep trench isolation structure; When the deep trench isolation structure is a metal deep trench isolation structure, the metal deep trench isolation structure is only disposed between the first N-type well regions of adjacent first single-photon avalanche diode units, and the metal deep trench isolation structure extends in a direction perpendicular to the array surface, penetrates the epitaxial layer of the array and extends into the semiconductor substrate of the array, for isolating adjacent first single-photon avalanche diode units to suppress photogenerated carrier crosstalk and optical crosstalk.

4. The array according to claim 3, characterized in that, The lateral width of the epitaxial layer between the first N-type well region of the first single-photon avalanche diode unit and the second N-type well region of the adjacent second single-photon avalanche diode unit is greater than the lateral width of the metal deep trench isolation structure between the first N-type well regions of the adjacent first single-photon avalanche diode units.

5. The array according to claim 4, characterized in that, The first single-photon avalanche diode unit and the adjacent second single-photon avalanche diode unit have the same lateral width. The lateral width of the first P-type doped region of the first single-photon avalanche diode unit is greater than the lateral width of the second P-type doped region of the adjacent second single-photon avalanche diode unit.

6. The array according to claim 2, characterized in that, The array also includes a deep trench isolation structure; When the deep trench isolation structure is a non-metallic deep trench isolation structure, the non-metallic deep trench isolation structure is disposed between the first N-type well regions of adjacent first single-photon avalanche diode units, and between the first N-type well regions of adjacent first single-photon avalanche diode units and the second N-type well regions of adjacent second single-photon avalanche diode units.

7. The array according to claim 6, characterized in that, The material filled in the non-metallic deep trench isolation structure is a light-transmitting material.

8. A method for fabricating a single-photon avalanche diode array, characterized in that, The preparation method includes: According to a preset array arrangement, a first single-photon avalanche diode unit is formed in a preset first single-photon avalanche diode unit region, and a second single-photon avalanche diode unit is formed in a preset second single-photon avalanche diode unit region; wherein, the second single-photon avalanche diode unit includes an incident light blocking layer, which covers the photosensitive area of ​​the second single-photon avalanche diode unit and is used to block externally incident light signals; In the array, each second single-photon avalanche diode unit can be independently distributed among multiple first single-photon avalanche diode units, or at least two or all of the multiple second single-photon avalanche diode units can be grouped together and concentrated in the target area of ​​the array; the first single-photon avalanche diode units are used to receive external incident light and generate photogenerated carriers, which can propagate to the second single-photon avalanche diode units through the substrate or epitaxial layer of the array, wherein the second single-photon avalanche diode has the same photoresponse capability as the first single-photon avalanche diode.

9. The preparation method according to claim 8, characterized in that, The step of forming a first single-photon avalanche diode unit in the first single-photon avalanche diode unit region and a second single-photon avalanche diode unit in the second single-photon avalanche diode unit region according to a preset array arrangement includes: Provide semiconductor substrates; An epitaxial layer is formed on the semiconductor substrate; A first photosensitive region is formed in a first predetermined region of the epitaxial layer to obtain the first single-photon avalanche diode unit, and a second photosensitive region is formed in a second predetermined region of the epitaxial layer; wherein, the first photosensitive region is located on the side of the epitaxial layer away from the semiconductor substrate; wherein, the first photosensitive region includes a first N-type well region, a first N-type doped region, and a first P-type doped region; the first N-type well region and the first P-type doped region are located on the side of the first N-type doped region away from the semiconductor substrate; the first P-type doped region is disposed around the outer periphery of the first N-type well region and is spaced apart from the first N-type well region; the second photosensitive region is located on the side of the epitaxial layer away from the semiconductor substrate; the second photosensitive region includes a second N-type well region, a second N-type doped region, and a second P-type doped region; the second N-type well region and the second P-type doped region are located on the side of the second N-type doped region away from the semiconductor substrate; the second P-type doped region is disposed around the outer periphery of the second N-type well region and is spaced apart from the second N-type well region; An incident light blocking layer is formed on the side of the second photosensitive region away from the semiconductor substrate to obtain the second single-photon avalanche diode unit.

10. An optical ranging system, characterized in that, The system includes a light-emitting component and a single-photon avalanche diode array as described in any one of claims 1-7; The light-emitting component faces the target and is used to emit a probe light signal to the target. The photosensitive area of ​​the single-photon avalanche diode array faces the target and is used to receive the echo light signal reflected by the target.

11. A chip, characterized in that, The chip integrates a single-photon avalanche diode array as described in any one of claims 1-7.

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