Display panel and display device

Abstract

This application provides a display panel and a display device, relating to the field of display technology. The display panel includes a display area and a non-display area at least partially surrounding the display area. The non-display area includes a first non-display area. The first non-display area includes a first main routing unit and a second main routing unit. The first main routing unit includes a second branch. Along a first direction, the second main routing unit is disposed on at least one side of the second branch, and the second main routing unit extends along the first direction. The first direction intersects with the direction from the first non-display area to the display area. This arrangement avoids the need for the first main routing unit to be located on the side of the second main routing unit closer to the display area, thereby reducing the width of the first non-display area, making the display panel meet the design requirements of a narrow bezel, and improving the screen-to-body ratio of the display panel.

Description

[0001] This application is a divisional application filed on March 15, 2022, with application number 202210255286.2, entitled "Display Panel and Display Device". Technical Field

[0002] This invention relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology

[0003] Organic light-emitting diode (OLED) displays are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display applications. As users have increasingly higher requirements for display effects, displays with narrow bezels and high screen-to-body ratios are becoming increasingly popular.

[0004] In existing technologies, the lower bezel area of ​​a display screen typically requires the installation of multiplexing circuits, power signal lines, etc. The power signal lines include PVDD signal lines and PVEE signal lines. Since the PVDD signal lines need to extend laterally on the side of the PVEE signal lines closest to the display area, the vertical width of the lower bezel of the display screen is relatively large. Furthermore, the PVDD signal lines in the lower bezel area have cross-layer switching, which can lead to a large voltage drop.

[0005] Therefore, there is an urgent need to provide a solution to reduce the vertical width of the bottom bezel of the display screen and improve the problem of large voltage drop, so as to meet users' needs for a display screen with narrow bezels, high screen ratio and good display effect. Summary of the Invention

[0006] In view of this, the present invention provides a display panel and a display device to meet users' needs for displays with narrow bezels and high screen-to-body ratios.

[0007] In a first aspect, this application provides a display panel, characterized in that it includes a display area and a non-display area at least partially surrounding the display area; the non-display area includes a first non-display area;

[0008] The first non-display area includes a first main routing unit and a second main routing unit;

[0009] The first main routing unit includes a second branch, and along a first direction, the second main routing unit is disposed on both sides of the second branch, and the second main routing unit extends along the first direction;

[0010] The first direction intersects with the direction from the first non-display area to the display area;

[0011] The non-display area further includes a second non-display area, which is located between the first non-display area and the display area;

[0012] The second non-display area includes at least two multiplexing units arranged sequentially along the first direction; a first interval is included between two adjacent multiplexing units; along the second direction, the first interval is located between two second main routing units; the second direction is perpendicular to the first direction.

[0013] The second non-display area also includes a first signal trace, the first end of which is electrically connected to the second branch, and the second end of which extends toward the first branch toward the display area via at least one first interval.

[0014] Secondly, this application provides a display device including the aforementioned display panel.

[0015] Compared with the prior art, the display panel and display device provided by the present invention achieve at least the following beneficial effects:

[0016] This application provides a display panel and a display device. In the first non-display area of ​​the display panel, by setting a second main routing unit on at least one side of the extension direction of the second branch of the first main routing unit, and setting the second main routing unit to extend along a first direction, the first main routing unit is avoided from being set in the area close to the display area of ​​the second main routing unit, thereby reducing the width of the first non-display area, making the display panel meet the design requirements of a narrow bezel, and improving the screen ratio of the display panel.

[0017] Of course, any product implementing this invention does not necessarily need to achieve all of the technical effects described above at the same time.

[0018] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0020] Figure 1 The diagram shown is a schematic of a display panel in the prior art;

[0021] Figure 2 The image shown is a schematic diagram of a display panel provided in an embodiment of this application;

[0022] Figure 3 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0023] Figure 4 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0024] Figure 5 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0025] Figure 6 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0026] Figure 7 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0027] Figure 8 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application;

[0028] Figure 9 The image shown is a partial circuit enlarged view of a multiplexing unit region provided in an embodiment of this application;

[0029] Figure 10 The image shown is provided in an embodiment of this application. Figure 6 A cross-sectional view of AA';

[0030] Figure 11 The image shown is provided in an embodiment of this application. Figure 8 A schematic diagram of region A in the middle;

[0031] Figure 12 The image shown is provided in an embodiment of this application. Figure 8 Another schematic diagram of region A in the middle;

[0032] Figure 13 The diagram shown is a schematic representation of a display device provided in an embodiment of this application. Detailed Implementation

[0033] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0034] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0035] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0036] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0037] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0038] Figure 1 The diagram shown is a schematic representation of a display panel in the prior art. Please refer to it. Figure 1 In existing technology, the lower bezel area of ​​the display screen 01 typically requires the installation of a multiplexing circuit 02, power signal lines, etc. The power signal lines include PVDD signal lines and PVEE signal lines. Since the PVDD signal lines in the lower bezel area need to extend laterally on the side of the PVEE signal lines closest to the display area, the PVEE signal lines in the lower bezel area need to be positioned on the side of the PVDD signal lines furthest from the display area. This results in a relatively large vertical width in the lower bezel of the display screen 01. Furthermore, the laterally extending PVDD signal lines need to pass through the Demux area 02 and then provide electrical signals to the display area via a signal transmission unit 03. In existing technology, the PVDD signal lines need to pass through the Demux area 02 via a metal layer switching method. That is, the PVDD signal lines and the connecting line 04 (used for metal layer switching) are located on different metal layers, which leads to a large voltage drop, affecting the transmission of electrical signals to the display area and resulting in poor display quality of the display screen 01.

[0039] In view of this, the present invention provides a display panel and a display device to meet users' needs for a display screen with narrow bezels, high screen-to-body ratio, and excellent display effect.

[0040] Figure 2 The image shown is a schematic diagram of a display panel provided in an embodiment of this application. Figure 3 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Please refer to... Figure 2 and Figure 3 This application provides a display panel 100, including a display area 10 and a non-display area 20 that at least partially surrounds the display area 10; the non-display area 20 includes a first non-display area 21;

[0041] The first non-display area 21 includes a first main wiring unit 30 and a second main wiring unit 40; the first main wiring unit 30 includes a first branch 31, and the extension direction of the first branch 31 is a first direction;

[0042] Along the first direction, the second general wiring unit 40 is disposed on at least one side of the first branch 31, and the second general wiring unit 40 extends along the first direction;

[0043] The first direction intersects with the direction from the first non-display area 21 to the display area 10.

[0044] Specifically, please refer to Figure 2 This application provides a display panel 100, which includes a display area 10 and a non-display area 20, wherein the non-display area 20 is at least partially disposed around the display area 10, and wherein the non-display area 20 includes a first non-display area 21, which may be the lower border area of ​​the display panel 100.

[0045] This application provides a configuration of a first non-display area 21, wherein a first main routing unit 30 and a second main routing unit 40 are provided in the first non-display area 21, wherein the first main routing unit 30 includes a first branch 31, which extends along a first direction; to clearly show that the first branch 31 is only a branch component of the first main routing unit 30, this application includes... Figure 2 The second branch 32, which may also be included in the first general routing unit 30, is shown in a dashed and semi-transparent state; that is, the first general routing unit 30 provided in this application may include two parts: the first branch 31 and the second branch 32.

[0046] Due to the attachment Figure 2 The content shown is only for illustrating the arrangement of the second main wiring unit 40 in the first non-display area 21 relative to the first branch 31 in this application. Therefore, the specific arrangement of the second branch 32 is not explicitly shown. The arrangement relationship between the second branch 32 and the first branch 31 will be described in the following content.

[0047] Based on the location of the first branch 31 in the first main wiring unit 30, along the first direction, this application provides a second main wiring unit 40 located in the first non-display area 21 of the display panel 100, situated at least on one side of the first branch 31. Figure 2 The second main routing unit 40 is shown to be located on the left side, and the second main routing unit 40 is arranged to extend along the first direction; thus avoiding the need to set part of the first main routing unit 30 in the area of ​​the second main routing unit 40 near the display area 10, compared to Figure 1As shown in the prior art, this application eliminates the area (partial non-display area) where the first general wiring unit 30 needs to be set in the side of the second general wiring unit 40 near the display area 10. This is beneficial for moving the setting position of the second general wiring unit 40 toward the display area 10, thereby reducing the width occupied in the second direction by the first general wiring unit 30 and the second general wiring unit 40 in the first non-display area 21. This reduces the space required for the lower bezel, making the design of the display panel 100 more in line with the design requirements of a narrow bezel and improving the screen ratio of the display panel 100.

[0048] It should be noted that the extension direction of the first branch 31 mentioned above is the first direction. When the display area 10 is rectangular, the extension direction of the first branch 31 is the extension direction of one edge of the display area 10, that is, the first direction is parallel to the extension direction of one edge of the display area 10. The second direction mentioned above is the direction from the first main wiring unit 30 to the display area 10, wherein the second direction is perpendicular to the first direction.

[0049] This application also provides an alternative embodiment, such as... Figure 3 As shown, in the first direction, a second main wiring unit 40 is provided on both sides of the first branch 31, that is, a second main wiring unit 40 is provided on both the first end side and the second end side of the first branch 31.

[0050] It should be noted that this application does not limit the number of the second general wiring units 40 provided in the display panel 100, and users can make the appropriate selection according to their needs.

[0051] Figure 4 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Please refer to... Figure 3 and Figure 4 Optionally, the first main wiring unit 30 further includes a second branch 32, which includes a first sub-second branch 321 and a second sub-second branch 322.

[0052] The first end of the first sub-second branch 321 is electrically connected to the first end of the first branch 31, and the first end of the second sub-second branch 322 is electrically connected to the second end of the first branch 31; both the first sub-second branch 321 and the second sub-second branch 322 extend along the side of the first branch 31 away from the display area 10.

[0053] Specifically, regarding a possible specific structure of the first general wiring unit 30 provided in this application, in addition to the first branch 31 mentioned above, the first general wiring unit 30 also includes a second branch 32, such as... Figure 3 , Figure 4As shown, the side of the first branch 31 furthest from the display area 10 is electrically connected to the second branch 32.

[0054] Reference Figure 4 This application provides a second branch 32 in the first main wiring unit 30 for electrical connection with the corresponding driver chip 23 of the display panel 100, so as to receive the electrical signals output by the driver chip 23. Both the second branch 32 and the first branch 31 are paths used to transmit the electrical signals output by the driver chip 23 to the display area 10. More specifically, this application provides an optional configuration of the second branch 32, which includes a first sub-second branch 321 and a second sub-second branch 322. The first end of the first sub-second branch 321 is electrically connected to the first end of the first branch 31, and the first end of the second sub-second branch 322 is electrically connected to the second end of the first branch 31. That is, the first sub-second branch 321 and the second sub-second branch 322 are respectively electrically connected to the two ends of the first branch 31 extending in a first direction. Simultaneously, both the first sub-second branch 321 and the second sub-second branch 322 extend in a second direction, that is, along the side of the first branch 31 away from the display area 10.

[0055] like Figure 4 As shown, the first main routing unit 30 needs to be electrically connected to the corresponding driver chip 23 to transmit drive signals to the first main routing unit 30 through the driver chip 23. That is, the electrical signal is transmitted to the first branch 31 after passing through the second branch 32, and then transmitted to the display area 10 through the transmission line or transmission unit subsequently provided in the first branch 31. Furthermore, since the pins (not shown) of the driver chip 23 are usually located at both ends of the driver chip 23 along the first direction, this application separates the first sub-second branch 321 and the second sub-second branch 322 on both sides of the first branch 31. This facilitates the electrical connection between the first sub-second branch 321 and the second sub-second branch 322 and the pins in the driver chip 23. That is, the first sub-second branch 321 and the second sub-second branch 322 can directly extend along the second direction to the side away from the display area 10 to achieve electrical connection with the pins in the driver chip 23.

[0056] Figure 5 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Please refer to... Figure 5In addition, this application also provides a way of setting the first general routing unit 30. This way of setting can be based on the position of the pin (not shown) in the middle area of ​​the driver chip 23. At this time, the second branch 32 included in the first general routing unit 30 can be electrically connected to the middle position of the first branch 31. The second branch 32 extends directly along the second direction to the side away from the display area 10, so as to realize the electrical connection with the pin in the driver chip 23.

[0057] The above two configuration methods of the first general routing unit 30 are two optional embodiments provided by this application, but this application is not limited thereto. Users can configure it according to their own needs and the type and number of driver chips 23 used.

[0058] Figure 6 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Figure 7 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Please refer to... Figure 6 and Figure 7 Optionally, the non-display area 20 also includes a second non-display area 22, which is located between the first non-display area 21 and the display area 10;

[0059] The second non-display area 22 includes at least two multiplexing units 50 arranged sequentially along the first direction; a first interval 51 is included between two adjacent multiplexing units 50;

[0060] The second non-display area 22 also includes a first signal line 33, the first end of which is electrically connected to the first branch 31, and the second end extends toward the first branch 31 toward the display area 10 via at least one first interval 51.

[0061] Specifically, the non-display area 20 of the display panel 100 also includes a second non-display area 22, which is located between the first non-display area 21 and the display area 10. In an alternative embodiment, the first general routing unit 30 and the second general routing unit 40 are disposed in the first non-display area 21, and the multiplexing unit 50 is disposed in the second non-display area 22. That is, the multiplexing unit 50 is disposed between the first general routing unit 30, the second general routing unit 40 and the adjacent display area 10.

[0062] This application sets the second non-display area 22 to include a plurality of multiplexing units 50 arranged sequentially along the first direction, and sets a first interval 51 between any two adjacent multiplexing units 50. The first interval 51 is used to separate the two adjacent multiplexing units 50 so that the two adjacent multiplexing units 50 have no electrical connection relationship in the first direction.

[0063] In addition to the first interval 51 provided in the second non-display area 22, the second non-display area 22 also includes a first signal trace 33. This first signal trace 33 is a path used to transmit the electrical signals received by the first main trace unit 30 to the display area 10. Therefore, in this application, the first end of the first signal trace 33 is electrically connected to the first branch 31 in the first main trace unit 30, and its second end extends through the first interval 51 towards the display area 10 from the first branch 31. That is, the second branch 32, the first branch 31, and the first signal trace 33 provided in the first non-display area 21 and the second non-display area 22 are all paths used to transmit the electrical signals output by the driver chip 23 to the display area 10.

[0064] This application achieves the same-layer routing of the first signal trace 33 and the multiplexing unit 50 by routing the first signal trace 33 between two adjacent multiplexing units 50. This avoids the need to set the first signal trace 33 on the upper / lower layer of the multiplexing unit 50, thereby avoiding cross-layer routing of the first signal trace 33, simplifying the circuit setup of the non-display area 20, and simultaneously avoiding the influence of the overlapping area between the first signal trace 33 and the multiplexing unit 50 on their respective electrical signals.

[0065] It should be noted that, Figure 6 and Figure 7 The embodiments shown, namely the second non-display area 22 including two multiplexing units 50 and three multiplexing units 50, are merely for illustrating the scheme of this application and are not intended to limit the number of multiplexing units 50 provided in the display panel 100; correspondingly, the number of first intervals 51 and the number of first signal traces 33 are not limited. For example, multiple first signal traces 33 may be provided in one first interval 51, or no first signal traces 33 may be provided. Users can adjust the actual structure of the display panel 100 according to actual needs.

[0066] Figure 8 The diagram shown is another schematic diagram of the display panel provided in an embodiment of this application. Figure 9 The image shown is a partial circuit enlarged view of the multiplexing unit region provided in an embodiment of this application. Please refer to the diagram for details. Figure 6 , Figure 7 Reference Figure 8 , Figure 9 Optionally, the display area 10 includes a plurality of sub-pixels 11, and along the first direction, the sum of the widths of all sub-pixels 11 in a row is D1;

[0067] Along the first direction, the sum of the widths of all multiplexing units 50 is D2, where D1 > D2.

[0068] Specifically, the display area 10 of the display panel 100 includes multiple pixel units, each pixel unit including at least 3 sub-pixels 11. The multiple sub-pixels 11 in the display area 10 can be arranged along a first direction and a second direction. Taking the display area 10 in the display panel 100 as a rectangle as an example, the sum of the widths of all sub-pixels 11 in a row of sub-pixels 11 arranged along the first direction is D1. In this application, the sum of the widths of all multiplexing units 50 arranged along the first direction is set to D2, where D1 > D2.

[0069] It should be noted that, for the sake of clarity of the illustration, Figure 8 The diagram shows two multiplexing units 50, with the width of the multiplexing unit 50 being D2 = X1 + X2.

[0070] like Figure 8 , Figure 9 As shown, the multiplexing unit 50 includes a plurality of sub-multiplexing units, and there is a gap space between adjacent sub-multiplexing units, the width of which is W along the first direction; Figure 9 The diagram shows several sub-multiplexing units arranged adjacent to the first signal trace 33. This application reduces the width W of the gap space between the sub-multiplexing units so that the size required by the several sub-multiplexing units arranged on both sides of the first signal trace 33 in the first direction is reduced. In this way, by compressing the width required by the multiplexing unit 50 in the first direction, a first interval 51 with sufficient space can be reserved between two adjacent multiplexing units 50 so that the first signal trace 33 can be arranged in the area of ​​the first interval 51.

[0071] It should be added that, Figure 9 Only 12 sub-signal lines 64 are shown, but this does not mean that each row in the display area 10 is only set with corresponding 12 sub-pixels 11; it is only for the purpose of Figure 9 The example clearly illustrates the local structural configuration of the multiplexing unit 50; the number of sub-signal lines 64 can be adjusted according to the number of sub-pixels 11 set in the display area 10. For example... Figure 9 As shown, multiple sub-multiplexing units can all be electrically connected to a SOURCE trace (source signal trace) via a horizontal trace 63. The side of the SOURCE trace away from the display area 10 is electrically connected to the driver chip 23, used to transmit the electrical signal output by the driver chip 23 to the display area 10 via the SOURCE trace and the sub-multiplexing units, and then via the sub-signal line 64. Figure 9As shown, the sub-multiplexing unit is also electrically connected to multiple CKH signal lines (timing control signal lines, such as CKH1-CKH6 shown). The CKH signal lines are used to receive electrical signals transmitted by the driver chip 23, thereby controlling whether the switching transistors in the corresponding electrically connected sub-multiplexing units are turned on. Only when the switching transistors in the sub-multiplexing unit are in the on state can the electrical signals received by the SOURCE trace be transmitted to the sub-signal line 64 via the multiplexing unit 50. The sub-signal line 64 can specifically be a data signal line.

[0072] It should be noted that in the prior art, the width of all multiplexing units 50 is usually set to be equal to the width of all sub-pixels 11 in a row. Therefore, it is difficult to leave space between multiplexing units 50 for setting the first signal trace 33. This application sets the width of all multiplexing units 50 and D2 to be less than the width of all sub-pixels 11 in a row and D1. Therefore, a first gap 51 with sufficient space can be reserved between at least two adjacent multiplexing units 50 to avoid the cross-layer setting of the first signal trace 33. This simplifies the setting of the non-display area 20 circuit and at the same time avoids the influence of the overlapping area between the first signal trace 33 and the multiplexing unit 50 on their respective electrical signals.

[0073] Please continue to refer to Figures 6-8 Optionally, the second non-display area 22 also includes a signal output unit 25, which is located on the side of the multiplexing unit 50 near the display area 10.

[0074] The second end of the first signal trace 33 is electrically connected to the signal output unit 25.

[0075] Specifically, this application provides an alternative embodiment in which a signal output unit 25 is provided in the second non-display area 22 of the display panel 100, and the signal output unit 25 is located on the side of the multiplexing unit 50 close to the display area 10; the second end of the first signal line 33 extends through the first interval 51 to the first branch 31 toward the display area 10, and is electrically connected to the signal output unit 25.

[0076] It should be added that the signal output unit 25 extends along the first direction, and the width of the signal output unit 25 is approximately the same as the width of a row of sub-pixels 11; the display area 10 of the display panel 100 is provided with multiple first traces 61 extending along the second direction and arranged along the first direction. One end of each first trace 61 is electrically connected to the signal output unit 25, so as to transmit the electrical signal output by the pin of the driver chip 23 to each first trace 61 in the display area 10 through the first main trace unit 30, the first signal trace 33 and the signal output unit 25.

[0077] This application, through the configuration of the first general wiring unit 30, the first signal wiring 33, and the signal output unit 25, avoids the need to configure signal lines that correspond one-to-one with the first wiring 61 to be directly electrically connected to the driver chip 23, reduces the complexity of wiring configuration in the non-display area 20, and avoids the problem of wiring across layers. It also reduces the area required by the first non-display area 21 and the second non-display area 22, thereby increasing the screen ratio of the display panel 100.

[0078] It should also be noted that, in addition to the first trace 61, the display area 10 may also have multiple second traces 62 extending along the first direction and arranged along the second direction. Each second trace 62 intersects with each first trace 61. Each second trace 62 is electrically connected to at least one first trace 61 through a via, so that the electrical signal transmitted by the driver chip 23 can be transmitted to the second trace 62 via the first trace 61.

[0079] Figure 10 The image shown is provided in an embodiment of this application. Figure 6 Please refer to a cross-sectional view of AA'. Figure 6 and Figure 10 Optionally, at least a portion of the first signal traces 33 are disposed on the same layer as the first general trace unit 30.

[0080] Specifically, since the first signal trace 33 is electrically connected to the first branch 31 in the first general trace unit 30, this application provides an alternative embodiment in which at least a portion of the first signal trace 33 is arranged on the same layer as the first general trace unit 30. In this way, at least a portion of the first signal trace 33 and the first general trace unit 30 can be manufactured in the same process, and cross-layer trace replacement can be avoided, simplifying the manufacturing process of the display panel 100.

[0081] It should be added that users can choose to set all the first signal traces 33 in the display panel 100 on the same layer as the first general trace unit 30, that is, there is no setting in the non-display area 20 where the first signal traces 33 need to be electrically connected to the first general trace unit 30 across layers, thereby further simplifying the manufacturing process of the display panel 100.

[0082] Please refer to Figures 6-10 Optionally, the first signal trace 33, which is disposed on the same layer as the first general trace unit 30, includes a Ti / Al / Ti structure.

[0083] Specifically, this application sets the first signal trace 33, which is disposed on the same layer as the first general trace unit 30, to have a Ti / Al / Ti structure, where Ti / Al / Ti is the material used to manufacture the first signal trace. The first signal trace 33 manufactured in this way has a low resistivity, which reduces the voltage drop. This makes the voltage transmitted to the side of the first trace 61 near the driver chip 23 about the same as the voltage transmitted to the side of the first trace 61 away from the driver chip 23. As a result, the brightness of the sub-pixels 11 electrically connected to the first trace 61 is almost identical, which improves the display effect of the display panel 100 and enhances the user experience.

[0084] It should be noted that the Ti / Al / Ti structure of the first signal trace 33 is only one optional embodiment provided in this application. Users may also choose other films with lower resistivity to set the first signal trace 33. This application does not make any specific limitation on this.

[0085] Please refer to Figures 6-8 Optionally, the second general wiring unit 40 is located on the side of the multiplexing unit 50 away from the display area 10.

[0086] Specifically, in the embodiments provided in this application, the second main routing unit 40 and the first main routing unit 30 are both disposed in the first non-display area 21, and the multiplexing units 50 are both disposed in the second non-display area 22, and the second non-display area 22 is located between the first non-display area 21 and the display area 10; that is, the second main routing unit 40 is disposed on the side of the multiplexing unit 50 away from the display area 10, and there is no overlap between the second main routing unit 40 and the multiplexing unit 50 on the plane where the display panel 100 is located, so as to avoid interference with each other's electrical signal transmission.

[0087] It should also be added that, along the second direction, the first general routing unit 30 is not located between the second general routing unit 40 and the multiplexing unit 50 located adjacent to it, nor are any other routing lines electrically connected to the first general routing unit 30 located there; that is, the second general routing unit 40 and the multiplexing unit 50 located adjacent to it are close together, and no other components or circuit structures are located there; with this arrangement, compared with the prior art, it is equivalent to moving the location of the second general routing unit 40 to one side of the display area 10, thereby reducing the width that the second general routing unit 40 needs to occupy in the second direction in the first non-display area 21, so as to reduce the space required for the bottom bezel, making the design of the display panel 100 more in line with the design requirements of a narrow bezel, and improving the screen ratio of the display panel 100.

[0088] Figure 11 The image shown is provided in an embodiment of this application. Figure 8 A schematic diagram of region A in the middle. Figure 12The image shown is provided in an embodiment of this application. Figure 8 Please refer to another schematic diagram of area A in the middle. Figure 6 , Figure 8 and Figure 11 , Figure 12 Optionally, the non-display area 20 also includes a metal component 66, which is disposed on a different layer from the first general wiring unit 30 and is connected in parallel with the first general wiring unit 30.

[0089] Specifically, this application also provides an alternative embodiment in which at least one metal component 66 is connected in parallel with the first general routing unit 30, and the metal component 66 and the first general routing unit 30 are disposed on different layers; thereby reducing the resistance of the first general routing unit 30 by the placement of the metal component 66.

[0090] The specific arrangement of the metal part 66 is as follows: Optionally, along the direction from the first non-display area 21 to the display area 10, the first end of the metal part 66 is electrically connected to the signal output unit 25, and the second end is electrically connected to the first branch 31. This allows the metal part 66 to be arranged on the path of the electrical signal transmitted through the first main wiring unit 30, so as to reduce the resistance of the path and make the transmission effect of the electrical signal better.

[0091] Please refer to Figure 6 , Figure 8 and Figure 11 Optionally, the orthographic projection of the metal part 66 onto the plane of the display panel 100 at least partially overlaps with the orthographic projection of the first signal trace 33 onto the plane of the display panel 100.

[0092] Specifically, the metal part 66 connecting the signal output unit 25 and the first branch 31 can be configured such that, in a direction perpendicular to the plane of the display panel 100, the metal part 66 and the first signal trace 33 have an overlapping area, thereby making the overlapping area between the metal part 66 and the path of the electrical signal transmitted through the first main trace unit 30 larger, and the effect of reducing the resistance on the path will be better, further improving the transmission effect of the electrical signal.

[0093] Please refer to Figure 6 , Figure 8 and Figure 12 It should be added that the metal part 66 and the first signal trace 33 may also be configured to have no overlapping area. Optionally, the orthographic projection of the metal part 66 on the plane where the display panel 100 is located is located on at least one side of the orthographic projection of the first signal trace 33 on the plane where the display panel 100 is located along the first direction.

[0094] This application does not specifically limit whether there is an orthographic overlap between the metal part 66 and the first signal trace 33 on the plane where the display panel 100 is located. Users can choose the setting method accordingly based on the actual situation.

[0095] Figure 13 The diagram shown is a schematic representation of a display device provided in an embodiment of this application. Please refer to the provided text for further details. Figure 2-10 Reference Figure 13 Based on the same inventive concept, this application also provides a display device 200, which includes a display panel 100, and the display panel 100 is any of the display panels 100 provided in this application.

[0096] It should be noted that the embodiments of the display device 200 provided in this application can refer to the embodiments of the display panel 100 described above, and will not be repeated here. The display device 200 provided in this application can be any product and component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, or navigator.

[0097] As can be seen from the above embodiments, the display panel and display device provided by the present invention achieve at least the following beneficial effects:

[0098] This application provides a display panel and a display device. In the first non-display area of ​​the display panel, by setting a second main wiring unit on at least one side of the extension direction of the first branch of the first main wiring unit, and setting the second main wiring unit to extend along the extension direction of the first branch, at least a part of the first main wiring unit needs to be set in the area of ​​the second main wiring unit near the display area, thereby reducing the width of the first non-display area along the extension direction perpendicular to the first branch, so that the display panel meets the design requirements of narrow bezel and improves the screen ratio of the display panel.

[0099] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel, characterized in that, It includes a display area and a non-display area that at least partially surrounds the display area; the non-display area includes a first non-display area; The first non-display area includes a first main routing unit and a second main routing unit; The first main routing unit includes a second branch, and along a first direction, the second main routing unit is disposed on both sides of the second branch, and the second main routing unit extends along the first direction; The first direction intersects with the direction from the first non-display area to the display area; The non-display area further includes a second non-display area, which is located between the first non-display area and the display area; The second non-display area includes at least two multiplexing units arranged sequentially along the first direction; a first interval is included between two adjacent multiplexing units; along the second direction, the first interval is located between two second main routing units; the second direction is perpendicular to the first direction. The second non-display area also includes a first signal trace, the first end of which is electrically connected to the second branch, and the second end which extends toward the display area of ​​the second branch via at least one first interval.

2. The display panel according to claim 1, characterized in that, The first main wiring unit further includes a first branch, and the second branch is electrically connected to the first branch, with the extension direction of the first branch being the first direction.

3. The display panel according to claim 2, characterized in that, The second branch includes a first sub-second branch and a second sub-second branch; The first end of the first sub-second branch is electrically connected to the first end of the first branch, and the first end of the second sub-second branch is electrically connected to the second end of the first branch; both the first sub-second branch and the second sub-second branch extend along the side of the first branch away from the display area.

4. The display panel according to claim 1, characterized in that, The display area includes multiple sub-pixels, and along the first direction, the sum of the widths of all the sub-pixels in a row is D1; Along the first direction, the sum of the widths of all the multiplexing units is D2, where D1 > D2.

5. The display panel according to claim 1, characterized in that, The second non-display area also includes a signal output unit, which is located on the side of the multiplexing unit closer to the display area; The second end of the first signal trace is electrically connected to the signal output unit.

6. The display panel according to claim 1, characterized in that, At least a portion of the first signal traces are disposed on the same layer as the first general trace unit.

7. The display panel according to claim 6, characterized in that, The first signal trace, which is disposed on the same layer as the first general trace unit, includes a Ti / Al / Ti structure.

8. The display panel according to claim 1, characterized in that, The second main routing unit is located on the side of the multiplexing unit away from the display area.

9. The display panel according to claim 5, characterized in that, The non-display area also includes a metal component, which is disposed on a different layer from the first main routing unit and is connected in parallel with the first main routing unit.

10. The display panel according to claim 9, characterized in that, The first main wiring unit includes a first branch, the extension direction of the first branch is the first direction; along the direction from the first non-display area to the display area, the first end of the metal part is electrically connected to the signal output unit, and the second end is electrically connected to the first branch.

11. The display panel according to claim 9, characterized in that, In the plan view, the metal component at least partially overlaps with the first signal trace.

12. The display panel according to claim 9, characterized in that, In the plan view, the metal component is located on at least one side of the first signal trace along the first direction.

13. A display device, characterized in that, Includes the display panel as described in any one of claims 1-12.

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