A novel substrate and its oxide semiconductor field effect transistor

By employing a novel substrate formed by implanting aluminum ions in an oxide semiconductor field-effect transistor and combining it with a Bragg reflector layer, the problems of high power consumption and low electrical conduction efficiency were solved, resulting in reduced power consumption, improved conduction efficiency, enhanced thermal conductivity, and improved precision.

CN122161214APending Publication Date: 2026-06-05SUZHOU WUREXINYANG SEMICONDUCTOR CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SUZHOU WUREXINYANG SEMICONDUCTOR CO LTD
Filing Date
2024-12-05
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing oxide semiconductor field-effect transistors suffer from high power consumption, low electrical conduction efficiency, and low precision, which limit the development of electronic products.

Method used

The structure of an oxide semiconductor field-effect transistor is optimized by using a novel substrate formed by implanting aluminum ions, combined with a first Bragg reflector layer, an isolation layer, and a second Bragg reflector layer.

Benefits of technology

It significantly reduces power consumption by 20-30%, improves electrical conductivity by 15-20%, enhances thermal conductivity, reduces temperature by 1.5℃, and improves transmitter accuracy.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application is a new type of substrate and oxide semiconductor field effect transistor, the substrate can increase current load by forming special structure through injecting high and low concentration aluminum ions, the aluminum ion injection energy is 100KeV-1500KeV, the hydrogen ion injection concentration is 1.00E+10-9.00E+15, and the aluminum ion injection temperature is 35-350 DEG C. The oxide semiconductor field effect transistor comprises the new type of substrate, and further comprises a first Bragg reflection layer, an isolation layer, a second Bragg reflection layer and a contact layer. Experiments show that, compared with the existing oxide semiconductor field effect transistor, the oxide semiconductor field effect transistor can effectively reduce the power consumption by 25-35%, significantly increase the conduction efficiency by 20-30%, effectively enhance the heat conduction characteristics, thereby improve the service life, and save electricity.
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Description

Technical Field

[0001] This invention belongs to the field of optoelectronic technology, specifically to the field of semiconductor materials, and particularly to a novel substrate and its oxide semiconductor field-effect transistor. Background Technology

[0002] Semiconductors are materials whose conductivity at room temperature falls between that of conductors and insulators. They are widely used in radios, televisions, computers, and mobile phones; for example, diodes are devices made using semiconductors. The core components of most electronic products are closely related to semiconductors. Common semiconductor materials include silicon, germanium, and gallium arsenide. Oxide-semiconductor field-effect transistors (OSMTs) are a widely used type of semiconductor. OSMTs use gallium arsenide semiconductor material as a substrate. Due to their advantages such as high modulation speed, the ability to achieve high power output through two-dimensional array integration, easy and efficient coupling with optical fibers, high-efficiency on-chip testing, and low manufacturing cost, they have become important devices in data transmission and 3D recognition systems, and are widely used in optical communication, precision machining, advanced manufacturing equipment, testing instruments, and scientific research.

[0003] However, existing oxide semiconductor field-effect transistors (OSTs) generally suffer from high power consumption, low electrical conduction efficiency, and low precision, which severely restrict the future development of electronic products. To address these issues, this patent will research a novel substrate and its OST-transistor, thereby improving the performance of gallium arsenide substrates for OSTs and resolving the aforementioned technical problems. Summary of the Invention

[0004] In order to effectively solve the above technical problems, the present invention provides a novel substrate, wherein gallium arsenide is formed by implanting aluminum ions, the aluminum ion implantation energy is 100keV to 1500keV, the hydrogen ion implantation concentration is 1.00E+10 to 9.00E+14, and the aluminum ion implantation temperature is 35℃ to 350℃.

[0005] Preferably, the hydrogen ion implantation energy is 100 keV to 120 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

[0006] Preferably, the aluminum ion implantation energy is 120 keV to 150 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

[0007] Preferably, the aluminum ion implantation energy is 200 keV to 300 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

[0008] Preferably, the aluminum ion implantation energy is 350 keV to 600 keV, and the aluminum ion implantation concentration is 1.00E+13 to 9.00E+13.

[0009] Preferably, the aluminum ion implantation energy is 500 keV to 1500 keV, and the aluminum ion implantation concentration is 1.00E+10 to 9.00E+12.

[0010] Preferably, the aluminum ion implantation energy is 1000 keV to 1500 keV, and the aluminum ion implantation concentration is 1.00E+10 to 9.00E+12.

[0011] Option 2 is an oxide semiconductor field-effect transistor, which includes a novel substrate from Option 1 and its preferred embodiments, and further includes a first Bragg reflector layer, an isolation layer, a second Bragg reflector layer, and a contact layer. The first Bragg reflector layer, the isolation layer, the second Bragg reflector layer, and the contact layer are all located on one side of the novel substrate and are distributed sequentially in a direction away from the novel substrate.

[0012] The beneficial effects of this invention are:

[0013] (1) The oxide semiconductor field-effect transistor of the present invention can effectively reduce power consumption by 20-30% compared with the existing oxide semiconductor field-effect transistor.

[0014] (2) The oxide semiconductor field-effect transistor of the present invention can significantly increase the electrical conduction efficiency by 15-20% compared with the existing oxide semiconductor field-effect transistor.

[0015] (3) Compared with existing oxide semiconductor field-effect transistors, the oxide semiconductor field-effect transistor of the present invention can effectively enhance the thermal conductivity, reduce the temperature of the oxide semiconductor field-effect transistor of the present invention by 1.5°C, thereby improving its service life.

[0016] (4) The transmitter accuracy of the present invention is significantly improved compared with the existing oxide semiconductor field-effect transistor. Attached Figure Description

[0017] To better illustrate the technical solution of this invention, the following is a description of the invention with accompanying drawings:

[0018] Figure 1 Structural diagram of Example 7;

[0019] The reference numerals are as follows: 1. Novel substrate, 2. First Bragg reflector layer, 3. Isolation layer, 4. Second Bragg reflector layer, 5. Contact layer. Detailed Implementation

[0020] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0021] It should be noted that in the description of this invention, the terms "upper", "lower", "left", "right", "inner", "outer", "front", "back", etc., which indicate the direction or positional relationship, are based on the direction or positional relationship shown in the drawings. This is only for the convenience of description and does not indicate or imply that the device or element must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this invention.

[0022] Example 1: Oxide-Semiconductor Field-Effect Transistor, a novel substrate, wherein the substrate is gallium arsenide formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 100 keV, the aluminum ion implantation concentration is 5.00E+14, and the aluminum ion implantation temperature is 5℃~35℃.

[0023] Example 2: A novel substrate, wherein gallium arsenide is formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 100 keV, the aluminum ion implantation concentration is 4.00E+14, and the hydrogen ion implantation temperature is 35℃~350℃.

[0024] Example 3: A novel substrate, wherein gallium arsenide is formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 200 keV, the aluminum ion implantation concentration is 2.00E+14, and the hydrogen ion implantation temperature is 35℃~350℃.

[0025] Example 4: A novel substrate, wherein gallium arsenide is formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 350 keV, the aluminum ion implantation concentration is 1.00E+13, and the aluminum ion implantation temperature is 35℃~350℃.

[0026] Example 5: A novel substrate, wherein gallium arsenide is formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 600 keV, the aluminum ion implantation concentration is 8.00E+12, and the aluminum ion implantation temperature is 35℃~350℃.

[0027] Example 6: A novel substrate, wherein gallium arsenide is formed by aluminum ion implantation. In this example, the aluminum ion implantation energy is 1500 keV, the aluminum ion implantation concentration is 5.00E+10, and the aluminum ion implantation temperature is 35℃~350℃.

[0028] Example 7: An oxide semiconductor field-effect transistor includes the novel substrate 1 in the above examples, and also includes a first Bragg reflector layer 2, an isolation layer 3, a second Bragg reflector layer 4, and a contact layer 5. The first Bragg reflector layer 2, the isolation layer 3, the second Bragg reflector layer 4, and the contact layer 5 are all located on one side of the novel substrate 1 and are distributed sequentially in a direction away from the novel substrate 1.

[0029] Example 8: A three-dimensional recognition system, comprising a transmitter module and a receiver module. The transmitter module includes the oxide semiconductor field-effect transistor, wafer-level optical element, and binary optical device of Example 7. The receiver module includes an infrared filter, a lens, and an infrared sensing module. The wafer-level optical element, the binary optical device, the infrared filter, the lens, and the infrared sensing module are all existing products.

[0030] The embodiments described above are merely examples of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention.

Claims

1. A novel substrate, characterized in that, The novel substrate is formed by implanting gallium arsenide with aluminum ions. The aluminum ion implantation energy is 100 keV to 1500 keV, the aluminum ion implantation concentration is 1.00E+10 to 9.00E+15, and the aluminum ion implantation temperature is 35℃ to 350℃.

2. The novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 100 keV to 120 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

3. The novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 120 keV to 150 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

4. The novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 200 keV to 300 keV, and the aluminum ion implantation concentration is 1.00E+14 to 9.00E+14.

5. A novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 350 keV to 600 keV, and the aluminum ion implantation concentration is 1.00E+13 to 9.00E+13.

6. The novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 500 keV to 1500 keV, and the aluminum ion implantation concentration is 1.00E+10 to 9.00E+12.

7. A novel substrate according to claim 1, characterized in that, The aluminum ion implantation energy is 1000 keV to 1500 keV, and the aluminum ion implantation concentration is 1.00E+10 to 9.00E+12.

8. An oxide semiconductor field-effect transistor, characterized in that, A novel substrate comprising any one of claims 1-7, further comprising a first Bragg reflector layer, an isolation layer, a second Bragg reflector layer, and a contact layer, wherein the first Bragg reflector layer, the isolation layer, the second Bragg reflector layer, and the contact layer are all located on one side of the novel substrate and are distributed sequentially in a direction away from the novel substrate.