Photovoltaic cell, stacked cell, photovoltaic module

Abstract

The application relates to the field of photovoltaic cells, and provides a photovoltaic cell, a laminated cell and a photovoltaic module, wherein the photovoltaic cell comprises a substrate, a doped layer arranged on the surface of the substrate, the doped layer comprising a first region extending along a first direction and a second region extending along a second direction, the second region being disconnected at the position of the first region, a passivation layer covering the doped layer, a main grid and a fine grid arranged on the side of the passivation layer away from the substrate, the main grid being arranged in correspondence with the first region, and the fine grid being arranged in correspondence with the second region, and a connecting piece arranged on the side of the passivation layer away from the substrate, wherein the fine grid is electrically connected with the main grid through the connecting piece. The embodiment of the application can at least solve the problem of electric leakage or short circuit caused by the electric connection between the fine grid and the substrate.

Description

Cross-reference to related applications

[0001] This application is a divisional application of Chinese invention patent application filed on November 3, 2025, with application number 202511592907.6 and invention title "Photovoltaic Cell and its Preparation Method, Tandem Cell, Photovoltaic Module". Technical Field

[0002] This application relates to the field of photovoltaic cells, and in particular to a photovoltaic cell, a tandem cell, and a photovoltaic module. Background Technology

[0003] With the rapid development of the photovoltaic industry, the performance and efficiency requirements of solar cells in both domestic and international photovoltaic markets are constantly increasing, and industry manufacturers are focusing on the research and development of high-efficiency cells. TOPCon (Tunnel Oxide Passivated Contact) cells improve the surface passivation performance of the cell by sequentially preparing an ultra-thin tunnel oxide layer and a doped polycrystalline silicon layer on the back of the cell, reducing the metal contact recombination current and effectively improving the open-circuit voltage and short-circuit current of the cell. Summary of the Invention

[0004] This application provides a photovoltaic cell, a tandem cell, and a photovoltaic module, which at least helps to solve the problem of leakage or short circuit caused by the electrical connection between the grid and the substrate.

[0005] This application provides a photovoltaic cell, comprising: a substrate; a doped layer disposed on at least one side surface of the substrate, the doped layer comprising: a first region extending along a first direction; a second region extending along a second direction, the second region being interrupted at the location of the first region; the first direction, the second direction, and a third direction intersecting; a passivation layer covering the doped layer; a main grid and a fine grid disposed on the side of the passivation layer facing away from the substrate; wherein the main grid is disposed corresponding to the first region, and the fine grid is disposed corresponding to the second region; a connector disposed on the side of the passivation layer facing away from the substrate; wherein the fine grid is electrically connected to the main grid through the connector.

[0006] Optionally, the dimension of the connector in the first direction gradually decreases in the direction away from the main gate with which it is in contact.

[0007] Optionally, the connector and the main grid are an integral structure.

[0008] Optionally, a second groove is formed between adjacent first and second regions, and the passivation layer covers the second groove; in the third direction, the orthographic projection of the connector on the substrate overlaps with the orthographic projection of the second groove on the substrate.

[0009] Optionally, in the second direction, the width of the second groove is 30μm~70μm.

[0010] Optionally, a plurality of second regions are spaced apart along the first direction, and a first groove is formed between adjacent second regions in the first direction, the passivation layer covering the first groove.

[0011] Optionally, in the first direction, the ratio between the width of the second region and the width of the first groove is 0.6 to 0.8.

[0012] Optionally, in the first direction, the width of the second region is 300μm~400μm, and the width of the first groove is 500μm~700μm.

[0013] Optionally, it may also include a tunneling oxide layer sandwiched between the doped layer and the substrate.

[0014] This application also provides a tandem solar cell, comprising: a bottom cell, which is a photovoltaic cell as described above; and a top cell, which is located on one side of the bottom cell.

[0015] This application also provides a photovoltaic module, comprising: a battery string, which is formed by connecting multiple photovoltaic cells as described above, or by connecting multiple stacked cells as described above; an encapsulating film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulating film opposite to the battery string.

[0016] The technical solution provided in this application has at least the following advantages: This application improves the reliability of photovoltaic cells by disconnecting the second region at the location of the first region, making the first and second regions in the doped layer independent of each other. This avoids stress concentration at the interface between the first and second regions when they are connected, which could lead to problems such as fragmentation, microcracks, or short circuits in the photovoltaic cells. Furthermore, this application provides a connector at the interface between the first and second regions, electrically connecting the main grid and the fine grid. This avoids the problem of fine grid breakage caused by the fine grid crossing the main grid, and also avoids electrical connection between the fine grid and the substrate after passing through the unconnected area between the first and second regions, which could lead to leakage or short circuits. Attached Figure Description

[0017] One or more embodiments are illustrated by way of example with corresponding pictures in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional technology, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a substrate and a doped layer in a photovoltaic cell according to an embodiment of this application; Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure at position AA1 in the middle; Figure 3 This is a schematic diagram of the structure of a photovoltaic cell provided in one embodiment of this application; Figure 4 for Figure 3 A schematic diagram of the cross-sectional structure at the location of BB1 in the middle section; Figure 5 This is a schematic diagram of the structure of a photovoltaic cell provided in another embodiment of this application; Figure 6 for Figure 5 A schematic diagram of the cross-sectional structure at position CC1; Figure 7 A step diagram illustrating a method for preparing a photovoltaic cell according to another embodiment of this application; Figure 8 A process flow diagram of a substrate provided in a method for fabricating a photovoltaic cell according to an embodiment of this application; Figure 9 A process flow diagram of removing the third region in a method for preparing a photovoltaic cell according to an embodiment of this application; Figure 10 A process flow diagram of removing a portion of the fourth region in a method for preparing a photovoltaic cell according to an embodiment of this application; Figure 11 This is a process flow diagram of forming a passivation layer in a method for preparing a photovoltaic cell according to an embodiment of this application; Figure 12 This is a process flow diagram illustrating the formation of the main grid and fine grid in a photovoltaic cell fabrication method according to an embodiment of this application.

[0019] Explanation of reference numerals in the attached figures: 10. Semiconductor substrate; 100. Substrate; 200. Doped layer; 210. First region; 220. Second region; 230. Third region; 240. Fourth region; 201. First trench; 202. Second trench; 300. Passivation layer; 410. Main gate; 420. Fine gate; 430. Connector. Detailed Implementation

[0020] As known from the background technology, in related technologies, photovoltaic cells employ poly-finger technology to optimize electrode contact, improve conversion efficiency, and reduce light absorption loss. Poly-finger technology forms finger-like structures with etched and unetched regions in a polycrystalline silicon layer. A thicker polycrystalline silicon layer is maintained beneath the unetched region to enhance conductivity, while the etched region is thinned to reduce parasitic light absorption. Performance optimization is achieved by balancing passivation contact with light utilization efficiency.

[0021] In the non-etched area, which corresponds to the electrode grid line, there will be a large stress at the position corresponding to the connection between the main grid and the fine grid in the etched area. This can cause problems such as cell fragmentation, microcracks or cell short circuits at this position, resulting in a significant reduction in the reliability of photovoltaic cells.

[0022] This application provides a photovoltaic cell that improves the reliability of the photovoltaic cell by spacing the first region corresponding to the main grid and the second region corresponding to the fine grid in the doped layer, so as to avoid stress concentration in the area where the two are connected and at the boundary, which could lead to problems such as cell fragmentation, microcracks or cell short circuits.

[0023] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined. Similarly, "multiple sets" refers to two or more sets (including two sets), and "multiple pieces" refers to two or more pieces (including two pieces).

[0024] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0025] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0026] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application. For example, if the device or element in the illustration is inverted, then the element described as "below," "under," "below," or "bottom" of other elements or features will be oriented "above" or "top" of said other elements or features. Therefore, the term "below" may cover both above and below orientation depending on the context in which the term is used, which will be obvious to those skilled in the art. Materials may be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0027] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0028] In the accompanying drawings corresponding to the embodiments of this application, the thickness and area of ​​the layers are enlarged for better understanding and ease of description. Furthermore, when describing a component as "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0029] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. The formation or provision of a second component above or on a first component, or on the surface of a first component, or on one side of a first component, may include embodiments where the first and second components are in direct contact, and may also include embodiments where an additional component may be present between the first and second components, thereby preventing direct contact between the first and second components. For simplicity and clarity, various components may be drawn at different scales. In the drawings, some layers / components may be omitted for simplicity. Unless otherwise specified, the formation or provision of a second component on the surface of a first component refers to direct contact between the first and second components. The term "component" may refer to a layer, film, region, portion, structure, etc.

[0030] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "component" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0031] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0032] Figure 1 This is a schematic diagram of the structure of a photovoltaic cell provided in an embodiment of this application; Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure at position AA1 in the middle; Figure 3 This is a schematic diagram of the structure of a photovoltaic cell provided in one embodiment of this application; Figure 4 for Figure 3 A schematic diagram of the cross-sectional structure at the location of BB1.

[0033] refer to Figures 1 to 4 As shown, the photovoltaic cell includes: 100 for the substrate; Doped layer 200, disposed on at least one surface of substrate 100, comprising: A first region 210 extends continuously along a first direction X, and several first regions 210 are arranged at intervals along a second direction Y; the first direction X and the second direction Y intersect. The second region 220 extends along the second direction Y and is interrupted at the position of the first region 210. Several second regions 220 are arranged at intervals along the first direction X. In the second direction Y, the second region 220 and the first region 210 are spaced apart.

[0034] In this embodiment, the first region 210 corresponding to the main gate 410 and the second region 220 corresponding to the fine gate 420 in the doped layer 200 are spaced apart to avoid stress concentration in the interface area when the main gate 410 region and the fine gate 420 region are connected, which can lead to problems such as fragmentation, microcracks or short circuits in photovoltaic cells, thereby improving the reliability of photovoltaic cells.

[0035] It should be noted that the photovoltaic cell in this application embodiment is a TOPCon cell (Tunnel Oxide Passivated Contact). The doped layer structure in this application embodiment can be the structure of the P-type emitter layer in a TOPCon cell, or the structure of the N-type emitter layer in a TOPCon cell. In other embodiments, the photovoltaic cell can also be a PERC cell (Passivated Emitter Rear Cell), a heterojunction cell (HJT), or a tandem cell, etc., with a doped layer 200, and no specific limitation is made here.

[0036] The embodiments of this application will be described in more detail below with reference to the accompanying drawings.

[0037] Reference Figure 1 As shown, the photovoltaic cell includes a semiconductor substrate 10, which includes a base 100 and a doped layer 200. The doped layer 200 is disposed on at least one side surface of the base 100, and fine grids 420 and main grids 410 (the main grids 410 and fine grids 420 are located on...). Figure 3 , Figure 4 (As shown in the figure) It is disposed on at least one side surface of the semiconductor substrate 10. The photovoltaic cell has intersecting first direction X, second direction Y and third direction Z, the third direction Z being the thickness direction of the photovoltaic cell.

[0038] In some embodiments, the substrate 100 may be an N-type semiconductor substrate doped with an N-type dopant element. In some examples, the N-type dopant element may be at least one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As); the P-type semiconductor substrate 100 may be doped with a P-type element, which may be at least one of group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0039] In some embodiments, the material of the doped layer 200 can be a composite thin film layer made of one or more of the following semiconductor thin films doped with P-type dopant: amorphous silicon, amorphous silicon oxide, amorphous silicon carbide, microcrystalline silicon, hydrogenated microcrystalline silicon, microcrystalline silicon oxide, microcrystalline silicon carbide, or polycrystalline silicon. Similarly, the material of the doped layer 200 can also be a composite thin film layer made of one or more of the following semiconductor thin films doped with N-type dopant: amorphous silicon, amorphous silicon oxide, amorphous silicon carbide, microcrystalline silicon, hydrogenated microcrystalline silicon, microcrystalline silicon oxide, microcrystalline silicon carbide, or polycrystalline silicon. That is, the doped layer structure in the embodiments of this application can be the structure of a P-type emitter layer in a TOPCon battery, or it can be the structure of an N-type emitter layer in a TOPCon battery.

[0040] Reference Figure 1 As shown, the doped layer 200 includes a first region 210 and a second region 220. The first region 210 extends continuously along a first direction X, and several first regions 210 are sequentially spaced along a second direction Y. The second region 220 extends along the second direction Y and is interrupted at the position of the first region 210. Several second regions 220 are sequentially spaced along the first direction X. In the second direction Y, the first region 210 and the second region 220 are spaced apart. That is, the first region 210 and the second region 220 are of the same level structure, but they are disconnected from each other and not connected.

[0041] Combination Figure 1 , Figure 2 As shown, the first region 210 and the second region 220 are respectively disposed corresponding to the main grid 410 and the fine grid 420. A plurality of second regions 220 are sequentially spaced along the first direction X, and correspondingly, adjacent second regions 220 along the first direction X form a first groove 201, through which part of the substrate 100 is exposed. The first groove 201 is constructed as a poly-finger structure. This poly-finger structure reduces the shading area on the photovoltaic cell surface and reduces parasitic light absorption, thereby optimizing performance by balancing passivation contacts and light utilization efficiency.

[0042] The first region 210 and the second region 220 are spaced apart in the second direction Y, and a second groove 202 is formed between adjacent first regions 210 and second regions 220, with a portion of the substrate 100 exposed from the second groove 202. On the one hand, the second trench 202 is constructed as a finger structure. The setting of the second trench 202 further increases the area ratio of the finger structure in the photovoltaic cell, further reduces the shading problem on the surface of the photovoltaic cell and reduces the parasitic light absorption problem, thereby improving the photoelectric conversion efficiency of the photovoltaic cell. On the other hand, compared with the structure in the related technology that is connected to the doped layer 200 corresponding to the main grid 410 and the fine grid 420, the second trench 202 disconnects the first region 210 corresponding to the main grid 410 and the second region 220 corresponding to the fine grid 420, so that the first region 210 and the second region 220 are not connected to each other. This avoids the stress concentration of the doped layer 200 in the photovoltaic cell with the finger structure in the related technology at the corresponding region where the main grid 410 and the fine grid 420 intersect, thereby avoiding problems such as cell fragmentation, microcracks or cell short circuits caused by stress concentration, and improving the reliability of the photovoltaic cell in the embodiment of this application.

[0043] In some embodiments, in the first direction X, the ratio between the width of the second region 220 and the width of the first groove 201 is 0.6 to 0.8. Optionally, the ratio between the width of the second region 220 and the width of the first groove 201 is 0.65 to 0.75, and the ratio can be 0.65, 0.67, 0.69, 0.7, 0.73, or 0.75. Setting the ratio between the width of the second region 220 and the width of the first groove 201 to 0.6 to 0.8 balances passivation contact and light utilization efficiency to achieve performance optimization.

[0044] In some embodiments, the width of the second region 220 in the first direction X is 300μm to 400μm. Optionally, the width of the second region 220 is 310μm to 390μm, and the width of the second region 220 can be 310μm, 320μm, 340μm, 350μm, 370μm or 390μm.

[0045] In some embodiments, the width of the first groove 201 in the first direction X is 500μm to 700μm. Optionally, the width of the first groove 201 is 550μm to 650μm, and the width of the first groove 201 can be 550μm, 570μm, 590μm, 600μm, 630μm or 650μm.

[0046] In some embodiments, the width of the second trench 202 in the second direction Y is 30 μm to 70 μm. Optionally, the width of the second trench 202 is 35 μm to 65 μm, and the width of the second trench 202 can be 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, or 65 μm. Setting the width of the second trench 202 to 30 μm to 70 μm improves the light utilization efficiency and avoids parasitic light absorption of the finger structure constructed by the second trench 202. On the other hand, it avoids the reduction in the carrier collection capability of the fine gate 420 due to the excessively long width of the second trench 202, which would result in an excessively small size for the electrical connection between the fine gate 420 and the semiconductor substrate 10.

[0047] It should be noted that when one component is electrically connected to another, it means that both components are made of conductive materials and are directly connected or connected via other conductive materials. Therefore, when the battery is generating electricity, there is current transfer between the two components.

[0048] In some embodiments, the semiconductor substrate 10 further includes a tunneling oxide layer (not shown) sandwiched between the doped layer 200 and the substrate 100. The tunneling oxide layer forms a passivation structure between the doped layer 200 and the substrate 100, which helps to improve the passivation effect on the substrate 100 and reduce the carrier recombination rate at the interface of the substrate 100, thereby increasing the open-circuit voltage, short-circuit current and fill factor of the photovoltaic cell, and thus improving the photoelectric conversion efficiency of the photovoltaic cell.

[0049] It should be noted that when the N-type emitter layer structure in the photovoltaic cell is the doped layer 200 as described in this embodiment, a tunneling oxide layer is provided between the doped layer 200 and the substrate 100. When the P-type emitter layer structure in the photovoltaic cell is the doped layer 200 as described in this embodiment, the doped layer 200 is in contact with the substrate 100, and the aforementioned tunneling oxide layer is not provided between them. The tunneling oxide layer can be flexibly configured according to actual needs, and no specific limitation is made here.

[0050] In some embodiments, the material of the tunneling oxide layer includes silicon oxide (SiO2). x ) or silicon oxynitride (SiON) x ).

[0051] It should be noted that the tunneling oxide layer can be disposed between the doped layer 200, which serves as the N-type emitter layer in the photovoltaic cell, and the substrate 100, or it can be disposed between the doped layer 200, which serves as the P-type emitter layer in the photovoltaic cell and the substrate 100. No specific limitation is made here.

[0052] Reference Figure 3 , Figure 4As shown, the semiconductor substrate 10 also includes a passivation layer 300, which is disposed on the side of the doped layer 200 facing away from the substrate 100. A portion of the passivation layer 300 fills the first trench 201 and the second trench 202. In other words, the passivation layer 300 covers the first region 210, the second region 220, the first trench 201, and the second trench 202. A fine gate 420 and a main gate 410 are disposed on the surface of the passivation layer 300 facing away from the substrate 100, and the fine gate 420 is in contact with the main gate 410. The fine gate 420 is electrically connected to the doped layer 200.

[0053] It should be noted that the main gate 410 and the fine gate 420 are disposed on the side surface of the passivation layer 300 away from the substrate 100. The main gate 410 and the fine gate 420 can be directly disposed on the surface of the passivation layer 300, or they can be indirectly disposed by other structures (such as an anti-reflection layer) between the fine gate 420 and the main gate 410 and the passivation layer 300. No specific limitation is made here.

[0054] In some embodiments, the main gate 410 extends along a first direction X, and a plurality of main gates 410 are sequentially spaced along a second direction Y. The main gates 410 and the first region 210 are correspondingly arranged. In the third direction Z, the orthographic projection of the main gate 410 on the substrate 100 is contained within the orthographic projection of the first region 210 on the substrate 100.

[0055] In some embodiments, the fine gates 420 extend along the second direction Y, and a plurality of fine gates 420 are sequentially spaced apart from those along the first direction X. The fine gates 420 are intersected with the main gate 410. In the third direction Z, the orthographic projection of the fine gates 420 on the substrate 100 overlaps with the orthographic projection of the second region 220 on the substrate 100. In other words, at least a portion of the orthographic projection of the fine gates 420 on the substrate 100 is contained within the orthographic projection of the second region 220 on the substrate 100.

[0056] It should be noted that in this embodiment, the fine gate 420 and the main gate 410 are connected in a cross contact, that is, at least a portion of the fine gate 420 will extend into the first region 210 to contact and connect with the main gate 410, and at least a portion of the fine gate 420 will extend into the region corresponding to the second slot 202.

[0057] It should also be noted that the material forming the fine gate 420 is a burn-through paste, that is, the fine gate 420 penetrates at least part of the passivation layer 300 in the third direction Z to contact and connect with the second region 220 in the doped layer 200, so that the fine gate 420 is electrically connected to the semiconductor substrate 10, thereby realizing the collection and transport of charge carriers in the semiconductor substrate 10 by the fine gate 420.

[0058] It should also be noted that the fine gate 420 corresponding to the second region 220 penetrates the passivation layer 300 in the third direction Z and then contacts and connects with the doped layer 200, while the fine gate 420 corresponding to the second trench 202 does not penetrate the passivation layer 300 in the third direction Z, so as to avoid contact and connection between the fine gate 420 and the substrate 100.

[0059] Reference Figure 5 , Figure 6 As shown, Figure 5 This is a schematic diagram of the structure of a photovoltaic cell provided in another embodiment of this application. Figure 6 for Figure 5 The cross-sectional view at position CC1 shows that in this embodiment, the photovoltaic cell also includes a connector 430. The connector 430 is disposed on the side of the passivation layer 300 facing away from the substrate 100. The main grid 410 and the fine grid 420 are disconnected in the second direction Y, and are connected by the connector 430. That is, in the third direction Z, the orthographic projection of the main grid 410 on the substrate 100 is contained within the orthographic projection of the first region 210 on the substrate 100, the orthographic projection of the fine grid 420 on the substrate 100 is contained within the orthographic projection of the second region 220 on the substrate 100, and the orthographic projection of the connector 430 on the substrate 100 overlaps with the orthographic projection of the second trench 202 on the substrate 100. The two ends of the connector 430 are respectively in contact with the main grid 410 and the fine grid 420. A connector 430 is provided at the corresponding position of the second slot 202. On the one hand, this avoids the fine grid 420 being set in the corresponding area of ​​the second slot 202, which could cause the fine grid 420 to burn through the passivation layer 300 and become electrically connected to the substrate 100, thus leading to leakage or short circuit, thereby improving the reliability of the photovoltaic cell in this embodiment. On the other hand, it avoids the fine grid 420 spanning the main grid 410 and the surface of the passivation layer 300 corresponding to the second slot 202, thus avoiding the problem of the fine grid 420 breaking due to the surface height difference, thereby further improving the reliability of the photovoltaic cell in this embodiment.

[0060] In some embodiments, the connector 430 extends from the first region 210 along the second direction Y to the second region 220. In other embodiments, the connector 430 extends from the first region 210 along the second direction Y to a region corresponding to the second groove 202.

[0061] In some embodiments, the material forming the connector 430 is a non-burn-through paste, and the material of the connector 430 includes at least one of copper particles or copper-coated silver particles. The connector 430 avoids the problem of the fine grid 420 breaking due to the fine grid 420 crossing the main grid 410. Furthermore, the use of a low-silver-content non-burn-through paste in the material of the connector 430 prevents the fine grid 420 corresponding to the second trench 202 from burning through the passivation layer 300, thus avoiding contact connection between the fine grid 420 and the substrate 100. This improves the yield and reliability of the photovoltaic cells in this embodiment.

[0062] In some embodiments, the connector 430 and the main grid 410 are integrally formed, meaning the main grid 410 and the fine grid 420 are made of the same material and are formed synchronously during the fabrication process. In some embodiments, the material used to form the connector 430 and the main grid 410 is a non-burn-through paste. The connector 430 uses the same material as the main grid 410, but with a lower silver content, resulting in lower material costs compared to the fine grid, thereby reducing the production cost of photovoltaic cells.

[0063] Furthermore, the dimension of the connector 430 in the first direction X gradually decreases along the direction away from the main grid 410 with which it is in contact. The gradient structure of the connector 430 reduces the connection resistance between the fine grid 420 and the main grid 410 on the one hand, and avoids the problem in related technologies where the fine grid 420 needs to span the main grid 410, which can easily lead to grid breakage of the fine grid 420, thereby improving the reliability of the photovoltaic cell in the embodiment of this application.

[0064] Accordingly, another embodiment of this application also provides a method for preparing a photovoltaic cell, which can be used to manufacture the photovoltaic cell provided in the above embodiments. The method for preparing a photovoltaic cell according to another embodiment of this application will be described in detail below with reference to the accompanying drawings. For parts that are the same as or corresponding to the previous embodiment, please refer to the corresponding descriptions of the foregoing embodiments; detailed descriptions will not be repeated below.

[0065] Reference Figures 7 to 12 As shown, Figure 7 The diagram illustrates the steps of a method for fabricating a photovoltaic cell according to an embodiment of this application. Figures 8 to 12 A process flow diagram of a photovoltaic cell fabrication method according to an embodiment of this application is shown. The photovoltaic cell fabrication method includes: S10, such as Figure 8 As shown, a semiconductor substrate 10 is provided. The semiconductor substrate 10 includes a substrate 100 and a doped layer 200. The substrate 100 has a doped layer 200 on at least one side surface. The doped layer 200 includes an etched region and a first region 210 that are alternately arranged along a first direction X. The etched region includes a third region 230 and a fourth region 240 that are alternately arranged along a second direction Y.

[0066] S20, such as Figure 9 As shown, remove zone 230 from the third area; S30, such as Figure 10 As shown, the portion of the fourth region 240 adjacent to the first region 210 is removed, and the remaining fourth region 240 is constructed as the second region 220; the second region 220 is spaced apart in the second direction Y and forms a second groove 202 between the first region 210 and the second region 220; a first groove 201 is constructed between adjacent second regions 220 in the first direction X.

[0067] The photovoltaic cell fabrication method in this embodiment involves a secondary removal of the doped layer 200 to sequentially form a first trench 201 and a second trench 202. On one hand, this constructs a finger-like structure, reducing the light-shielding area on the photovoltaic cell surface and reducing parasitic light absorption, thereby optimizing performance by balancing passivation contact and light utilization efficiency. On the other hand, the second trench 202 spacees the first region 210 and the second region 220 apart, preventing stress concentration at the interface between the first region 210 and the second region 220 when they are connected, which could lead to problems such as photovoltaic cell fragmentation, microcracks, or short circuits, thus improving the reliability of the photovoltaic cell.

[0068] It should be noted that, Figure 8 This application provides a process flow diagram of a substrate in a method for fabricating a photovoltaic cell according to an embodiment of the present application. Figure 9 This is a process flow diagram of removing the third region in a photovoltaic cell fabrication method according to an embodiment of this application. Figure 10 This is a process flow diagram of removing a portion of the fourth region in a method for preparing a photovoltaic cell according to an embodiment of this application.

[0069] The methods for preparing photovoltaic cells also include: S40, such as Figure 11 As shown, a passivation layer 300 is formed on the side of the substrate 100 facing the doped layer 200. The passivation layer 300 covers the second region 220, the first region 210, the first trench 201, and the second trench 202. The passivation layer 300 is provided to reduce the carrier recombination rate at the interface between the doped layer 200 and the substrate 100, thereby increasing the open-circuit voltage, short-circuit current, and fill factor of the photovoltaic cell, and thus improving the photoelectric conversion efficiency of the photovoltaic cell.

[0070] S50, such as Figure 12 As shown, a fine gate 420 and a main gate 410 are formed on the side of the passivation layer 300 opposite to the substrate 100. The fine gate 420 is correspondingly disposed with respect to the second region 220, and the main gate 410 is correspondingly disposed with respect to the first region 210. The fine gate 420 and the main gate 410 are electrically connected. The fine gate 420 penetrates the passivation layer 300 and is in contact with the second region 220.

[0071] It should be noted that, Figure 11 This is a process flow diagram of forming a passivation layer in a method for preparing a photovoltaic cell according to an embodiment of this application; Figure 12 This is a process flow diagram illustrating the formation of the main grid and fine grid in a photovoltaic cell fabrication method according to an embodiment of this application.

[0072] In some embodiments, during step S50, during the formation of the main gate 410, a connector 430 is formed on the side of the passivation layer 300 facing away from the substrate 100. The connector 430 is formed simultaneously with the main gate 410, and the connector 430 and the main gate 410 are integral structures. In the third direction Z, the connector 430 and the orthographic projection of the second groove 202 on the substrate 100 at least partially overlap; the connector 430 is in contact with the fine gate 420 and the main gate 410.

[0073] In some embodiments, the method of removing the third region 230 includes removing the third region 230 by laser etching process.

[0074] In some embodiments, the method of removing a portion of the fourth region 240 includes removing a portion of the fourth region 240 by a laser etching process.

[0075] Laser etching is used to remove the third region 230 and part of the fourth region 240. This improves etching efficiency, increases the yield of photovoltaic cells due to the high precision of the laser etching process, and makes the surface smoother, reducing the recombination efficiency of charge carriers at the interface and improving the photoelectric conversion efficiency of photovoltaic cells.

[0076] Furthermore, the methods for preparing photovoltaic cells also include: S31, after removing part of the fourth region 240, the edge regions of the second region 220 and the first region 210 are irradiated with a laser to seal the edges of the second region 220 and the first region 210. Using a laser to seal the edges of the first region 210 and the second region 220 serves two purposes: firstly, it releases stress at the edges of the first region 210 and the second region 220, preventing fragmentation at the edges caused by internal stress and improving the reliability of the photovoltaic cell; secondly, it optimizes the edge structure of the first region 210 and the second region 220, repairs surface defects at the edges of the first region 210 and the second region 220, reduces carrier recombination efficiency, and allows the subsequently formed passivation layer 300 to have a better passivation effect on the first region 210 and the second region 220, thereby improving the photoelectric conversion efficiency of the photovoltaic cell.

[0077] In some embodiments, the power of the laser used in the edge banding process is 200W to 700W.

[0078] In some embodiments, the wavelength of the laser used in the edge sealing process is 600nm~750nm.

[0079] Accordingly, this application also provides a stacked battery, which includes a photovoltaic cell and a thin-film battery stacked on one side of the photovoltaic cell. The photovoltaic cell serves as the bottom cell in the stacked battery, and the thin-film battery serves as the top cell. The photovoltaic cell is the same as the one provided in the above embodiment. The stacked battery provided in the second embodiment of this application will be described in detail below. For parts that are the same as or corresponding to the previous embodiment, please refer to the corresponding descriptions of the foregoing embodiments; detailed descriptions will not be repeated below.

[0080] In some embodiments, the thin-film battery includes at least one of a perovskite thin-film battery, a gallium arsenide thin-film battery, a cadmium telluride thin-film battery, and a copper indium gallium selenide thin-film battery.

[0081] Accordingly, this disclosure also provides a photovoltaic module, which includes a cell string, an encapsulating film, and a cover plate. The cell string is formed by connecting a plurality of photovoltaic cells or tandem cells, wherein the photovoltaic cells are as described in the above embodiments or obtained by the same preparation method as described in the above embodiments, and the tandem cells are as described in the above embodiments; the encapsulating film covers the surface of the photovoltaic cells; the cover plate is located on the surface of the encapsulating film away from the photovoltaic cells. For parts that are the same as or corresponding to the previous embodiment, please refer to the corresponding descriptions of the foregoing embodiments, which will not be elaborated upon below.

[0082] The encapsulating film can be made of ethylene. Organic encapsulation films such as vinyl acetate copolymer films, polyvinyl octene co-elastomer films, or polyvinyl butyral films.

[0083] The cover plate can be a glass cover plate, a plastic cover plate, or other cover plate with light transmission function. In some embodiments, the surface of the cover plate facing the adhesive film can be an uneven surface, thereby increasing the utilization rate of incident light.

[0084] Those skilled in the art will understand that the above embodiments are specific examples of implementing this application, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. A photovoltaic cell, characterized in that, include: Base; A doped layer disposed on at least one surface of the substrate, the doped layer comprising: a first region extending along a first direction; a second region extending along a second direction, the second region being interrupted at the location of the first region; the first direction, the second direction, and a third direction intersecting. A passivation layer that covers the doped layer; A main gate and a fine gate are disposed on the side of the passivation layer opposite to the substrate; wherein the main gate is disposed corresponding to the first region and the fine gate is disposed corresponding to the second region; A connector, the connector being disposed on the side of the passivation layer opposite to the substrate; The fine grid is electrically connected to the main grid via the connector.

2. The photovoltaic cell according to claim 1, characterized in that, The dimension of the connector in the first direction gradually decreases in the direction away from the main gate it contacts.

3. The photovoltaic cell according to claim 1, characterized in that, The connector and the main gate are an integral structure.

4. The photovoltaic cell according to claim 1, characterized in that, A second trench is formed between adjacent first and second regions, and the passivation layer covers the second trench; In the third direction, the orthographic projection of the connector on the substrate overlaps with the orthographic projection of the second groove on the substrate.

5. The photovoltaic cell according to claim 4, characterized in that, In the second direction, the width of the second groove is 30μm~70μm.

6. The photovoltaic cell according to claim 1, characterized in that, A plurality of second regions are spaced apart along the first direction, and a first groove is formed between adjacent second regions in the first direction, the passivation layer covering the first groove.

7. The photovoltaic cell according to claim 6, characterized in that, In the first direction, the ratio between the width of the second region and the width of the first groove is 0.6 to 0.

8.

8. The photovoltaic cell according to claim 7, characterized in that, In the first direction, the width of the second region is 300μm~400μm, and the width of the first groove is 500μm~700μm.

9. The photovoltaic cell according to claim 1, characterized in that, Also includes: A tunneling oxide layer is sandwiched between the doped layer and the substrate.

10. A stacked battery, characterized in that, include: The bottom battery is a photovoltaic cell as described in any one of claims 1 to 9; A top battery, located on one side of the bottom battery.

11. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple photovoltaic cells as described in any one of claims 1 to 9, or by connecting multiple stacked cells as described in claim 10; An encapsulating film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

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