Package structure, cutting method, and forming method of package structure

Abstract

A packaging structure, a cutting method and a forming method of the packaging structure, the packaging structure comprising a core plate structure, and a first wiring layer and a second wiring layer respectively located on two sides of the core plate structure, the core plate structure comprising a plurality of spaced-apart core plate units and a first opening located between adjacent core plate units, at least one of the first wiring layer and the second wiring layer sealing the first opening so that the first opening constitutes an air gap; by pre-separating each core plate unit in the core plate structure, the first wiring layer and the second wiring layer are not directly formed on the core plate structure, so that the internal stress of the core plate structure will not increase due to the formation of the first wiring layer and the second wiring layer, thereby facilitating the reduction of the probability of explosion of the core plate structure, and further facilitating the yield of the core plate structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a packaging structure, a cutting method, and a method for forming the packaging structure. Background Technology

[0002] In semiconductor manufacturing, packaging is a crucial step in the production and processing of semiconductor integrated circuit chips. Various chips can be protected through packaging to prevent moisture damage, enhance electrothermal performance, and enable the transmission of data and signals between the chip's internal and external circuits.

[0003] However, the yield rate of the packaging structure still needs to be improved. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a packaging structure, a cutting method, and a method for forming the packaging structure, so as to improve the yield of the packaging structure.

[0005] To address the aforementioned problems, embodiments of the present invention provide a packaging structure, comprising: a core board structure, the core board structure including a plurality of spaced-apart core board units, a first opening located between adjacent core board units, and an electrical interconnection structure located within and penetrating the core board units, the core board structure having a first side and a second side disposed opposite to each other, and the two ends of the electrical interconnection structure being exposed by the first side and the second side respectively; and a wiring structure located on the first side and / or the second side of the core board structure; wherein the wiring structure includes at least one of a first wiring layer and a second wiring layer, the first wiring layer being located on the first side of the core board structure and electrically connected to the electrical interconnection structure, the second wiring layer being located on the second side of the core board structure and electrically connected to the electrical interconnection structure, and at least one of the first wiring layer and the second wiring layer sealing the first opening to form an air gap.

[0006] Optionally, the second wiring layer covers the core board structure and seals each of the first openings. The first wiring layer includes a plurality of spaced sub-wiring structures and a second opening located between adjacent sub-wiring structures. The second opening is connected to the first opening in a one-to-one correspondence. In the connected first and second openings and in the sidewalls on the same side of the first and second openings, the sidewall of the first opening is flush with the sidewall of the second opening or the sidewall of the first opening is recessed relative to the sidewall of the second opening on the same side.

[0007] Optionally, the sidewalls of the connected first opening and second opening are flush; or, in the connected first opening and second opening, the sidewall of the first opening is recessed relative to the sidewall of the second opening on the same side.

[0008] Optionally, the packaging structure further includes: components located in a portion of the first openings, the components being located on and electrically connected to the second wiring layer.

[0009] Optionally, the first wiring layer covers the first side of the core board structure and seals the first opening, the second wiring layer covers the second side of the core board structure and seals the first opening, and the first wiring layer, the second wiring layer and the adjacent core board unit form a cavity.

[0010] Optionally, the plurality of spaced-apart core board units have different thicknesses, such that at least one of the first surface and the second surface includes a first height surface and a second height surface, and the thickness of the core board unit corresponding to the first height surface is less than the thickness of the core board unit corresponding to the second height surface; the first wiring layer or the second wiring layer located on one side of the first height surface includes a first sub-wiring layer and a second sub-wiring layer stacked together, the first sub-wiring layer being located on the first height surface and electrically connected to the core board unit corresponding to the first height surface, and the second sub-wiring layer being located on the first sub-wiring layer and electrically connected to the first sub-wiring layer; the first wiring layer or the second wiring layer located on one side of the second height surface includes a third sub-wiring layer, the third sub-wiring layer being located on the second height surface and electrically connected to the core board unit corresponding to the second height surface.

[0011] Optionally, the plurality of spaced-apart core board units have different electrical interconnection density.

[0012] Optionally, the core board structure includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

[0013] Optionally, both the first wiring layer and the second wiring layer are bonded to the core board structure.

[0014] Accordingly, embodiments of the present invention also provide a cutting method, comprising: providing a packaging structure as described in any embodiment of the present invention; cutting the packaging structure at a position corresponding to the first opening to separate each core board unit and the first wiring layer and the second wiring layer located on the core board unit.

[0015] Accordingly, embodiments of the present invention also provide a method for forming a packaging structure, comprising: providing a core board structure, including a plurality of spaced-apart core board units, a first opening located between adjacent core board units, and an electrical interconnection structure located within and penetrating the core board units, the core board structure having a first side and a second side disposed opposite to each other, the two ends of the electrical interconnection structure being exposed by the first side and the second side respectively; providing a pre-prepared wiring structure, the wiring structure including at least one of a first wiring layer and a second wiring layer; combining the first side of the core board structure with the first wiring layer, the first wiring layer being electrically connected to the electrical interconnection structure; combining the second side of the core board structure with the second wiring layer, the second wiring layer being electrically connected to the electrical interconnection structure; wherein at least one of the first wiring layer and the second wiring layer seals the first opening so that the first opening constitutes an air gap.

[0016] Optionally, in the step of combining the first surface of the core board structure with the first wiring layer, the first wiring layer covers the first surface of the core board structure and seals the first opening; after combining the first surface of the core board structure with the first wiring layer, and before combining the second surface of the core board structure with the second wiring layer, the forming method further includes: cutting the first wiring layer through the first opening to obtain a plurality of spaced sub-wiring structures and a second opening located between adjacent sub-wiring structures, wherein the second opening is connected to the first opening in a one-to-one correspondence.

[0017] Optionally, after combining the second side of the core board structure with the second wiring layer, the forming method further includes: placing components in a portion of the first openings, the components being located on and electrically connected to the second wiring layer.

[0018] Optionally, in the step of combining the first surface of the core board structure with the first wiring layer, the first wiring layer covers the first surface of the core board structure and seals one end of the first opening; in the step of combining the second surface of the core board structure with the second wiring layer, the second wiring layer covers the second surface of the core board structure and seals the other end of the first opening, and the first wiring layer, the second wiring layer and the adjacent core board unit form a cavity.

[0019] Optionally, in the step of providing the core board structure, the plurality of spaced-apart core board units have different thicknesses, such that at least one of the first surface and the second surface includes a first height surface and a second height surface, and the thickness of the core board unit corresponding to the first height surface is less than the thickness of the core board unit corresponding to the second height surface; the step of providing a pre-prepared first wiring layer and a second wiring layer includes: providing a pre-prepared first sub-wiring layer, a second sub-wiring layer, and a third sub-wiring layer, wherein the first sub-wiring layer is used to cover the first height surface, the second sub-wiring layer is stacked on the first sub-wiring layer, and the third sub-wiring layer is used to cover the second height surface; in the step of bonding the first surface of the core board structure to the first wiring layer or bonding the second surface of the core board structure to the second wiring layer, the first sub-wiring layer covers the first height surface. The first sub-wiring layer is bonded to the first height surface and electrically connected to the core board unit corresponding to the first height surface; the third sub-wiring layer covers the second height surface and is bonded to the second height surface, and the third sub-wiring layer is electrically connected to the core board unit corresponding to the second height surface; wherein, when the first surface includes the first height surface and the second height surface, the first sub-wiring layer and the second sub-wiring layer stacked on one side of the first height surface, and the third sub-wiring layer on one side of the second height surface constitute a first wiring layer; when the second surface includes the first height surface and the second height surface, the first sub-wiring layer and the second sub-wiring layer stacked on one side of the first height surface, and the third sub-wiring layer on one side of the second height surface constitute a second wiring layer.

[0020] Optionally, in the step of providing the core board structure, the plurality of spaced-apart core board units have different electrical interconnection structure densities.

[0021] Optionally, the step of providing a pre-prepared wiring structure includes: providing a carrier substrate, the carrier substrate including a third side and a fourth side disposed opposite to each other; forming a release layer on the third side and / or the fourth side; performing a modified semi-additive process or a semi-additive process on the surface of the release layer to form a wiring structure; and performing a debonding process on the wiring structure and the carrier substrate to separate the wiring structure from the carrier substrate; wherein the wiring structure is used as either or both of the first wiring layer and the second wiring layer.

[0022] Optionally, the wiring structure includes a seed layer, stacked multilayer interconnect layers on the seed layer, and a second via interconnect structure connecting two adjacent interconnect layers. The steps of forming the interconnect layers and the second via interconnect structure include: forming a seed layer on the release layer; forming a sacrificial layer with grooves on the seed layer, the grooves exposing the top of the seed layer or the second via interconnect structure, the sacrificial layer being made of a photolithographic material; forming an interconnect layer in the grooves, the interconnect layer being connected to the seed layer or the second via interconnect structure at its bottom; removing the sacrificial layer; forming a dielectric layer covering the interconnect layer; forming a second via interconnect structure in the dielectric layer at the top of the interconnect layer, the second via interconnect structure being electrically connected to the interconnect layer at its bottom; wherein the grooves for forming the first interconnect layer expose the seed layer, and the grooves for forming the remaining interconnect layers expose the second via interconnect structure connected to the previous interconnect layer; after forming the wiring structure, the method further includes: removing the seed layer after debonding.

[0023] Optionally, in the step of providing the core board structure, the core board structure includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

[0024] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages: The packaging structure provided in this embodiment of the invention includes a core board structure, and a first wiring layer and a second wiring layer respectively located on two sides of the core board structure. The core board structure includes a plurality of spaced core board units and a first opening located between adjacent core board units. At least one of the first wiring layer and the second wiring layer seals the first opening so that the first opening forms an air gap. By pre-distributing each core board unit in the core board structure, the first wiring layer and the second wiring layer are not directly formed on the core board structure. Consequently, the internal stress of the core board structure will not increase due to the formation of the first wiring layer and the second wiring layer, thereby reducing the probability of the core board structure bursting and improving the yield of the core board structure. Moreover, by pre-forming the first opening in the core board structure, if the packaging structure needs to be cut later, only the wiring structure will be cut, and the core board structure will not be cut again. This avoids the stress release of the core board structure due to cutting, which could lead to delamination at the interface with the wiring structure, thereby improving the yield of cutting the wiring structure and thus improving the overall yield of the packaging structure. Attached Figure Description

[0025] Figure 1(a) is a schematic diagram of an embodiment of the packaging structure of the present invention; Figure 1(b) is a schematic diagram of the structure of Figure 1(a) including the components; Figure 2(a) is a schematic diagram of another embodiment of the packaging structure of the present invention; Figure 2(b) is a schematic diagram of the core board unit with different electrical interconnection density in another embodiment of the packaging structure of the present invention; Figure 3 This is a schematic diagram of another embodiment of the packaging structure of the present invention; Figure 4 This is a flowchart of an embodiment of the cutting method of the present invention; Figure 5 This is a schematic diagram of the structure corresponding to each step in one embodiment of the cutting method of the present invention; Figure 6 This is a schematic diagram of the structure corresponding to each step in another embodiment of the cutting method of the present invention; Figure 7 This is a flowchart of an embodiment of the method for forming the packaging structure of the present invention; Figures 8 to 28 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the packaging structure of the present invention; Figures 29 to 31 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the packaging structure of the present invention; Figures 32 to 34 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the packaging structure of the present invention. Detailed Implementation

[0026] In existing technologies, a core board structure includes multiple connected core board units and electrical interconnect structures penetrating the core board units. The core board structure has a first side and a second side arranged opposite to each other. The packaging structure includes a core board structure and a wiring layer, with the wiring layer located on the first side and / or the second side of the core board structure. Since the wiring layer is typically formed through a multi-layer lamination process, a significant amount of stress accumulates inside the core board structure during its formation. Furthermore, because the Young's moduli of the wiring layer and the core board structure are usually mismatched, delamination can occur at the interface between the wiring layer and the core board structure during the cutting process of the packaging structure, and the core board structure may also crack.

[0027] To address the aforementioned problems, embodiments of the present invention provide a packaging structure, including a core board structure, and a first wiring layer and a second wiring layer respectively located on both sides of the core board structure. The core board structure includes a plurality of spaced-apart core board units and a first opening located between adjacent core board units. At least one of the first wiring layer and the second wiring layer seals the first opening to form an air gap. By pre-distributing each core board unit in the core board structure, the first wiring layer and the second wiring layer are not directly formed on the core board structure. Consequently, the internal stress of the core board structure will not increase due to the formation of the first wiring layer and the second wiring layer, thereby reducing the probability of the core board structure bursting and improving the yield of the core board structure. Moreover, by pre-forming the first opening in the core board structure, if the packaging structure needs to be cut subsequently, only the wiring structure is cut, and the core board structure is not cut again. This avoids the stress release of the core board structure due to cutting, which could lead to delamination at the interface with the wiring structure, thereby improving the yield of cutting the wiring structure and thus improving the overall yield of the packaging structure.

[0028] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0029] Figure 1(a) is a schematic diagram of an embodiment of the packaging structure of the present invention, and Figure 1(b) is a schematic diagram of Figure 1(a) including components.

[0030] Referring to Figures 1(a) and 1(b), in this embodiment, the packaging structure 100 includes: a core board structure 110, which includes a plurality of spaced core board units 111, a first opening 112 located between adjacent core board units 111, and an electrical interconnection structure 113 located within and penetrating the core board units 111. The core board structure 110 has a first surface and a second surface disposed opposite to each other, and the two ends of the electrical interconnection structure 113 are exposed by the first surface and the second surface, respectively; and a wiring structure 120. On the first and / or second surface of the core board structure 110; wherein, the wiring structure 120 includes at least one of a first wiring layer 121 and a second wiring layer 122, the first wiring layer 121 is located on the first surface of the core board structure 110 and is electrically connected to the electrical interconnection structure 124, the second wiring layer 122 is located on the second surface of the core board structure 110 and is electrically connected to the electrical interconnection structure 124, and at least one of the first wiring layer 121 and the second wiring layer 122 seals the first opening 112 so that the first opening 112 constitutes an air gap.

[0031] The core board structure 110 provides the process basis for forming the package structure 100. The electrical interconnect structure 113 is used for electrical connection with the wiring structure.

[0032] In some embodiments, the core board structure 110 includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

[0033] Glass, ceramics, and silicon are all commonly used materials for core board structures. As an example, core board structure 110 includes a glass core board structure. In other embodiments, the core board structure may include a ceramic core board structure or a silicon core board structure. In other embodiments, the core board structure may also be made of other suitable materials.

[0034] In some embodiments, the electrical interconnect structure 113 includes a third via interconnect structure 114. The third via interconnect structure 114 enables vertical conduction between chips, thereby having the characteristic of short connection distance, which is conducive to maximizing the density of three-dimensional stacking.

[0035] In other embodiments, the electrical interconnect structure includes a third via interconnect structure and pads located at the ends of the third via interconnect structure.

[0036] As an example, as shown in FIG1(a), a plurality of spaced-apart core board units 111 have the same electrical interconnection structure 113 density. In other embodiments, the plurality of spaced-apart core board units have different electrical interconnection structure densities.

[0037] Wiring structure 120 is used to realize electrical connection between electrical interconnect structure 113 and external circuit structure (e.g., chip).

[0038] The first wiring layer 121 is electrically connected to the end of the electrical interconnection structure 113 near the first surface, and the second wiring layer 122 is electrically connected to the end of the electrical interconnection structure 113 near the second surface.

[0039] As an example, the first routing layer 121 and the second routing layer 122 are redistribution layers (RDL).

[0040] In some embodiments, the wiring structure 120 includes a first wiring layer 121 and a second wiring layer 122. The first wiring layer 121 is located on a first surface of the core board structure 110 and is electrically connected to the electrical interconnect structure 113. The second wiring layer 122 is located on a second surface of the core board structure 110 and is electrically connected to the electrical interconnect structure 113. One of the first wiring layer 121 and the second wiring layer 122 seals the first opening 112 so that the first opening 112 forms an air gap, which helps to reduce the difficulty of cutting and aligning the packaging structure 100 when it needs to be cut later.

[0041] In some embodiments, the second wiring layer 122 covers the core board structure 110 and seals each of the first openings 112. The first wiring layer 121 includes a plurality of spaced sub-wiring structures 125 and a second opening 126 located between adjacent sub-wiring structures 125. The sub-wiring structures 125 correspond one-to-one with the core board unit 111, and the second openings 126 communicate one-to-one with the first openings 112. In the connected first openings 112 and second openings 126 and in the sidewalls of the first openings 112 and second openings 126 located on the same side, the sidewall of the first opening 112 is flush with the sidewall of the second opening 126 or the first opening 112 is recessed relative to the sidewall of the second opening 126 on the same side.

[0042] The sidewall of the first opening 112 is flush with the sidewall of the second opening 126, or the first opening 112 is recessed relative to the sidewall of the second opening 126 on the same side, which prevents the core board unit 111 from being exposed by the sub-wiring structure 125, thereby avoiding the need to cover the exposed core board unit 111 with a protective layer, and further avoiding the problem of the core board structure 110 bursting due to the mismatch of Young's modulus between the core board unit 111 and the protective layer.

[0043] Furthermore, it helps to avoid cutting the core board structure 110 when the packaging structure is cut in the subsequent 100 cutting, that is, when cutting the second wiring layer 122.

[0044] As an example, as shown in Figure 1(a), the sidewalls of the connected first opening 112 and second opening 126 are flush.

[0045] As another example, as shown in Figure 1(b), in the connected first opening 112 and second opening 126, the sidewall of the first opening 112 is recessed relative to the sidewall of the second opening 126 on the same side.

[0046] In some embodiments, the first wiring layer 121 and the second wiring layer 122 are both bonded to the core board structure 110, which helps to increase the total number of input / output ports of the package structure 100.

[0047] Specifically, the first wiring layer 121 is bonded to the first surface of the core board structure 110, and the second wiring layer 122 is bonded to the second surface of the core board structure 110. In other examples, the wiring structure is bonded to either the first or second surface of the core board structure, for example, the first wiring layer is bonded to the first surface of the core board structure, or the second wiring layer is bonded to the second surface of the core board structure.

[0048] In some embodiments, the first wiring layer 121 and the second wiring layer 122 each include a multilayer interconnect layer 124 and a second via interconnect structure 123 connecting two adjacent interconnect layers. The interconnect layer 124 exposed on the surface of the first wiring layer 121 facing the first surface serves as a first conductive connection portion 121', and one end of the electrical interconnect structure 113 exposed on the first surface is electrically connected to the first conductive connection portion 121'. The interconnect layer 124 exposed on the surface of the second wiring layer 122 facing the second surface serves as a second conductive connection portion 122', and one end of the electrical interconnect structure 113 exposed on the second surface is electrically connected to the second conductive connection portion 122'.

[0049] The first wiring layer 121 is used to redistribute the connection ends of the electrical interconnect structure 113 toward the first wiring layer 121 so that the redistributed input / output disconnected layout meets process requirements.

[0050] The second wiring layer 122 is used to redistribute the connection ends of the electrical interconnect structure 113 toward the second wiring layer 122 so that the redistributed input / output disconnected layout meets process requirements.

[0051] In other words, the sub-wiring structure 125 includes a multi-layer interconnect layer 124 and a second via interconnect structure 123 connecting two adjacent interconnect layers 124.

[0052] It should be noted that the first wiring layer 121 and the second wiring layer 122 also include a dielectric layer 127, that is, the sub-wiring structure 125 also includes a dielectric layer 127, and the interconnect layer 124 and the second via interconnect structure 123 are located in the dielectric layer 127.

[0053] The dielectric layer 127 is used for electrical isolation between adjacent interconnect layers 124, electrical isolation between adjacent second via interconnect structures 123, and electrical isolation between adjacent second via interconnect structures 123 and interconnect layers 124.

[0054] The dielectric layer 127 includes an AFB (Ajinomoto Build-up Film) layer or a PP (Prepreg) layer.

[0055] As an example, the second through-hole interconnect structure 123 is made of a metallic conductive material, which is beneficial to improving the heat dissipation and conductivity of the wiring structure 120, thereby improving the heat dissipation and conductivity of the package structure 100.

[0056] Specifically, the conductive metallic material is copper, which has good electrical conductivity and is inexpensive. In other embodiments, the conductive metallic material can also be other materials with good electrical conductivity.

[0057] In some other embodiments, both the first wiring layer and the second wiring layer include multiple interconnect layers, a second via interconnect structure connecting two adjacent interconnect layers, and pads. The pads are exposed on the surface of the first wiring layer facing the first side or on the surface of the second wiring layer facing the second side, and the pads are electrically connected to the corresponding interconnect layers. The pads of the first wiring layer serve as the first conductive connection portion, and the pads of the second wiring layer serve as the second conductive connection portion.

[0058] In some embodiments, a solder resist layer 131 is formed on the side of the wiring structure 120 facing away from the first or second side of the core board structure 110, and the solder resist layer 131 exposes the interconnect layer 124 on the side facing away from the core board structure 110. Specifically, the solder resist layer 131 includes solder mask or other materials that can provide insulation and protection.

[0059] In some embodiments, as shown in FIG1(b), the package structure 100 further includes: a component 130 located in a portion of the first openings 112, the component 130 being located on and electrically connected to the second wiring layer 122.

[0060] Component 130 is used to enable package structure 100 to perform a specific function.

[0061] Specifically, component 130 includes one or both of passive components and chips. Passive components can be one or more of resistors, capacitors, or inductors.

[0062] It is understandable that, when the package structure 100 also includes components 130, in the subsequent step of cutting the package structure 100, a cutting tool can be used to cut the position corresponding to the first opening 112 where no components 130 are placed.

[0063] It should be noted that component 130 is located on the second wiring layer 122 and is electrically connected to the second conductive connection portion 122'.

[0064] It should also be noted that, without subsequently cutting the encapsulation structure 100, the first and second openings are filled with dielectric material (not shown in the figure), such as resin.

[0065] The present invention also provides a packaging structure according to a second embodiment. Figure 2(a) is a schematic diagram of the packaging structure according to the first embodiment of the present invention, and Figure 2(b) is a schematic diagram of the core board unit with different electrical interconnection density according to the packaging structure according to the second embodiment of the present invention.

[0066] The similarities between the second embodiment and the previous embodiment will not be repeated here. The difference between the second embodiment and the previous embodiment is that, as shown in Figures 2(a) to 2(b), the first wiring layer 221 covers the first surface 215 of the core board structure 210 and seals the first opening 212, and the second wiring layer 222 covers the second surface 216 of the core board structure 210 and seals the first opening 212. The first wiring layer 221, the second wiring layer 222 and the adjacent core board unit 211 form a cavity, which facilitates the placement of the first wiring 221 and the second wiring 222 on the first surface 215 and the second surface 216 of the core board structure 210 in the same step. This simplifies the steps of forming the encapsulation structure 200 and improves the efficiency of forming the encapsulation structure 200. Moreover, placing the first wiring 221 and the second wiring 222 on the first surface and the second surface of the core board structure 210 in the same step also helps to further reduce the stress accumulation inside the core board structure 210, thereby further improving the quality of the core board structure 210.

[0067] In some embodiments, as shown in FIG2(a), a plurality of spaced core board units 211 have the same electrical interconnection structure 213 density.

[0068] In other embodiments, as shown in FIG2(b), multiple spaced core board units 211 have different electrical interconnection structure 213 densities, which can flexibly adjust the electrical connection performance of each core board unit 211 according to actual needs, and meet diverse circuit design requirements (for example, for areas requiring high-density signal transmission, core board units 211 with higher electrical interconnection structure 213 density can be set; while for some areas with relatively low signal transmission requirements, core board units 211 with lower electrical interconnection structure 213 density can be used), thereby meeting the circuit design requirements of the package structure 200 while further reducing the probability of core board structure 210 bursting, which is conducive to further improving the reliability of core board structure 210.

[0069] It should be noted that the packaging structure 200 can be cut later, or it can be left uncut.

[0070] It should also be noted that, without subsequently cutting the encapsulation structure 200, the first opening 212 is filled with an dielectric material (not shown in the figure), such as resin.

[0071] The present invention also provides a packaging structure according to a third embodiment. Figure 3 This is a schematic diagram of the third embodiment of the packaging structure of the present invention.

[0072] The similarities between the third embodiment and the previous embodiments will not be repeated here. The difference between the third embodiment and the previous embodiments is that the multiple spaced core board units 311 have different thicknesses, such that at least one of the first surface 315 and the second surface 316 includes a first height surface 317 and a second height surface 318. The thickness of the core board unit 311 corresponding to the first height surface 317 is less than the thickness of the core board unit 311 corresponding to the second height surface 318. The first wiring layer 321 or the second wiring layer 322 located on one side of the first height surface 317 includes a stacked first sub-wiring layer 3211 and a second sub-wiring layer 322. Sub-wiring layer 3212, first sub-wiring layer 3211 is located on first height surface 317 and electrically connected to core board unit 311 corresponding to first height surface 317, second sub-wiring layer 3212 is located on first sub-wiring layer 3211 and electrically connected to first sub-wiring layer 3211; first wiring layer 321 or second wiring layer 322 located on one side of second height surface 318 includes third sub-wiring layer 3213, third sub-wiring layer 3213 is located on second height surface 318 and electrically connected to core board unit 311 corresponding to second height surface 318.

[0073] The core board structure 310 includes core board units 311 of different thicknesses, enabling the packaging structure to better adapt to various circuit layout requirements.

[0074] When the thickness of the core board unit 311 is small, it is easier to form the electrical interconnect structure 313 that runs through the core board unit 311. When the thickness of the core board unit 311 is large, it is easier to further reduce the probability of the core board unit 311 bursting.

[0075] It is understandable that the packaging structure can be cut later, or it can be left uncut. If the packaging structure is not cut later, dielectric material (not shown) is filled into the cavity formed by the first wiring layer 321, the second wiring layer 322, and the adjacent core board unit 311.

[0076] As an example, the first surface 315 includes a first height surface 317 and a second height surface 318; correspondingly, the first wiring layer 321 includes a first sub-wiring layer 3211 and a second sub-wiring layer 3212 stacked on one side of the first height surface 317, and a third sub-wiring layer 3213 on one side of the second height surface 318; the first sub-wiring layer 3211 covers and is bonded to the first height surface 317; the third sub-wiring layer 3213 covers and is bonded to the second height surface 318. In other embodiments, the second surface may also include a first height surface and a second height surface. Correspondingly, the second wiring layer includes a first sub-wiring layer and a second sub-wiring layer stacked on one side of the first height surface, and a third sub-wiring layer on one side of the second height surface. In other embodiments, the first surface may include a first height surface and a second height surface, and the second surface may include a first height surface and a second height surface; correspondingly, the first wiring layer and the second wiring layer each include a first sub-wiring layer and a second sub-wiring layer stacked on one side of the first height surface, and a third sub-wiring layer on one side of the second height surface.

[0077] Accordingly, the present invention also provides a cutting method. Figure 4 This is a flowchart of an embodiment of the cutting method of the present invention. Figure 5 This is a schematic diagram of the structure corresponding to each step in one embodiment of the cutting method of the present invention. Figure 6 This is a schematic diagram of the structure corresponding to each step in another embodiment of the cutting method of the present invention.

[0078] refer to Figure 5 and in conjunction with references Figure 4 Step S21: Provide a packaging structure 500 according to any embodiment of the present invention.

[0079] refer to Figure 5 and in conjunction with references Figure 4 Step S22: At the position corresponding to the first opening 112, the packaging structure 100 is cut to separate each core board unit 111 and the first wiring layer 121 and the second wiring layer 122 located on the core board unit 111.

[0080] By pre-distributing each core board unit 111 in the core board structure 110, the first wiring layer 121 and the second wiring layer 122 are not directly formed on the core board structure 110. Consequently, the internal stress of the core board structure 110 will not increase due to the formation of the first wiring layer 121 and the second wiring layer 122, thereby reducing the probability of the core board structure 110 bursting and improving its yield. Moreover, when cutting the packaging structure 100, only the wiring structure 120 is cut, and the core board structure 110 is not cut. This avoids the stress release of the core board structure 110 due to cutting, which could lead to delamination at the interface with the wiring structure 120. This improves the yield of cutting the wiring structure 120 and thus the overall yield of the packaging structure 100.

[0081] In some embodiments, a first wiring layer 121 is located on a first surface 115 of the core board structure 110 and electrically connected to an electrical interconnect structure 113, and a second wiring layer 122 is located on a second surface 116 of the core board structure 110 and electrically connected to the electrical interconnect structure 113. One of the first wiring layer 121 and the second wiring layer 122 seals the first opening 112 (e.g., the second wiring layer 122 seals the first opening 112) so that the first opening 112 forms an air gap. In the step of cutting the package structure 100, a cutting tool is used to cut the position on the second wiring layer 122 corresponding to the first opening 112 (e.g., ...). Figure 5 The second wiring layer 122 located on each core board unit 111 is separated from each core board unit 111 by cutting at the position of the dashed line in the middle. This separates each core board unit 111 from the first wiring layer 121 and the second wiring layer 122 located on the core board unit 111.

[0082] In other embodiments, when the first wiring layer seals the first opening, a cutting tool is used to cut the position on the first wiring layer corresponding to the first opening.

[0083] In other embodiments, during the step of cutting the packaging structure, laser ablation can also be performed on the position of the second wiring layer corresponding to the first opening to separate the second wiring layer located on each core board unit, thereby separating each core board unit and the first and second wiring layers located on the core board unit.

[0084] In another specific embodiment, such as Figure 6As shown, both the first wiring layer 221 and the second wiring layer 222 seal the first opening 212. For example, the first wiring layer 221 covers the first surface 215 of the core board structure 210 and seals the first opening 212, while the second wiring layer 222 covers the second surface 216 of the core board structure 210 and seals the first opening 212. The first wiring layer 221, the second wiring layer 222, and the adjacent core board unit 211 form a cavity. In the step of cutting the packaging structure 200, a cutting tool is used to cut the position on the second wiring layer 222 corresponding to the first opening 212 (e.g., ...). Figure 6 The area at the dotted line is cut, and a cutting tool is used to cut the area on the first wiring layer 221 corresponding to the first opening 212 (e.g., at the dotted line position). Figure 6 Cutting is performed at the position of the dashed line in the middle to separate the second wiring layer 222 and the first wiring layer 221 located on each core board unit 221, thereby separating each core board unit 211 and the first wiring layer 221 and the second wiring layer 222 located on the core board unit 211.

[0085] In other embodiments, during the step of cutting the packaging structure, laser ablation can also be performed on the position corresponding to the first opening on the second wiring layer and the position corresponding to the first opening on the first wiring layer to separate the second wiring layer and the first wiring layer located on each core board unit, thereby separating each core board unit and the first wiring layer and the second wiring layer located on the core board unit.

[0086] Accordingly, the present invention also provides a method for forming an encapsulation structure. Figure 7 This is a flowchart of an embodiment of the method for forming the packaging structure of the present invention. Figures 8 to 28 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the packaging structure of the present invention.

[0087] refer to Figure 7 and in conjunction with references Figures 8 to 11 Step S11: A core board structure 110 is provided, including a plurality of spaced-apart core board units 111, a first opening 112 located between adjacent core board units 111, and an electrical interconnection structure 113 located within and penetrating the core board units 111. The core board structure has a first surface 115 and a second surface 116 disposed opposite to each other, and the two ends of the electrical interconnection structure 114 are exposed by the first surface 115 and the second surface 116, respectively. The core board structure 110 is used to provide a process basis for subsequent packaging structure formation. The electrical interconnection structure 113 is used for subsequent electrical connection with the wiring structure.

[0088] In some embodiments, during the step of providing the core board structure 110, the core board structure 110 includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

[0089] Specifically, the steps for forming the core board structure 110 include: Figure 8 As shown, a core board structure body 110' with a first surface 115 and a second surface 116 arranged opposite to each other is provided. The core board structure body 110 includes a plurality of initial core board units 111' arranged at intervals; as Figure 9 As shown, a third through hole 114' is formed in the initial core board unit 111'; as Figure 10 As shown, a conductive metal material is filled into the third through-hole 114' to form a third through-hole interconnect structure 114, which serves as an electrical interconnect structure 113. Figure 11 As shown, after the third through-hole interconnect structure 114 is formed, the core board structure body 110 is cut to separate each initial core board unit 111 from each other, so as to form the core board unit 111 and the first opening 112 located between adjacent core board units 111.

[0090] As an example, such as Figure 8 As shown, in the step of providing the core board structure 110, the plurality of spaced-apart core board units 111 have the same electrical interconnection structure 113 density. In other embodiments, in the step of providing the core board structure, the plurality of spaced-apart core board units have different electrical interconnection structure densities.

[0091] refer to Figure 7 and in conjunction with references Figures 12 to 22 A pre-prepared wiring structure 120 is provided, the wiring structure 120 including at least one of a first wiring layer 121 and a second wiring layer 122.

[0092] Wiring structure 120 is used to realize electrical connection between electrical interconnect structure 113 and external circuit structure (e.g., chip).

[0093] The first wiring layer 121 is electrically connected to the end of the electrical interconnection structure 113 near the first surface 115, and the second wiring layer 122 is electrically connected to the end of the electrical interconnection structure 113 near the second surface 116.

[0094] As an example, the first routing layer 121 and the second routing layer 122 are redistribution layers (RDL).

[0095] In some embodiments, the step of providing the pre-prepared wiring structure 120 includes: providing a carrier substrate 200, the carrier substrate 200 including a third surface 201 and a fourth surface 202 disposed opposite to each other; forming a release layer 210 on the third surface 201 and / or the fourth surface 202; as shown Figures 12 to 20As shown, a modified semi-additive process (MSAP) or a semi-additive process (SAP) is performed on the surface of the release layer 210 to form a wiring structure 120; as shown Figure 21 As shown, the wiring structure 120 and the carrier substrate 200 are debonded to separate the wiring structure 120 and the carrier substrate 200; wherein the wiring structure 120 is used as either or both of the first wiring layer 121 and the second wiring layer 122.

[0096] The substrate 200 is used to provide a process basis for forming the wiring structure 120.

[0097] After forming a release layer 210 on the carrier substrate 200, a wiring structure 120 is first formed on the surface of the release layer 210, and then the wiring structure 120 is separated from the carrier substrate 200, which helps to reduce the difficulty of forming the wiring structure 120.

[0098] Specifically, the wiring structure 120 includes a seed layer 129, a stacked multilayer interconnect layer 124 located on the seed layer 129, and a second via interconnect structure 123 connecting two adjacent interconnect layers 124. Seed layer 129 provides a process basis for forming stacked multilayer interconnect layers 124 and a second via interconnect structure 123 connecting adjacent interconnect layers 124.

[0099] More specifically, the steps of forming the interconnect layer 123 and the second via interconnect structure 123 include: as follows Figure 12 As shown, a seed layer 129 is formed on the peeling layer 210; as Figure 13 and Figure 18 As shown, a sacrificial layer 128 with a groove 128' is formed on the seed layer 129, the groove 128' exposing the top of the seed layer 129 or the second via interconnect structure 123; as Figure 14 and Figure 19 As shown, an interconnect layer 124 is formed in the groove 128', and the interconnect layer 124 is connected to the seed layer 129 or the second via interconnect structure 123 at its bottom; the sacrificial layer 128 is removed; as shown Figure 15 As shown, a dielectric layer 127 is formed covering the interconnect layer 124; as Figures 16 to 17 As shown, a second via interconnect structure 123 is formed in the dielectric layer 127 on top of the interconnect layer 124, and the second via interconnect structure 123 is electrically connected to the interconnect layer 124 below it; wherein, the groove 128' for forming the first interconnect layer 124 exposes the seed layer 129, and the groove 128' for forming the remaining interconnect layers 124 exposes the second via interconnect structure 123 connected to the previous interconnect layer 124. After forming the wiring structure, it also includes: as shown in the figure. Figure 22 As shown, after the debonding process, the seed layer 129 is removed.

[0100] The dielectric layer 127 is used for electrical isolation between adjacent interconnect layers, electrical isolation between adjacent second via interconnect structures, and electrical isolation between adjacent second via interconnect structures and interconnect layers.

[0101] The dielectric layer 127 includes an AFB (Ajinomoto Build-up Film) layer or a PP (Prepreg) layer.

[0102] As an example, the material of the sacrificial layer 128 is a photolithographic material. Specifically, the material of the sacrificial layer 128 includes a photosensitive dry film or a photoresist. In other embodiments, the material of the sacrificial layer may also be other photolithographic materials.

[0103] In some embodiments, the step of forming a second via interconnect structure 123 in a dielectric layer 127 on top of interconnect layer 124 includes: forming a second via 123' in dielectric layer 127, the second via 123' exposing the top of the previous interconnect layer 124 (e.g., Figure 16 As shown); a second through-hole interconnect structure 123 is formed in the second through-hole 123' (as shown). Figure 17 (As shown).

[0104] First, a second via 123 is formed in the dielectric layer 127, and then a second via interconnect structure 123 is formed in the second via 123', which helps to reduce the difficulty of forming the second via interconnect structure 123.

[0105] The second through-hole 123' can be formed in the dielectric layer 127 by mechanical drilling or laser drilling. Laser drilling is beneficial to improving the efficiency of forming the second through-hole 123', while the sidewall perpendicularity of the second through-hole 123' formed by mechanical drilling is better.

[0106] Specifically, the step of forming the second through-hole interconnect structure 123 in the second through-hole 123' includes filling the second through-hole 123' with a metallic conductive material, which is beneficial to improving the heat dissipation and conductivity of the wiring structure 120, thereby improving the heat dissipation and conductivity of the packaging structure.

[0107] It is understandable that filling the second through hole 123' with a metallic conductive material also includes: removing the metallic conductive material outside the second through hole 123', for example: removing the metallic conductive material outside the second through hole 123' by chemical micro-etching.

[0108] In some embodiments, after the wiring structure 120 is formed but before the debonding process is performed on the wiring structure 120 and the carrier substrate 200, the method further includes: Figure 20 As shown, a solder resist layer 131 is formed on the side of the wiring structure 120 facing away from the first surface 115 or the second surface 116, and the solder resist layer 131 exposes the interconnect layer 124 facing away from the core board structure 119. Specifically, the solder resist layer 131 includes solder mask or other materials that can provide insulation and protection.

[0109] refer to Figure 7 and in conjunction with references Figures 23 to 27 Step S13: Combine the first surface 115 of the core board structure 110 with the first wiring layer 121, wherein the first wiring layer 121 is electrically connected to the electrical interconnection structure 123 (e.g., ...). Figures 23 to 24 (As shown); combining the second surface 116 of the core board structure 110 with the second wiring layer 122, the second wiring layer 122 being electrically connected to the electrical interconnection structure 123 (as shown). Figures 26 to 27 (as shown); wherein at least one of the first wiring layer 121 and the second wiring layer 122 seals the first opening 112 so that the first opening 122 forms an air gap.

[0110] By pre-distributing each core board unit 111 in the core board structure 110, the first wiring layer 121 and the second wiring layer 122 are not directly formed on the core board structure 110. Consequently, the internal stress of the core board structure 110 will not increase due to the formation of the first wiring layer 121 and the second wiring layer 122, thereby reducing the probability of the core board structure 110 bursting and thus improving the yield of the core board structure 110. Moreover, by pre-forming the first opening 112 in the core board structure 110, if the packaging structure needs to be cut later, only the wiring structure 120 will be cut, and the core board structure 110 will not be cut. This avoids the stress release of the core board structure 110 due to cutting, which could lead to delamination at the interface with the wiring structure 120. This improves the yield of cutting the wiring structure 120 and thus improves the overall yield of the packaging structure 100.

[0111] It should be noted that, in the step of combining the first surface 115 of the core board structure 110 with the first wiring layer 121, all the first surfaces 115 of the core board units 111 can be combined with the first wiring layer 121 in the same step, or the first surfaces 115 of each core board unit 111 can be combined with the first wiring layer 121 sequentially; in the step of combining the second surface 116 of the core board structure 110 with the second wiring layer 122, all the second surfaces 116 of the core board units 111 can be combined with the second wiring layer 122 in the same step, or the second surfaces 116 of each core board unit 111 can be combined with the second wiring layer 122 sequentially.

[0112] In some embodiments, the first wiring layer 121 and the second wiring layer 122 each include a multilayer interconnect layer 124 and a second via interconnect structure 123 connecting two adjacent interconnect layers. The interconnect layer 124 exposed on the surface of the first wiring layer 121 facing the first surface serves as a first conductive connection portion 121', and one end of the electrical interconnect structure 113 exposed on the first surface is used for electrical connection with the first conductive connection portion 121'. The interconnect layer 124 exposed on the surface of the second wiring layer 122 facing the second surface serves as a second conductive connection portion 122', and one end of the electrical interconnect structure 113 exposed on the second surface is used for electrical connection with the second conductive connection portion 122'.

[0113] As an example, after the first surface 115 of the core board structure 110 is combined with the first wiring layer 121, the second surface 116 of the core board structure 110 is combined with the second wiring layer 122.

[0114] Specifically, in the step of combining the first surface 115 of the core board structure 110 with the first wiring layer 121, the first wiring layer 121 covers the first surface 115 of the core board structure 110 and seals the first opening 112 (e.g., Figure 24 (As shown); after the first surface 115 of the core board structure 110 is bonded to the first wiring layer 121, and before the second surface 116 of the core board structure 110 is bonded to the second wiring layer 121, the forming method further includes: as shown Figure 25 As shown, the first wiring layer 121 is cut through the first opening 112 to obtain multiple spaced sub-wiring structures 125 and a second opening 126 located between adjacent sub-wiring structures 125. The second opening 126 is connected to the first opening 112 in a one-to-one correspondence, which helps to reduce the difficulty of aligning the second wiring layer 122 with the electrical interconnect structure 123 near the second surface 116 of the core board structure 110. Moreover, it helps to reduce the difficulty of cutting and aligning the package structure when it needs to be cut later.

[0115] Understandably, the width of the second opening 126 is determined by the width of the cutting blade that cuts the first wiring layer 121.

[0116] More specifically, after the first wiring layer 121 is cut through the first opening 112, in the connected first opening 112 and second opening 126 and in the sidewalls of the first opening 112 and the second opening 126 located on the same side, the sidewall of the first opening 112 is flush with the sidewall of the second opening 126 or the sidewall of the first opening is recessed relative to the sidewall of the second opening 126 on the same side.

[0117] The sidewall of the first opening 112 is flush with the sidewall of the second opening 126, or the sidewall of the first opening 112 is recessed towards the second opening 126, which prevents the core board unit 111 from being exposed by the sub-wiring structure 125, thereby avoiding the need to cover the exposed core board unit 111 with a protective layer, and further avoiding the problem of the core board structure 110 bursting due to the mismatch of Young's modulus between the core board unit 111 and the protective layer.

[0118] Furthermore, it helps to avoid cutting the core board structure 110 when cutting the packaging structure later, that is, when cutting the second wiring layer 121.

[0119] As an example, the sidewalls of the connected first opening 112 and second opening 126 are flush (e.g.) Figure 27 (As shown).

[0120] As another example, in the connected first opening 112 and second opening 126, the sidewall of the first opening 112 is recessed relative to the sidewall of the second opening 126 on the same side (e.g. Figure 28 (As shown).

[0121] In some embodiments, after combining the second surface 116 of the core board structure 110 with the second wiring layer 122, the forming method further includes: Figure 28 As shown, a component 130 is disposed in a portion of the first opening 112, and the component 130 is located on the second wiring layer 122 and electrically connected to the second wiring layer.

[0122] It is understandable that the packaging structure can be cut later, or it can be left uncut.

[0123] It should also be noted that, without subsequently cutting the packaging structure, after setting the components 130 in a portion of the first openings 112, the first openings 112 and the second openings 126 are filled with dielectric material (not shown in the figure), such as resin.

[0124] The present invention also provides a method for forming a packaging structure according to a second embodiment. Figures 29 to 31 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the packaging structure of the present invention.

[0125] The similarities between the second embodiment and the foregoing embodiment will not be repeated here. The difference between the second embodiment and the foregoing embodiment is that: (Refer to...) Figures 29 to 30In the step of combining the first surface 215 of the core board structure 210 with the first wiring layer 221, the first wiring layer 221 covers the first surface 215 of the core board structure 210 and seals one end of the first opening 212; in the step of combining the second surface 216 of the core board structure 210 with the second wiring layer 222, the second wiring layer 222 covers the second surface 216 of the core board structure 210 and seals the other end of the first opening 212, and the first wiring layer 221, the second wiring layer 222 and the adjacent core board unit 211 form a cavity.

[0126] The first wiring layer 221, the second wiring layer 222, and the adjacent core board unit 211 form a cavity, which facilitates the combination of the first wiring layer 221 and the second wiring layer 222 with the first surface 115 and the second surface 116 of the core board structure in the same step. This simplifies the steps of forming the encapsulation structure 200 and improves the efficiency of forming the encapsulation structure 200. Moreover, the combination of the first wiring layer 221 and the second wiring layer 222 with the first surface 115 and the second surface 116 of the core board structure 110 in the same step also helps to further reduce the stress accumulation inside the core board structure 110, thereby further improving the quality of the core board structure 110.

[0127] In some embodiments, such as Figure 30 As shown, multiple spaced core board units 211 have the same electrical interconnection structure 213 density.

[0128] In other embodiments, such as Figure 31 As shown, multiple spaced core board units 211 have different electrical interconnection density, which can flexibly adjust the electrical connection performance of each core board unit according to actual needs, and meet diverse circuit design requirements (for example, for areas requiring high-density signal transmission, core board units with higher electrical interconnection density can be set; while for some areas with relatively low signal transmission requirements, core board units with lower electrical interconnection density can be used). This not only meets the circuit design requirements of the packaging structure, but also further reduces the probability of core board structure bursting, thereby helping to further improve the reliability of the core board structure.

[0129] in, Figure 31 This is a schematic diagram of a core board unit with multiple spaced-apart units having different electrical interconnection densities.

[0130] It should be noted that the packaging structure can be cut later, or it can be left uncut.

[0131] It should also be noted that, without further cutting of the encapsulation structure, the first opening 212 is filled with an dielectric material (not shown in the figure), such as resin.

[0132] The present invention also provides a method for forming a packaging structure according to a third embodiment. Figures 32 to 34 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the packaging structure of the present invention.

[0133] The similarities between the third embodiment and the foregoing embodiments will not be repeated here. The difference between the second embodiment and the foregoing embodiments is that: (Refer to...) Figure 32 In the step of providing the core board structure 310, the multiple spaced core board units 311 have different thicknesses, such that at least one of the first surface 315 and the second surface 316 includes a first height surface 317 and a second height surface 318, and the thickness of the core board unit 311 corresponding to the first height surface 317 is less than the thickness of the core board unit 311 corresponding to the second height surface 318; Reference Figure 33 The step of providing a pre-prepared first wiring layer 321 and a second wiring layer 322 includes: providing a pre-prepared first sub-wiring layer 3211, a second sub-wiring layer 3212, and a third sub-wiring layer 3213, wherein the first sub-wiring layer 3211 is used to cover a first height surface 317, the second sub-wiring layer 3212 is stacked on the first sub-wiring layer 3211, and the third sub-wiring layer 3213 is used to cover a second height surface 318; wherein, when the first surface 315 includes the first height surface 317 and the second height surface 318, the third sub-wiring layer 3213 is used to cover a first height surface 318. A first sub-wiring layer 3211 and a second sub-wiring layer 3212 stacked on one side of surface 317, and a third sub-wiring layer 3213 for the side of the second height surface 318 constitute a first wiring layer 321; when the second surface 316 includes a first height surface 317 and a second height surface 318, the first sub-wiring layer 3211 and the second sub-wiring layer 3212 stacked on one side of the first height surface 317, and the third sub-wiring layer 3213 for the side of the second height surface 318 constitute a second wiring layer 322; Reference Figure 34 In the steps of bonding the first surface 315 of the core board structure 310 to the first wiring layer 321 or bonding the second surface 316 of the core board structure 310 to the second wiring layer 322, the first sub-wiring layer 3211 covers and bonds to the first height surface 317, and the first sub-wiring layer 3211 is electrically connected to the core board unit 311 corresponding to the first height surface 317; and the third sub-wiring layer 3213 covers and bonds to the second height surface 318, and the third sub-wiring layer 3213 is electrically connected to the core board unit 311 corresponding to the second height surface 318. The core board structure 310 includes core board units 311 of different thicknesses, enabling the packaging structure to better adapt to various circuit layout requirements.

[0134] When the thickness of the core board unit 311 is small, it is easier to form the electrical interconnect structure 313 that runs through the core board unit 311. When the thickness of the core board unit 311 is large, it is easier to further reduce the probability of the core board unit 311 bursting.

[0135] It is understandable that the packaging structure can be cut later, or it can be left uncut. If the packaging structure is not cut later, dielectric material (not shown) is filled into the cavity formed by the first wiring layer 321, the second wiring layer 322, and the adjacent core board unit 311.

[0136] As an example, the first surface 315 includes a first height surface 317 and a second height surface 318; correspondingly, the first wiring layer 321 includes a first sub-wiring layer 3211 and a second sub-wiring layer 3212 stacked on one side of the first height surface 317, and a third sub-wiring layer 3213 on one side of the second height surface 318; in the step of bonding the first surface 315 of the core board structure 310 to the first wiring layer 321, the first sub-wiring layer 3211 covers the first height surface 317 and is bonded to the first height surface 317, and the third sub-wiring layer 3213 covers the second height surface 318 and is bonded to the second height surface 318. In other embodiments, the second surface may also include a first height surface and a second height surface. Correspondingly, in the step of bonding the second surface of the core board structure to the second wiring layer, the first sub-wiring layer covers the first height surface and is bonded to the first height surface, and the third sub-wiring layer covers the second height surface and is bonded to the second height surface. In other embodiments, the first surface may include a first height surface and a second height surface, and the second surface may include both a first height surface and a second height surface. Accordingly, in the step of bonding the first surface of the core board structure to the first wiring layer, a first sub-wiring layer of the first wiring layer covers the first height surface and is bonded to it, and a third sub-wiring layer of the first wiring layer covers the second height surface and is bonded to it. In the step of bonding the second surface of the core board structure to the second wiring layer, a first sub-wiring layer of the second wiring layer covers the first height surface and is bonded to it, and a third sub-wiring layer of the second wiring layer covers the second height surface and is bonded to it.

[0137] It should be noted that the encapsulation structure can be formed using the methods described in the foregoing embodiments, or it can be formed using other methods. For a detailed description of the encapsulation structure described in this embodiment, please refer to the corresponding descriptions in the foregoing embodiments; these will not be repeated here.

[0138] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A packaging structure, characterized in that, include: A core board structure includes a plurality of spaced-apart core board units, a first opening between adjacent core board units, and an electrical interconnection structure located within and penetrating the core board units. The core board structure has a first side and a second side disposed opposite to each other, and the two ends of the electrical interconnection structure are exposed by the first side and the second side, respectively. Wiring structure, located on the first and / or second surface of the core board structure; The wiring structure includes at least one of a first wiring layer and a second wiring layer. The first wiring layer is located on a first surface of the core board structure and is electrically connected to the electrical interconnection structure. The second wiring layer is located on a second surface of the core board structure and is electrically connected to the electrical interconnection structure. At least one of the first wiring layer and the second wiring layer seals the first opening so that the first opening forms an air gap.

2. The packaging structure as described in claim 1, characterized in that, The second wiring layer covers the core board structure and seals each of the first openings. The first wiring layer includes a plurality of spaced sub-wiring structures and a second opening located between adjacent sub-wiring structures. The second opening is connected to the first opening in a one-to-one correspondence. In the connected first and second openings and in the sidewalls on the same side of the first and second openings, the sidewall of the first opening is flush with the sidewall of the second opening or the sidewall of the first opening is recessed relative to the sidewall of the second opening on the same side.

3. The packaging structure as described in claim 2, characterized in that, The sidewalls of the connected first and second openings are flush. or, In the connected first and second openings, the sidewall of the first opening is recessed relative to the sidewall of the second opening on the same side.

4. The packaging structure as described in claim 2, characterized in that, The packaging structure further includes: components located in a portion of the first openings, the components being located on and electrically connected to the second wiring layer.

5. The packaging structure as described in claim 1, characterized in that, The first wiring layer covers the first side of the core board structure and seals the first opening, the second wiring layer covers the second side of the core board structure and seals the first opening, and the first wiring layer, the second wiring layer and the adjacent core board unit form a cavity.

6. The packaging structure as described in claim 1, characterized in that, The multiple spaced core board units have different thicknesses, such that at least one of the first surface and the second surface includes a first height surface and a second height surface, and the thickness of the core board unit corresponding to the first height surface is less than the thickness of the core board unit corresponding to the second height surface. The first wiring layer or the second wiring layer located on one side of the first height surface includes a first sub-wiring layer and a second sub-wiring layer stacked together. The first sub-wiring layer is located on the first height surface and electrically connected to the core board unit corresponding to the first height surface. The second sub-wiring layer is located on the first sub-wiring layer and electrically connected to the first sub-wiring layer. The first wiring layer or the second wiring layer located on one side of the second height surface includes a third sub-wiring layer. The third sub-wiring layer is located on the second height surface and electrically connected to the core board unit corresponding to the second height surface.

7. The packaging structure as described in claim 1, characterized in that, The multiple spaced core board units have different electrical interconnection density.

8. The packaging structure as described in any one of claims 1 to 7, characterized in that, The core board structure includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

9. The packaging structure as described in any one of claims 1 to 7, characterized in that, Both the first wiring layer and the second wiring layer are bonded to the core board structure.

10. A cutting method, characterized in that, include: Provide a packaging structure as described in any one of claims 1 to 9; At the location corresponding to the first opening, the packaging structure is cut to separate each core board unit and the first wiring layer and the second wiring layer located on the core board unit.

11. A method for forming an encapsulation structure, characterized in that, include: A core board structure is provided, including a plurality of spaced core board units, a first opening between adjacent core board units, and an electrical interconnection structure located within and penetrating the core board units. The core board structure has a first surface and a second surface disposed opposite to each other, and the two ends of the electrical interconnection structure are exposed by the first surface and the second surface, respectively. A pre-prepared wiring structure is provided, the wiring structure including at least one of a first wiring layer and a second wiring layer; The first surface of the core board structure is combined with the first wiring layer, and the first wiring layer is electrically connected to the electrical interconnect structure. The second side of the core board structure is combined with the second wiring layer, and the second wiring layer is electrically connected to the electrical interconnect structure; Wherein, at least one of the first wiring layer and the second wiring layer seals the first opening so that the first opening forms an air gap.

12. The method for forming the packaging structure as described in claim 11, characterized in that, In the step of combining the first surface of the core board structure with the first wiring layer, the first wiring layer covers the first surface of the core board structure and seals the first opening. After the first side of the core board structure is combined with the first wiring layer, and before the second side of the core board structure is combined with the second wiring layer, the forming method further includes: cutting the first wiring layer through the first opening to obtain a plurality of spaced sub-wiring structures and a second opening located between adjacent sub-wiring structures, wherein the second opening is connected to the first opening in a one-to-one correspondence.

13. The method for forming the packaging structure as described in claim 12, characterized in that, After combining the second side of the core board structure with the second wiring layer, the forming method further includes: placing components in a portion of the first openings, the components being located on the second wiring layer and electrically connected to the second wiring layer.

14. The method for forming the packaging structure as described in claim 11, characterized in that, In the step of combining the first surface of the core board structure with the first wiring layer, the first wiring layer covers the first surface of the core board structure and seals one end of the first opening. In the step of combining the second surface of the core board structure with the second wiring layer, the second wiring layer covers the second surface of the core board structure and seals the other end of the first opening, and the first wiring layer, the second wiring layer and the adjacent core board unit form a cavity.

15. The method for forming the packaging structure as described in claim 11, characterized in that, In the step of providing the core board structure, the multiple spaced core board units have different thicknesses, so that at least one of the first surface and the second surface includes a first height surface and a second height surface, and the thickness of the core board unit corresponding to the first height surface is less than the thickness of the core board unit corresponding to the second height surface. The step of providing a pre-prepared first wiring layer and a second wiring layer includes: providing a pre-prepared first sub-wiring layer, a second sub-wiring layer and a third sub-wiring layer, wherein the first sub-wiring layer is used to cover a first height surface, the second sub-wiring layer is stacked on the first sub-wiring layer and the third sub-wiring layer is used to cover a second height surface; In the steps of bonding the first surface of the core board structure to the first wiring layer or bonding the second surface of the core board structure to the second wiring layer, the first sub-wiring layer covers the first height surface and is bonded to the first height surface, and the first sub-wiring layer is electrically connected to the core board unit corresponding to the first height surface; and the third sub-wiring layer covers the second height surface and is bonded to the second height surface, and the third sub-wiring layer is electrically connected to the core board unit corresponding to the second height surface. Wherein, when the first surface includes the first height surface and the second height surface, the first sub-wiring layer and the second sub-wiring layer stacked on one side of the first height surface, and the third sub-wiring layer on one side of the second height surface constitute the first wiring layer; when the second surface includes the first height surface and the second height surface, the first sub-wiring layer and the second sub-wiring layer stacked on one side of the first height surface, and the third sub-wiring layer on one side of the second height surface constitute the second wiring layer.

16. The method for forming the packaging structure as described in claim 11, characterized in that, In the step of providing the core board structure, the plurality of spaced core board units have different electrical interconnection structure densities.

17. The method for forming the packaging structure as described in claim 11, characterized in that, The step of providing a pre-prepared wiring structure includes: providing a carrier substrate, the carrier substrate including a third side and a fourth side disposed opposite to each other; forming a release layer on the third side and / or the fourth side; performing a modified semi-additive process or a semi-additive process on the surface of the release layer to form a wiring structure; and performing a debonding process on the wiring structure and the carrier substrate to separate the wiring structure from the carrier substrate. The wiring structure is used as either or both of the first wiring layer and the second wiring layer.

18. The method for forming the packaging structure as described in claim 17, characterized in that, The wiring structure includes a seed layer, stacked multilayer interconnect layers on the seed layer, and a second via interconnect structure connecting two adjacent interconnect layers. The steps of forming the interconnect layer and the second via interconnect structure include: A seed layer is formed on the peeling layer; A sacrificial layer with grooves is formed on the seed layer, the grooves exposing the top of the seed layer or the second via interconnect structure, the material of the sacrificial layer being a photolithographic material; An interconnect layer is formed in the groove, and the interconnect layer is connected to the seed layer or the second through-hole interconnect structure at its bottom; Remove the sacrificial layer; Form a dielectric layer covering the interconnect layer; A second via interconnect structure is formed in the dielectric layer on top of the interconnect layer, and the second via interconnect structure is electrically connected to the interconnect layer below it; The groove for forming the first interconnect layer exposes the seed layer, and the groove for forming the remaining interconnect layers exposes the second via interconnect structure connected to the previous interconnect layer. After the wiring structure is formed, the process also includes: removing the seed layer after debonding.

19. The method for forming the packaging structure as described in claim 11, characterized in that, In the step of providing the core board structure, the core board structure includes a glass core board structure, a ceramic core board structure, or a silicon core board structure.

Images