A frequency control method and apparatus

Abstract

The application discloses a frequency control method and device, which is used to improve the flexibility of frequency adjustment of a processor core. The method comprises the following steps: firstly, determining the load change mode of the processor core; secondly, determining the target temperature from at least two temperatures of the processor core according to the load change mode; and finally, adjusting the frequency of the processor core according to the target temperature. By using the at least two temperatures of the processor core to control the frequency of the processor core in real time, the temperature of the processor core after frequency adjustment can be always in a suitable temperature range, so that the processor core can be prevented from being in a high-voltage and high-frequency state for a long time. Moreover, the target temperature suitable for the current load change mode is selected from the at least two temperatures of the processor core to adjust the frequency, so that the frequency of the processor core after adjustment can be more in line with the current load change characteristics of the processor core, and the timeliness of the frequency adjustment of the processor core can be improved.

Description

[0001] This application is a divisional application. The original application has the application number 202080104123.3 and the original application date is August 21, 2020. The entire contents of the original application are incorporated herein by reference. Technical Field

[0002] This application relates to the field of processor technology, and in particular to a frequency control method and apparatus. Background Technology

[0003] When electronic devices leave the factory, the components within them (such as the processor core) are typically defined with certain standard operating ranges, such as rated operating frequency and rated operating voltage. Under normal circumstances, the processor core performs processing operations at its rated operating frequency. However, when the processor core has overclocking capabilities, if it determines that the rated operating frequency does not meet the requirements of the current working scenario, the processor core's frequency can be increased above the rated operating frequency to improve its processing performance.

[0004] In existing solutions, when a user enables the overclocking function of an electronic device, the device has the opportunity to run at a preset overclocking frequency. However, in this case, the processor core may be under high voltage and high frequency for an extended period, leading to excessively high processor core temperatures. Summary of the Invention

[0005] This application provides a frequency control method and apparatus to solve the technical problem that the processor core will be in a high voltage and high frequency state for a long time when overclocking.

[0006] In a first aspect, this application provides a frequency control method applied to a frequency controller. The method includes: the frequency controller acquiring at least two temperatures of a processor core and determining a load change pattern of the processor core; determining a target temperature from the at least two temperatures based on the load change pattern; and adjusting the frequency of the processor core according to the target temperature. Each of the at least two temperatures corresponds to a frequency, and the load change pattern indicates the change in the load on the processor core.

[0007] In the above design, the frequency controller controls the processor core frequency in real time based on at least two processor core temperatures, ensuring that the adjusted processor core temperature remains within a suitable range. This helps prevent the processor core from operating at high voltage and high frequency for extended periods. Furthermore, this method selects a target temperature suitable for the current load variation pattern from the processor core's at least two temperatures for frequency adjustment. Thus, the adjusted processor core frequency better matches the current load variation characteristics, improving the timeliness of frequency adjustment.

[0008] In one possible design, the frequency controller acquires at least two temperatures of the processor core, including: first, acquiring the processor core's temperature at a first moment, and then predicting the processor core's temperature at a second moment based on the first moment's temperature. The second moment occurs after the first moment. With this design, if the temperature at the first moment is the current temperature, the frequency controller can select a target temperature from the current and future temperatures. Since the current temperature is influenced by historical loads, and the future temperature is influenced by the current load, the processor core frequency determined in this way can better match the characteristics of the loads that have a greater impact on the processor core, both historically and currently.

[0009] In one possible design, the target temperature can satisfy any of the following conditions: In scenario one, where the processor core operates under a constant load mode, the frequency controller can use the higher of the frequencies corresponding to the first and second temperatures as the target temperature. Thus, when the load change is small, the processor core is essentially in a stable state. In this case, adjusting the processor core frequency based on either its current or future temperature will not cause the adjusted core temperature to exceed the thermal runaway limit. Therefore, this design, by adjusting the processor core frequency to the higher of the frequencies corresponding to the future and current temperatures, allows the processor core to operate at a higher frequency without exceeding the thermal runaway limit, maximizing its processing power and fully utilizing the thermal margin.

[0010] Scenario 2: If the processor core's load change pattern is in an increasing load mode, the frequency controller can use the current temperature as the target temperature. Thus, while the current load is increasing, although the future load corresponds to a higher temperature, the current temperature has not yet reached that future temperature, so there is no need to perform a frequency reduction operation. In this case, adjusting the processor core frequency using the frequency corresponding to the current temperature can fully utilize the processor core's thermal margin, helping to maximize processor core processing performance while keeping the processor core temperature under control.

[0011] Scenario 3: If the processor core's load change pattern is a decreasing load mode, the frequency controller can use the temperature at the second moment as the target temperature. Thus, while the current load corresponds to a higher temperature during a decreasing load period, the future load corresponds to a lower temperature. In this case, using the future temperature to preemptively increase the processor core's frequency helps to improve the processor core's processing performance more quickly.

[0012] In one possible design, the frequency controller can determine the load variation pattern of the processor core in any of the following ways: In Method 1, the frequency controller first determines a first load change range based on the processor core's historical load before the current moment and a preset load change amount. If the processor core's load at the current moment falls within this range, the load change mode is determined to be a constant load mode. If the processor core's load at the current moment exceeds the maximum load within the first load change range, the load change mode is determined to be a load increasing mode. If the processor core's load at the current moment is less than the minimum load within the first load change range, the load change mode is determined to be a load decreasing mode. Using historical and current loads to determine the load change mode within a historical period helps ensure that the determined load change mode reflects the load changes after the current moment, resulting in good real-time performance of the load change mode.

[0013] Method Two: The frequency controller first determines the second load variation range based on the processor core's load at the first moment and a preset load change amount. Then, based on the processor core's load at the first moment and its historical loads before the first moment, it predicts the processor core's load at the second moment. If the processor core's load at the second moment is within the second load variation range, the load variation pattern is determined to be a constant load mode. If the processor core's load at the second moment is greater than the maximum load within the second load variation range, the load variation pattern is determined to be a load increasing mode. If the processor core's load at the second moment is less than the minimum load within the second load variation range, the load variation pattern is determined to be a load decreasing mode. By using the current load and future load to determine the load variation pattern in the future, the determined load variation pattern helps to reflect the load changes in the future. The load variation pattern has a leading effect and better reflects the temperature at future moments.

[0014] In one possible design, the frequency controller predicts the processor core's temperature at a second time step based on the processor core's temperature at a first time step. This involves the frequency controller predicting the processor core's temperature at the second time step based on the processor core's temperature and power consumption at the first time step. This design allows the frequency controller to comprehensively consider both the current temperature and current power consumption to predict the future temperature. Since the current power consumption reflects the processor core's load, the future temperature determined in this way is more consistent with the processor core's current load characteristics.

[0015] In another possible design, the frequency controller predicts the processor core's temperature at a second moment based on the processor core's temperature at a first moment. This involves the frequency controller predicting the processor core's temperature at a second moment based on the processor core's temperature at the first moment and its historical temperatures prior to the first moment. With this design, the frequency controller can predict future temperatures based on current and historical temperatures. Since temperature changes are continuous, the future temperature determined in this way more closely reflects real-world temperature variations.

[0016] Secondly, this application provides a frequency controller, which may include: A monitoring circuit is used to acquire at least two temperatures of the processor core and send them to the processing circuit, wherein each of the at least two temperatures corresponds to a frequency; The processing circuitry is used to determine the load change pattern of the processor core, determine a target temperature from at least two temperatures based on the load change pattern, and adjust the frequency of the processor core according to the target temperature; wherein the load change pattern is used to indicate the changes in the access load of the processor core.

[0017] In one possible design, the monitoring circuit can first acquire the temperature of the processor core at a first moment, and then predict the temperature of the processor core at a second moment based on the temperature of the processor core at the first moment. The second moment occurs after the first moment.

[0018] In one possible design, after determining the load change mode of the processor core, if the load change mode of the processor core is a constant load mode, the temperature corresponding to the highest frequency between the temperature at the first moment and the temperature at the second moment can be used as the target temperature. If the load change mode of the processor core is a load increase mode, the temperature at the first moment can be used as the target temperature. If the load change mode of the processor core is a load decrease mode, the temperature at the second moment can be used as the target temperature.

[0019] In one possible design, the processing circuitry can determine the load variation pattern of the processor core in any of the following ways: Method 1: The processing circuit first determines the first load change range based on the historical load of the processor core before the first moment and the preset load change amount. If the load of the processor core at the first moment is within the first load change range, the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load increasing mode. If the load of the processor core at the first moment is less than the minimum load in the first load change range, the load change mode of the processor core is determined to be the load decreasing mode.

[0020] Method Two: The processing circuit first determines the second load variation range based on the processor core's load at the first moment and a preset load change amount. Then, based on the processor core's load at the first moment and its historical loads before the first moment, it predicts the processor core's load at the second moment. If the processor core's load at the second moment is within the second load variation range, the load variation mode is determined to be a constant load mode. If the processor core's load at the second moment is greater than the maximum load within the second load variation range, the load variation mode is determined to be a load increasing mode. If the processor core's load at the second moment is less than the minimum load within the second load variation range, the load variation mode is determined to be a load decreasing mode.

[0021] In one possible design, the monitoring circuitry can predict the processor core temperature at a second moment in either of the following ways: Method 1: The monitoring circuit predicts the processor core temperature at the second moment based on the processor core temperature and power consumption at the first moment.

[0022] Method 2: The monitoring circuit predicts the temperature of the processor core at the second moment based on the temperature of the processor core at the first moment and the historical temperature of the processor core at moments prior to the first moment.

[0023] Thirdly, embodiments of this application provide a frequency controller, which may include: The acquisition unit is used to acquire at least two temperatures of the processor core, each of the at least two temperatures corresponding to a frequency; A determination unit is used to determine the load change pattern of the processor core and determine the target temperature from at least two temperatures based on the load change pattern; wherein the load change pattern is used to indicate the change in the access load of the processor core. The adjustment unit is used to adjust the frequency of the processor core according to the target temperature.

[0024] In one possible design, the acquisition unit is specifically used to: first acquire the temperature of the processor core at a first moment, and then predict the temperature of the processor core at a second moment based on the temperature of the processor core at the first moment. The second moment occurs after the first moment.

[0025] In one possible design, the determining unit is specifically used to: when the load change mode of the processor core is a constant load mode, take the temperature corresponding to the highest frequency between the temperature at the first moment and the temperature at the second moment as the target temperature; when the load change mode of the processor core is a load increase mode, take the temperature at the first moment as the target temperature; and when the load change mode of the processor core is a load decrease mode, take the temperature at the second moment as the target temperature.

[0026] In one possible design, the determination unit can determine the load variation pattern of the processor core in any of the following ways: Method 1: The determining unit determines the first load change range based on the historical load of the processor core before the first moment and the preset load change amount. If the load of the processor core at the first moment is within the first load change range, the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load increasing mode. If the load of the processor core at the first moment is less than the minimum load in the first load change range, the load change mode of the processor core is determined to be the load decreasing mode.

[0027] Method Two: The determining unit first determines the second load change range based on the processor core's load at the first moment and a preset load change amount. Then, based on the processor core's load at the first moment and its historical loads before the first moment, it predicts the processor core's load at the second moment. If the processor core's load at the second moment is within the second load change range, the processor core's load change mode is determined to be a constant load mode. If the processor core's load at the second moment is greater than the maximum load within the second load change range, the processor core's load change mode is determined to be a load increasing mode. If the processor core's load at the second moment is less than the minimum load within the second load change range, the processor core's load change mode is determined to be a load decreasing mode.

[0028] In one possible design, the acquisition unit can predict the processor core temperature at a second moment in either of the following ways: Method 1: The acquisition unit predicts the temperature of the processor core at the second moment based on the temperature and power consumption of the processor core at the first moment.

[0029] Method 2: The acquisition unit predicts the temperature of the processor core at the second moment based on the temperature of the processor core at the first moment and the historical temperature of the processor core before the first moment.

[0030] Fourthly, this application provides a processor that may include a processor core, a temperature sensor, a frequency regulator, and a frequency controller, wherein the temperature sensor and the frequency regulator are respectively connected to the frequency controller. Wherein: A temperature sensor connected to the processor core is used to acquire at least one first temperature of the processor core and send it to the frequency controller; A frequency controller is configured to determine at least one second temperature of a processor core based on at least one first temperature of the processor core, each of the at least one first temperature and the at least one second temperature corresponding to a frequency; and to determine a load change pattern of the processor core, determine a target temperature from the at least one first temperature and the at least one second temperature based on the load change pattern of the processor core, and send the frequency corresponding to the target temperature to a frequency regulator; wherein the load change pattern is used to indicate the change in the access load of the processor core. A frequency regulator connected to the processor core is used to adjust the frequency of the processor core to the frequency corresponding to the target temperature.

[0031] In one possible design, a temperature sensor can acquire the processor core's first temperature at a first moment and send it to the frequency controller. The frequency controller then predicts the processor core's second temperature at a second moment based on the first temperature. The second moment occurs after the first moment.

[0032] In one possible design, the frequency controller can determine the target temperature as follows: If the processor core's load change mode is a constant load mode, then the temperature corresponding to the highest of the frequencies corresponding to the first temperature at the first moment and the frequencies corresponding to the second temperature at the second moment is taken as the target temperature. If the processor core's load change mode is a load-increasing mode, then the first temperature at the first moment is taken as the target temperature. If the processor core's load change mode is a load-decreasing mode, then the second temperature at the second moment is taken as the target temperature.

[0033] In one possible design, the frequency controller can determine the load variation pattern of the processor core in any of the following ways: Method 1: The frequency controller determines the first load change range based on the historical load of the processor core before the first moment and the preset load change amount. If the load of the processor core at the first moment is within the first load change range, the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change mode of the processor core is determined to be the load increasing mode. If the load of the processor core at the first moment is less than the minimum load in the first load change range, the load change mode of the processor core is determined to be the load decreasing mode.

[0034] Method 1: The frequency controller determines the second load change range based on the processor core's load at the first moment and a preset load change amount. Based on the processor core's load at the first moment and the processor core's load at historical moments before the first moment, it predicts the processor core's load at the second moment. If the processor core's load at the second moment is within the second load change range, the processor core's load change mode is determined to be a constant load mode. If the processor core's load at the second moment is greater than the maximum load in the second load change range, the processor core's load change mode is determined to be a load increase mode. If the processor core's load at the second moment is less than the minimum load in the second load change range, the processor core's load change mode is determined to be a load decrease mode.

[0035] In one possible design, the processor may also include a power sensor connected to the processor core. In this case, the power sensor can acquire the power consumption of the processor core at a historical time before the first moment and the power consumption of the processor core at the first moment, and send the historical power consumption and the power consumption at the first moment to the frequency controller. The temperature sensor can also acquire the temperature of the processor core at a historical time before the first moment and send it to the frequency controller. In this way, the frequency controller can determine the load of the processor core at the historical time based on the power consumption and temperature of the processor core at the historical time, and determine the load of the processor core at the first moment based on the power consumption and the first temperature of the processor core at the first moment.

[0036] In one possible design, the frequency controller can predict the processor core's second temperature at a second moment in either of the following ways: Method 1: The frequency controller predicts the second temperature of the processor core at the second moment based on the first temperature and power consumption of the processor core at the first moment.

[0037] Method 2: The frequency controller predicts the second temperature of the processor core at the second moment based on the first temperature of the processor core at the first moment and the historical temperatures of the processor core at moments prior to the first moment.

[0038] Fifthly, this application provides an electronic device that includes a processor as described in any of the fourth aspects above.

[0039] The foregoing or other aspects of this application will be specifically described in the following embodiments. Attached Figure Description

[0040] Figure 1 An exemplary schematic diagram of a processor provided in an embodiment of this application is shown; Figure 2 An exemplary flowchart of a frequency control method provided in an embodiment of this application is shown. Figure 3 This illustration shows a detailed flowchart of a frequency control method provided in an embodiment of this application. Figure 4A An example is shown as a load variation curve of a processor core; Figure 4B An example is shown in the temperature variation curve of a processor core; Figure 4C An example is shown as a frequency variation curve of a processor core; Figure 5A An example is shown: a load variation graph for another processor core; Figure 5B An example is shown: a temperature variation curve for another processor core. Figure 5C An example is shown, illustrating the frequency variation curve of another processor core; Figure 6 An exemplary schematic diagram of a frequency controller provided in an embodiment of this application is shown; Figure 7 An exemplary schematic diagram of another frequency controller provided in an embodiment of this application is shown. Detailed Implementation

[0041] The various embodiments disclosed in this application can be applied to electronic devices with overclocking capabilities. In some embodiments of this application, the electronic device may be a computer device with a processor (such as a central processing unit, CPU), such as a desktop computer. It should also be understood that in other embodiments of this application, the electronic device may also be a portable electronic device with a processor, such as a mobile phone, tablet computer, wearable device with wireless communication capabilities (such as a smartwatch), in-vehicle device, etc. Exemplary embodiments of portable electronic devices include, but are not limited to, portable electronic devices running iOS®, Android®, Microsoft®, or other operating systems.

[0042] When an electronic device has overclocking capabilities, if the processor core's power consumption margin meets the overclocking activation conditions, the device can increase the processor core's frequency to a level higher than the manufacturer's specified frequency to improve processing performance. However, as the processor core's frequency increases, its power consumption also increases, manifesting as heat and raising its temperature. If the electronic device's cooling system cannot adequately cool the processor core, excessively high temperatures can negatively impact its lifespan and reliability.

[0043] To mitigate the impact of overclocking on the lifespan and reliability of the processor core, in one possible implementation, the electronic device incorporates a pre-set temperature control line. When the processor core's current temperature is within this line, the electronic device does not adjust the core's frequency. When the core's current temperature is below the line, the device increases the frequency to enhance processing performance. Conversely, when the core's current temperature is above the line, the device decreases the frequency to lower the temperature. The temperature control line can be set based on the processor core's rated temperature; for example, if the rated temperature is 99°C, the line could be set to 98°C to 100°C.

[0044] While the above implementation can adjust the processor core frequency based on the current temperature of the processor core, the current temperature of the processor core actually depends on the processor core's load. A higher load means more work is done by the processor core, resulting in a higher temperature; conversely, a lower load means less work is done, resulting in a lower temperature. In this case, because there is a causal relationship between the processor core's load and temperature, the processor core temperature actually lags behind its load. For example, the current temperature might be due to the load at a previous moment, and the current load could cause the temperature to continue to rise or fall. Due to this lag, adjusting the processor core frequency solely based on its current temperature may result in poor timeliness of frequency adjustment.

[0045] In view of this, this application provides a frequency control method for real-time control of the processor core frequency based on at least two temperatures and the load of the processor core. On the one hand, this method ensures that the processor core temperature is within a suitable range after frequency adjustment, preventing the processor core from operating at high voltage and high frequency for extended periods. On the other hand, this method can also select a target temperature suitable for the current load variation pattern from the at least two temperatures of the processor core for frequency adjustment. Thus, the processor core frequency adjusted using the target temperature better matches the current load variation characteristics of the processor core, thereby improving the timeliness of processor core frequency adjustment.

[0046] The technical solutions of the present invention will now be described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0047] The terms "system" and "network" in the embodiments of this application are used interchangeably. "At least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0048] Furthermore, unless otherwise specified, the ordinal numbers such as "first" and "second" mentioned in the embodiments of this application are used to distinguish multiple objects and are not used to limit the priority or importance of multiple objects. For example, "first moment" and "second moment" are only used to distinguish different moments, and do not indicate that the priority or importance of these two moments is different.

[0049] Figure 1 An exemplary schematic diagram of a processor 100 provided in an embodiment of this application is shown. Figure 1 As shown, the processor 100 may include at least one processor core, such as processor core 10, processor core 11, processor core 12, and processor core 13. The processor 100 may also include non-core components, such as general-purpose units (including counters, decoders, and signal generators), accelerometer units, input / output control units, interface units, internal memory, and external caches. The various processor cores and non-core components can communicate with each other via a communication bus (…). Figure 1 (Not illustrated in the diagram) A connection is established to enable data transmission.

[0050] It should be understood that the processor 100 described above can be a chip. For example, the processor 100 can be a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a system-on-chip (SoC), a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), or other integrated chips. It should be noted that the processor 100 in the embodiments of this application can also be an integrated circuit chip with signal processing capabilities. For example, the processor 100 described above can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor can be a microprocessor or any conventional processor, etc.

[0051] It is understood that the memory (e.g., internal memory and external cache) in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0052] In this embodiment, reference continues to be made to... Figure 1 As shown, the processor may also include a frequency controller 14, and each processor core may also have a frequency regulator. The frequency controller 14 can communicate with the frequency regulator in each processor core. Thus, when controlling the overclocking adjustment of each processor core, the frequency controller 14 can send a frequency control command to the frequency regulator of that processor core, so that the frequency regulator of that processor core adjusts the frequency of that processor core according to the frequency control command, for example, adjusting it to a frequency greater than the maximum frequency set by the manufacturer.

[0053] It should be noted that, Figure 1This is merely an illustrative example. In other possible examples, the frequency regulator may be placed in only one or a few processor cores, so that the frequency controller 14 can control the frequency of only the processor core with the frequency regulator. Alternatively, the frequency regulator may be placed in non-core components, so that the frequency controller 14 can control not only the frequency of the processor cores but also the frequency of the non-core components. Of course, the non-core components referred to here are those that operate at a set frequency.

[0054] The frequency control method in this application will be described below using the control of the frequency of one processor core as an example. The control of the frequency of other processor cores or non-processor cores will not be described in detail.

[0055] based on Figure 1 The processor shown Figure 2 This illustration shows a flowchart of a frequency control method provided in an embodiment of this application. This method is applicable to frequency controllers, for example... Figure 1 The frequency controller 14 is shown. In this embodiment, the frequency controller can execute the frequency control method in a periodic manner. Figure 2 An example is given of a primary frequency control process of a frequency controller, such as... Figure 2 As shown, the method includes: Step 201: The frequency controller acquires at least two temperatures of the processor core.

[0056] In this embodiment, the at least two temperatures of the processor core may include the current temperature of the processor core, and may also include at least one of the temperatures of the processor core at various future moments and the temperatures at various historical moments. Each temperature may correspond to a frequency, and different temperatures may correspond to different frequencies. The specific method for calculating the frequency corresponding to a temperature will be explained in step 204, and will not be described here.

[0057] Step 202: The frequency controller determines the load change pattern of the processor core.

[0058] In this embodiment, the processor core load change pattern is used to indicate changes in the access load of the processor core. For example, if the current access load of the processor core is significantly higher than the historical access load, the processor core load change pattern is a load increase pattern; if the current access load of the processor core is significantly lower than the historical access load, the processor core load change pattern is a load decrease pattern; and if the current access load of the processor core is not significantly different from the historical access load, the processor core load change pattern is a load unchanged pattern. The data values ​​used to determine "significantly higher," "significantly lower," and "not significantly different" can be set by those skilled in the art based on experience or according to actual needs, and are not specifically limited.

[0059] Step 203: The frequency controller determines the target temperature from at least two temperatures based on the load change pattern.

[0060] In this embodiment, the target temperature can refer to the temperature among multiple temperatures that best matches the load change pattern. For example, when multiple temperatures include the current temperature and the future temperature, if the load change pattern is in an increasing load mode, then since the current temperature has not reached the future temperature, there is actually no need to perform frequency reduction in advance. In this case, the current temperature can be used as the target temperature. Conversely, when multiple temperatures include the current temperature and the historical temperature, if the load change pattern is in a decreasing load mode, then since the current temperature is lower than the historical temperature, the current temperature can also be used as the target temperature to improve the processing performance of the processor core. There are various specific strategies for determining the target temperature from at least two temperatures. The specific strategy used can be set by those skilled in the art based on experience, and will not be described in detail here.

[0061] Step 204: The frequency controller adjusts the frequency of the processor core to the frequency corresponding to the target temperature.

[0062] In this embodiment, the frequency controller can determine the frequency corresponding to each temperature in various ways, such as proportional-integral-derivative (PID) control and experimental measurement. Logically, PID control corresponds to a mathematical expression where the dependent variable is the frequency, and the independent variables are the temperature and its change. The parameters in the mathematical expression can include proportional, integral, and derivative parameters, which are pre-determined through multiple experiments based on the desired temperature. When determining the frequency corresponding to a certain temperature, the frequency controller directly substitutes the current temperature and its change compared to historical temperatures into the mathematical expression to calculate the corresponding frequency. In PID control, when the deviation from the desired temperature is positive, that temperature corresponds to a lower frequency. Thus, the frequency controller can reduce the processor core frequency when the temperature is higher than the desired temperature to reduce heat generation and bring the processor core temperature closer to the desired temperature. When the deviation between the temperature and the desired temperature is negative, that temperature corresponds to a higher frequency. Thus, the frequency controller can increase the processor core frequency when the temperature is lower than the desired temperature, thereby maximizing the processor core's processing performance while keeping the core temperature within the desired range. In experimental measurement methods, the frequency controller can pre-determine the correspondence between temperature and frequency based on multiple experiments (e.g., a correspondence table or graph). The frequency controller can then directly look up this correspondence to obtain the frequency corresponding to the given temperature.

[0063] In this embodiment, the frequency controller first generates a frequency control command based on the frequency corresponding to the target temperature, and then sends the frequency control command to the frequency regulator of the processor core, so that the frequency regulator adjusts the frequency of the processor core to the frequency corresponding to the target temperature. Specifically, when increasing the processor core frequency, the frequency regulator needs to simultaneously increase the processor core's operating voltage to ensure that the processor core's operating voltage can support high-frequency operation; in this case, the processor core can be in a high-voltage, high-frequency state. When decreasing the processor core frequency, the frequency regulator can simultaneously decrease the processor core's operating voltage; in this case, the processor core changes from a high-voltage, low-frequency state to a low-voltage, low-frequency state, thereby improving the processor core's power utilization. The specific operating voltage to which the processor core is adjusted can be determined by the frequency regulator with reference to a preset correspondence between frequency and operating voltage. This preset correspondence can be pre-encapsulated within the frequency regulator by those skilled in the art, and the preset correspondence can be the same or different for each processor core.

[0064] In this embodiment, when multiple processor cores are located in the same independent power domain, the operating voltage of that independent power domain is the operating voltage corresponding to the processor core with the highest frequency. In this case, other processor cores may be in a high-voltage, low-frequency state, resulting in low power utilization of other processor cores. To solve this problem, in an optional implementation, each processor core can be located in an independent power threshold. In this way, the operating voltage of each processor core can correspond to its respective frequency, which helps to improve the power utilization of each processor core.

[0065] In the above embodiments of this application, the frequency of the processor core is controlled in real time using at least two temperatures and loads of the processor core by a frequency controller. This ensures that the temperature of the processor core after frequency adjustment remains within a suitable range, preventing the processor core from operating at high voltage and high frequency for extended periods. Furthermore, by selecting a target temperature suitable for the current load variation pattern from at least two temperatures of the processor core for frequency adjustment by the frequency controller, the adjusted frequency of the processor core better matches the current load variation characteristics of the processor core. This approach considers not only the various temperatures of the processor core but also the load applied to the processor core, thereby improving the timeliness of frequency adjustment.

[0066] The frequency control method in this application is described below with a specific embodiment.

[0067] Figure 3 This document provides an exemplary flowchart of a frequency control method according to an embodiment of this application. Figure 3 As shown, this method is applicable to frequency controllers, such as... Figure 1 The frequency controller 14 is shown. Figure 3 An example is given of a primary frequency control process of a frequency controller, such as... Figure 3 As shown, the method includes: Step 301: The frequency controller obtains the temperature of the processor core at the first moment.

[0068] In this embodiment, the frequency controller can obtain the temperature of the processor core at the first moment in a variety of ways. Two optional implementation methods are described below.

[0069] In one alternative implementation, such as Figure 1As shown, each processor core may also be equipped with a temperature sensor, such as a temperature sensor, which is connected to the frequency controller via a communication line. The temperature sensor can sample the temperature of the processor core at a first preset period and send the sampled temperature to the frequency controller through the communication line between the temperature sensor and the frequency controller. The first preset period can be set by those skilled in the art based on experience. For example, to improve the accuracy of the sampled temperature, the first preset period can be set to 100µm, so that the temperature sensor can sample the temperature of the processor core every 100µm and send it to the frequency controller. In this case, the temperature of the processor core at the first moment can be: The temperature sampled by the temperature sensor at the first moment; or, The temperature sampled by the temperature sensor at the most recent sampling time before the first moment; or, The average temperature sampled by the temperature sensor at the first time point and / or multiple sampling times prior to the first time point; or, The weighted average of the temperatures sampled by the temperature sensor at the first moment and / or at multiple sampling moments prior to the first moment.

[0070] An example is provided regarding the "weighted average of temperatures sampled at multiple sampling times": When the frequency controller executes the frequency control method of this embodiment according to the second set period, if the second set period is 1ms and the first set period is 100um, the frequency controller can receive 10 sampled temperatures sent by the temperature sensor within each second set period. In this case, the frequency controller can calculate the weighted average of these 10 sampled temperatures according to the pre-set weights of the 10 sampled temperatures, and use this weighted average as the temperature at the first moment. The sum of the weights of these 10 sampled temperatures is 1, and the weights of these 10 sampled temperatures increase sequentially according to the order of sampling time.

[0071] Using this implementation method, the frequency controller can directly obtain the temperature at the first moment through measurement. Although this method requires setting a temperature sensor in the processor core, the measured temperature is more accurate, which helps to improve the accuracy of frequency regulation.

[0072] In another alternative implementation, such as Figure 1As shown, each processor core can also be equipped with a power sensor, which is connected to the frequency controller via a communication line. The power sensor can sample the number of toggles of each signal in the processor core according to a third preset cycle. Then, based on the number of toggles of each signal and the power consumption corresponding to one toggle, it determines the power consumption of each signal within a third preset cycle. The total power consumption of the processor core within a third preset cycle is calculated based on the power consumption of each signal within that cycle, and then sent to the frequency controller via the communication line between the power sensor and the frequency controller. In this case, the frequency controller can determine the temperature corresponding to the total power consumption based on a preset correlation between power consumption and temperature, and use this temperature as the temperature of the processor core at the first moment. Using this implementation method, the frequency controller can obtain the temperature at the first moment through indirect calculation. Although the indirect calculation method is not as accurate as the measurement method, this method eliminates the need to install a temperature sensor in the processor core, helping to save processor core space and design costs. It is understandable that "indirectly obtaining the temperature at the first moment through a power consumption sensor" is only one optional implementation method. In other optional implementation methods, the frequency controller can also obtain the temperature at the first moment through other indirect means, such as predicting the temperature at the first moment through the temperatures of various historical moments before the first moment, etc., which will not be discussed in detail here.

[0073] Step 302: The frequency regulator predicts the processor core's temperature at a second time based on the processor core's temperature at the first time. The second time can be any time after the first time, such as 1 ms later.

[0074] In this embodiment, the frequency controller can predict the temperature of the processor core at a second moment in a variety of ways. Two optional implementation methods are described below.

[0075] In one optional implementation, when a temperature sensor is installed in the processor core, the frequency controller can first fit a temperature prediction model based on the processor core's temperature at a first moment and the temperature of the processor core at at least one historical moment prior to the first moment. Then, the temperature prediction model is used to predict the processor core's temperature at a second moment. Specifically, when fitting the temperature prediction model, the initial model can be any one of a linear model, a quadratic polynomial model, a cubic polynomial model, or a B-spline model. By substituting the first moment, the temperature at the first moment, each historical moment prior to the first moment, and the temperature at each historical moment into the initial model, unknown model parameters can be calculated. Substituting these unknown model parameters into the initial model yields the temperature prediction model.

[0076] In another alternative implementation, when a power sensor is provided in the processor core, the frequency controller can first determine the power consumption of the processor core at the first moment based on the switching frequency and number of switching times of each component in the processor core sent by the power sensor, and then calculate the temperature of the processor core at the second moment according to the following formula (1.1) based on the power consumption of the processor core at the first moment and the temperature of the processor core at the first moment: T2= AT1 + BP1………….(1.1) Where T2 is the temperature of the processor core at the second moment, T1 is the temperature of the processor core at the first moment, and P1 is the power consumption of the processor core at the first moment. The coefficients A and B in formula (1.1) are constant values. The values ​​of coefficients A and B can be calculated based on experiments. The more experiments conducted, the more accurate the values ​​of coefficients A and B will be.

[0077] In this implementation, the processor core takes into account both the current temperature and the current power consumption when predicting future temperatures. Since the current power consumption reflects the load on the processor core, the future temperature determined in this way is more consistent with the current load characteristics of the processor core compared to a solution that only uses temperature to predict future temperatures.

[0078] In this embodiment, "setting a temperature sensor or power sensor in each processor core" is only one optional implementation. In other optional implementations, a shared temperature sensor or a shared power sensor can also be set in two or more processor cores. In this case, since the temperature value sampled by the temperature sensor may be the temperature value of a point in two or more processor cores, the frequency controller can subsequently compensate for the temperature sampled by the temperature sensor according to a certain strategy to obtain the temperature of each processor core. Alternatively, since the power consumption value sampled by the power consumption sensor is the total power consumption of two or more processor cores, the frequency controller can subsequently allocate the power consumption sampled by the power consumption sensor according to a certain ratio to obtain the power consumption of each processor core. The specific strategy or ratio used can be set by those skilled in the art based on experience, and will not be described here.

[0079] Step 303: The frequency controller determines the load change pattern of the processor core at the first moment based on the load of the processor core at the first moment. If the load change pattern corresponding to the first moment is the load increase mode, then proceed to step 304; If the load change pattern corresponding to the first moment is the load decrease mode, then proceed to step 305; If the load change mode corresponding to the first moment is the load constant mode, then proceed to step 306.

[0080] In an alternative implementation, the load of the processor core at any given time can be determined based on the processor core's power consumption, frequency, and voltage at that time. Taking the determination of the load at time i as an example, the processor core can also be equipped with a voltage sampler, which can sample the voltage of the processor core at any given time. In this case, the frequency controller can obtain the voltage of the processor core at time i through the voltage sampler, obtain the power consumption of the processor core at time i through the power sensor, and obtain the frequency of the processor core at time i through the frequency regulator. Then, the load of the processor core at time i can be calculated according to the following formula (1.2): A i =P i / (f i V i 2 (1.2) Among them, A i P represents the load on the processor core at time i. i f is the power consumption of the processor core at time i. i V is the frequency of the processor core at time i. i Let be the voltage of the processor core at time i.

[0081] In this embodiment of the application, the frequency controller can determine the load change mode of the processor core at the first moment in a variety of ways. Two optional implementation methods are described below.

[0082] In one alternative implementation, the frequency controller can determine the load change pattern of the processor at the first moment based on the processor's load at the first moment and the processor's load at historical moments prior to the first moment. Specifically, the frequency controller can first calculate the processor core's load A1 at the first moment (A1=P1 / (f1)) according to the formula (1.2) above. V1 2 The load A0 of the processor core at a historical moment prior to the first moment (A0 = P0 / (f0)) and the load A0 of the processor core at a historical moment prior to the first moment (A0 = P0 / (f0)) V0 2 Then, based on the preset load change rate (assumed to be x, where x is a real number greater than 0 and not greater than 1) and the processor core load A0 at historical moments, the first load change range [(1-x)] is determined. A0, (1+x) A0]. In this case: If the processor core's load at the first moment is within the first load variation range (i.e., (1-x)). A0≤A1≤(1+x) If A0), then the load on the processor core at the first moment is not significantly different from the load at previous moments. Therefore, it can be determined that the load change pattern of the processor core at the first moment is a constant load pattern; or, If the load on the processor core at the first moment is less than the minimum load within the first load variation range (i.e., A1 ≥ (1-x)). If A0), then the load on the processor core at the first moment is significantly less than the load on the processor core at historical moments. Therefore, it can be determined that the load change pattern of the processor core at the first moment is the load decrease mode. If the processor core's load at the first moment is greater than the maximum load within the first load variation range (i.e., A1 ≤ (1+x)). If A0), then the load on the processor core at the first moment is significantly greater than the load on the processor core at historical moments. Therefore, it can be determined that the load change pattern of the processor core at the first moment is the load increase mode.

[0083] For example, in order to ensure that the first load variation range can accurately reflect the difference between the processor core's load at a given moment and its load at historical moments, the load variation rate can be set to a real number slightly greater than 0, such as 0.1.

[0084] In another alternative implementation, the frequency controller can also determine the load change pattern of the processor at the first moment based on the processor's load at the first moment and the predicted load of the processor at a future moment (e.g., the second moment) after the first moment. Specifically, the frequency controller can first calculate the load A1 of the processor core at the first moment (A1=P1 / (f1)) according to the formula (1.2) above. V1 2 The load A0 of the processor core at a historical time before the first time is used to fit a load prediction model. The load prediction model is then used to predict the load of the processor core at a future time (assumed to be A3). Then, based on the preset load change rate x and the load A1 of the processor core at the first time, the second load change range [(1-x)] is determined. A1, (1+x) A1]. In this case: If the processor core's load at a future time is within the second load variation range (i.e., (1-x)). A1≤A3≤(1+x) A1), then the difference between the processor core's load at future moments and its load at the first moment is not significant, therefore it can be determined that the load change pattern of the processor core at the first moment is a constant load pattern; or, If the processor core load at a future time is less than the minimum load within the second load variation range (i.e., A3 ≥ (1-x)). A1), then the load on the processor core in the future will be significantly less than the load on the processor core in the first moment. Therefore, it can be determined that the load change pattern of the processor core in the first moment is the load decrease mode. If the processor core load at a future time exceeds the maximum load within the second load variation range (i.e., A3 ≤ (1+x)). If A1), then the load on the processor core in the future is significantly greater than the load on the processor core in the first moment. Therefore, it can be determined that the load change pattern of the processor core in the first moment is the load increase mode.

[0085] Step 304: The frequency controller sends a first frequency control command to the frequency regulator of the processor core. The first frequency control command is used by the frequency regulator of the processor core to adjust the frequency of the processor core to the frequency corresponding to the temperature at the first moment.

[0086] For ease of understanding, in the following description, we will refer to the first moment as the current moment and the second moment as the future moment. That is, "current moment" can be replaced with "first moment" and "future moment" can be replaced with "second moment".

[0087] In step 304 above, when the load is increasing at the current moment, although the load at future moments corresponds to higher temperatures (e.g., reaching the limit temperature requiring frequency reduction), the current temperature has not actually reached the future temperature. Therefore, there is no need to perform frequency reduction. In this case, by adjusting the processor core frequency using the frequency corresponding to the current temperature, the thermal margin of the processor core can be fully utilized, which helps to maximize the processing performance of the processor core while keeping the processor core temperature under control.

[0088] Step 305: The frequency controller sends a second frequency control command to the frequency regulator of the processor core. The second frequency control command is used by the frequency regulator of the processor core to adjust the frequency of the processor core to the frequency corresponding to the temperature at the second moment.

[0089] In step 305 above, when the load is decreasing at the current moment, although the current load corresponds to a higher temperature, the load at a future moment corresponds to a lower temperature (e.g., reaching the limit temperature that requires a frequency increase). In this case, using the temperature at a future moment to increase the frequency of the processor core in advance helps to improve the processing performance of the processor core as quickly as possible.

[0090] The frequency control method in steps 304 and 305 is illustrated below with a specific example.

[0091] Figure 4A An example is shown: a load variation curve of the processor core during the time period [0.35s, 0.38s]. Figure 4B An example is shown: a temperature change curve of the processor core over a time period [0.35s, 0.38s]. Figure 4C An example is shown: a frequency variation curve of the processor core within the time period [0.35s, 0.38s]. Wherein, Figure 4B The solid line in the graph represents the temperature change based on the temperature 2ms later, adjusted for frequency variation. Figure 4B The dashed line in the image represents the temperature change line based on the current temperature for frequency adjustment. Figure 4C The solid line in the graph represents the frequency change based on the temperature after 2ms. Figure 4C The dashed line in the diagram represents the frequency change line based on the current temperature. In this example, assume the temperature range is [98.8℃, 100℃]. There is a correlation between the processor core's temperature and frequency. When the processor core temperature is below 98.8℃, it indicates that the current temperature of the processor core is low, and there is still some thermal margin in the processor core. In this case, the processor core frequency can be increased to fully utilize the thermal margin and improve the processor core's processing performance. Therefore, 98.8℃ can be considered the limit temperature at which the processor core needs to be increased in frequency. When the processor core temperature is above 100℃, it indicates that the processor core frequency is too high, causing the processor core to be in a high-voltage, high-frequency state for a long time. In this case, the processor core frequency needs to be reduced to improve the processor core's lifespan and availability. Therefore, 100℃ can be considered the limit temperature at which the processor core needs to be reduced in frequency. (Refer to...) Figures 4A to 4C It can be known that: Around 0.35s to 0.355s, the processor core load increases. In this situation, if frequency adjustment is based on the predicted temperature 2ms later, the frequency controller will predict that the processor core temperature will rise to the limit temperature of 100°C, which requires frequency reduction, as the load increases. This will cause the frequency controller to control the processor core to reduce its frequency first (see reference). Figure 4C (Solid line illustration at point A). However, at this point, the processor core temperature has not actually reached the critical temperature of 100°C required for frequency reduction. Adjusting the frequency based on the predicted temperature 2ms later constitutes over-adjustment. Therefore, in step 304, when the load increases, adjusting the frequency using the current temperature can delay the processor core's frequency reduction operation as much as possible before the processor core reaches the critical temperature required for frequency reduction (see...). Figure 4C (The dotted line at point A in the diagram) aims to maximize the processing performance of the processor core while making full use of thermal margin.

[0092] Around 0.37s to 0.375s, the processor core load begins to decrease. In this situation, if frequency adjustment is based on the predicted temperature 2ms later, the frequency controller will predict that the processor core temperature will drop to the critical temperature of 98.8℃ required for frequency increase as the load decreases. This will cause the frequency controller to control the processor core to increase its frequency first (see reference). Figure 4C (Solid line at point B in the diagram). Therefore, in step 305, when the load decreases, frequency adjustment is performed by using predicted temperature. This allows for timely frequency increase when the processor core temperature is about to drop to the limit temperature requiring a frequency increase. This not only improves the processing performance of the processor core but also helps the processor core frequency to change more promptly with load variations.

[0093] Step 306: The frequency controller determines the frequency corresponding to the temperature of the processor core at the first moment and the frequency corresponding to the temperature of the processor core at the second moment.

[0094] In one optional implementation, the frequency controller can determine the frequency at the current moment and the frequency at a future moment using PID control. When determining the frequency at the current moment using PID control, the temperature change at the current moment can be determined first based on the current temperature and the temperature at the most recent historical moment. Then, the current temperature and the temperature change are substituted into the corresponding relationship in the PID control formula to calculate the frequency at the current moment. Similarly, when determining the frequency at a future moment using PID control, the temperature change at the future moment can be determined first based on the predicted future temperature and the previously predicted temperature at the current moment. Then, the future temperature and the temperature change are substituted into the corresponding relationship in the PID control formula to calculate the frequency at the future moment.

[0095] The specific implementation process of the PID control method can be referred to in step 204, which will not be repeated here.

[0096] Step 307: The frequency controller determines whether the frequency corresponding to the temperature at the first moment is greater than the frequency corresponding to the temperature of the processor core at the second moment. If yes, then proceed to step 304; otherwise, proceed to step 305.

[0097] In this embodiment, when the processor core load changes little, the processor core is actually in a stable state. In this case, whether the processor core frequency is adjusted according to its current temperature or its future temperature, the adjusted processor core temperature will not exceed the temperature control limit. Therefore, in this embodiment, by adjusting the processor core frequency to the higher of the frequency corresponding to the future temperature and the frequency corresponding to the current temperature, the processor core can operate at a higher frequency without exceeding the temperature control limit, thereby maximizing the processor core's processing power and fully utilizing the thermal margin.

[0098] The frequency control method in step 307 is illustrated below with a specific example.

[0099] Figure 5A An example is shown: a load variation curve of the processor core during the time period [0.4s, 0.58s]. Figure 5B An example is shown: a temperature change curve of the processor core within the time period [0.4s, 0.58s]. Figure 5C An example is shown: a frequency variation curve of the processor core within the time period [0.4s, 0.58s]. Wherein, Figure 5B The solid line in the graph represents the temperature change based on the temperature 2ms later, adjusted for frequency variation. Figure 5B The dashed line in the image represents the temperature change line based on the current temperature for frequency adjustment. Figure 5C The solid line in the graph represents the frequency change based on the temperature after 2ms. Figure 5C The dashed line in the diagram represents the frequency change line based on the current temperature. In this example, assuming the temperature range is [98.8℃, 100℃], where 98.8℃ is the limit temperature at which the processor core needs to be overclocked, and 100℃ is the limit temperature at which the processor core needs to be underclocked, then refer to... Figures 5A to 5C It can be known that: During the 0.4s~0.5s and 0.5s~0.58s time periods, the processor core load remains constant. In this case, although frequency adjustment based on the predicted temperature 2ms later and frequency adjustment based on the current temperature can both keep the processor core temperature within the temperature range of [98.8℃, 100℃], the processor core frequency will differ depending on the temperature used for frequency adjustment. Within the 0.4s to 0.5s time period, adjusting the frequency based on the predicted temperature 2ms later allows the processor core to run at a higher frequency than adjusting the frequency based on the current temperature. Therefore, within the 0.4s to 0.5s time period, the processor core frequency can be adjusted according to the predicted temperature 2ms later. Within the 0.5s to 0.58s time period, adjusting the frequency based on the current temperature allows the processor core to run at a higher frequency than adjusting the frequency based on the predicted temperature 2ms later. Therefore, within the 0.5s to 0.58s time period, the processor core frequency can be adjusted according to the current temperature.

[0100] According to the aforementioned method, Figure 6 This is a schematic diagram of the structure of the frequency controller 600 provided in this embodiment of the application. The frequency controller 600 can be a chip or a circuit, such as a chip or circuit that can be disposed in a processor. The frequency controller 600 can correspond to the frequency controller 104 in the above method. The frequency controller 600 can achieve the above. Figure 2 and Figure 3 The steps of the method corresponding to any one or more of the items shown. Figure 6 As shown, the frequency controller 600 may include a monitoring circuit 601 and a processing circuit 602. Furthermore, the frequency controller 600 may also include a bus system, through which the monitoring circuit 601 and the processing circuit 602 can be connected. Moreover, the monitoring circuit 601 may also be connected via the bus system to a temperature sensor and / or power sensor for each processor core, and the processing circuit 602 may also be connected via the bus system to a frequency regulator for each processor core.

[0101] In this embodiment, the monitoring circuit 601 can acquire at least two temperatures of each processor core via a temperature sensor and / or a power consumption sensor and send them to the processing circuit 602. Correspondingly, the processing circuit 602 can first determine the load change pattern of each processor core using the power consumption sensor, then determine a target temperature from the at least two temperatures of that processor core based on the load change pattern, and adjust the frequency of that processor core according to the target temperature. Each of the at least two temperatures can correspond to a frequency, and the load change pattern of each processor core can be used to indicate changes in the load on that processor core.

[0102] For the concepts, explanations, detailed descriptions, and other steps related to the technical solutions provided in the embodiments of this application involving the frequency controller 600, please refer to the descriptions of these contents in the foregoing methods or other embodiments, which will not be repeated here.

[0103] According to the aforementioned method, Figure 7 This is a schematic diagram of another frequency controller 700 provided in an embodiment of this application. The frequency controller 700 can be a chip or circuit, such as a chip or circuit that can be disposed in a processor. This frequency controller 700 can correspond to the frequency controller 104 in the above-described method. This frequency controller 700 can achieve the above-described functionality. Figure 2 and Figure 3The steps of the method corresponding to any one or more of the items shown. Figure 7 As shown, the frequency controller 700 may include an acquisition unit 701, a determination unit 702, and an adjustment unit 703.

[0104] In this embodiment, the acquisition unit 701 can be a receiving unit or a receiver when receiving information, and this receiving unit or receiver can be a radio frequency circuit. Specifically, the acquisition unit 701 can acquire at least two temperatures for each processor core, the determination unit 702 can first determine the load change pattern of the processor core, and then determine the target temperature from the at least two temperatures of the processor core based on the load change pattern, and the adjustment unit 703 can adjust the frequency of the processor core according to the target temperature. Each of the at least two temperatures can correspond to a frequency, and the load change pattern of each processor core can be used to indicate the change in the access load of the processor core.

[0105] For the concepts, explanations, detailed descriptions, and other steps related to the technical solutions provided in the embodiments of this application involving the frequency controller 700, please refer to the descriptions of these contents in the foregoing methods or other embodiments, which will not be repeated here.

[0106] It is understood that the functions of each unit in the frequency controller 700 described above can be referred to the implementation of the corresponding method embodiments, and will not be repeated here.

[0107] It should be understood that the division of the frequency controller 700 units described above is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. In this embodiment, the acquisition unit 701 can be derived from the above-described... Figure 6 The monitoring circuit 601 is implemented, and the determining unit 702 and the adjusting unit 703 can be implemented by the above. Figure 6 The control circuit 602 is used to implement this.

[0108] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute... Figure 1 The method of any one of the embodiments shown in Figure 5.

[0109] According to the method provided in the embodiments of this application, this application also provides a computer-readable storage medium storing program code, which, when run on a computer, causes the computer to perform... Figure 1 The method of any one of the embodiments shown in Figure 5.

[0110] The terms “component,” “module,” “system,” etc., used in this specification are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0111] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.

[0112] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0113] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0114] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0115] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0116] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0117] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A frequency control method, characterized in that, The method includes: Obtain at least two temperatures of the processor cores in a multi-core processor, each of the at least two temperatures corresponding to a frequency; Determine the load change pattern of the processor core; the load change pattern is used to indicate the changes in the access load of the processor core; The target temperature is determined from the at least two temperatures based on the load change pattern; The frequency of the processor core is adjusted according to the target temperature.

2. The method as described in claim 1, characterized in that, The acquisition of at least two temperatures of the processor core includes: Obtain the temperature of the processor core at the first moment; Based on the temperature of the processor core at the first moment, the temperature of the processor core at the second moment is predicted; the second moment is after the first moment.

3. The method as described in claim 2, characterized in that, Determining the target temperature from the at least two temperatures based on the load change pattern includes: When the load change mode of the processor core is the load constant mode, the temperature corresponding to the highest frequency between the temperature at the first moment and the temperature at the second moment is taken as the target temperature. When the load change mode of the processor core is the load increase mode, the temperature at the first moment is taken as the target temperature. When the load change mode of the processor core is the load decrease mode, the temperature at the second moment is taken as the target temperature.

4. The method as described in claim 3, characterized in that, The load change pattern of the processor core is obtained in the following way: The first load variation range is determined based on the load of the processor core at historical moments before the first moment and a preset load variation amount; When the load of the processor core at the first moment is within the first load change range, the load change mode of the processor core is the load constant mode. When the load of the processor core at the first moment is greater than the maximum load in the first load change range, the load change pattern of the processor core is the load increase mode. When the load on the processor core at the first moment is less than the minimum load in the first load change range, the load change mode of the processor core is the load decrease mode.

5. The method as described in claim 3, characterized in that, The load change pattern of the processor core is obtained in the following way: The second load variation range is determined based on the load of the processor core at the first moment and the preset load variation amount; Based on the load of the processor core at the first moment and the load of the processor core at historical moments before the first moment, predict the load of the processor core at the second moment; When the load of the processor core at the second moment is within the second load change range, the load change mode of the processor core is the load constant mode; When the load of the processor core at the second moment is greater than the maximum load in the second load change range, the load change pattern of the processor core is the load increase mode. When the load on the processor core at the second moment is less than the minimum load within the second load change range, the load change pattern of the processor core is the load decrease mode.

6. The method according to any one of claims 2 to 5, characterized in that, The step of predicting the temperature of the processor core at a second time based on the temperature of the processor core at the first time includes: Based on the processor core's temperature and power consumption at the first moment, predict the processor core's temperature at the second moment; or, The temperature of the processor core at the second moment is predicted based on the temperature of the processor core at the first moment and the historical temperatures of the processor core before the first moment.

7. A processor, characterized in that, Includes multiple processor cores, frequency regulators, and frequency controllers; The frequency controller is configured to acquire at least one first temperature of a processor core among a plurality of processor cores, determine at least one second temperature of the processor core based on the at least one first temperature, each of the at least one first temperature and the at least one second temperature corresponding to a frequency; and determine a load change pattern of the processor core, determine a target temperature from the at least one first temperature and the at least one second temperature based on the load change pattern of the processor core, and send the frequency corresponding to the target temperature to the frequency regulator; wherein the load change pattern is used to indicate the change in the access load of the processor core; The frequency regulator is used to adjust the frequency of the processor core to the frequency corresponding to the target temperature.

8. The processor as described in claim 7, characterized in that, The processor also includes a temperature sensor, which is used for: The first temperature of the processor core at a given moment is obtained and sent to the frequency controller. The frequency controller is specifically used to: predict the second temperature of the processor core at a second time based on the first temperature of the processor core at the first time; the second time is after the first time.

9. The processor as described in claim 8, characterized in that, The frequency controller is specifically used for: When the load change mode of the processor core is the load constant mode, the temperature corresponding to the highest frequency between the first temperature at the first moment and the second temperature at the second moment is taken as the target temperature. When the load change mode of the processor core is the load increase mode, the first temperature at the first moment is taken as the target temperature. When the load change mode of the processor core is the load decrease mode, the second temperature at the second moment is taken as the target temperature.

10. The processor as claimed in claim 9, characterized in that, The frequency controller is also used for: The first load variation range is determined based on the load of the processor core at historical moments before the first moment and a preset load variation amount; If the load of the processor core at the first moment is within the first load change range, then the load change mode of the processor core is determined to be the load constant mode. If the load of the processor core at the first moment is greater than the maximum load in the first load change range, then the load change mode of the processor core is determined to be the load increase mode. If the load on the processor core at the first moment is less than the minimum load within the first load change range, then the load change mode of the processor core is determined to be the load decrease mode.

11. The processor as claimed in claim 9, characterized in that, The frequency controller is also used for: The second load variation range is determined based on the load of the processor core at the first moment and the preset load variation amount; Based on the load of the processor core at the first moment and the load of the processor core at historical moments before the first moment, predict the load of the processor core at the second moment; When the load of the processor core at the second moment is within the second load change range, the load change mode of the processor core is determined to be the load constant mode; When the load of the processor core at the second moment is greater than the maximum load in the second load change range, the load change mode of the processor core is determined to be the load increase mode. If the load on the processor core at the second moment is less than the minimum load within the second load change range, then the load change mode of the processor core is determined to be the load decrease mode.

12. The processor as claimed in claim 10 or 11, characterized in that, The processor also includes a power sensor, which is connected to the processor core; The power sensor is used to acquire the power consumption of the processor core at historical times before the first time and the power consumption of the processor core at the first time, and to send the power consumption at historical times and the power consumption at the first time to the frequency controller. The temperature sensor is also used to acquire the temperature of the processor core at a historical time before the first moment and send it to the frequency controller; The frequency controller is further configured to: determine the load of the processor core at the historical time based on the power consumption and temperature of the processor core at the historical time, and determine the load of the processor core at the first time based on the power consumption and temperature of the processor core at the first time.

13. The processor as claimed in any one of claims 8 to 12, characterized in that, The frequency controller is specifically used for: Based on the first temperature of the processor core at the first moment and the power consumption of the processor core at the first moment, predict the second temperature of the processor core at the second moment; or, Based on the first temperature of the processor core at the first moment and the historical temperatures of the processor core before the first moment, the second temperature of the processor core at the second moment is predicted.

14. An electronic device, characterized in that, Includes the processor as described in any one of claims 7 to 13.

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