ReRAM storage and computing integrated hidden path interference detection and calculation accuracy calibration method

Abstract

This invention discloses a method for detecting and calibrating the accuracy of stealth path interference in ReRAM-based in-memory computing, comprising the following steps: constructing a parameter optimization engine based on a genetic algorithm or grid search to dynamically generate an optimal threshold group for the current noise level of the ReRAM chip; reading the conductance or resistance values ​​of each memory cell in the ReRAM cross-array, setting a judgment threshold, and dividing all cells into low-resistance and high-resistance groups; performing a global primary screening for interference based on an "adaptive optimization threshold"; performing local fine-tuning detection based on standardized anomaly scores; performing a final judgment and spectrum generation based on a quantity threshold; and establishing a weighted optimization deployment that establishes a physical-application mapping relationship. This invention can accurately identify stealth path interference in high-noise environments for in-memory computing.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit and artificial intelligence hardware acceleration technology, and in particular to a ReRAM-in-memory computing method for detecting stealth path interference and calibrating computational accuracy. Background Technology

[0002] The rapid development of Artificial Intelligence (AI) has led to an exponential increase in the demand for hardware computing power for deep neural network algorithms such as Large Language Models (LLMs). Traditional von Neumann architectures, due to the separation of storage and computation, face a severe "memory wall" energy efficiency bottleneck. In-memory computing technology based on ReRAM cross-arrays utilizes Kirchhoff's laws and Ohm's law to directly perform simulated vector-matrix multiplication (VMM) within the array, eliminating the power consumption of transporting massive amounts of weighted data. This is a key technology for achieving next-generation efficient AI computing.

[0003] However, ReRAM cross-connect arrays suffer from creep path interference when performing simulated VMM calculations: 1. Complex interference mechanism: In a selectorless (1R) architecture, the creep path originates from the leakage current of the half-selected cell; in a selector-enabled (1S1R / 1T1R) architecture, it originates from selector failure; both creep paths form parallel parasitic loops, causing unexpected interference components to be mixed into the read or compute current; 2. Impaired simulation calculation accuracy: In in-memory computing mode, multiple word lines are turned on simultaneously, and the parasitic current generated by the creep path will be superimposed on the compute current of the bit lines, causing nonlinear shifts in the VMM calculation results; this shift propagates layer by layer in the multi-layer neural network, leading to a significant decrease in the final inference accuracy; 3. Limitations of existing detection methods: Traditional memory testing methods are usually based on fixed voltage / resistance thresholds for 0 / 1 logic judgments. However, when in-memory computing chips are working, they are accompanied by severe device thermal noise, random telegraph noise (RTN), and IR drop. The fixed threshold method cannot distinguish between "normal fluctuations in computing current" and "abnormal interference in the creeping path", resulting in an extremely high false alarm rate in high-noise environments, and thus cannot provide accurate hardware status information for upper-layer computing scheduling. Summary of the Invention

[0004] Purpose of the invention: The purpose of this invention is to provide a ReRAM in-memory computing method for detecting and calibrating the accuracy of crawling path interference in high-noise environments.

[0005] Technical solution: The ReRAM in-memory computing integrated stealth path interference detection and calculation accuracy calibration method of the present invention is characterized by comprising the following steps:

[0006] (1) Construct a parameter optimization engine based on genetic algorithm or grid search to dynamically generate the optimal threshold set for the current noise level of the ReRAM chip;

[0007] (2) Read the conductance or resistance value of each memory cell in the ReRAM cross array; set the judgment threshold and divide all cells into low resistance group and high resistance group;

[0008] (3) Global primary interference screening based on "adaptive optimization threshold";

[0009] (4) Local fine-grained detection based on standardized outlier scores;

[0010] (5) Final determination and map generation based on quantity threshold; the total number of units in the statistical array whose anomaly score exceeds the adaptive anomaly threshold;

[0011] (6) Establish weighted optimization deployment of physical-application mapping relationship.

[0012] Further, in step (1), the dynamic generation of the optimal threshold set is as follows:

[0013] In the offline phase, a ReRAM array simulation model with noise injection is used to iteratively optimize within the parameter space and establish a mapping relationship between different noise levels and the optimal parameter combination.

[0014] During the online phase, the corresponding optimal parameter set is directly retrieved from the table based on the measured noise level.

[0015] Further, in step (3), the global interference primary screening based on the "adaptive optimization threshold" is to calculate the global resistance mean of the low resistance group and compare it with the global classification threshold under the current noise environment.

[0016] Furthermore, the global classification threshold is an adaptive parameter pre-optimized based on the current chip's noise level using a genetic algorithm or grid search.

[0017] Furthermore, the comparison between the average global resistance in the low-resistance state and the global classification threshold under the current noise environment includes:

[0018] The comparison criteria are as follows: In an ideal, interference-free environment, the low-resistivity group contains only true low-resistivity cells with a low mean. When there is severe creeping path interference, the resistance of the high-resistivity cells affected by the interference decreases and is incorrectly classified into the low-resistivity group. The resistance of the cells in the "pseudo-low-resistivity group" is usually higher than that of the cells in the true low-resistivity group, and their inclusion will significantly increase the statistical mean of the entire low-resistivity group.

[0019] The comparison operation is as follows: (a) Severe interference: If the global resistance average is significantly higher than the global classification threshold, or if the readout circuit detects current saturation, it is directly determined that the ReRAM cross array has "global severe creeping path interference". At this time, it is directly marked as "unavailable" and the subsequent detection process of the block is terminated; (b) Weak / no interference: If the global resistance average does not exceed the threshold, proceed to the next step and perform fine positioning.

[0020] Furthermore, the local fine detection based on standardized anomaly scores in step (4) includes statistical modeling of the low-resistivity group that has passed the initial screening of global interference and calculating the standard deviation of the resistance within the group.

[0021] Furthermore, the formula for calculating the standard deviation of resistance is:

[0022]

[0023] in, This represents the total number of units within the low-resistivity group. This represents the resistance value of the k-th memory cell within the group.

[0024] For each memory cell i, its resistance value relative to local mean Standardized outlier score The calculation formula is:

[0025] .

[0026] Furthermore, in step (5), the method for determining the quantity threshold is as follows:

[0027] If the total number of cells with anomaly scores exceeding the adaptive anomaly threshold is greater than or equal to the minimum anomaly number threshold, it is determined that there is local creeping path interference in the ReRAM cross array; the validity of the anomalies is confirmed, a creeping path interference distribution map is generated, and the location of the anomaly cells is marked for use in the next step.

[0028] If the total number of cells with anomaly scores exceeding the adaptive anomaly threshold is less than the minimum number of anomaly points threshold, the ReRAM cross-array is determined to be "free from creeping path interference". In this case, a creeping path interference distribution map is not generated or it is treated as a fully clean ReRAM cross-array.

[0029] Furthermore, in step (6), the weight optimization deployment of the physical-application mapping relationship is based on the determination of the distribution map of the existing stealth path interference, establishing a "reliability-importance matching" mechanism between the physical layer device status and the application layer calculation data, and adjusting the mapping table between the logical address and the physical address or redeploying the weight data accordingly.

[0030] Further, in step (6), the weight optimization deployment of the physical-application mapping relationship includes:

[0031] Importance ranking: Divide the weights of the neural network into critical weights and non-critical weights;

[0032] Preferred Mapping: Force the application layer key weights to be mapped to "clean cells" in the creep path interference distribution map whose standardized anomaly scores are lower than the first safety threshold;

[0033] Fault-tolerant mapping: Mapping non-critical weights at the application layer to the low-reliability range at the physical layer;

[0034] Logical pruning: Physical units with extremely high outlier scores are standardized, and their corresponding logical weights are reset to preset values ​​during mapping, thus physically cutting off the source of interference.

[0035] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: 1. The key parameter set dynamically optimized for different noise levels effectively solves the problem of high false alarm rate in high-noise environments and has high robustness in noise adaptation; 2. The establishment of a "physical state-application requirement" mapping mechanism ensures that the key calculation tasks are undertaken by the most reliable device in the array. This type of calibration strategy based on physical channel awareness can effectively avoid nonlinear distortion caused by stealth paths and suppress the calculation error of simulated VMM operation; 3. The global mean is used to quickly identify and remove severely damaged ReRAM cross arrays, avoiding subsequent point-by-point calculation of normalized anomaly scores for invalid ReRAM cross arrays, reducing the system's detection computing power and time cost. Attached Figure Description

[0036] Figure 1 This is an overall flowchart of the detection and calibration method of the present invention;

[0037] Figure 2 This is a comparison curve of the detection bit error rate (BER) under different noise levels according to the present invention;

[0038] Figure 3 This is a comparison chart of the detection accuracy / precision of the present invention under different noise levels;

[0039] Figure 4 This is a schematic diagram of the in-memory computing weight deployment based on the physical-application mapping relationship of the present invention. Detailed Implementation

[0040] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0041] like Figure 1 As shown, the ReRAM in-memory computing integrated stealth path interference detection and calculation accuracy calibration method of the present invention includes the following steps:

[0042] Step 1: Adaptive parameter loading;

[0043] The system first activates the parameter optimization engine. Based on offline training or online calibration data, the system establishes a lookup table (LUT) mapping noise levels to the optimal set of detection parameters.

[0044] The dynamic generation and optimization process of the optimal parameter set includes:

[0045] (1) Constructing a simulation environment: Construct a simulation model that simulates the electrical characteristics of a real ReRAM cross array, and inject random noise of different intensities (including thermal noise and RTN noise) into the model, the intensity of which is characterized by the standard deviation. At the same time, pre-set the creeping path interference sources at known locations as labels in the model;

[0046] (2) Define the optimization objective: Define the detection bit error rate (BER) of the system as the objective function. BER includes the sum of false positives (misclassifying clean cells as interference) and false negatives (failing to detect real interference). The optimization objective is to find a set of parameters that minimizes the BER under specific noise conditions;

[0047] (3) Iterative optimization: Selecting a global classification threshold Local anomaly threshold and minimum number of anomalies threshold As decision variables, an iterative search is performed in the parameter space using a genetic algorithm or grid search strategy. In each iteration, the current parameter combination is substituted into the simulation model to run the detection process and calculate its corresponding BER. If a genetic algorithm is used, 1 / BER is used as the fitness function, and the population is continuously evolved through selection, crossover, and mutation operations until the algorithm converges.

[0048] (4) Generate a lookup table: Traverse typical noise intervals and record the optimal parameter combination corresponding to each noise level. Finally, a LUT for noise level σ and the optimal parameter set is established and burned into the chip memory.

[0049] Based on the experimental data, as shown in Table 1, the optimal parameter configurations for different noise environments are as follows:

[0050] Table 1 Optimized parameter sets for different noise levels

[0051] Low noise environment ( =20.0): At this time, the channel is relatively clean, and the system call parameter group is: global classification threshold. =107.0Ω, single-point anomaly threshold =3.0, minimum number of outliers =3. With this configuration, the system detects a bit error rate (BER) as low as 4.1 × 10⁻⁶. −5 .

[0052] High-noise environment ( =50.0): When noise increases, to avoid false alarms, the algorithm automatically relaxes the judgment boundary, and the system calls the parameter group: global classification threshold. Increased to 113.0Ω, single-point anomaly threshold Increased to 3.5, minimum number of outliers Keep it at 3.

[0053] Step 2: In-memory array status acquisition and logical grouping;

[0054] Read the conductance or resistance value of each memory cell in the ReRAM cross-connect array. Set the judgment threshold. All elements are divided into low-resistivity state group (LRS, computationally sensitive state) and high-resistivity state group (HRS).

[0055] Step 3: Initial screening for global interference;

[0056] Assuming the current chip is operating in a high-noise mode with σ=50.0, the system automatically loads the corresponding global classification threshold. =113.0Ω was used as the judgment criterion. The system selected the physical ReRAM cross array A (Tile A) to be tested, read the resistance value of its internal low-resistance state (LRS) cell, and calculated the global mean. .

[0057] Determination process: Assume that the measured ReRAM cross array A... =125.0Ω. The system compares the measured value (125.0) with the adaptive threshold (113.0).

[0058] The result of the judgment is: 125.0>113.0, which indicates that a large number of pseudo LRS cells affected by the creep path interference have been mixed into the ReRAM cross array (their resistance is usually higher than that of normal LRS, which causes the average value to be pulled up).

[0059] Operation performed: The system directly determined that ReRAM cross array A has "global severe creeping path interference" and does not meet the physical conditions for high-precision simulation calculations. The system marked ReRAM cross array A as "Unavailable" in the resource management table and terminated the subsequent calculation of normalized anomaly scores for this block.

[0060] Comparative test (ReRAM cross array B):

[0061] Assuming the actual measured ReRAM cross array B =108.0Ω; 108.0<113.0, the overall statistical characteristics of the block are judged to be within the allowable range (although it is higher than 107.0 when the noise is low, it is a normal fluctuation in the environment of σ=50).

[0062] Operation: If the ReRAM cross array B passes the initial screening, the system proceeds to step four for fine-tuning.

[0063] Step 4: Local Fine-grained Detection Based on Standardized Anomaly Scores. The system calculates the standardized anomaly score for each LRS cell within the ReRAM cross-array B. Statistical modeling is performed on the low-resistivity group that passes the initial global interference screening, and the standard deviation of the resistance within the group is calculated. The formula for calculating the standard deviation of resistance is:

[0064] .

[0065] in, This represents the total number of units within the low-resistivity group. This represents the resistance value of the k-th memory cell within the group.

[0066] For each memory cell i, its resistance value relative to local mean Standardized outlier score The calculation formula is:

[0067] .

[0068] The lower the value, the closer the cell is to the ideal LRS state, and the less VMM calculation noise is introduced.

[0069] The higher the value, the more severe the effect of the creep path lowering the resistance of the unit.

[0070] Step 5: Final determination and map generation based on quantity threshold.

[0071] The system counts all abnormal scores that exceed the threshold (i.e.) The number of units greater than 3.5 is denoted as Based on actual measurements, the following two decision branches may occur:

[0072] Branch 1 (Random Noise Filtering): Assuming statistical results =2;

[0073] Judgment: 2<3( The system determined that these two severely interfering units (high Z-value units) belonged to random thermal noise jumps and had not yet reached the scale of constituting creeping path interference.

[0074] Result: ReRAM cross array B was determined to be "without creeping path interference" and no creeping path interference distribution map (SP-Map) was generated. This ReRAM cross array can be regarded as a fully healthy array and deployed with regular weights.

[0075] Branch 2 (Confirming Local Interference): Assuming statistical results are obtained... =8;

[0076] Judgment: 8>3 (Nmin), which meets the minimum number of outliers condition. The system confirms that there is substantial local creeping path interference in the ReRAM cross array.

[0077] Results: The system generated a stealth path interference distribution map (SP-Map), accurately locating these 8 anomalous units. The physical coordinates of >3.5) are determined, and the mapping mechanism in step six is ​​triggered.

[0078] Step Six: Establish weighted deployment based on physical-application mapping relationships. The weighted deployment strategy is as follows: Figure 4 As shown, the left side is the physical layer SP-Map generated based on standardized anomaly scores, which divides storage units into "clean channels" (low Z-value), "suboptimal channels" (medium Z-value), and "severely interfering units" (high Z-value). The right side shows the hierarchical neural network weights.

[0079] To ensure computational accuracy even with 8 bad pixels, the system employs the following mapping strategy based on a bit-slicing mechanism:

[0080] Importance ranking: Each bit of the 8-bit neural network weight is ranked according to its significance. The most significant bit (MSB, such as Bit 7-4) is defined as key data, and the least significant bit (LSB, such as Bit 3-0) is defined as non-key data.

[0081] Strong-Strong Mapping: Scan the SP-Map to map the physical units carrying MSB data to... Minimum (e.g.) In clean areas with a weight of <1.0), the highest-order bit of the weight will be stored in the SLC cell with the most stable physical state.

[0082] Fault-tolerant mapping (Weak-Weak): Allocating physical units carrying LSB data to The suboptimal region is in the middle range.

[0083] Logical pruning: targeting 8 locked critical exception units ( >3.5), the system performs logical avoidance, not writing any valid weights to these addresses (or forcing their logical weights to 0).

[0084] like Figure 2 As shown, in a high-noise environment with σ=50.0, the parameter combination ( =113.0, =3.5, =3) After calibration, the system's minimum total bit error rate was controlled at 0.006183. Compared to the uncalibrated case, this strategy effectively ensured the linearity of VMM computation on noisy, defective arrays, achieving robust operation of the in-memory computing system. Meanwhile, as... Figure 3 As shown, under different noise levels, the detection accuracy and precision of this method are significantly better than the fixed threshold method, verifying the effectiveness of the algorithm on multidimensional indicators.

[0085] This invention can guarantee the accuracy of simulated VMM calculations, has an efficient hierarchical detection strategy, and also has high robustness with noise adaptation.

Claims

1. A ReRAM-based in-memory computing method for detecting stealth path interference and calibrating calculation accuracy, characterized in that, Including the following steps: (1) Construct a parameter optimization engine based on genetic algorithm or grid search to dynamically generate the optimal threshold set for the current noise level of the ReRAM chip; (2) Read the conductance or resistance value of each memory cell in the ReRAM cross array; set the judgment threshold and divide all cells into low resistance group and high resistance group; (3) Global primary interference screening based on "adaptive optimization threshold"; (4) Local fine-grained detection based on standardized outlier scores; (5) Final determination and map generation based on quantity threshold; the total number of units in the statistical array whose anomaly score exceeds the adaptive anomaly threshold; (6) Establish weighted optimization deployment of physical-application mapping relationship.

2. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, In step (1), the dynamic generation of the optimal threshold set is as follows: In the offline phase, a ReRAM array simulation model with noise injection is used to iteratively optimize within the parameter space and establish a mapping relationship between different noise levels and the optimal parameter combination. During the online phase, the corresponding optimal parameter set is directly retrieved from the table based on the measured noise level.

3. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, In step (3), the global interference primary screening based on "adaptive optimization threshold" is to calculate the global resistance mean of the low resistance group and compare it with the global classification threshold under the current noise environment.

4. The method for detecting and calculating the accuracy of stealth path interference according to claim 3, characterized in that, The global classification threshold is an adaptive parameter pre-optimized based on the current chip's noise level using a genetic algorithm or grid search.

5. The method for detecting and calculating the accuracy of stealth path interference according to claim 3, characterized in that, The comparison between the low-resistance global resistance mean and the global classification threshold under the current noise environment includes: The comparison criteria are as follows: In an ideal, interference-free environment, the low-resistivity group contains only true low-resistivity cells with a low mean. However, there is severe creeping path interference, and the resistance of the high-resistivity cells affected by the interference decreases and is incorrectly classified into the low-resistivity group. The resistance of the cells in the "pseudo-low-resistivity group" is usually higher than that of the cells in the true low-resistivity group, and their inclusion will significantly increase the statistical mean of the entire low-resistivity group. The comparison operation is as follows: (a) Severe interference: If the global resistance average is significantly higher than the global classification threshold, or if the readout circuit detects current saturation, it is directly determined that the ReRAM cross array has "global severe creeping path interference". At this time, it is directly marked as "unavailable" and the subsequent detection process of the block is terminated; (b) Weak / no interference: If the global resistance average does not exceed the threshold, proceed to the next step and perform fine positioning.

6. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, Step (4) involves local fine detection based on standardized anomaly scores, which includes statistical modeling of the low-resistivity group that has passed the initial screening of global interference and calculating the standard deviation of the resistance within the group.

7. The method for detecting and calculating the accuracy of stealth path interference according to claim 6, characterized in that, The formula for calculating the standard deviation of resistance is: in, This represents the total number of units within the low-resistivity group. This represents the resistance value of the k-th memory cell within the group. For each memory cell i, its resistance value relative to local mean Standardized outlier score The calculation formula is: 。 8. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, In step (5), the method for determining the quantity threshold is as follows: If the total number of cells with anomaly scores exceeding the adaptive anomaly threshold is greater than or equal to the minimum anomaly number threshold, it is determined that there is local creeping path interference in the ReRAM cross array; the validity of the anomalies is confirmed, a creeping path interference distribution map is generated, and the location of the anomaly cells is marked for use in the next step; If the total number of cells with anomaly scores exceeding the adaptive anomaly threshold is less than the minimum anomaly point threshold, the ReRAM cross-array is determined to be "free from creeping path interference". In this case, a creeping path interference distribution map is not generated or it is treated as a fully clean ReRAM cross-array.

9. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, In step (6), the weight optimization deployment of the physical-application mapping relationship is based on the distribution map of the existing stealth path interference, establishing a "reliability-importance matching" mechanism between the physical layer device status and the application layer calculation data, and adjusting the mapping table between logical address and physical address or redeploying the weight data accordingly.

10. The method for detecting and calculating the accuracy of stealth path interference according to claim 1, characterized in that, In step (6), the weight optimization deployment of the physical-application mapping relationship includes: Importance ranking: Divide the weights of the neural network into critical weights and non-critical weights; Preferred Mapping: Force the application layer key weights to be mapped to "clean cells" in the creep path interference distribution map whose standardized anomaly scores are lower than the first safety threshold; Fault-tolerant mapping: Mapping non-critical weights at the application layer to the low-reliability range at the physical layer; Logical pruning: Physical units with extremely high outlier scores are standardized, and their corresponding logical weights are reset to preset values ​​during mapping, thus physically cutting off the source of interference.

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