Brain-like chip real-time neural feedback synapse weight dynamic adjustment method and system

Abstract

This invention relates to the field of neuromorphic computing technology and provides a method and system for dynamic adjustment of synaptic weights in real-time neurofeedback for neuromorphic chips. The method includes: capturing the pulse signals and timestamps emitted by presynaptic and postsynaptic neurons; calculating the time difference between the presynaptic and postsynaptic pulses; when the absolute value of the time difference is less than a preset time window threshold, querying a pulse timing dependency plasticity rule base based on the sign of the time difference to determine the corresponding synaptic weight adjustment type; generating corresponding voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse; and applying a write voltage pulse to the target memristor synapse according to the voltage pulse parameters to adjust its conductance value in situ in real time, thereby dynamically updating the synaptic weights. This invention solves the problems of poor dynamic environment adaptability, low energy efficiency, and high learning latency caused by traditional offline weight update mechanisms.

Description

Technical Field

[0001] This invention relates to the field of neuromorphic computing technology, specifically to a method and system for dynamic adjustment of synaptic weights in real-time neural feedback for neuromorphic chips. Background Technology

[0002] In the field of neuromorphic computing, neuromorphic chips achieve efficient information processing by simulating the structure and function of biological neural networks, and are widely used in scenarios such as autonomous driving and intelligent sensing. However, the offline weight update mechanism used in traditional neuromorphic computing has significant drawbacks, leading to core problems such as poor adaptability to dynamic environments, low energy efficiency, and high learning latency. The root cause of this problem lies in the inherent limitations of existing neuromorphic hardware architectures:

[0003] Weight update lag: Traditional CMOS synaptic circuits need to pause the computation task to rewrite the global weights, interrupting the continuous inference process of the neural network;

[0004] Energy efficiency bottleneck: Each weight update of SRAM / Flash memory cells requires milliamp-level current to drive, while memristor arrays require repeated verification and calibration due to their conductance drift characteristics, resulting in additional energy consumption exceeding 40%.

[0005] Spatiotemporal dynamic mismatch: Synaptic weights in biological neural networks evolve in real time with pulse timing-dependent plasticity (STDP), but hardware systems cannot respond to pre- / post-synaptic pulse timing changes at the nanosecond level.

[0006] Existing technologies employ three main approaches to address the aforementioned problems, but all have significant shortcomings:

[0007] Offline batch update: The backpropagation algorithm is executed by an external CPU, which interrupts chip operation for 10-20ms per training cycle, and cannot handle streaming data;

[0008] Analog STDP circuit: Pulse timing detection is achieved using a capacitor integrator, but capacitor leakage causes a long-term plasticity (LTP / LTD) accuracy error of ±15%;

[0009] Digital coprocessor: FPGA implements incremental weight calculation, but off-chip data transfer latency reaches the microsecond level, and power consumption increases by 300mW / mm². 2 .

[0010] The fundamental flaw in the aforementioned existing technologies lies in the fact that the hardware architecture cannot support sub-microsecond adaptive adjustment of synaptic weights during continuous inference, making it difficult to meet the real-time learning and inference requirements in dynamic scenarios. Therefore, in response to the above situation, there is an urgent need to provide a method and system for dynamic adjustment of synaptic weights in real-time neurofeedback for neuromorphic chips to overcome the shortcomings in current practical applications. Summary of the Invention

[0011] The purpose of this invention is to provide a method and system for dynamic adjustment of synaptic weights in real-time neural feedback for neuromorphic chips, aiming to solve the problems mentioned in the background art.

[0012] This invention is implemented as follows: a method for dynamic adjustment of synaptic weights in real-time neural feedback of neuromorphic chips, the method comprising:

[0013] Capture the pulse signals emitted by presynaptic and postsynaptic neurons, and obtain the timestamps of the pulse signals;

[0014] Based on the timestamp, calculate the time difference between the presynaptic pulse and the postsynaptic pulse;

[0015] Determine whether the absolute value of the time difference is less than a preset time window threshold;

[0016] If the absolute value of the time difference is less than the time window threshold, then based on the sign of the time difference, the pulse timing dependency plasticity rule base is queried to determine the corresponding synaptic weight adjustment type.

[0017] Obtain the current conductance state of the target memristor synapse;

[0018] Based on the determined adjustment type and the current conductance state, voltage pulse parameters are generated for adjusting the synaptic conductance value of the target memristor;

[0019] According to the voltage pulse parameters, a write voltage pulse is applied to the target memristor synapse to adjust its conductance value in real time in situ, thereby completing the dynamic update of the synapse weight.

[0020] As a further aspect of the present invention: the synaptic weight adjustment types include long-term enhancement and long-term suppression;

[0021] When the time difference is greater than zero, the determined adjustment type is long-term enhancement, which corresponds to generating a positive polarity voltage pulse parameter to increase the conductance of the target memristor synapse.

[0022] When the time difference is less than zero, the determined adjustment type is long-term suppression, which corresponds to generating a negative polarity voltage pulse parameter to reduce the conductance of the target memristor synapse.

[0023] As a further aspect of the present invention: based on the determined adjustment type and the current conductance state, voltage pulse parameters are generated, specifically including:

[0024] The amplitude of the voltage pulse is adaptively adjusted based on the deviation between the current conductance state and the target conductance value.

[0025] As a further aspect of the present invention, the method further includes:

[0026] After applying a write voltage pulse to the target memristor synapse, the adjusted conductance value is monitored in real time using a non-disturbance verification pulse to form a closed-loop control.

[0027] As a further aspect of the present invention, the application of a writing voltage pulse to the target memristor synapse is performed within the refractory period of the postsynaptic neuron.

[0028] This invention also provides a neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system, which operates the method described above, the system comprising:

[0029] The synaptic event monitoring module is used to capture the pulse signals emitted by presynaptic neurons and postsynaptic neurons, and to obtain the timestamps of the pulse signals;

[0030] The timing analysis module, connected to the synaptic event monitoring module, is used to calculate the time difference between the presynaptic pulse and the postsynaptic pulse based on the timestamp, and to determine whether the absolute value of the time difference is less than a preset time window threshold.

[0031] A pulse timing-dependent plasticity rule base is used to store adjustment rules for long-term enhancement and long-term suppression;

[0032] The pulse parameter decision module is connected to the timing analysis module and the pulse timing dependency plasticity rule base respectively. It is used to query the rule base according to the sign of the time difference when the absolute value of the time difference is less than the time window threshold to determine the adjustment type, and generate voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse.

[0033] The memristor driving module, connected to the pulse parameter decision module, is used to apply a write voltage pulse to the target memristor synapse according to the voltage pulse parameters, so as to adjust its conductance value in situ in real time.

[0034] As a further aspect of the present invention, the system further includes:

[0035] The conductivity feedback module, connected to the memristor driving module and the pulse parameter decision module, is used to monitor the conductivity value of the target memristor synapse in real time using a verification pulse, and to feed back the monitoring result to the pulse parameter decision module.

[0036] As a further aspect of the present invention: the memristor driving module includes a differential pair writing circuit for applying precise differential voltage pulses to the target memristor synapse.

[0037] As a further aspect of the present invention, the system further includes:

[0038] A noise suppression module, connected to the memristor driving module, is used to eliminate crosstalk noise of the memristor array using correlated double sampling technology.

[0039] As a further aspect of the present invention: the pulse timing-dependent plasticity rule base is a multi-scale rule base that supports rule configuration for the synergy of short-term and long-term plasticity.

[0040] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0041] Through event-driven architecture and in-situ conductivity modulation technology, weight updates are completed within the refractory period of neurons without interrupting the inference process, thus enabling real-time processing of streaming data.

[0042] By adopting the in-situ weight update method of memristor array, the high current drive power consumption of SRAM / Flash memory cells is avoided. At the same time, the additional power consumption of memristor calibration is reduced through the closed-loop conductivity feedback mechanism, which significantly improves energy efficiency.

[0043] It eliminates spatiotemporal dynamic mismatch: the timing difference between presynaptic and postsynaptic pulses is accurately captured by the timing analysis module, and nanosecond-level response is achieved by combining the STDP rule, simulating the real-time plasticity of biological neural networks;

[0044] By employing differential pair writing circuitry, correlated double sampling noise suppression technology, and conductivity feedback closed-loop control, the linearity and accuracy of weight adjustment are ensured, thereby reducing LTP / LTD errors.

[0045] The configuration of the multi-scale STDP rule base, conductivity drift compensation engine, and synaptic importance assessment unit can be flexibly selected according to the application scenario, taking into account both basic and high-performance requirements. Detailed Implementation

[0046] The technical solution of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] The present invention will be further explained below with reference to specific embodiments.

[0048] The present invention provides a method for dynamic adjustment of synaptic weights in real-time neurofeedback on a neuromorphic chip, the method comprising:

[0049] Capture the pulse signals emitted by presynaptic and postsynaptic neurons, and obtain the timestamps of the pulse signals;

[0050] Based on the timestamp, calculate the presynaptic pulse (t). pre) and postsynaptic pulse (t post The time difference Δt = t between them post -t pre ;

[0051] Determine whether the absolute value of the time difference is less than a preset time window threshold τ (typically τ=20ms);

[0052] If the absolute value of the time difference is less than the time window threshold, then based on the sign of the time difference, the pulse timing dependency plasticity rule base is queried to determine the corresponding synaptic weight adjustment type.

[0053] Obtain the current conductance state of the target memristor synapse;

[0054] Based on the determined adjustment type and the current conductance state, voltage pulse parameters are generated for adjusting the synaptic conductance value of the target memristor;

[0055] The memristor synapse array adopts a 128×128 1T1R cross structure, and the weights are characterized by the HfO2 memristor conductance (dynamic range 1μS-100μS).

[0056] According to the voltage pulse parameters, a write voltage pulse is applied to the target memristor synapse to adjust its conductance value in real time in situ, thereby completing the dynamic update of the synapse weight.

[0057] In a more specific example, the synaptic weight adjustment types include long-term enhancement and long-term inhibition;

[0058] When the time difference is greater than zero, the determined adjustment type is long-term enhancement, which corresponds to generating a positive polarity voltage pulse parameter to increase the conductance of the target memristor synapse.

[0059] When the time difference is less than zero, the determined adjustment type is long-term suppression, which corresponds to generating a negative polarity voltage pulse parameter to reduce the conductance of the target memristor synapse.

[0060] In a more specific example, based on the determined adjustment type and the current conductance state, voltage pulse parameters are generated, specifically including:

[0061] Based on the deviation between the current conductance state and the target conductance value, the amplitude of the voltage pulse is adaptively adjusted (0.8V-1.5V) to avoid overwriting.

[0062] In a more specific example, the method further includes:

[0063] After applying a write voltage pulse to the target memristor synapse, the adjusted conductance value is monitored in real time using a non-disturbance verification pulse to form a closed-loop control.

[0064] In a more specific example, the application of a write voltage pulse to the target memristor synapse is done within the refractory period of the postsynaptic neuron (<200 ns), ensuring that the new weights are used in the next computation cycle.

[0065] In this embodiment, the pulse signal is acquired by a pulse sensor, which encodes the visual / radar data into a pulse sequence (frequency coding mode).

[0066] This invention also provides a neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system, which operates the method described above. The system includes:

[0067] The synaptic event monitoring module is used to capture the pulse signals emitted by presynaptic neurons and postsynaptic neurons, and to obtain the timestamps of the pulse signals;

[0068] The timing analysis module, connected to the synaptic event monitoring module, is used to calculate the time difference between the presynaptic pulse and the postsynaptic pulse based on the timestamp, and to determine whether the absolute value of the time difference is less than a preset time window threshold.

[0069] A pulse timing-dependent plasticity (STDP) rule base is used to store adjustment rules for long-term enhancement and long-term suppression;

[0070] The pulse parameter decision module is connected to the timing analysis module and the pulse timing dependency plasticity rule base respectively. It is used to query the rule base according to the sign of the time difference when the absolute value of the time difference is less than the time window threshold to determine the adjustment type, and generate voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse.

[0071] The memristor driving module, connected to the pulse parameter decision module, is used to apply a write voltage pulse to the target memristor synapse according to the voltage pulse parameters, so as to adjust its conductance value in situ in real time, with a conductance adjustment resolution of 8-bit; the pulse timing-dependent plasticity rule base is a multi-scale rule base, which supports rule configuration for the coordination of short-term plasticity and long-term plasticity.

[0072] A conductance feedback module, connected to the memristor driving module and the pulse parameter decision module, is used to monitor the conductance value of the target memristor synapse in real time using a verification pulse, and feed the monitoring result back to the pulse parameter decision module. The memristor driving module includes a differential pair writing circuit, used to apply precise differential voltage pulses to the target memristor synapse, solving the problem of nonlinear update of memristor conductance and ensuring the linearity of weight adjustment (R). 2 >0.98);

[0073] A noise suppression module, connected to the memristor driving module, is used to eliminate crosstalk noise of the memristor array using correlated double sampling technology.

[0074] In this embodiment, the timing analysis module processes 256 pairs of synaptic events in parallel, calculates Δt, and filters valid events (hardware implementation of STDP time window filter); the STDP rule base stores LTP / LTD function curves (configurable exponential / hyperbolic), supporting user-defined time constants; the pulse parameter decision module calculates the optimal write pulse parameters based on the current memristor conductance state (obtained through the read circuit ADC) to prevent conductance saturation; the memristor drive module provides a ±1.5V programmable voltage source with a drive capability of up to 10mA / unit and a built-in overshoot suppression circuit; the conductance feedback module uses a verification pulse (0.1V, no disturbance) to monitor the conductance value in real time, forming a closed-loop control; the noise suppression module uses correlated double sampling (CDS) technology to eliminate array crosstalk noise and improve adjustment accuracy;

[0075] The system may also include:

[0076] A multi-scale STDP rule base supports short-term / long-term plasticity synergy in the biological brain (such as the three-pulse reinforcement mechanism), enhancing the ability to learn complex patterns.

[0077] The conductivity drift compensation engine predictively corrects the write volume based on the conductivity decay model, increasing the 72-hour weight retention rate from 83% to 97%.

[0078] The synaptic importance assessment unit dynamically allocates and adjusts resources based on neuron firing rate, increasing the priority of key synapse updates by 3 times and improving learning efficiency by 40%.

[0079] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for dynamic adjustment of synaptic weights in real-time neural feedback of neuromorphic chips, characterized in that, The method includes: Capture the pulse signals emitted by presynaptic and postsynaptic neurons, and obtain the timestamps of the pulse signals; Based on the timestamp, calculate the time difference between the presynaptic pulse and the postsynaptic pulse; Determine whether the absolute value of the time difference is less than a preset time window threshold; If the absolute value of the time difference is less than the time window threshold, then based on the sign of the time difference, the pulse timing dependency plasticity rule base is queried to determine the corresponding synaptic weight adjustment type. Obtain the current conductance state of the target memristor synapse; Based on the determined adjustment type and the current conductance state, voltage pulse parameters are generated for adjusting the synaptic conductance value of the target memristor; According to the voltage pulse parameters, a write voltage pulse is applied to the target memristor synapse to adjust its conductance value in real time in situ, thereby completing the dynamic update of the synapse weight.

2. The method for dynamic adjustment of synaptic weights in real-time neural feedback of a neuromorphic chip according to claim 1, characterized in that, The synaptic weight adjustment types include long-term enhancement and long-term suppression; When the time difference is greater than zero, the determined adjustment type is long-term enhancement, which corresponds to generating a positive polarity voltage pulse parameter to increase the conductance of the target memristor synapse. When the time difference is less than zero, the determined adjustment type is long-term suppression, which corresponds to generating a negative polarity voltage pulse parameter to reduce the conductance of the target memristor synapse.

3. The method for dynamic adjustment of synaptic weights in real-time neural feedback of a neuromorphic chip according to claim 1 or 2, characterized in that, Based on the determined adjustment type and current conductance state, voltage pulse parameters are generated, specifically including: The amplitude of the voltage pulse is adaptively adjusted based on the deviation between the current conductance state and the target conductance value.

4. The method for dynamic adjustment of synaptic weights in real-time neuromorphic chip neural feedback according to claim 1, characterized in that, The method further includes: After applying a write voltage pulse to the target memristor synapse, the adjusted conductance value is monitored in real time using a non-disturbance verification pulse to form a closed-loop control.

5. The method for dynamic adjustment of synaptic weights in real-time neuro-feedback on a neuromorphic chip according to claim 1, characterized in that, The application of a write voltage pulse to the target memristor synapse is performed during the refractory period of the postsynaptic neuron.

6. A neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system, operating the method described in any one of claims 1-5, characterized in that, The system includes: The synaptic event monitoring module is used to capture the pulse signals emitted by presynaptic neurons and postsynaptic neurons, and to obtain the timestamps of the pulse signals; The timing analysis module, connected to the synaptic event monitoring module, is used to calculate the time difference between the presynaptic pulse and the postsynaptic pulse based on the timestamp, and to determine whether the absolute value of the time difference is less than a preset time window threshold. A pulse timing-dependent plasticity rule base is used to store adjustment rules for long-term enhancement and long-term suppression; The pulse parameter decision module is connected to the timing analysis module and the pulse timing dependency plasticity rule base respectively. It is used to query the rule base according to the sign of the time difference when the absolute value of the time difference is less than the time window threshold to determine the adjustment type, and generate voltage pulse parameters based on the adjustment type and the current conductance state of the target memristor synapse. The memristor driving module, connected to the pulse parameter decision module, is used to apply a write voltage pulse to the target memristor synapse according to the voltage pulse parameters, so as to adjust its conductance value in situ in real time.

7. The neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system according to claim 6, characterized in that, The system also includes: The conductivity feedback module, connected to the memristor driving module and the pulse parameter decision module, is used to monitor the conductivity value of the target memristor synapse in real time using a verification pulse, and to feed back the monitoring result to the pulse parameter decision module.

8. The neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system according to claim 6, characterized in that, The memristor driving module includes a differential pair writing circuit for applying precise differential voltage pulses to the target memristor synapse.

9. The neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system according to claim 6, characterized in that, The system also includes: A noise suppression module, connected to the memristor driving module, is used to eliminate crosstalk noise of the memristor array using correlated double sampling technology.

10. The neuromorphic chip real-time neural feedback synaptic weight dynamic adjustment system according to claim 6, characterized in that, The pulse timing-dependent plasticity rule base is a multi-scale rule base that supports rule configuration that coordinates short-term and long-term plasticity.