A multi-board card modular ac step-up / down converter and a control method thereof

Abstract

The application discloses a multi-board card modular AC boost-buck converter and a control method thereof, and belongs to the technical field of power electronic conversion and voltage / power quality regulation on the power distribution side. Hardware adopts a layered modular architecture of 'core board-bottom board-expansion board-power board'. A bypass executor and a switch network form a low-loss bypass path, are interlocked with a high-frequency chopping drive, and avoid simultaneous conduction. The control method is based on input / output voltage and current sampling to distinguish modes, select boost or buck operation, and ensure mode exclusion through interlocking logic. Positive and negative half cycles generate drive signals with a dead zone, combined with voltage loop, current loop / limiting loop control, introduction of coasting / bypass strategy and hierarchical protection mechanism, to realize efficient, fast response and safe and reliable operation.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion and distribution side voltage / power quality regulation technology, specifically to a modular multi-board AC step-up / step-down converter and its control and protection method. Background Technology

[0002] In scenarios such as distribution substation voltage management, distributed new energy grid connection interfaces, and AC voltage stabilization, voltage deviations, fluctuations, and transient disturbances are prone to occur due to grid impedance, load fluctuations, and changes in operating modes. This leads to a decline in power quality and affects the adaptability and operational stability of electrical equipment. Existing voltage regulation devices, such as on-load tap changers, generally suffer from slow response speeds, scattered adjustment steps, and frequent mechanical wear and maintenance. While voltage regulation schemes relying solely on high-frequency AC / AC choppers offer better dynamic performance, they still struggle to balance wide-range step-up / step-down capabilities, light-load efficiency, bypass reliability, and engineering-grade isolation and anti-interference design. Furthermore, existing products often highly integrate control, sampling, drive, and human-machine interaction onto a single board, which can increase the pressure on isolation and EMC design in strong electromagnetic environments, make fault location difficult, increase maintenance and replacement costs, and hinder functional expansion and online upgrades of control strategies. Therefore, there is an urgent need for an AC voltage boost / buck regulator and its control method that features a clear structural hierarchy, reliable signal isolation, support for tap / bypass and high-frequency fine-tuning coordination, and online setting and comprehensive protection mechanisms. Summary of the Invention

[0003] The purpose of this invention is to provide a multi-board modular AC step-up / step-down converter and its control method to solve the shortcomings of existing AC voltage regulation devices in terms of wide-range step-up / step-down capability, dynamic response speed, light-load operation efficiency, bypass operation reliability, and engineering maintainability. This enables the device to achieve fast, stable, and scalable AC voltage regulation under different grid impedances, load fluctuations, and operating mode changes, while also taking into account safety protection and online operation and maintenance requirements.

[0004] To achieve the above objectives, the present invention adopts the following technical solution. On the one hand, this invention provides a control method for a multi-board modular AC buck-boost converter, comprising the following steps: S1: Acquire input voltage, output voltage and current signals and calculate the effective value and average value, and read the target output voltage and control parameters; S2: Based on the deviation between the target output voltage and the output voltage, and the relationship between the input voltage and the output voltage, the mode is determined to determine either the boost regulation mode or the buck regulation mode, and a mutual exclusion flag is set to prevent the other mode from being activated at the same time. S3: Establish a voltage outer loop and calculate the desired duty cycle based on the deviation. Further establish a current inner loop / current limiting loop to form a dual-loop control. The resulting duty cycle is limited and falls into a preset range. S4: Generate a complementary PWM drive sequence with dead time based on the half-cycle polarity of the power grid, and perform high-frequency chopping drive on only one set of power switch branches in the boost branch or buck branch according to the mutual exclusion flag, so as to complete the boost regulation or buck regulation. S5: Perform state switching control based on bypass and coasting criteria. When entering the bypass state, control the bypass actuator to establish a bypass power path and prohibit the output of the PWM drive sequence. Also, prevent the port switching actuator action and high-frequency chopper drive from occurring simultaneously through interlocking logic. When exiting the bypass state, first release the bypass power path and complete the interlocking verification before restoring the output of the PWM drive sequence. When a fault is triggered, execute shutdown protection, actuator safety reset, and fault information reporting.

[0005] Preferably, the mode discrimination includes: entering boost regulation mode when the effective value of the target output voltage is higher than the effective value of the output voltage and the boost condition is met; entering buck regulation mode when the effective value of the target output voltage is lower than the effective value of the output voltage and the buck condition is met; entering bypass state when the output voltage is within the allowable deviation range and the bypass criterion is met, and controlling the bypass actuator to establish a bypass power path and prohibiting PWM output; and / or entering coasting state when the coasting criterion is met.

[0006] Preferably, the PWM drive sequence generation includes: inserting a dead time into the complementary drive signals within the same power switch branch, and setting interlock logic for the boost branch, buck branch and bypass actuator to avoid the simultaneous occurrence of bypass conduction and high-frequency chopping, to avoid the simultaneous occurrence of high-frequency chopping in the boost branch and buck branch, and to avoid the risk of shoot-through or malfunction during mode switching.

[0007] Preferably, the coasting state includes: reducing the switching frequency or pausing high-frequency chopping and maintaining the necessary synchronous conduction path when the output voltage deviation is less than a first threshold and the current is less than a second threshold; exiting the coasting state and resuming closed-loop regulation when the deviation or the current exceeds the corresponding threshold.

[0008] Preferably, the bypass state includes: when the output voltage deviation is less than the third threshold and the bypass allowable conditions are met, controlling the bypass actuator to establish a bypass power path and prohibiting high-frequency chopping PWM output; when the output voltage deviation exceeds the third threshold or the load current is detected to exceed the fourth threshold, disconnecting the bypass actuator and restoring closed-loop chopping regulation in boost regulation mode or buck regulation mode; wherein, interlocking conditions are set between the bypass actuator and the boost branch, buck branch and port switching actuator to avoid the bypass conduction and high-frequency chopping or mode switching occurring simultaneously.

[0009] Preferably, the fault protection includes at least one of the following: output overvoltage, output undervoltage, input undervoltage, overcurrent, overtemperature, drive fault, and communication fault; the controller enters the protection state after the fault meets the duration threshold, shuts down the PWM output and controls the port to switch the actuator and / or bypass the actuator to a safe position, and at the same time generates a fault code and reports it through the expansion board and communication.

[0010] On the other hand, this invention provides a multi-board modular AC buck-boost converter, including a power board, a baseboard, a core board, and expansion boards. The power board houses the main power conversion and execution components; the baseboard implements sampling isolation conditioning and drive interface aggregation; the core board implements digital control and PWM generation; and the expansion boards implement human-machine interaction and communication. The boards are interconnected via standardized connectors, enabling physical and electrical decoupling of the high-voltage power circuit, isolation sampling link, gate drive link, and low-voltage control / communication link. This reduces the coupling impact of high dv / dt and high di / dt environments on control and communication, improving anti-interference capability, maintainability, and platform scalability.

[0011] Preferably, the power board includes a bidirectional switching network and a filter network, and is equipped with a port switching actuator and a bypass actuator electrically connected to the bidirectional switching network. The bidirectional switching network is used to selectively perform boost chopping or buck chopping power regulation on the AC side, and the filter network is used to suppress high-frequency ripple and improve the output voltage waveform. The port switching actuator is used to switch the input / output correspondence between the high-voltage and low-voltage sides between boost regulation mode and buck regulation mode to establish a corresponding boost or buck operating path, and to ensure that the two operating paths are mutually exclusive at any time through interlocking logic. The bypass actuator is used to establish a low-loss conduction path when the output voltage is within the allowable deviation range, the load is light, or the system is in a specific operating state, and to disable or reduce the frequency of high-frequency chopping after the conduction path is established. Furthermore, the switching process of the port switching actuator is coordinated with PWM exit, switching delay confirmation, and status feedback verification to ensure that mode switching is completed under safe interlocking conditions, thereby reducing the risks of mis-conduction, circulating current, and contact impact, and improving the stability and reliability of the device under grid fluctuations and load disturbances.

[0012] Preferably, the baseboard includes a sampling isolation and signal conditioning circuit, a drive interface convergence circuit, a power management circuit, and a relay / actuator drive circuit. The sampling isolation and signal conditioning circuit is used to isolate, range-match, filter, and bias analog quantities such as input / output voltage, current, and temperature from the power board side before outputting them to the core board sampling channel. The drive interface convergence circuit is used to isolate and level-convert control signals such as PWM / enable / direction / interlocking output from the core board before outputting them to the power board drive side. The power management circuit is used to provide power-on timing, voltage regulation, and undervoltage monitoring for each board. The relay / actuator drive circuit is used to drive port switching actuators, bypass actuators, and related auxiliary relays, and to feed back their status to participate in interlocking and fault judgment.

[0013] Preferably, the core board includes a digital controller, an analog-to-digital converter sampling channel, a PWM output channel, and a memory. The digital controller is used to perform mode discrimination, closed-loop regulation, state machine management, PWM waveform generation, online parameter management, and fault protection. The PWM output channel is used to generate complementary drive sequences with dead zones in the positive and negative half-cycles, and output them to the power board after isolation by the backplane. The memory is used to store target values, thresholds, control coefficients, and operating configurations, and supports power-down saving and power-on recovery. The core board uses mode mutual exclusion logic to ensure that boost regulation and buck regulation will not occur simultaneously, avoiding the risk of circulating current, device mis-conduction, or output runaway caused by the simultaneous activation of the boost chopper branch and the buck chopper branch at the same time period from the control side.

[0014] Preferably, the expansion board includes a human-machine interface module and a communication module. The human-machine interface module is used to display input / output measurement values, operating modes, status words, and fault codes, and supports online parameter tuning and operation command input. The communication module is used to interact with a host computer or external control system to realize register reading and writing, parameter distribution, status feedback, fault tracing, and remote maintenance. In conjunction with the core board, the expansion board can map target output voltage, control parameters, thresholds, delays, mode enable, and parallel configurations to readable and writable registers, and store them in non-volatile memory after communication writing to achieve configuration persistence.

[0015] Preferably, the bidirectional switching network consists of at least one set of bidirectional switching units composed of back-to-back power switching devices, wherein the power switching devices are SiC MOSFETs, SiC JFETs, IGBTs or combinations thereof; each bidirectional switching unit is equipped with an isolation gate drive circuit, which has at least one or more of the following: undervoltage lockout, overcurrent / desaturation detection, soft turn-off, Miller clamping and fault feedback, in order to improve the safety margin and anti-false triggering capability under complex power grid and load disturbance conditions.

[0016] Preferably, the port switching actuator is a contactor, relay, or solid-state switch array, used to switch the input / output correspondence between the high-voltage and low-voltage ends between boost regulation mode and buck regulation mode to establish the required power transmission direction and working branch. The port switching is triggered by the core board based on criteria such as target output voltage, effective input / output voltage relationship, current operating mode, and protection status, and is executed when interlocking conditions are met to ensure that only one of the boost or buck branch is allowed to work at any given time. The interlocking conditions include at least: PWM is turned off or in a disabled state, the bidirectional switch network is in a safe off state, the bypass actuator is disconnected or meets the interlocking requirements, and one or more of the following: switching delay, zero crossover window, and status feedback verification. After the switching is completed and verified, the core board then enables high-frequency chopper closed-loop regulation in the corresponding mode. By combining the above port switching and mutual exclusion control with high-frequency chopper regulation, a wide range of AC boost / buck output can be achieved, and the risks of mis-conduction, circulating current, and contact impact during mode switching can be reduced, thereby improving system safety and operational reliability.

[0017] Preferably, the bypass actuator and the bidirectional switch network are provided with hardware and software dual interlocking logic. The interlocking logic is used to achieve forced mutual exclusion between bypass conduction and high-frequency chopping to avoid high-frequency switching action during bypass closure or accidental bypass closure during chopping. When the output voltage deviation is within the allowable dead zone and the load is light, or when in standby, power supply maintenance, or other preset operating states, the system controls the bypass actuator to conduct to establish a low-loss conduction path. After the bypass conduction is confirmed, the high-frequency switching action is prohibited or reduced, so that energy is transmitted through the low-loss path, thereby reducing switching losses and device temperature rise, while maintaining the ability to sample, monitor, and provide graded protection for input / output voltage, current, and temperature.

[0018] Preferably, the converter further includes a coasting control mechanism: when the output voltage deviation enters the regulation dead zone and the current is lower than the threshold, the controller reduces or stops the high-frequency PWM, retaining only the necessary synchronous conduction path to maintain the continuous inductor current or suppress the reverse current, thereby reducing light-load losses without sacrificing safety; when the deviation or current exceeds the threshold, the system automatically exits the coasting state and resumes closed-loop chopper regulation.

[0019] Compared with the prior art, the present invention has the following beneficial effects: Achieve wide-range, fine-grained AC buck-boost regulation: Through port switching and high-frequency chopper closed-loop regulation, the device can select boost or buck mode as needed within a wide range of voltage fluctuations and load changes, and maintain the duty cycle within a controllable range in the corresponding mode, thereby achieving stable regulation of the target output voltage and reducing the risk of control saturation and voltage and current stress on power devices.

[0020] Improve dynamic response and steady-state performance: Through mode discrimination based on effective value / phase information, coordinated control of outer loop voltage regulation and inner loop current limiting, and half-cycle PWM generation, rapid recovery and stable regulation of load changes and power grid disturbances are achieved.

[0021] Improve efficiency under light load and reduce temperature rise: By using criteria and interlock management for coasting mode and bypass mode, high-frequency switching losses are significantly reduced under small deviation and light load conditions, while maintaining necessary monitoring and protection capabilities.

[0022] Enhance engineering feasibility and maintainability: Through a layered isolation architecture of core board-baseboard-expansion board-power board, reduce EMC design difficulty and debugging risks, achieve clear fault location, replaceable boards, standardized interfaces, and facilitate power expansion, parallel upgrades and control strategy iteration.

[0023] Enhance system safety and reliability: Through hierarchical protection, fault latching / recovery management, actuator safety bit control and fault code tracing, rapid fault shutdown and safe recovery are achieved, reducing the risk of device damage caused by malfunctions and repeated impacts. Attached Figure Description

[0024] Figure 1 A schematic diagram of the overall architecture of a multi-board modular AC step-up / step-down converter; Figure 2 This is a schematic diagram of the functional structure of the base plate; Figure 3 This is a schematic diagram of the power board's composition and functional topology; Figure 4 Here is a flowchart of the port / mode switching execution process; Figure 5 This is a schematic diagram of the system's state machine. Figure 6 This is a schematic diagram of the overall control method flow. Figure 7 This is a schematic diagram of dual-loop control with voltage outer loop and current inner loop / current limiting loop, as well as duty cycle limiting. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and embodiments. It should be understood that the embodiments of the present invention are only for explaining the present invention and are not intended to limit the scope of protection of the present invention; the technical features of the various embodiments can be combined with each other without conflict.

[0026] In this specification, the terms "including," "comprising," "having," etc., all mean "including but not limited to"; the term "and / or" means any combination of related objects; "first," "second," etc., are used only for distinction and do not indicate order or importance.

[0027] The present invention provides a multi-board modular AC buck-boost converter and its control method, which selectively boosts or bucks the input AC power on the AC side to obtain the target output voltage, and can enter a coasting state or bypass state when the conditions are met, so as to improve light-load efficiency and reduce device stress.

[0028] This converter adopts a layered and modular multi-board structure, including a power board, a baseboard, a core board, and expansion boards. The boards are interconnected through standardized connectors, which decouples the high-power circuit, the isolated sampling link, the gate drive link, and the low-power control / communication link in a physical and electrical manner, thereby improving anti-interference capability and maintainability.

[0029] In this embodiment, as Figure 1 As shown, the power board houses the main power conversion unit and actuators; the baseboard handles sampling isolation / signal conditioning, drive interface aggregation, power management, and actuator driving; the core board handles digital control, sampling processing, and PWM generation; and the expansion board handles human-machine interaction, parameter tuning, and communication expansion. This discrete architecture isolates high-frequency noise from the power side from the precision signals on the control / sensing side at the system level.

[0030] The core board includes a digital controller, an analog-to-digital converter sampling channel, a PWM output channel, and memory. The digital controller is used for mode discrimination, closed-loop regulation, state machine management, PWM timing generation, parameter management, and fault protection.

[0031] In this embodiment, the digital controller can be a DSP / MCU / FPGA with multiple PWM and high-speed ADC resources; for example, a digital signal controller with multiple ePWM and multiple ADC can be used to meet the requirements of real-time sampling within the AC half-cycle and fine timing control of PWM.

[0032] In this embodiment, as Figure 2 As shown, the baseboard includes a sampling isolation and signal conditioning circuit, a drive interface convergence circuit, a power management circuit, and an actuator drive circuit. The sampling isolation and signal conditioning circuit is used to isolate, range-match, filter, and bias analog quantities such as input-side voltage, output-side voltage, power current, and temperature to match the input range of the core board's ADC and improve anti-interference capability.

[0033] The voltage sampling channel of the sampling isolation and signal conditioning circuit may include: a voltage divider network, a surge / overvoltage clamping device, an isolation amplifier or an isolation modem, and a second-order or higher low-pass filter network; the current sampling channel may use a current transformer, a Hall current sensor or a shunt resistor + isolation amplifier scheme, and be configured with a zero-point bias and common-mode interference suppression structure.

[0034] The driver interface convergence circuit is used to isolate and level-convert the PWM / enable / interlock / direction control signals output from the core board before outputting them to the power board driver side. Optionally, isolation can be achieved by high-speed optocouplers, digital isolators, or isolated driver solutions. A typical implementation approach for power-side isolation and driver design can refer to the driver architecture of "front-end isolation, back-end power amplification, and integrated undervoltage lockout / overcurrent protection".

[0035] The power management circuit provides isolated and non-isolated multiple power supplies to each board and implements power-on sequence, undervoltage monitoring, fault reset and necessary power self-test; the actuator drive circuit drives the port switching actuator and provides drive interface or intelligent control signal to the bypass actuator, while feeding back the port switching status signal and bypass execution status signal to the core board for interlocking criteria and fault determination.

[0036] In addition, the expansion board includes a human-machine interface module and a communication module. The human-machine interface module is used to display input / output measurement values, operating mode, status words and fault codes, and supports online parameter tuning and operation command input; the communication module is used to interact with the host computer or external control system to realize parameter distribution, register reading and writing, status feedback and fault tracing.

[0037] In this embodiment, the communication module may include UART, CAN and / or other industrial bus interfaces; parameters and status variables can be address-mapped in the manner of "real-time data area + online modifiable parameter area" so as to complete online parameter adjustment, forced mode and power on / off commands and other scheduling control in the power-on state.

[0038] In this embodiment, the power board includes a bidirectional switching network, a filter network, and a port switching actuator and a bypass actuator (e.g., connected to the bidirectional switching network) electrically. Figure 3 (As shown). Filtering networks are used to suppress high-frequency ripple and improve output waveforms, and may include input-side EMI filtering, main power inductors, and output-side filter capacitor / damping networks, etc.

[0039] The bidirectional switching network includes at least two sets of power switch branches for boost regulation and buck regulation, respectively; the boost regulation mode and buck regulation mode are mutually exclusive, that is, the converter only allows one regulation mode to be active at any time, and the other mode is prohibited from being activated, so as to avoid the risk of circulating current, false turn-on or output runaway caused by high-frequency chopping of both sets of branches at the same time.

[0040] The bidirectional switching network consists of multiple bidirectional switching units, each of which is composed of back-to-back power switching devices to achieve bidirectional AC blocking and controlled conduction; the power switching devices can be MOSFETs, IGBTs, or combinations thereof.

[0041] In this embodiment, to meet the requirements of high frequency, high efficiency and high dv / dt applications, the power switching device can be a wide bandgap device (such as SiC MOSFET) and equipped with an isolated gate drive circuit; the drive circuit can integrate one or more of undervoltage lockout, overcurrent / desaturation detection, soft turn-off, Miller clamping and fault feedback to improve the system safety margin.

[0042] In this embodiment, as Figure 4 As shown, the port switching actuator is used to switch the input / output correspondence between the high-voltage and low-voltage sides between boost regulation mode and buck regulation mode to establish the required power transmission path and working branch, and to ensure that only one of the boost branch or buck branch is allowed to work at any given time. The port switching is triggered by the core board based on the target output voltage, the effective value relationship of the input / output voltage, the current operating status, and the protection status, and is executed when the interlocking conditions are met. The interlocking conditions include at least one or more of the following: PWM is in the off or disabled state, the bidirectional switch network is in the safe off state, the bypass path is disconnected or meets the requirements of interlocking with the port switching, and switching delay / zero crossover window / status feedback verification. After the port switching is completed, the core board continuously adjusts and stabilizes the output voltage in the corresponding mode by adjusting the duty cycle through high-frequency chopper closed loop, thereby achieving wide-range AC voltage boost / buck regulation under the premise of ensuring mode mutual exclusion and switching safety, and reducing the risk of mis-conduction and circulating current during the switching process.

[0043] The port switching actuator can be a contactor, relay, or solid-state switch array; its operation can be triggered by the core board based on criteria such as output deviation amplitude, duty cycle approach limit, main inductor current margin, device temperature rise, and / or power grid fluctuation trend. Before tap switching, the controller can first exit high-frequency chopping, enter coasting or bypass mode, and complete the necessary energy removal and delay confirmation to reduce the risk of contact arcing and malfunction.

[0044] The bypass actuator is used to establish a low-loss conduction path when the output voltage meets the set allowable deviation range or is in a specific operating state such as light load or standby, so as to reduce the high-frequency switching loss of power devices. The bypass actuator (or its control signal) and the bidirectional switching network are equipped with a dual interlocking logic of hardware interlock and software mutual exclusion to ensure that the high-frequency chopping is in the off or disabled state when the bypass is turned on, and to ensure that the bypass is in the off or meets the interlocking requirements when the high-frequency chopping is turned on, thereby avoiding the simultaneous occurrence of bypass turn-on and high-frequency chopping, and avoiding the boost branch and buck branch being driven for high-frequency chopping at the same time.

[0045] Bypass activation conditions include: output voltage deviation entering the allowable dead zone, load current below the preset threshold and the system in bypass allowable state (including temperature rise, fault state or operation count meeting one or more preset allowable conditions); bypass deactivation conditions include: output voltage deviation exceeding the allowable dead zone, load current rising above the threshold, detection of a protection event or receipt of an external command requiring voltage regulation to resume; in bypass mode, the controller shuts down or suppresses high-frequency PWM and maintains necessary monitoring and protection functions, and can work with coasting mode to achieve low-loss operation, that is, when the deviation enters the dead zone, high-frequency chopping is preferentially reduced or stopped, and if necessary, the bypass is closed to further reduce conduction losses, and closed-loop voltage regulation is resumed according to the interlocking sequence when the deactivation conditions are met.

[0046] In this embodiment, the converter software adopts a layered and modular real-time architecture, decoupling the underlying hardware driver, core control algorithm and upper-layer interaction logic, and using a state machine to uniformly manage multiple working modes, so as to ensure the determinism of control timing and reduce maintenance difficulty.

[0047] In this embodiment, as Figure 5 As shown, the system state machine includes at least the following states: power-on initialization state, self-test state, standby state, voltage regulation operation state (boost or buck), coasting state, bypass state, and fault protection state. The switching between these states is determined by the mode discrimination result, bypass / coasting criteria, port / mode switching actuator, and protection triggering conditions.

[0048] The power-on initialization state is used to establish power timing, load parameters, and initialize hardware interfaces, while keeping PWM output disabled and actuators in a safe default position. It then enters a self-test state to verify the consistency of the sampling link, drive / interlock link, communication link, and actuator status feedback. After passing the self-test, it enters a standby state, where it continuously samples and monitors while waiting for a run permission command. When a run permission is received and the interlocking conditions are met, it enters the voltage regulation operation state.

[0049] In voltage regulation operation, the controller selects either boost regulation or buck regulation (the two are mutually exclusive) based on the mode discrimination result, and periodically evaluates the coasting entry condition and bypass entry condition during operation: when the coasting condition is met, it can switch to coasting mode to reduce switching losses; when the bypass condition is met, it switches to bypass mode and establishes a low-loss conduction path. Both coasting and bypass modes have exit conditions; after exiting, it returns to voltage regulation operation and resumes closed-loop chopper regulation.

[0050] In any operation-related state (including voltage regulation operation, coasting, and bypass), if a stop command is detected, the system exits operation and enters a shutdown / waiting-for-reset state; if overcurrent, overvoltage, undervoltage, overtemperature, drive failure, or communication abnormality protection conditions are triggered, the system immediately enters a fault protection state, performs PWM shutdown, actuator safety reset, and fault information reporting; when the reset conditions are met, the state machine returns to its original state or returns to standby state to wait for operation permission.

[0051] In this embodiment, as Figure 6 As shown, the control method can be executed in the following order: First, signals such as input voltage, output voltage, and current are acquired and their effective values ​​and / or average values ​​are calculated. The target output voltage and control parameters are then read. Optionally, the fundamental phase information is obtained through zero-crossing detection or digital phase-locked loop (PLL) for half-cycle polarity determination and PWM timing alignment. Subsequently, based on the deviation between the target output voltage and the output voltage, the relationship between the input voltage and the output voltage, and combined with operating constraints, mode discrimination is performed to determine whether to enter boost regulation mode or buck regulation mode, and a mutual exclusion flag is set. The mutual exclusion flag is used to disable the PWM output of the other mode at the software level, while the interlocking hardware logic is used to block false enable at the signal level.

[0052] After determining the mode, a voltage outer loop is established and the desired duty cycle is calculated based on the deviation. Simultaneously, a current inner loop / current limiting loop is superimposed as needed to form a dual-loop control. The resulting duty cycle is limited to fall within a preset safety range to avoid overmodulation or sudden stress increase in devices. Then, a complementary PWM drive sequence with dead time is generated based on the grid half-cycle polarity. Under mutual exclusion flag constraints, high-frequency chopping drive is performed only on one set of power switch branches in the boost or buck branch to achieve boost or buck regulation.

[0053] During operation, the controller continuously evaluates the coasting and bypass criteria and performs state switching control: when entering the bypass state, it controls the bypass actuator to establish a bypass power path and disables the PWM drive sequence output, while interlocking logic prevents the port switching actuator action and high-frequency chopper drive from occurring simultaneously; when exiting the bypass state, it first releases the bypass power path and completes the interlocking verification before restoring the PWM drive sequence output; when a fault condition is triggered, it executes shutdown protection, actuator safety reset, and fault information reporting.

[0054] In this embodiment, as Figure 7 As shown, the controller establishes a voltage outer loop and uses proportional (P) or proportional-integral (PI) methods to calculate the deviation between the target output voltage and the effective value of the output voltage to obtain the desired control quantity. When current limiting or dynamic improvement is required, a current inner loop or current limiting loop is introduced to calculate the current setpoint and current feedback, and selects, superimposes, or limits the output of the voltage outer loop to form a dual-loop control.

[0055] The duty cycle (Duty) is calculated and then limited to ensure it always falls within a preset safety range, thus avoiding overmodulation, drive anomalies, or sudden increases in device stress. When Duty approaches the upper or lower limit for an extended period within the duration criterion, or when the output voltage deviation fails to converge, the controller performs state machine processing based on the effective value relationship between the input / output voltage and the current protection state. If the interlocking conditions are met, the controller can switch between boost and buck regulation modes via port switching actuators, and resume high-frequency chopper closed-loop regulation in the corresponding mode after the switch is completed. If the switching conditions are not met, or if the deviation is accompanied by risks such as current over-limit, the controller enters current limiting, coasting / bypass, or protection shutdown states, while maintaining sampling monitoring and fault reporting to reduce the risk of efficiency degradation and temperature rise caused by continuous operation with extreme duty cycles.

[0056] PWM generation employs a "segmented driving approach for positive and negative half-cycles": the controller determines whether it is currently in the positive half-cycle, negative half-cycle, or near zero crossing based on the polarity or phase of the input voltage, and accordingly selects one set of power switching branches from the boost or buck branches to participate in high-frequency chopping within the corresponding half-cycle; the other set of branches remains either on or off, thus forming a controlled energy transfer path and reducing unnecessary switching losses. This half-cycle driving logic, where "the switching state is reversed when the polarity of the negative half-cycle is reversed," is one of the common implementation methods in this field.

[0057] In boost regulation mode, when the boost condition is met, a high-frequency PWM is applied to the boost branch; in buck regulation mode, when the buck condition is met, a high-frequency PWM is applied to the buck branch. The two modes are guaranteed not to have high-frequency chopping occur simultaneously through mutual exclusion flags and interlocking logic.

[0058] Complementary PWM sequence generation includes: inserting dead time into complementary drive signals within the same power switch branch and calibrating them in conjunction with the propagation delay of the drive device and the characteristics of the switching device; setting interlock timing for the boost branch, buck branch and bypass actuator to avoid the risk of shoot-through or malfunction caused by simultaneous conduction.

[0059] In this embodiment, the control near zero crossing adopts a protective strategy: when the input voltage is close to zero and noise is sensitive, the controller can briefly reduce the PWM frequency or enter a coasting state, retaining only the necessary synchronous conduction path, and then resume the normal chopping adjustment of the positive / negative half-cycle after the zero crossing determination is stable, thereby reducing misjudgment and glitch triggering caused by zero crossing jitter.

[0060] In this embodiment, the coasting state is used for efficiency optimization: when the output voltage deviation is less than a first threshold and the current is less than a second threshold, the controller reduces the switching frequency or suspends high-frequency chopping, keeping only a portion of the power branches conducting, so that the main inductor forms a single path with the input and output terminals without applying high-frequency chopping voltage; when the deviation or current exceeds the threshold, the coasting mode exits and closed-loop regulation resumes. The typical definition and effect of this coasting mode can be found in the relevant implementation description.

[0061] Bypass mode is used to further reduce losses: when the system is under light load for a long time, in standby mode, or after a fault and needs to maintain a minimum power supply, the control method drives the bypass branch to close, so that energy is transmitted through a low-loss path, while maintaining the necessary sampling monitoring and protection capabilities; the bypass and chopper are prevented from occurring simultaneously through interlocking logic.

[0062] Parameter management adopts a register mapping mechanism: the target output voltage, threshold, delay, PID coefficient, forced working mode, power on / off command, calibration time, and test observation variables are mapped to readable and writable register addresses; the communication module supports online writing and stores the data in non-volatile memory after writing, realizing power-off retention and power-on recovery.

[0063] The system is equipped with a "forced operating mode" interface, which allows external forces to force the system into boost, buck, coasting, or bypass modes when safety constraints are met. This is used for engineering debugging, maintenance bypass, or emergency operation under specific conditions. The priority and exit conditions of the forced mode are uniformly managed by the state machine to avoid conflicts with the protection logic.

[0064] To further explain, the protection mechanism adopts a hierarchical strategy, including fast protection and continuous protection. Fast protection can achieve rapid shutdown in case of short circuit / severe overcurrent by comparing the instantaneous current value with the peak threshold; continuous protection can achieve derating or deregulation in case of long-term overload by comparing the effective current value with the rated threshold, and can also implement overvoltage and undervoltage protection in combination with the effective values ​​of input / output voltage.

[0065] When any of the protection conditions such as overcurrent, overvoltage, undervoltage, overtemperature, drive failure, or communication failure are triggered and the duration criterion is met, the controller immediately shuts down the PWM output and controls the port to switch the actuator and / or bypass actuator to a safe position. At the same time, a fault code is generated and reported through the expansion board and communication.

[0066] To prevent frequent system start-ups and shutdowns caused by abnormal power grid conditions or external faults, the protection and bypass management module counts recurring protection events. When a certain type of protection triggers more than the upper limit within a preset time window, the controller can lock the system in coasting or bypass mode and prohibit automatic restart. Manual confirmation and reset are required to restore voltage regulation operation in order to avoid repeated impacts.

[0067] In this embodiment, tap switching and protection logic work together: when the duty cycle is detected to be continuously saturated and accompanied by insufficient current margin or increased temperature, tap switching can be triggered first to reduce the stress on the fine-tuned device; if the tap switching conditions are not met or the device cannot be restored after switching, the device will switch to derating, coasting or bypassing and wait for the fault to be cleared.

[0068] In this embodiment, the system is set to a test mode: under safe conditions such as DC or low-voltage AC input, the controller outputs a preset PWM sequence to perform self-tests on the drive link, sampling link, communication link and actuator operation; in the test mode, the protection threshold can be relaxed or reset according to the preset strategy, but the basic hardware interlock and emergency shutdown path are still retained to ensure test safety.

[0069] In this embodiment, to improve scalability, the power board can adopt a modular power unit parallel / multi-phase expansion design; when capacity expansion is required, it can be achieved by increasing the number of power boards and configuring parallel parameters and current sharing strategies in the core board. The expansion board and the baseboard interface remain consistent to reduce modification costs.

[0070] In this embodiment, the converter is suitable for scenarios such as distribution area voltage management, distributed new energy grid connection interface, AC load power supply and voltage regulation. When the output voltage deviates from the target due to changes in grid impedance or sudden load changes, the controller performs mode discrimination and starts closed-loop regulation based on voltage and current sampling results. The output voltage is dynamically restored and stabilized by rapidly adjusting the duty cycle. When it is detected that the relationship between the target output voltage and the current input / output effective value has changed and it is necessary to switch between boost regulation mode and buck regulation mode, the controller triggers the port switching actuator to complete the switching of the input / output correspondence between the high voltage end and the low voltage end under the condition of interlocking. After the switching is completed, the high-frequency chopping regulation in the corresponding mode is restored. When the output deviation is within the allowable range and the load is light, the system automatically enters the coasting or bypass state to reduce switching losses and improve operating efficiency.

[0071] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A control method for a multi-board modular AC step-up / step-down converter, characterized in that, Includes the following steps: S1: Acquire input voltage, output voltage and current signals and calculate the effective value and average value, and read the target output voltage and control parameters; S2: Based on the deviation between the target output voltage and the output voltage, and the relationship between the input voltage and the output voltage, the mode is determined to determine either the boost regulation mode or the buck regulation mode, and a mutual exclusion flag is set to prevent the other mode from being activated at the same time. S3: Establish a voltage outer loop and calculate the desired duty cycle based on the deviation. Further establish a current inner loop / current limiting loop to form a dual-loop control. The resulting duty cycle is limited and falls into a preset range. S4: Generate a complementary PWM drive sequence with dead time based on the half-cycle polarity of the power grid, and perform high-frequency chopping drive on only one set of power switch branches in the boost branch or buck branch according to the mutual exclusion flag, so as to complete the boost regulation or buck regulation. S5: Perform state switching control based on bypass criteria and coasting criteria. When entering the bypass state, control the bypass actuator to establish a bypass power path and prohibit the output of the PWM drive sequence. Also, prevent the port switching actuator action and the high-frequency chopper drive from occurring simultaneously through interlock logic. When exiting the bypass state, first release the bypass power path and complete the interlock verification before restoring the output of the PWM drive sequence. It will also perform shutdown protection, actuator safety reset and fault information reporting when a fault is triggered.

2. The control method according to claim 1, characterized in that, The mode discrimination includes: entering boost regulation mode when the effective value of the target output voltage is higher than the effective value of the output voltage and the boost condition is met; entering buck regulation mode when the effective value of the target output voltage is lower than the effective value of the output voltage and the buck condition is met; entering bypass state when the output voltage is within the allowable deviation range and the bypass criterion is met, and controlling the bypass actuator to establish a bypass power path and prohibiting PWM output; and / or entering coasting state when the coasting criterion is met.

3. The control method according to claim 1, characterized in that, The PWM drive sequence generation includes: inserting dead time into complementary drive signals within the same power switch branch, and setting interlock logic for the boost branch, buck branch, and bypass actuator.

4. The control method according to claim 1, characterized in that, The coasting state includes: when the output voltage deviation is less than a first threshold and the current is less than a second threshold, reducing the switching frequency or pausing high-frequency chopping and maintaining the necessary synchronous conduction path; when the deviation or the current exceeds the corresponding threshold, exiting the coasting state and resuming closed-loop regulation.

5. The control method according to claim 1, characterized in that, The bypass state includes: when the output voltage deviation is less than the third threshold and the bypass allowable conditions are met, the bypass actuator is controlled to establish a bypass power path and the high-frequency chopper PWM output is prohibited; when the output voltage deviation exceeds the third threshold or the load current is detected to exceed the fourth threshold, the bypass actuator is disconnected and the closed-loop chopper regulation in the boost regulation mode or buck regulation mode is restored; wherein, interlocking conditions are set between the bypass actuator and the boost branch, the buck branch and the port switching actuator.

6. The control method according to claim 1, characterized in that, The fault protection includes at least one of the following: output overvoltage, output undervoltage, input undervoltage, overcurrent, overtemperature, drive fault, and communication fault. After the fault meets the duration threshold, the controller enters the protection state, shuts down the PWM output, and controls the port to switch the actuator and / or bypass the actuator to a safe position. At the same time, it generates a fault code and reports it through the expansion board and communication.

7. A multi-board modular AC buck-boost converter capable of implementing the method of any one of claims 1-6, comprising: A power board, a baseboard, a core board, and an expansion board, characterized in that the power board includes a bidirectional switching network, a filter network, and a port switching actuator and a bypass actuator electrically connected to the bidirectional switching network; the bypass actuator and the bidirectional switching network are interlocked. The baseboard includes a sampling isolation and signal conditioning circuit, a drive interface convergence circuit, a power management circuit, and an actuator drive circuit. The baseboard isolates the PWM signal and control signal of the core board and outputs them to the power board and the port switching actuator and bypass actuator. The core board includes a digital controller, an analog-to-digital conversion sampling channel, a PWM output channel, and a memory; The expansion board includes a human-computer interaction module and a communication module; The converter operates in either boost regulation mode or buck regulation mode at any given time, and the boost regulation mode and buck regulation mode are mutually exclusive. The bidirectional switching network includes at least two sets of power switch branches for boost regulation and buck regulation, respectively. An interlock logic is provided between the power switch branches and the bypass actuator to prevent high-frequency chopping drive of the power switch branches when the bypass actuator forms a bypass power path. Furthermore, at any given time, only one of the power switch branches corresponding to either boost regulation or buck regulation is allowed to engage high-frequency chopping, thus preventing simultaneous bypass conduction and high-frequency chopping, and preventing simultaneous high-frequency chopping of the boost and buck branches. The bidirectional switching network consists of at least one set of bidirectional switching units composed of back-to-back power switching devices, where the power switching devices are MOSFETs, IGBTs, or combinations thereof. Each bidirectional switching unit is equipped with an isolation gate drive circuit, which at least possesses one or more of the following: undervoltage lockout, overcurrent / desaturation detection, and shutdown protection. The port switching actuator, which is a contactor, relay, or solid-state switch array, is used to configure the low-voltage side as the input side and the high-voltage side as the output side in boost regulation mode, or the high-voltage side as the input side and the low-voltage side as the output side in buck regulation mode, so as to realize the switching between boost and buck operating paths. The bidirectional switch network continuously regulates the target output voltage through high-frequency chopping in the operating path. The bypass actuator is used to establish a bypass power path in the bypass state, and interlocks with the port switching actuator and the bidirectional switch network to prevent high-frequency chopping drive and operating path switching in the bypass state, and prevents bypass conduction during operating path switching to avoid the risks of mis-conduction, shoot-through, or circulating current.

8. The converter according to claim 1, characterized in that, The sampling isolation and signal conditioning circuit includes at least a voltage sampling channel and a current sampling channel. The voltage sampling channel and the current sampling channel are used to isolate, sample, condition, and filter the input voltage, output voltage, and / or power device current, respectively, to match the analog-to-digital conversion sampling range and anti-interference requirements of the core board.

9. The converter according to claim 1, characterized in that, The core board is further used to calculate the effective value and average value based on the input voltage, output voltage and current sampling, and accordingly perform the discrimination between boost regulation mode and buck regulation mode, duty cycle calculation, amplitude limiting processing and PWM timing management.

10. The converter according to claim 1, characterized in that, The communication module includes a serial communication interface and an industrial bus interface. The core board maps the target output voltage, closed-loop parameters, threshold, delay, working mode and protection configuration into readable and writable registers, and supports online writing and storage into non-volatile memory through the communication module to achieve the functions of power-off preservation and power-on recovery.

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