Ultra-wideband multi-signal multi-domain modulation system simulating signal propagation

By using FPGA and control processing chip in synergy, multi-domain signal modulation of RF sensor systems is achieved, solving the problems of low efficiency and high cost in existing technologies, and supporting efficient signal-level simulation of multiple RF sensor platforms.

CN122178933APending Publication Date: 2026-06-0910TH RES INST OF CETC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
10TH RES INST OF CETC
Filing Date
2026-01-29
Publication Date
2026-06-09

AI Technical Summary

Technical Problem

Existing radio frequency sensor systems are inefficient and costly in laboratory environments for signal modulation testing, making it difficult to achieve highly realistic simulation of multiple radio frequency signals.

Method used

By employing the collaborative operation of an FPGA and a control processing chip, the intermediate frequency signal acquired by the ADC is detected and measured, and frequency, time, spatial and energy domain modulation processing is performed. Multiple signals are combined and output control is also performed to realize the analog propagation of multi-domain signals.

Benefits of technology

It increases the number of signals processed in multiple domains, supports signal-level hardware-in-the-loop simulation verification for multiple RF sensor platforms, improves testing efficiency and reduces costs.

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Abstract

This application discloses an ultra-wideband multi-signal multi-domain modulation system for analog signal propagation, including an FPGA and a control processing chip. The system performs analog signal propagation according to the following steps: the FPGA buffers multiple intermediate frequency (IF) signals acquired by an ADC and sends them back to the control processing chip; the control processing chip performs spectrum calculation, signal detection, and frequency measurement, calculates conversion parameters based on the measured frequencies, and sends them back to the FPGA; the FPGA, based on the received frequencies, copies the IF signals into multiple modulation processing channels according to the number of signals; different conversion parameters are used in different channels for down-conversion, filtering, and up-conversion recovery to obtain filtered signals; subsequently, the FPGA sequentially performs frequency domain Doppler modulation, time domain time delay modulation, spatial domain phase modulation, and energy domain power modulation on the independent signals in each modulation processing channel; after modulation, the FPGA performs combining and output control on the signals from different modulation processing channels, and finally outputs the IF signal through a DAC.
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