A device abnormal sound detection device and method based on wireless transmission

Abstract

The application relates to a device abnormal sound detection device and method based on wireless transmission, which comprises a master control module, a vibration sensing module for collecting three-axis vibration acceleration original data of the device, an acoustic sensing module for collecting acoustic original data of the device, and a signal processing module for performing digital filtering, frequency domain transformation and time domain feature calculation on the three-axis vibration acceleration original data to extract multi-dimensional vibration feature data. By integrating an IIS3DWB three-axis wideband acceleration sensor and a DFSDM digital MEMS microphone, the application realizes synchronous collection of vibration signals and acoustic signals, and compared with a single sensor scheme, the abnormal sound detection has a wider frequency band and a higher detection rate for different types of abnormal sound faults.

Description

Technical Field

[0001] This invention relates to the field of industrial equipment condition monitoring technology, and in particular to a device and method for detecting abnormal noises in equipment based on wireless transmission. Background Technology

[0002] During the operation of industrial equipment, faults such as bearing wear, abnormal gear meshing, and vibration of loose parts are often accompanied by abnormal sounds and changes in vibration characteristics. By collecting and analyzing the vibration and acoustic signals during equipment operation, early warning and diagnosis of faults can be achieved.

[0003] Currently, the main solutions for detecting abnormal noise in equipment are as follows: (1) Wired vibration monitoring system: The vibration sensor is connected to the data acquisition device via a wired connection, and then the data is transmitted to the host computer for analysis. This solution has complex wiring and high installation and maintenance costs, and is not suitable for distributed deployment or harsh working conditions.

[0004] (2) Portable inspection instrument: Manually carry the vibration measuring instrument to the site to collect data periodically. Due to the limited frequency of manual inspection, it is difficult to achieve real-time monitoring and it is easy to miss sudden abnormal events.

[0005] (3) Traditional wireless sensor nodes: They use short-range wireless communication methods such as WiFi or Bluetooth, which have problems such as limited communication distance and reliance on on-site network infrastructure, and have poor applicability in remote working conditions.

[0006] For example, Chinese patent CN114486128A discloses a vibration monitoring device that uses an accelerometer to collect equipment vibration data, performs simple threshold judgments using a microcontroller, and then uploads the data to a server. However, this solution has the following shortcomings: (1) Using only a single vibration sensor cannot simultaneously acquire acoustic frequency domain characteristics, and its ability to detect anomalies (such as howling, abnormal noise, air leakage sound, etc.) that are mainly characterized by acoustic features is insufficient; (2) The signal processing capability is limited, and it can only perform simple amplitude threshold comparison. It lacks frequency domain analysis capability (such as FFT spectrum analysis, fundamental frequency extraction, etc.), making it difficult to distinguish different types of abnormal vibration modes. (3) The local storage and playback function of the original waveform data has not been implemented, which makes it impossible to provide data support for subsequent offline in-depth analysis and fault mechanism research; (4) The power consumption management is crude and there is no periodic sleep-wake mechanism, making it difficult to operate for a long time in scenarios without external power supply.

[0007] Based on the above analysis, the existing abnormal noise detection technology for equipment has the following main technical problems: (1) Single perception dimension: Existing solutions usually only collect one signal from vibration or sound, which cannot achieve multimodal fusion perception of vibration and acoustics, resulting in insufficient accuracy and comprehensiveness of abnormal sound detection; (2) Weak edge signal processing capability: Existing nodes mostly use simple time-domain threshold judgment, lacking complete edge signal processing links such as FFT spectrum analysis, digital filtering (IIR / FIR), RMS calculation, velocity / displacement integration, etc., and cannot complete the extraction of multi-dimensional features locally; (3) Lack of original data storage capability: The existing solution lacks large-capacity local storage and cannot save the original waveform of the abnormal sound event in a standard audio format (such as WAV), which is not conducive to retrospective analysis. (4) The contradiction between communication and power consumption is prominent: the existing wireless monitoring schemes are difficult to balance long-distance communication capabilities and low power consumption, and cannot simultaneously meet the needs of wide-area coverage and long-term unattended operation.

[0008] In view of the above-mentioned shortcomings, the designer has actively researched and innovated in order to create a device and method for detecting abnormal noise in equipment based on wireless transmission, so as to make it more valuable for industrial use. Summary of the Invention

[0009] To address the aforementioned technical problems, the present invention aims to provide a device and method for detecting abnormal noise in devices based on wireless transmission.

[0010] To achieve the above objectives, the present invention adopts the following technical solution: One of the objectives of this invention is: A device noise detection device based on wireless transmission, comprising: The main control module uses a low-power microcontroller; The vibration sensing module, connected to the main control module, is used to collect raw triaxial vibration acceleration data of the equipment. The acoustic sensing module, connected to the main control module, is used to collect the device's raw acoustic data. The signal processing module, built into the main control module, is used to perform digital filtering, frequency domain transformation and time domain feature calculation on the raw triaxial vibration acceleration data to extract multidimensional vibration feature data. The data storage module, connected to the main control module, uses a NAND Flash memory chip to store raw acoustic data and / or raw vibration acceleration data. The clock module, connected to the main control module, uses an external real-time clock chip to provide timestamps for the data and has a built-in programmable countdown timer. The power management module is used to control the main control module to switch between deep sleep mode and working mode according to the timing signal of the clock module; The wireless communication module, connected to the main control module, uses cellular communication technology to upload multidimensional vibration characteristic data to a remote server.

[0011] As a further improvement of the present invention, the vibration sensing module is connected to the main control module via the SPI bus and data reading is triggered by a timer interrupt at a fixed period; the acoustic sensing module is connected to the main control module via the DFSDM interface and realizes continuous acquisition of acoustic data through DMA.

[0012] As a further improvement of the present invention, the signal processing module is specifically used for: IIR high-pass filtering was performed on the raw triaxial vibration acceleration data to remove DC and low-frequency drift components; The filtered acceleration data is processed by DC removal and windowing functions; Perform an FFT spectrum transformation on the windowed data, and extract the fundamental frequency and the corresponding amplitude from the obtained amplitude spectrum; The velocity and displacement are calculated by numerical integration of the filtered acceleration data, and the RMS effective values ​​of acceleration, velocity and displacement are calculated respectively. Perform the above processing independently for each of the X, Y, and Z axes.

[0013] As a further improvement of the present invention, the IIR high-pass filter is a first-order IIR high-pass filter with a cutoff frequency of 0.1Hz; the FFT transform is a 4096-point real-number FFT, with a Hanning window function applied before the transform; the numerical integration adopts the trapezoidal integration method, obtaining velocity data from the acceleration data by first integration and displacement data by second integration.

[0014] As a further improvement of the present invention, the signal processing module is implemented based on the ARM CMSIS-DSP library, and uses the arm_rfft_fast_f32 function to perform real number FFT and the arm_biquad_cascade_df1_q31 function to perform Biquad cascaded IIR filtering.

[0015] As a further improvement of the present invention, the data storage module adopts a QSPI NAND Flash memory chip, which is connected to the main control module through a Quad-SPI four-wire interface and stores the original waveform data in the standard WAV audio format; the page size of the memory chip is 2048 bytes, the erase granularity is 128KB, and it supports Quad I / O mode read and write and DMA transfer mode.

[0016] As a further improvement of the present invention, the clock module is an SD3077 real-time clock chip, which is connected to the main control module through software-simulated I2C bus; the user RAM area of ​​SD3077 is used to store system status flags during the deep sleep of the main control module.

[0017] As a further improvement of the present invention, the wireless communication module is an Air780EX Cat.1 4G module, which is connected via UART serial port and supports dynamic baud rate switching; the uploaded multi-dimensional vibration feature data is encapsulated in MQTT protocol format, and each data packet can buffer up to 10 sets of triaxial vibration feature data for batch transmission.

[0018] As a further improvement of the present invention, the power management module controls the on / off state of the sensor power domain and the wireless communication module power domain through independent GPIO signals; the deep sleep mode is the standby mode of the STM32 microcontroller; the hardware of the device adopts a three-board modular design, including a main control board carrying the main controller and sensor, a power board carrying the battery management and voltage regulation circuit, and a communication board carrying the 4G communication module.

[0019] The second objective of this invention is: A method for detecting abnormal device noise based on wireless transmission, applied in the device noise detection device as described above, includes the following steps: S1. System initialization: After the main control module is powered on or wakes up from hibernation, it initializes each peripheral module, reads system configuration parameters from external Flash, initializes the external RTC clock module and determines whether it is the first power-on, initializes the QSPI Flash memory, and starts acoustic sampling. S2. Multimodal data acquisition: Vibration data is read from the triaxial accelerometer at fixed intervals via timer interrupt, while acoustic data is continuously acquired via DMA mode through the DFSDM interface; S3. Edge signal processing: IIR high-pass filtering is performed on the vibration data in sequence to remove DC offset and low-frequency drift. After applying a window function, FFT transformation is performed to extract the fundamental frequency and amplitude from the amplitude spectrum. Velocity and displacement are calculated from acceleration through numerical integration and the RMS effective value is calculated separately. The above processing is performed independently for the X, Y and Z axes. S4. Data storage: Write the raw acoustic waveform data into the QSPI NAND Flash memory in WAV standard format, page by page. S5. Wireless data transmission: The extracted multidimensional feature data is uploaded in batches to the remote server in the form of structured data packets through the cellular communication module; S6. Power Management: Configure the countdown timer of the external RTC, enable the external wake-up pin, and control the main control module to enter deep sleep mode; when the countdown expires or an external event is triggered, the main control module is reset and restarted, returning to step S1.

[0020] By means of the above-described solution, the present invention has at least the following advantages: 1. Multimodal fusion sensing: By integrating the IIS3DWB triaxial broadband accelerometer (4kHz sampling) and the DFSDM digital MEMS microphone, the synchronous acquisition of vibration and acoustic signals is realized. Compared with the single sensor solution, the abnormal sound detection has a wider coverage frequency band (vibration 0~2kHz + acoustic full frequency band) and a higher detection rate for different types of abnormal sound faults. 2. Complete edge signal processing link: Based on the ARM CMSIS-DSP library, a complete processing link from raw data acquisition to multi-dimensional feature extraction is implemented on the low-power STM32L4 microcontroller (IIR filtering → DC removal → windowing → 4096-point FFT → fundamental frequency extraction → acceleration / velocity / displacement RMS calculation). There is no need to upload the raw large amount of data to the server for processing, which greatly reduces the amount of communication data and power consumption. 3. Standard WAV format local storage: It uses 128MB QSPI NAND Flash to store the raw waveform data of abnormal sound events in standard WAV audio format, supports high-speed read and write of Quad I / O and DMA transfer, and takes into account storage speed and data standardization, which facilitates retrospective analysis and fault mechanism research using general audio software after the fact. 4. Balancing wide-area communication and ultra-low power consumption: It adopts a 4G cellular network to achieve data transmission without distance limitations, and works with an external SD3077 RTC chip to implement a configurable interval periodic standby deep sleep wake-up strategy. During sleep, the main controller power consumption is reduced to the microampere level, which solves the contradiction between the high power consumption of the wide-area wireless communication module and long-term unattended operation. 5. Structured batch data transmission: Data is encapsulated using the MQTT protocol format, supporting batch buffering and transmission of up to 10 sets of vibration characteristic data, effectively reducing the number of 4G module power-on and communication times, and further reducing the overall system energy consumption; 6. Modular hardware architecture: The device hardware adopts a three-board separation design of main control board, power supply board and 4G communication board, which facilitates function tailoring and customized deployment for different application scenarios.

[0021] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the following are preferred embodiments of the present invention described in detail with reference to the accompanying drawings. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a system architecture block diagram of the abnormal sound detection device of the present invention; Figure 2 This is a schematic diagram of the hardware module connection relationship of the abnormal sound detection device of the present invention; Figure 3 This is the overall flowchart of the abnormal sound detection method of the present invention; Figure 4 This is a flowchart of the data processing link of the signal processing module of the present invention; Figure 5 This is a flowchart of the sleep / wake-up control process of the power management module of the present invention; Figure 6 This is a flowchart of the WAV file writing process of the data storage module of the present invention; Figure 7 This is a schematic diagram of the MQTT data packet structure of the present invention. Detailed Implementation

[0024] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and are not intended to limit the scope of the invention.

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0026] The main objective of this invention is: To address the technical problems of existing device noise detection technologies, such as limited sensing dimensions, insufficient edge signal processing capabilities, lack of local storage of raw data, and difficulty in balancing communication and power consumption, this invention provides a device noise detection apparatus and method based on wireless transmission.

[0027] Specifically: 1. A multimodal abnormal sound sensing device integrating a triaxial broadband vibration sensor and a digital acoustic sensor is provided to realize the synchronous acquisition of vibration signals and acoustic signals; 2. Implement a complete edge signal processing link based on the ARM CMSIS-DSP library, including IIR / FIR digital filtering, windowed FFT spectrum analysis, fundamental frequency extraction, RMS acceleration / velocity / displacement calculation, etc., and complete the real-time extraction of multi-dimensional features on a low-power microcontroller; 3. Implement large-capacity local WAV format waveform storage based on QSPI NAND Flash, supporting the original data tracing of abnormal sound events; 4. Implement a wide-area wireless data transmission strategy based on 4G cellular networks and a periodic deep sleep wake-up power management strategy based on an external RTC to resolve the contradiction between long-distance communication and long-term low-power operation.

[0028] To achieve the above objectives, the present invention provides the following technical solution: like Figure 1 and Figure 2 A device noise detection device based on wireless transmission includes a main control module, a vibration sensing module, an acoustic sensing module, a signal processing module, a data storage module, a wireless communication module, a power management module, and a clock module; wherein: The main control module uses an STM32L4 series ultra-low power microcontroller as the core control unit of the entire device, responsible for coordinating the working timing and data flow of each module; the microcontroller is equipped with a PLL phase-locked loop, and the main system clock operates at 48MHz; the microcontroller has a Standby deep sleep mode, which retains only the backup registers and RTC contents during sleep.

[0029] The vibration sensing module uses an IIS3DWB triaxial digital broadband accelerometer, which is connected to the main control module via an SPI bus. The vibration sensor has a sampling rate of 4000Hz and 4096 sampling points. The main control module triggers vibration data reading at 250-microsecond intervals (4kHz frequency) via timer interrupts to obtain raw X, Y, and Z axis acceleration data.

[0030] Vibration sensing module (IIS3DWB + SPI + timer interrupt) The IIS3DWB triaxial broadband accelerometer (with a flat response up to 6kHz) was selected. This sensor is specifically designed for industrial vibration monitoring, featuring built-in anti-aliasing filtering, a 4kHz sampling rate (compliant with Nyquist's theorem and covering the main frequency bands of mechanical faults), and strict synchronization with a timer interrupt via SPI bus, ensuring accurate time base for vibration data. While conventional vibration monitoring may use low-bandwidth sensors or polling readouts, this invention employs timer hard triggering + SPI readout, achieving periodic sampling with μs-level accuracy, laying the foundation for subsequent FFT analysis.

[0031] This combination of "sensor + interface + triggering method" is not a conventional choice. The conventional approach is to use an ADC to acquire data from an analog sensor or to simply poll a digital sensor. However, this invention utilizes the digital output and SPI interface of the IIS3DWB, combined with a timer interrupt, to achieve high-precision synchronous sampling. This requires overcoming timing conflicts when continuously reading multi-axis data, which is a non-obvious choice for those skilled in the art when facing the problem of "low-cost, high-precision vibration acquisition".

[0032] The acoustic sensing module uses a digital MEMS microphone and is connected to the main control module through a DFSDM (Digital Filter / Sigma-Delta Modulator) interface. The DFSDM interface achieves efficient and continuous acquisition of acoustic data through DMA (Direct Memory Access), and data transfer can be completed without CPU intervention.

[0033] Acoustic sensing module (digital MEMS microphone + DFSDM + DMA) DFSDM is a digital audio interface unique to the STM32L4 series, specifically designed for connecting Sigma-Delta modulators (such as PDM microphones). While ordinary developers might use an I2S interface or an analog microphone + ADC, this invention cleverly utilizes the parallel filtering capabilities of DFSDM to directly process PDM streams and output PCM data, while simultaneously achieving continuous acquisition with "zero CPU intervention" through DMA. This configuration requires a deep understanding of the STM32's DFSDM registers, filter configurations, and DMA descriptors; it is far more than simple library function calls.

[0034] A typical application of DFSDM is audio processing, but its use in industrial acoustic monitoring (considering anti-aliasing, dynamic range, etc.) and synchronization with vibration acquisition requires customized filter parameters (such as sinc filter order and decimation rate) to match the 4kHz vibration sampling interval. In this solution, acoustic data is acquired independently via DMA without interfering with vibration interruptions, demonstrating ingenious system-level design.

[0035] The signal processing module is implemented on the main control microcontroller based on the ARM CMSIS-DSP library, and includes: The digital filtering submodule includes a first-order IIR high-pass filter and a Biquad cascaded IIR filter. The first-order IIR high-pass filter has a cutoff frequency of 0.1Hz and is used to remove DC offset and low-frequency drift in the acceleration signal. The Biquad cascaded filter is implemented using the Q31 fixed-point format of the Direct Form I structure. Spectrum Analysis Submodule: Performs frequency domain transformation on the windowed vibration signal using a 4096-point real-valued FFT; applies a Hanning window function to the input signal before the FFT to reduce spectral leakage; calculates the amplitude spectrum after the FFT is completed, and detects peak values ​​after excluding DC components from the amplitude spectrum to extract the fundamental frequency and corresponding amplitude. Multidimensional feature calculation submodule: Calculates the effective RMS value of the filtered acceleration data; converts the acceleration data into velocity and displacement data through numerical integration, and calculates the velocity RMS and displacement RMS respectively; calculates all the above feature parameters independently for the X, Y, and Z axes.

[0036] Signal processing module (CMSIS-DSP complete link) Implementing a complete vibration signal processing chain (IIR filtering → DC removal → windowing → 4096-point FFT → fundamental frequency extraction → acceleration / velocity / displacement RMS) on a low-power MCU is not simply a matter of piecing together standard DSP functions.

[0037] 0.1Hz high-pass filtering: This addresses potential DC bias and extremely low-frequency drift (such as temperature effects) in acceleration signals. However, the selection of the 0.1Hz cutoff frequency requires a balance: too low a frequency will not effectively remove drift, while too high a frequency will filter out useful low-frequency vibrations (such as rotational speed information below 0.5Hz). Through theoretical calculations and experimental verification, 0.1Hz can effectively suppress temperature drift while retaining useful information.

[0038] 4096-point FFT: The 4096 sampling points represent a trade-off between frequency resolution (0.977Hz) and computational burden. Performing a 4096-point real-value FFT on an STM32L4 takes approximately tens of milliseconds, which can be completed within the acquisition interval without affecting real-time performance. Too few points would result in insufficient resolution, while too many points would overwhelm the MCU. This choice reflects a precise understanding of hardware performance and monitoring requirements.

[0039] Trapezoidal integration is used to calculate velocity and displacement. Directly integrating acceleration introduces a trend term, leading to divergent results. This invention combines high-pass filtering to remove DC current, then uses trapezoidal integration, and experimentally verifies the effectiveness of the integration (e.g., the integrated velocity RMS matches the theoretical value).

[0040] Although FFT and RMS are classic algorithms, achieving "real-time, multi-axis, multi-feature" extraction on resource-constrained MCUs, and seamlessly integrating it with subsequent storage, transmission, and sleep processes, requires fine-grained optimization of the fixed-point / floating-point performance, memory usage, and execution cycle of the CMSIS-DSP library.

[0041] The data storage module uses a W25N01GV QSPI NAND Flash memory chip with a capacity of 128MB (1Gbit), which is connected to the main control module via a Quad-SPI four-wire interface. The page size of the memory chip is 2048 bytes, totaling 65536 pages, divided into 1024 blocks, each with 64 pages, and an erase granularity of 128KB block erase. The memory module supports Quad I / O mode read / write and DMA transfer mode, and is used to store acoustic and vibration raw waveform data packaged in WAV standard audio format, as well as system configuration parameters.

[0042] Data storage module (QSPI NAND Flash + WAV format) NAND Flash is typically used for large-capacity code storage or file systems, but this invention directly writes data page by page in WAV format, eliminating file system overhead. This requires developers to design WAV file header pre-filling, page write logic, and bad block management (enabled by ECC via a status register). In particular, the enabling of Quad I / O mode and DMA transfer significantly improves write speed, allowing data to be stored quickly during acquisition intervals without affecting sampling real-time performance. The choice of WAV format allows raw data to be directly opened with common software such as Audacity, facilitating post-analysis. This combination of "embedded storage + standard format" reflects consideration for user convenience.

[0043] Traditional wireless sensors often use SD cards for storage or simple circular buffers. The QSPI NAND Flash of this invention features high integration, low power consumption, and small size, and ensures data reliability through hardware ECC, making it a preferred solution under the constraints of "low cost, small size, and low power consumption." Storing raw data in WAV format requires encapsulating the binary data into a RIFF structure, involving precise filling of fields such as byte order, number of channels, and sampling rate; it is not a simple data dump.

[0044] The wireless communication module uses the Air780EX 4G cellular communication module, which connects to the main control module via a UART serial port. The baud rate supports dynamic configuration (default 115200bps, switches to 921600bps during data transmission). The 4G module is controlled via AT command set and supports data upload in TCP client mode. The uploaded data adopts the structured MQTT packet format. Each packet contains the device ID, Unix timestamp, sampling parameters, and up to 10 sets of buffered vibration characteristic data (including the fundamental frequency, amplitude, acceleration RMS, velocity RMS, and displacement RMS of the X / Y / Z axes), battery voltage, and ambient temperature.

[0045] Wireless communication module (Air780EX + MQTT + bulk transmission) 4G modules typically have high power consumption. This invention optimizes this by using independent power control (VCC4G_ON / OFF) and batch transmission: the module is powered on only when uploading is needed, a TCP connection is established, and power is immediately cut off after sending 10 sets of feature data at once. This strategy requires designing a complex AT command state machine to handle network registration, connection maintenance, and abnormal reconnection, while dynamically switching the baud rate (115200→921600) to shorten transmission time. The MQTT protocol was chosen for its lightweight nature and cloud platform compatibility, but packaging the feature data into a custom JSON or binary format requires coordination of data structures and server parsing.

[0046] Using 4G modules to transmit data is a common practice, but by combining batch buffering (10 groups), dynamic baud rate switching, independent power control and RTC collaborative wake-up, a complete low-power transmission solution is formed.

[0047] The clock module uses an external real-time clock chip, SD3077, and connects to the main control module via a software-simulated I2C bus. The clock module provides the system with a precise timestamp and has a built-in programmable countdown timer that supports four clock source selections: 4096Hz, 1024Hz, 1 second, and 1 minute. The user RAM area of ​​the clock module is used to store system status flags (such as wake-up flags) to ensure that data is not lost during the main controller's deep sleep.

[0048] Clock module (SD3077 + software I2C + user RAM) The SD3077 not only provides precise time, but its programmable countdown timer and user RAM are crucial for enabling deep sleep wake-up. Conventional designs might use the MCU's internal RTC, but the internal RTC requires continuous power in Standby mode and cannot be independently timed to wake up (the CPU stops in Standby mode and requires an external event). The SD3077's timer can run independently, waking up the MCU. More importantly, the user RAM stores the wake-up flag (WAKESRAM), resolving the distinction between initial power-on and normal wake-up, ensuring the system correctly configures the timer. Software-simulated I2C avoids conflicts caused by hardware I2C being occupied, demonstrating flexible design under limited hardware resources.

[0049] While ordinary RTCs only provide time retention, the SD3077's timer and RAM functions are fully utilized to achieve "autonomous wake-up without MCU involvement + state retention".

[0050] The power management module includes a power board and a power control circuit. The power control circuit controls the independent on / off switching of the 3.0V and 4G module power supplies (VCC3V0_ON / OFF, VCC4G_ON / OFF) via GPIO. The device also includes an ADC battery voltage monitoring channel for real-time monitoring of battery power status.

[0051] Power management module (independent GPIO control + Standby mode) Fine-grained power management is achieved by controlling the power supply of the sensor domain and the 4G module separately through two GPIOs (VCC3V0_ON / OFF and VCC4G_ON / OFF). During sleep mode, not only does the MCU enter standby mode (microampere level), but the sensors and 4G module are also completely powered off, minimizing system power consumption. This three-level power domain division (main controller, sensor, 4G) requires a holistic understanding of circuit design and power budget.

[0052] Simple low power consumption might involve putting the MCU to sleep while keeping peripherals powered, but this invention achieves "power outage" rather than "current cut-off," resulting in superior performance. Furthermore, by monitoring battery voltage via an ADC, the reporting interval can be dynamically adjusted, enabling adaptive energy saving.

[0053] In addition, modular hardware architecture (three-board separation) The separate design of the main control board, power supply board, and 4G communication board facilitates functional customization and upgrades. For example, the 4G board can be replaced with an NB-IoT or LoRa board to adapt to different scenarios. This modularity requires defining unified inter-board connector interfaces and electrical protocols, involving mechanical structure and electrical compatibility design, and is not a simple separation. Industrial monitoring devices often adopt an integrated design to reduce costs. The three-board separation of this invention achieves configurability while maintaining a compact size, reflecting forward-looking consideration for various application scenarios.

[0054] This invention is based on the synergistic cooperation between the above-mentioned modules: 1. Synergy between multimodal acquisition and edge processing Collaborative approach: The vibration sensor (timer interrupt) and the acoustic sensor (DMA) work in parallel without interference. Signal processing is triggered after 4096 vibration data points are collected, while acoustic data continues to be acquired via DMA. The signal processing module uses the CMSIS-DSP library to quickly calculate features, taking approximately tens of milliseconds. During this time, acoustic data continues to be stored in the buffer, and after processing, the acoustic data can be written to Flash. This "acquisition-processing-storage" pipeline design ensures no data loss and that processing does not affect the next round of acquisition.

[0055] This invention resolves the conflict between real-time performance and power consumption: If a polling method is used, the CPU must continuously wait for data, resulting in high power consumption; if processing is too slow, subsequent data will be missed. This invention achieves near real-time processing on a low-power MCU through interrupts, DMA, and a high-efficiency DSP library, creating conditions for subsequent sleep mode.

[0056] 2. Collaboration between edge processing and local storage Collaborative approach: Feature data extracted by the signal processing module is used for wireless transmission, while raw waveform data (acoustic + optional vibration) is stored in local Flash memory. The roles are clearly defined: feature data is lightweight and can be uploaded frequently; raw data is only stored when an anomaly occurs (or stored on demand) for in-depth analysis. This "edge feature + raw backtracking" model reduces communication overhead while preserving the integrity of fault recovery.

[0057] Traditional solutions either transmit only features (losing original information) or transmit all original data (high power consumption). This invention achieves a "trade-off balance" through local large-capacity storage, representing an innovative application of data layering processing.

[0058] 3. Synergy between local storage and wireless transmission Collaboration method: WAV files stored in local Flash memory can be exported via USB or uploaded via a 4G module when necessary (e.g., remote request). The wireless transmission module not only uploads real-time data but can also respond to server commands to read historical data from Flash memory for retransmission. This dual "offline + online" access path enhances system reliability.

[0059] When the 4G network is unavailable, data is temporarily stored locally and retransmitted once the network is restored, thus avoiding data loss. This design requires Flash storage space management and a breakpoint resume mechanism, demonstrating the system's robustness.

[0060] 4. Synergy between wireless transmission and power management Collaboration method: The power management module wakes up the system according to the RTC timer, completes one round of data acquisition and processing, buffers the feature data into 10 sets, and then sends them uniformly by the 4G module. Immediately after transmission, the 4G power is turned off and the MCU enters Standby mode. The RTC operates on an independent timer; upon the next wake-up, the MCU is reset and restarted, and reinitialized.

[0061] This is the core synergy of the invention: the high power consumption of 4G is offset by the deep sleep strategy of RTC. Traditional 4G solutions must remain connected to stay online, resulting in extremely high power consumption. This invention, through a periodic "acquisition-processing-transmission-sleep" working mode, ensures that the 4G module is powered off most of the time, reducing average power consumption to the microampere level, thus achieving a balance between wide-area communication and long battery life. The batch transmission with 10 buffers further reduces the number of 4G module power-ups and connection duration, which is key to the synergistic optimization.

[0062] 5. Coordination between clock module and power management Coordination mechanism: The SD3077 not only provides wake-up timing, but its user RAM also stores wake-up flags and system status. When the MCU's RAM is lost in Standby mode, the RTC's user RAM is retained, allowing the system to determine whether it's the first power-on or a normal wake-up upon the next wake-up, thus deciding whether to reconfigure the timer. This "non-volatile state retention" mechanism ensures the continuity of periodic operation.

[0063] Without user RAM, the RTC needs to be reconfigured after each wake-up, but it's impossible to distinguish whether configuration is required (repeated configuration may lead to timing errors). This invention utilizes the RTC's internal RAM to achieve state persistence, providing a low-cost and ingenious solution.

[0064] 6. Synergy between signal processing and wireless transmission Collaboration method: The 15-dimensional feature data (three-axis fundamental frequency, amplitude, RMS acceleration, RMS velocity, and RMS displacement) extracted by the signal processing module, along with battery voltage, temperature, etc., are packaged into MQTT data packets. Due to the large number of feature data dimensions and the limited capacity of each data packet, 10 sets of buffered batch transmissions are designed. After receiving the data, the server can directly use it for the fault diagnosis model without further processing of the original data.

[0065] The chosen feature extraction algorithm (fundamental frequency + three-axis RMS) is specifically designed for rotating machinery faults, covering key information in both the frequency and time domains, and is compatible with the subsequent batch transmission strategy. If too few features are extracted, the diagnostic accuracy will be low; if too many, the data packets will be too large. A combination of 15-dimensional features and 10 buffers is the optimal combination after experimental optimization.

[0066] 7. Synergy between hardware modularity and software configurability Collaboration method: The three-board separated hardware architecture allows for flexible replacement of communication modules, while the software can adapt to different modules through conditional compilation or configuration parameters (such as modifying the AT command set when switching to NB-IoT). At the same time, parameters such as reporting interval, number of sampling points, and number of FFT points can be configured locally via USB or remotely distributed, achieving hardware and software decoupling.

[0067] This design allows a single solution to be adapted to various industrial scenarios (such as 4G in remote areas, wired connections in mines, and WiFi in cities), reducing the cost of customized development and demonstrating a forward-looking approach.

[0068] like Figure 3 The present invention also provides a method for detecting abnormal noise in devices based on wireless transmission, comprising the following steps: S1. System Initialization Steps: After the main control module powers on or wakes from sleep mode, it sequentially initializes the system clock, GPIO, ADC, QSPI, DMA, DFSDM, timer, UART, and USB peripherals; turns on the 3.0V and 4G module power supplies; initializes system parameters by reading the configuration parameters stored in the external Flash; initializes the external RTC clock module and determines whether it is the first power-on (by reading the flag bit of the RTC control register). If it is the first power-on, the wake-up flag is cleared; initializes the external QSPI Flash memory and verifies the chip ID; initializes the WAV file header information and data storage structure; and starts acoustic sampling.

[0069] S2. Multimodal data acquisition steps: S2a, Vibration Data Acquisition: Timer TIM3 generates an interrupt with a 250-microsecond cycle. In the interrupt service routine, the raw X, Y, and Z axis acceleration data are read from the IIS3DWB sensor via the SPI bus and stored sequentially into the sampling buffer. When the sampling count reaches the preset number of sampling points (4096 points), a sampling completion flag is set. S2b, Acoustic Data Acquisition: The DFSDM peripheral continuously acquires acoustic data from the digital MEMS microphone via DMA. After the DMA transfer is completed, an interrupt callback is triggered, and the data is automatically stored in the circular buffer.

[0070] S3. Edge signal processing steps: After the sampling completion flag is set, the following processing chain is executed on the vibration data: S3a, Digital Filtering: Apply a first-order IIR high-pass filter (cutoff frequency 0.1Hz) to the X, Y, and Z axis acceleration data respectively to remove DC offset and low-frequency drift components; S3b, Windowed FFT Spectrum Analysis: First, calculate the mean of the filtered acceleration data and remove the DC component. Then, apply the Hanning window function and perform a 4096-point real-valued FFT transformation. Calculate the amplitude spectrum of the FFT output. After removing the DC component (index 0) from the amplitude spectrum, search for the maximum peak value. Convert the frequency index corresponding to the peak value into the actual frequency value as the fundamental frequency, and use the peak amplitude as the amplitude corresponding to the fundamental frequency. S3c, Multidimensional RMS Feature Calculation: Calculate the effective value of acceleration RMS for the filtered acceleration data; perform a numerical integration on the acceleration data using the trapezoidal integral method to obtain the velocity signal, and calculate the velocity RMS; perform another numerical integration on the velocity signal to obtain the displacement signal, and calculate the displacement RMS. S3d, Feature Data Encapsulation: Encapsulates the fundamental frequency, amplitude, acceleration RMS, velocity RMS, displacement RMS of the three axes, as well as parameters such as battery voltage and ambient temperature, into a structured data packet.

[0071] S4. Data storage steps: In the main loop, continuously check if there is WAV audio data to be stored; when there is data to be stored, write the WAV file header and audio sampling data to the QSPI NAND Flash memory page by page, with each page containing 2048 bytes; before writing, perform a block erase operation (128KB granularity), and after writing, verify the BUSY status to ensure the operation is completed.

[0072] S5. Wireless data transmission steps: Send AT commands to the Air780EX 4G module via UART to establish a TCP client connection; upload the structured data packet encapsulated in step S3d to the remote server via the 4G network; the data packet adopts the MQTT protocol format and supports batch buffering of up to 10 sets of vibration characteristic data to reduce the number of communications and reduce power consumption.

[0073] S6. Power Management Steps: After the data acquisition and transmission tasks are completed, the main control module executes the following low-power control process: S6a: Read the wake-up flag (WAKESRAM) in the external RTC user RAM to determine whether the RTC timed wake-up is configured; S6b: If not configured, calculate the countdown seconds based on the reporting interval (Post_interval) in the system parameters, configure the countdown timer of the SD3077 RTC (select 1 second as the clock source), and set the wake-up flag in the RTC user RAM; S6c: Enables the STM32's external wake-up pin (WKUP2, low-level trigger) and clears the wake-up flag; S6d: Calls the HAL library function to enter Standby deep sleep mode; the main controller enters a microampere-level power consumption state, retaining only backup domain power supply; S6e: When the RTC countdown expires or the external wake-up pin is triggered, the main control module resets and restarts, returning to step S1 to execute the next data acquisition cycle.

[0074] S7. Local Interface Steps: The device also supports connection to a host computer via a USB CDC virtual serial port to realize local parameter configuration, firmware upgrade and data export functions.

[0075] First embodiment of the present invention: Hardware configuration of the abnormal sound detection device See Figure 1 and Figure 2 The abnormal noise detection device provided in this embodiment includes the following hardware modules: 1. Main control module The main control module uses STMicroelectronics' STM32L496RET6 ultra-low power microcontroller, which is based on the ARM Cortex-M4F core and features a floating-point unit (FPU) and DSP instruction set extensions.

[0076] The system clock configuration is as follows: An MSI (Multi-Speed ​​Internal) oscillator is used, with a clock range of RCC_MSIRANGE_10 (approximately 32MHz). Frequency multiplication is achieved through a PLL (phase-locked loop), with PLL parameters configured as PLLM=5, PLLN=30, PLLP=DIV2, PLLQ=DIV4, and PLLR=DIV4. The final system master clock, SYSCLK, operates at 48MHz. The AHB bus and APB1 / APB2 buses are not frequency-divided and operate with the same clock frequency as the system clock. The Flash wait period is configured as FLASH_LATENCY_2. The MSIPLL automatic calibration mode is enabled to improve clock accuracy.

[0077] This microcontroller features multiple low-power modes. This solution utilizes its Standby mode to achieve deep sleep. In this mode, the main power domain is shut down, and only the backup domain (including backup registers and external interrupt wake-up logic) is powered. The typical sleep current is as low as microamps.

[0078] 2. Vibration sensing module The vibration sensing module uses STMicroelectronics' IIS3DWB triaxial digital vibration sensor. This sensor is an ultra-wideband industrial-grade accelerometer with a built-in Sigma-Delta ADC, outputting digital acceleration data with a configurable range.

[0079] The sensor is connected to the main control module via the SPI3 bus. The SPI pins are assigned as PC10-SCK, PC11-MISO, and PC12-MOSI. The chip select signal CS is connected to the PA15 GPIO output pin.

[0080] Data acquisition timing is controlled by timer TIM3. TIM3 is configured with a 250-microsecond overflow cycle (i.e., a 4kHz interrupt frequency). Each time a TIM3 interrupt is triggered, the interrupt service routine reads the raw 16-bit acceleration data of the X, Y, and Z axes of the IIS3DWB via SPI3 and stores the floating-point converted acceleration values ​​into three independent sampling buffers (4096 float sample points per axis). Simultaneously, a sampling counter xyzcount is maintained. When the count reaches the preset XYZcountMax (default 4096), the sampling flag sample_flag is set to the SAMPLE_CALC state, notifying the main loop to start signal processing.

[0081] 3. Acoustic sensing module The acoustic sensing module uses a digital MEMS microphone, which is connected via the DFSDM1 (Digital Filter for Sigma-Delta Modulators) peripheral interface built into the STM32L496RE.

[0082] The DFSDM1 is configured in Filter 0 (FLT0) mode to receive a 1-bit PDM (Pulse Density Modulation) data stream from the microphone output, which is then extracted by the internal sinc digital filter and output as multi-bit PCM audio data.

[0083] Data transmission uses DMA1 channel 4 in a loop mode to achieve continuous audio data acquisition without CPU intervention on a sample-by-sample basis. Upon completion of the DMA transfer, half-full and full-full interrupt callbacks are triggered, enabling double-buffered data processing.

[0084] 4. Data storage module like Figure 6 The data storage module uses Winbond's W25N01GV QSPI NAND Flash memory chip with a capacity of 1Gbit (128MB).

[0085] The memory chip connects to the main control module via the QUADSPI peripheral interface. The QSPI interface supports two modes: Standard SPI (1-wire) and Quad SPI (4-wire). In this solution, the Quad I / O mode is enabled by setting the QE bit of Status Register 2 during initialization to achieve the maximum read and write throughput.

[0086] The memory organization structure is as follows: Page size: 2048 bytes Total Page Number: 65536 Block size: 64 pages / block Total number of blocks: 1024 Erase Size: 128KB (1 block) The read operation process is as follows: First, send the Page Read command (0x13) to load the data of the specified page from the NAND array into the internal data buffer. After waiting for the BUSY flag to be cleared, send the Fast Read Quad I / O command (0xEB) to read the data from the internal buffer into the MCU memory at high speed in 4-wire mode.

[0087] The write operation process is as follows: First, send the Write Enable command (0x06), then send the Load Random ProgramData command (0x84) to write the data to the specified column address of the internal data buffer. After waiting for BUSY to be cleared, send the ProgramExecute command (0x10) to program the buffer data to the specified page of the NAND array. Finally, wait for the programming to complete.

[0088] The erase operation is performed in 128KB blocks, sending a Block Erase command (0xD8) and providing the block address.

[0089] During chip initialization, the JEDEC Device ID (expected value 0xEFAA21) is read to verify the chip model, and Status Register 1 is written to 0x00 (clear protection bit) and Status Register 2 is written to 0x18 (enable ECC and Quad modes).

[0090] The storage module also supports DMA mode read (HAL_QSPI_Receive_DMA) and Memory Mapped mode (direct CPU address access), which can be flexibly selected according to the application scenario.

[0091] The WAV file storage format uses the standard RIFF WAV format, containing a 44-byte standard WAV file header (including RIFF identifier, file size, fmt block, sample rate, bit depth, number of channels, data block, etc.), followed by the audio PCM sample data. During system initialization, wavHeader_Init() is called to pre-fill the WAV file header, and during recording, the audio data acquired by DFSDM is continuously written to Flash sequentially, page by page (2048 bytes / page).

[0092] 5. Wireless communication module The wireless communication module uses Air780EX Cat.1 4G cellular communication module from Air Technologies, which supports LTE Cat.1 network standard.

[0093] The 4G module connects to the main control module via the USART1 serial port, with pins configured as PA9-TX and PA10-RX. The serial port is initialized to a baud rate of 115200bps, which is dynamically switched to 921600bps during data transmission using the setBaudRate() function to improve data throughput. USART1 employs an interrupt-driven receive mode, triggering a receive interrupt for each received byte.

[0094] The power supply of the 4G module is independently controlled by the VCC4G_ON / OFF GPIO signal of the main control module. When communication is not required, the power supply of the 4G module can be completely turned off to reduce system power consumption.

[0095] The communication protocol adopts TCP client mode, and the air780ex_tcp_client_process() function is continuously called in the main loop to drive the 4G communication state machine. The communication process includes: module power-on initialization → AT command handshake → network registration → APN configuration (supports user-defined APN) → TCP connection establishment → data transmission → connection maintenance.

[0096] like Figure 7 Each data packet can buffer 10 sets (MQTT_BUFFER_SIZE=10) of complete triaxial vibration characteristic data, enabling batch transmission to reduce the number of communications by the 4G module.

[0097] 6. Clock module The clock module uses the SD3077 real-time clock chip, with a 7-bit I2C slave address of 0x64 (8-bit address 0xC8).

[0098] Since the STM32L496RE's hardware I2C peripherals are already occupied by other functions, this solution uses software-simulated I2C (bit-banging) for communication. The I2C SCL and SDA signals are connected to the PB4 and PB5 GPIO pins respectively, configured as open-drain output mode. The I2C timing delay parameter WAITEDELAY is set to 50 cycles.

[0099] The SD3077 provides the following functions: (1) Time preservation: The Time_Def structure contains seven BCD-encoded fields: seconds, minutes, hours, weekdays, days, months, and years. Time is read and written using the RTC_WriteDate() and RTC_ReadDate() functions. The read time is used to add a Unix timestamp to the collected data.

[0100] (2) Countdown Timer: The SD3077 has a built-in programmable countdown timer, which can be configured through the CountDown_Def structure. It supports four clock sources (4096Hz, 1024Hz, 1 second, 1 minute) and allows setting the initial countdown value and interrupt mode. This solution uses this function to implement sleep timer wake-up.

[0101] (3) User RAM: The SD3077 provides a small amount of user RAM space (addresses 0x2C~0x33) to retain data after the main controller enters Standby mode. This solution uses the following RAM addresses to store system status flags: WAKESRAM (0x30): Wake-up flag, indicating whether the RTC timer is configured. NEWTSRAM (0x31): New Time Marker LMONSRAM (0x32): Last month's flag REALFLAG (0x33): Real Flag (4) Write protection: The critical registers of SD3077 have a write protection mechanism. Before writing, a specific combination of bits in the CTR1 and CTR2 control registers must be set using the WriteRTC_Enable() function to unlock them. After writing, they can be relocked using WriteRTC_Disable().

[0102] 7. Power Management Module The power management module includes an independent power board (containing circuits for battery charging management, LDO voltage regulation, etc.) and power control logic on the main control board.

[0103] The main control module achieves independent control of discrete power domains through GPIO pins: VCC3V0_ON / OFF: Controls the on / off state of the 3.0V main power supply domain, providing power to the sensor and memory chip. VCC4G_ON / OFF: Controls the independent power domain switching of the 4G communication module. Battery voltage is monitored via the ADC1 channel (PC3 pin). The ADC uses 12-bit resolution and performs self-calibration (adc_calibration) during initialization to improve measurement accuracy. Each time, 50 ADC samples are acquired, the average value is taken as the battery voltage value, and encapsulated in the vbat field of the uploaded data packet.

[0104] 8. Local Interface Module The device is equipped with a USB OTG FS interface and runs the USB CDC (Communication Device Class) protocol stack, which is enumerated as a virtual serial port device when connected to a PC. USB data interaction is handled in the main loop through the usb_cdc_process() function, supporting local parameter configuration, log output, and exported stored data.

[0105] The second embodiment of the present invention: a specific implementation of the signal processing link. like Figure 4 This embodiment details the data processing link of the signal processing module.

[0106] 1. IIR high-pass filter The transfer function coefficients of a first-order IIR high-pass filter are calculated using the following parameters: Sampling rate fs = 4000 Hz Cutoff frequency fc = 0.1 Hz Sampling interval dt = 1 / fs = 0.00025 s The filter coefficient alpha = 1 / (2π·fcdt + 1) The IIRHighPassFilter structure is defined as follows: typedef struct { float dt, / / Sampling interval float alpha; / / Filter coefficient float b0; / / Feedforward coefficient float a1; / / Feedback coefficient float x_prev; / / Previous input sample float y_prev; / / Previous output sample } IIRHighPassFilter; The difference equation of the filter is: y[n] = alpha × (y[n-1] + x[n] - x[n-1]), and the 4096 acceleration data points are filtered sample by sample.

[0107] 2. Windowed FFT Spectrum Analysis The FFT processing flow is as follows: (1) Remove DC: Call arm_mean_f32() to calculate the mean of 4096 sampling points, and subtract the mean from each sample to remove the DC component.

[0108] (2) Windowing: Pre-calculate the 4096-point Hanning window coefficient array. The window function formula is: w[n] = 0.5 × (1 -cos(2π·n / (N-1))), where N=4096. Multiply the DC-free signal point by point by the corresponding window coefficient.

[0109] (3) FFT transformation: Call arm_rfft_fast_f32() to perform a 4096-point real FFT (Real FFT), and the output is 2049 complex frequency components (each component contains a real part and an imaginary part).

[0110] (4) Amplitude spectrum calculation: For the complex array output by FFT, calculate magnitude[k] = sqrt(real[k]) using the formula magnitude[k] = sqrt(real[k]). 2 + imag[k] 2 Calculate the amplitude of each frequency component.

[0111] (5) Fundamental frequency extraction: Starting from index 1 of the amplitude spectrum (excluding the DC component of index 0), search for the index k_max corresponding to the maximum amplitude value. The fundamental frequency calculation formula is: f_fundamental = k_max × fs / N = k_max × 4000 / 4096 ≈ k_max × 0.977 Hz.

[0112] The frequency resolution is Δf = fs / N = 4000 / 4096 ≈ 0.977 Hz, and the maximum analyzable frequency is fs / 2 = 2000 Hz.

[0113] 3. RMS and integral calculation (1) Acceleration RMS: For N acceleration samples a[n], calculate RMS_acc = sqrt(Σa[n]). 2 / N).

[0114] (2) Velocity integral and RMS: The velocity is derived from the acceleration using the trapezoidal integral method: v[0] = 0, v[n] = v[n-1] + a[n] × dt, where dt = 1 / 4000 = 0.00025s. Then, RMS_vel = sqrt(Σv[n]) is calculated. 2 / N).

[0115] (3) Displacement integral and RMS: Integrate the velocity signal again to obtain the displacement: d[0] = 0, d[n] = d[n-1] + v[n] × dt. Then calculate RMS_disp = sqrt(Σd[n]). 2 / N).

[0116] All the above calculations are performed independently on the X, Y, and Z axes, ultimately yielding 9 RMS eigenvalues ​​(3 axes × 3 physical quantities).

[0117] The third embodiment of the present invention: power management and sleep / wake-up strategy See Figure 5 This embodiment details the low-power operation strategy of the device.

[0118] 1. Periodic sleep-wake working mode The device adopts a periodic working mode of "wake-up-acquisition-processing-transmission-sleep": (1) Wake-up phase: When the countdown of SD3077 RTC expires, an interrupt signal is generated to trigger the external wake-up pin (WKUP2) of STM32L4, and the main controller is reset and started from Standby mode.

[0119] (2) First power-on judgment: After the system starts, the CTR1 control register of SD3077 is read through I2CReadSerial and its least significant bit (first power-on flag bit) is checked. If the bit is 1, it means that the system is on power-on for the first time (not RTC wake-up). The wake-up flag in WAKESRAM is cleared to ensure that the RTC timer is configured correctly in the future.

[0120] (3) Acquisition and processing stage: Execute steps S2~S3 to complete one or more rounds (determined by current_sample_cnt and MQTT_BUFFER_SIZE) of data acquisition and feature extraction.

[0121] (4) Transmission stage: Execute step S5 to upload the feature data packet through the 4G network.

[0122] (5) Enter sleep mode: Call the EnterPowerSavingMode_Standby() function. The specific process is as follows: Read the WAKESRAM flag. If it is 0 (timer not configured), then configure the SD3077 countdown timer: select S_1s (1 second) as the clock source, and set the initial value to system_param.Post_interval×60 (convert minutes to seconds); after configuration, set the WAKESRAM flag to 1. Enable the STM32's WKUP2 wake-up pin (low-level trigger). Clear the PWR_FLAG_WUF2 wake-up flag; Call HAL_PWR_EnterSTANDBYMode() to enter Standby mode.

[0123] (6) Wake-up and recovery: When the RTC countdown expires and generates an interrupt, or when an external event triggers the WKUP2 pin, the STM32 is reset and restarted, and automatically returns to step (1).

[0124] This strategy keeps the system in a deep sleep state with microampere power consumption most of the time, only briefly waking it up when data acquisition and transmission are needed, significantly extending battery life. The sleep interval (Post_interval) can be flexibly adjusted according to actual monitoring needs through system parameter configuration.

[0125] Fourth embodiment of the present invention: Modular hardware architecture The device's hardware adopts a three-board modular design: (1) Main control board: It carries the STM32L496RE main controller, IIS3DWB vibration sensor, DFSDM microphone interface, W25N01GV QSPI Flash, SD3077 RTC, USB interface and related passive components such as resistors and capacitors.

[0126] (2) Power board: includes battery management chip (charge and discharge control), LDO linear regulator (provides 3.0V and other required voltages), power switching control circuit and battery connector.

[0127] (3) 4G communication board: carrying the Air780EX 4G module, SIM card slot, radio frequency matching network, 4G antenna interface and UART level conversion circuit.

[0128] The three boards are electrically interconnected through board connectors. This modular design allows each functional module to be debugged, replaced, and upgraded independently, making it easy to adapt to different application scenarios and communication standards.

[0129] In summary, the core improvements of this invention can be briefly described as follows: 1. Vibration + Acoustics Dual-Modal Fusion Sensing Architecture: A three-axis broadband vibration sensor (SPI interface, timer interrupt drive) and a digital MEMS microphone (DFSDM interface, DMA drive) are integrated in a single detection device to achieve multi-dimensional synchronous acquisition of abnormal sound signals.

[0130] 2. Complete low-power MCU edge signal processing link: Based on the ARMCMSIS-DSP library, a complete signal processing link is implemented on the STM32L4 low-power microcontroller, which includes IIR high-pass filtering (0.1Hz cutoff) → DC removal → Hanning windowing → 4096-point real-valued FFT → amplitude spectrum fundamental frequency extraction → trapezoidal integral method acceleration / velocity / displacement RMS calculation. Real-time extraction of 15-dimensional features (3 axes × 5 features) can be completed locally without uploading the original data.

[0131] 3. QSPI NAND Flash WAV format local waveform storage: High-speed, large-capacity local storage is achieved by utilizing Quad I / O mode and DMA transfer. The original waveform data is encapsulated in the standard WAV audio format, balancing storage efficiency and data availability.

[0132] 4. Low-power strategy for 4G communication and external RTC sleep-wake-up coordination: Precise timed wake-up is achieved through the programmable countdown timer of the SD3077 external RTC, combined with the STM32 Standby deep sleep mode, independent power control of the 4G module, and MQTT batch data buffer transmission (10 groups / packets), achieving microampere-level deep sleep power consumption while ensuring wide-area coverage communication capabilities.

[0133] 5. Three-board separated modular hardware architecture: The modular design of the main control board, power supply board and 4G communication board facilitates function tailoring and application adaptation.

[0134] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0135] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0136] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A device noise detection device based on wireless transmission, characterized in that, include: The main control module uses a low-power microcontroller; The vibration sensing module is connected to the main control module and is used to collect raw triaxial vibration acceleration data of the equipment. An acoustic sensing module, connected to the main control module, is used to collect the device's raw acoustic data; The signal processing module, built into the main control module, is used to perform digital filtering, frequency domain transformation and time domain feature calculation on the raw triaxial vibration acceleration data to extract multidimensional vibration feature data. The data storage module, connected to the main control module, uses a NAND Flash memory chip to store the acoustic raw data and / or the vibration acceleration raw data; The clock module, connected to the main control module, uses an external real-time clock chip to provide timestamps for the data and has a built-in programmable countdown timer. The power management module is used to control the main control module to switch between deep sleep mode and working mode according to the timing signal of the clock module; The wireless communication module, connected to the main control module, uses cellular communication technology to upload the multidimensional vibration characteristic data to a remote server.

2. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The vibration sensing module is connected to the main control module via the SPI bus and data reading is triggered by a timer interrupt at a fixed period; the acoustic sensing module is connected to the main control module via the DFSDM interface and achieves continuous acquisition of acoustic data through DMA.

3. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The signal processing module is specifically used for: The raw triaxial vibration acceleration data were subjected to IIR high-pass filtering to remove DC and low-frequency drift components; The filtered acceleration data is processed by DC removal and windowing functions; Perform an FFT spectrum transformation on the windowed data, and extract the fundamental frequency and the corresponding amplitude from the obtained amplitude spectrum; The velocity and displacement are calculated by numerical integration of the filtered acceleration data, and the RMS effective values ​​of acceleration, velocity and displacement are calculated respectively. Perform the above processing independently for each of the X, Y, and Z axes.

4. The device noise detection device based on wireless transmission as described in claim 3, characterized in that, The IIR high-pass filter is a first-order IIR high-pass filter with a cutoff frequency of 0.1Hz; the FFT transform is a 4096-point real-number FFT with a Hanning window function applied before the transform; the numerical integration adopts the trapezoidal integration method, obtaining velocity data from the acceleration data by first integration and displacement data by second integration.

5. The device noise detection device based on wireless transmission as described in claim 3, characterized in that, The signal processing module is implemented based on the ARM CMSIS-DSP library. It uses the arm_rfft_fast_f32 function to perform real-number FFT and the arm_biquad_cascade_df1_q31 function to perform Biquad cascaded IIR filtering.

6. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The data storage module uses a QSPI NAND Flash memory chip, which is connected to the main control module through a Quad-SPI four-wire interface and stores the original waveform data in standard WAV audio format. The memory chip has a page size of 2048 bytes, an erase granularity of 128KB, and supports Quad I / O mode read / write and DMA transfer mode.

7. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The clock module is an SD3077 real-time clock chip, which is connected to the main control module via a software-simulated I2C bus; the user RAM area of ​​the SD3077 is used to store system status flags during the deep sleep of the main control module.

8. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The wireless communication module is an Air780EX Cat.1 4G module, connected via UART serial port, and supports dynamic baud rate switching; the uploaded multidimensional vibration feature data is encapsulated in MQTT protocol format, and each data packet can buffer up to 10 sets of triaxial vibration feature data for batch transmission.

9. The device noise detection device based on wireless transmission as described in claim 1, characterized in that, The power management module controls the power domains of the sensor and the wireless communication module through independent GPIO signals; the deep sleep mode is the standby mode of the STM32 microcontroller; the hardware of the device adopts a three-board modular design, including a main control board carrying the main controller and sensor, a power board carrying the battery management and voltage regulation circuit, and a communication board carrying the 4G communication module.

10. A method for detecting abnormal device noise based on wireless transmission, applied in the device noise detection apparatus according to any one of claims 1 to 9, characterized in that, Includes the following steps: S1. System initialization: After the main control module is powered on or wakes up from hibernation, it initializes each peripheral module, reads system configuration parameters from external Flash, initializes the external RTC clock module and determines whether it is the first power-on, initializes the QSPI Flash memory, and starts acoustic sampling. S2. Multimodal data acquisition: Vibration data is read from the triaxial accelerometer at fixed intervals via timer interrupt, while acoustic data is continuously acquired via DMA mode through the DFSDM interface; S3. Edge signal processing: IIR high-pass filtering is performed on the vibration data in sequence to remove DC offset and low-frequency drift. After applying a window function, FFT transformation is performed to extract the fundamental frequency and amplitude from the amplitude spectrum. Velocity and displacement are calculated from acceleration through numerical integration and the RMS effective value is calculated separately. The above processing is performed independently for the X, Y and Z axes. S4. Data storage: Write the raw acoustic waveform data into the QSPI NAND Flash memory in WAV standard format, page by page. S5. Wireless data transmission: The extracted multidimensional feature data is uploaded in batches to the remote server in the form of structured data packets through the cellular communication module; S6. Power Management: Configure the countdown timer of the external RTC, enable the external wake-up pin, and control the main control module to enter deep sleep mode; when the countdown expires or an external event is triggered, the main control module is reset and restarted, returning to step S1.

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