Method for non-destructive screening of early gate oxide failure of semiconductor devices and device therefor

Abstract

The application discloses a kind of semiconductor device gate oxygen early failure non-destructive screening method and its device, comprising: according to the threshold voltage of the semiconductor device to be screened and the characteristic relationship of gate source voltage variation Determine the upper limit of screening voltage;Based on time-dependent dielectric breakdown test, the upper limit of aging time of the semiconductor device to be screened is calculated;Under the highest junction temperature condition, the upper limit of screening voltage is used as stress voltage to the semiconductor device to be screened Aging test is carried out, and the aging failure time corresponding to the early failure sample in the semiconductor device to be screened is determined according to the gate source drain current;The screening effectiveness is determined by the convergence of the aging failure time distribution, wherein if the aging failure time distribution is within the upper limit of aging time and presents convergence, it is determined that the current screening condition is effective, the early failure screening efficiency is improved, and the long-term high reliability level of device is ensured.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device technology, and in particular to a method and apparatus for non-destructive screening of early gate oxide failure in semiconductor devices. Background Technology

[0002] Gate oxide reliability has long been a major obstacle to the mass production and large-scale application of silicon carbide (SiC) semiconductor devices. SiC MOSFETs, in particular, are significantly more susceptible to early gate oxide failure due to their high interface state density and easy charge tunneling characteristics. Therefore, early failure screening of SiC MOSFETs, allowing devices with gate oxide defects to be exposed earlier, is essential for ensuring long-term device reliability.

[0003] Existing screening schemes mostly rely on empirical aging or statistical experiments, and the screening conditions are set blindly, making it difficult to guarantee full coverage and eliminate early defective devices. Summary of the Invention

[0004] This invention provides a method and apparatus for non-destructive screening of early gate oxide failures in semiconductor devices, which improves the efficiency of early failure screening and ensures a high level of long-term device reliability.

[0005] In a first aspect, embodiments of the present invention provide a method for non-destructive screening of early gate oxide failure in semiconductor devices, comprising: The upper limit of the screening voltage is determined based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened; The upper limit of aging time for the semiconductor devices to be screened is calculated based on time-dependent dielectric breakdown tests. Under the highest junction temperature condition, the semiconductor device to be screened is subjected to aging test with the upper limit of the screening voltage as the stress voltage, and the aging failure time corresponding to the early failure sample in the semiconductor device to be screened is determined according to the gate-source leakage current. The effectiveness of the screening is determined by the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, then the current screening condition is determined to be effective.

[0006] Optionally, if the aging failure time distribution is randomly distributed within the upper limit of the aging time, the upper limit of the screening voltage is increased or the wafer quality is determined to have defects.

[0007] Optionally, after determining the screening effectiveness through the convergence of the aging failure time distribution, the method further includes: The qualified samples from the semiconductor devices to be screened after aging tests are subjected to the time-dependent dielectric breakdown test to obtain the failure Weber distribution slope of the qualified samples and the failure time corresponding to the first extrapolated failure probability. The failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample are compared with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the time-dependent dielectric breakdown test of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide. If the comparison results show that the data degrades after filtering, then the upper limit of the filtering voltage is reduced; Based on the reduced upper limit of the screening voltage, the steps from calculating the upper limit of the aging time of the semiconductor device to be screened to completing the above comparison process are executed cyclically until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

[0008] Optionally, the upper limit of the screening voltage is determined based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened, including: An incremental gate-source voltage is applied to a plurality of the semiconductor devices to be screened, and a threshold voltage is measured at each gate-source voltage level; A relationship curve is determined based on the gate-source voltage and the threshold voltage; Based on the relationship curve, the gate-source voltage at which the threshold voltage begins to drift negatively is determined as the upper limit of the screening voltage.

[0009] Optionally, the upper limit of the aging time for the semiconductor device to be screened, calculated based on time-dependent dielectric breakdown tests, includes: High-temperature time-dependent dielectric breakdown tests were performed on the semiconductor devices to be screened. The aging time of the semiconductor device to be screened under the upper limit of the screening voltage is calculated using an electric field acceleration model, corresponding to the target service life, and is used as the upper limit of the aging time.

[0010] Optionally, the electric field acceleration model includes at least one of the E-model, the 1 / E model, and the power-law model.

[0011] Secondly, embodiments of the present invention provide an apparatus for non-destructive screening of early gate oxide failure in semiconductor devices, comprising: The first determining module is used to determine the upper limit of the screening voltage based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. The estimation module is used to estimate the upper limit of the aging time of the semiconductor device to be screened based on the time-dependent dielectric breakdown test. The second determining module is used to perform an aging test on the semiconductor device to be screened under the highest junction temperature condition, with the upper limit of the screening voltage as the stress voltage, and to determine the aging failure time corresponding to the early failure sample in the semiconductor device to be screened based on the gate-source leakage current. The determination module is used to determine the effectiveness of the screening based on the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, the current screening condition is determined to be effective.

[0012] Optionally, the apparatus for non-destructive screening of early gate oxide failure in semiconductor devices further includes: An aging module is used to perform the time-dependent dielectric breakdown test on qualified samples from the semiconductor devices to be screened after aging tests, and to obtain the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability of the qualified samples. The comparison module is used to compare the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide; if the comparison results show that the data degrades after screening, the upper limit of the screening voltage is reduced. The loop module is used to repeatedly execute the steps from calculating the upper limit of the aging time of the semiconductor device to be screened to completing the above comparison process, based on the reduced upper limit of the screening voltage, until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

[0013] Optionally, the first determining module includes: A measurement unit is configured to apply incremental gate-source voltages to a plurality of said semiconductor devices to be screened, and to measure a threshold voltage at each said gate-source voltage level; The first determining unit is configured to determine a relationship curve based on the gate-source voltage and the threshold voltage; The second determining unit is used to determine the gate-source voltage at which the threshold voltage begins to drift negatively as the upper limit of the screening voltage, based on the relationship curve.

[0014] Optional, the calculation module includes: The test unit is used to perform high-temperature time-dependent dielectric breakdown tests on the semiconductor devices to be screened. The calculation unit is used to calculate the aging time of the semiconductor device to be screened under the upper limit of the screening voltage, corresponding to the target service life, using the electric field acceleration model, and use it as the upper limit of the aging time.

[0015] This invention proposes a non-destructive screening method for early gate oxide failures in semiconductor devices. The method determines the upper limit of the screening voltage by analyzing the characteristic relationship between the threshold voltage and gate-source voltage changes of the semiconductor device to be screened. Aging tests are then performed on the semiconductor device to obtain aging failure time data. By analyzing the convergence of the aging failure time distribution, the rationality of the screening window can be intuitively judged. The aging failure time distribution within the upper limit of the aging time shows a significant convergence phenomenon, indicating that early random failure samples dominated by process defects have been completely eliminated. This improves the efficiency of early failure screening and greatly reduces the probability of device failure under long-term operating conditions. Attached Figure Description

[0016] Figure 1 A flowchart of a method for non-destructive screening of early gate oxide failure in semiconductor devices provided in an embodiment of the present invention; Figure 2 A flowchart of another method for non-destructive screening of early gate oxide failure in semiconductor devices provided in an embodiment of the present invention; Figure 3 A flowchart of another method for non-destructive screening of early gate oxide failure in semiconductor devices provided in an embodiment of the present invention; Figure 4 A schematic diagram of the change in threshold voltage versus gate-source voltage provided in an embodiment of the present invention; Figure 5 A schematic diagram of the Weber distribution curve of failure time provided for an embodiment of the present invention; Figure 6 A schematic diagram of the gate-source leakage current variation curve during aging test provided in an embodiment of the present invention; Figure 7 A schematic diagram of the failure curve of the aging test provided in an embodiment of the present invention; Figure 8 This is a schematic diagram showing the comparison of TDDB results before and after filtering, provided in an embodiment of the present invention. Figure 9 This is a schematic diagram of a device for non-destructive screening of early gate oxide failure in semiconductor devices, provided as an embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Figure 1This is a flowchart illustrating a method for non-destructive screening of early gate oxide failures in semiconductor devices according to an embodiment of the present invention. This embodiment is applicable to non-destructive screening of early gate oxide failures. The method can be executed by a non-destructive screening device for early gate oxide failures, which can be implemented in hardware and / or software. The method specifically includes the following steps: S110. Determine the upper limit of the screening voltage based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. The threshold voltage is the minimum gate-source voltage required for a semiconductor device to turn on. In a SiC MOSFET, when the gate is subjected to an excessively high electric field, charge carriers in the gate oxide layer collide and ionize with the SiO2 lattice. The resulting holes are captured by interface states, causing the threshold voltage to shift towards a lower voltage. This negative drift indicates that the gate oxide layer has suffered irreversible damage. To reduce the impact of the gate-source voltage on the semiconductor device during the screening process, the maximum gate-source voltage that the device can withstand without causing irreversible negative drift can be taken as the upper limit of the screening voltage.

[0019] For example, the upper limit of the screening voltage can be obtained by selecting semiconductor devices to be screened from wafers in the same batch, and selecting sample devices to perform a scanning test on the threshold voltage as a function of the gate-source voltage. For example, a stepped voltage increase method can be used, starting from the initial gate-source voltage and gradually increasing the gate-source voltage. After each level of gate-source voltage is applied, the characteristic relationship between the threshold voltage and the gate-source voltage change can be statistically obtained, and the inflection point of the gate-source voltage change can be determined. The inflection point reflects the critical point at which the threshold voltage changes from a stable state to the point of negative drift. The gate-source voltage corresponding to the inflection point is used as the upper limit of the screening voltage. It should be noted that the stable state of the threshold voltage can refer to a state with only small recoverable fluctuations. Traditional screening schemes often set high voltages based on experience, which can easily lead to cumulative damage to the gate oxide of qualified devices, creating long-term reliability risks. This embodiment of the invention ensures that the screening stress is controlled below the damage threshold by real-time monitoring of the threshold voltage drift characteristics, which is more conducive to the requirements of non-destructive screening.

[0020] S120. Calculate the upper limit of aging time for the semiconductor devices to be screened based on time-dependent dielectric breakdown tests; Among them, the Time-Dependent Dielectric Breakdown (TDDB) test is a reliability accelerated test that applies stress to semiconductor devices under constant high temperature and high electric field, and statistically analyzes the probability distribution of breakdown over time to evaluate gate oxide lifetime.

[0021] For example, a constant voltage or electric field much higher than the normal operating voltage is applied to the semiconductor device to be screened at a high temperature, and the leakage current flowing through the gate oxide layer is monitored in real time. When the current suddenly rises sharply beyond the upper limit, the failure time at this point can be recorded. By selecting an appropriate electric field acceleration model, the experimental data can be fitted to obtain the device lifetime under the target electric field. Optionally, the electric field acceleration model includes at least one of the E-model (Electric Field Model), 1 / E model, and power-law model. An appropriate electric field acceleration model can be selected based on the structural characteristics of the semiconductor device. For example, the lifetime of the E-model is mainly determined by the electric field strength and is suitable for thicker oxide layers or medium electric fields. The 1 / E model is based on the anodic hole injection model and is suitable for extremely thin oxide layers. The power-law model is widely used in SiC and low-voltage logic devices.

[0022] For example, in this embodiment of the invention, the electric field acceleration model uses the E-model as an example, which sets the target operating life of the device and the actual operating electric field. The electric field acceleration model is used to inversely deduce the test time required under the accelerating voltage stress, i.e., the upper limit of the screening voltage, as the upper limit of the aging time. The TDDB test compresses the long target lifespan into an executable test time, ensuring that all weak components that cannot reach the target lifespan are excited, while avoiding wasted production capacity and unnecessary stress accumulation on good products due to excessively long test times.

[0023] S130. Under the highest junction temperature condition, the semiconductor device to be screened is subjected to aging test with the upper limit of the screening voltage as the stress voltage, and the aging failure time corresponding to the early failure sample in the semiconductor device to be screened is determined according to the gate-source leakage current. The maximum junction temperature is the highest internal junction temperature at which a semiconductor device is allowed to operate, and it is usually close to the device's rated limit temperature.

[0024] The semiconductor devices to be screened are placed at the highest junction temperature. The upper limit of the screening voltage is applied to the gate of all devices. The gate-source leakage current of each device is collected. When the gate-source leakage current of a semiconductor device exceeds the upper limit of the leakage current threshold, it indicates that the gate oxide layer is completely damaged. The current time is recorded to obtain the aging failure time, and the device is identified as an early failure sample. Devices that have reached the specified aging time but have not exceeded the limit are judged to have passed the screening and are identified as qualified samples.

[0025] S140. The effectiveness of the screening is determined by the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, the current screening condition is determined to be effective.

[0026] Specifically, the aging failure time of all samples judged as early failures is statistically analyzed. If the aging failure time distribution shows a significant convergence phenomenon within the upper limit of the aging time, for example, the vast majority of defective devices are eliminated in the early stage of testing and almost no new failures occur in the later stage, it indicates that the current screening voltage and aging time settings are reasonable, and the early failure samples and qualified samples have been successfully separated. The current screening conditions are deemed effective and can be applied to batch measurement.

[0027] This invention proposes a non-destructive screening method for early gate oxide failures in semiconductor devices. The method determines the upper limit of the screening voltage by analyzing the characteristic relationship between the threshold voltage and gate-source voltage changes of the semiconductor device to be screened. Aging tests are then performed on the semiconductor device to obtain aging failure time data. By analyzing the convergence of the aging failure time distribution, the rationality of the screening window can be intuitively judged. The aging failure time distribution within the upper limit of the aging time shows a significant convergence phenomenon, indicating that early random failure samples dominated by process defects have been completely eliminated. This improves the efficiency of early failure screening and greatly reduces the probability of device failure under long-term operating conditions.

[0028] Optionally, if the aging failure time distribution is randomly distributed within the upper limit of the aging time, the upper limit of the screening voltage is increased or the wafer quality is determined to be defective.

[0029] Specifically, random distribution refers to the aging failure time of samples judged as having early failures being evenly or irregularly distributed throughout the upper limit of the aging time range, with a large number of failures even occurring in the later stages of testing. This is distinctly different from the characteristics of early failure, where defective devices are rapidly exposed and concentrated in the early stages of testing. Random distribution can indicate that the stress applied during aging testing is insufficient to quickly excite the device's weak defects, or that there is no clear distinction between early-failure samples and normal samples in the semiconductor device, resulting in poor overall quality uniformity. Therefore, when the aging failure time distribution is random within the upper limit of the aging time, meaning that device failures are not concentrated in the early stages of aging testing but occur continuously throughout the entire aging test, and a high proportion of devices still fail at the end of the aging test, the upper limit of the screening voltage can be readjusted. For example, by increasing the upper limit of the screening voltage, the electric field acceleration factor can be increased, shortening the defect excitation time and causing the original defects to appear in the early stages of testing. If the aging failure time distribution remains unchanged, further increasing the upper limit of the screening voltage can easily damage qualified samples. In this case, it can reflect defects in the wafer quality, leading to failure to meet the target lifetime requirements.

[0030] Figure 2 A flowchart of another method for non-destructive screening of early gate oxide failure in semiconductor devices provided by an embodiment of the present invention is shown below. Figure 2 ,include: S210. Determine the upper limit of the screening voltage based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. S220. Calculate the upper limit of aging time for the semiconductor devices to be screened based on time-dependent dielectric breakdown tests; S230. Under the highest junction temperature condition, the semiconductor device to be screened is subjected to aging test with the upper limit of the screening voltage as the stress voltage, and the aging failure time corresponding to the early failure sample in the semiconductor device to be screened is determined according to the gate-source leakage current. S240. The effectiveness of the screening is determined by the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, the current screening condition is determined to be effective.

[0031] S250. Conduct time-dependent dielectric breakdown tests on qualified samples of semiconductor devices that have passed the aging test to obtain the failure Weber distribution slope of the qualified samples and the failure time corresponding to the first extrapolated failure probability. Specifically, semiconductor devices whose gate-source leakage current consistently does not exceed the upper limit of the leakage current threshold after aging tests are deemed qualified samples. A selection of qualified samples are placed under the same TDDB test conditions as in step S220, and the breakdown time for each sample is recorded until all samples fail or reach a preset truncation time. Using the collected failure time data, a Weber distribution curve is fitted to calculate the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability for this set of qualified samples. The Weber distribution is the most commonly used model to describe the statistical laws of device lifetime. The failure Weber distribution slope reflects the dispersion of failure time or the consistency of the device. A larger failure Weber distribution slope indicates a more concentrated device lifetime distribution and better process uniformity; a smaller failure Weber distribution slope indicates greater lifetime dispersion and more random defects. If the gate oxide layer is damaged during the screening process, it usually leads to a decrease in the failure Weber distribution slope. The failure time corresponding to the first extrapolated failure probability refers to the theoretical lifetime time corresponding to the extrapolation to an extremely low failure probability after fitting the failure data measured by the TDDB test to a Weber distribution. In this embodiment of the invention, the first extrapolation failure probability can be defined as 0.1%.

[0032] S260. Compare the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide; if the comparison results show that the data degrades after screening, the upper limit of the screening voltage is reduced. Specifically, based on the TDDB test data of the semiconductor devices to be screened that have not undergone aging screening, the corresponding Weber distribution slope and failure time corresponding to the first extrapolated failure probability are obtained. The Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified samples after screening are compared with those of the samples before screening. If they are basically consistent within the allowable range of statistical error, or if the Weber distribution slope and failure time corresponding to the first extrapolated failure probability after screening are slightly better than those before screening, then the two are considered comparable. At this point, it can be determined that the current upper limit of screening voltage and upper limit of aging time are reasonable, the screening process has not damaged the intrinsic reliability of the gate oxide, and early failures can be screened. Therefore, the current screening process parameters can be used as subsequent screening test parameters.

[0033] If the parameters show a significant decrease after screening, for example, a large reduction in the failure time corresponding to the first extrapolated failure probability, or a significant decrease in the slope of the failure Weiber distribution, it is considered data degradation, meaning that the screening process introduced new damage. In this case, it can be determined that the current screening voltage limit is too high. Although early-failed samples were eliminated, cumulative damage was caused to the surviving qualified samples, leading to a decrease in their expected long-term lifetime.

[0034] S270. Based on the reduced upper limit of the screening voltage, repeatedly execute all the aforementioned steps from the calculation of the upper limit of the aging time of the semiconductor device to be screened to the completion of the above comparison process, until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

[0035] Specifically, based on lowering the upper limit of the screening voltage, steps S220 to S260 are re-executed. By comparing the slope of the failure Weber distribution and the failure time corresponding to the first extrapolated failure probability, the reliability loss caused by the screening process can be quantified, ensuring that the devices not only pass the short-term screening but also that their entire lifespan is not negatively affected, achieving a non-destructive screening process. Furthermore, replacing empirical settings with aging test condition data greatly improves the reliability of the screening process.

[0036] Optionally, the upper limit of the screening voltage is determined based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened, including: An incremental gate-source voltage is applied to multiple semiconductor devices to be screened, and a threshold voltage is measured at each gate-source voltage level; The relationship curve is determined based on the gate-source voltage and the threshold voltage; Based on the relationship curve, the gate-source voltage at which the threshold voltage begins to drift negatively is determined as the upper limit of the screening voltage.

[0037] Specifically, the characteristic relationship between threshold voltage and gate-source voltage variation refers to the functional relationship where the threshold voltage of a semiconductor device is the dependent variable, and the applied gate-source voltage is the independent variable. Under ideal, lossless conditions, the threshold voltage should remain stable or experience only minor, recoverable fluctuations. When the gate-source voltage exceeds a certain critical value, the high electric field causes charge trapping or interface state generation within the gate oxide layer, leading to a shift in the threshold voltage. Therefore, during testing, the applied gate-source voltage can be gradually increased from near the device's rated operating voltage in preset steps, such as 0.5V, 1V, or 2V. The threshold voltage at each gate-source voltage level can be measured. This step-by-step voltage application method can precisely scan the device's withstand voltage boundaries, avoiding the risk of instantaneous breakdown due to excessively high voltage applied at once, thus preventing the capture of the critical point. Based on the obtained gate-source voltage and the threshold voltage at each gate-source voltage level, the relationship curve between threshold voltage and gate-source voltage can be obtained, and the gate-source voltage corresponding to a negative threshold voltage drift is defined as the upper limit of the screening voltage. Alternatively, the location where the slope of the threshold voltage change curve abruptly changes can be found through mathematical fitting as the upper limit of the screening voltage. In some embodiments, to ensure safety, the upper limit of the screening voltage for subsequent applications can be set slightly lower than the upper limit of the screening voltage determined above, in order to increase a certain safety margin.

[0038] Optionally, the upper limit of the aging time for the semiconductor device to be screened, calculated based on time-dependent dielectric breakdown tests, includes: High-temperature time-dependent dielectric breakdown tests were performed on the semiconductor devices to be screened. The aging time corresponding to the service life target of the semiconductor device to be screened under the upper limit of the screening voltage is calculated using the electric field acceleration model, and is used as the upper limit of the aging time.

[0039] Specifically, electric field acceleration models can describe the mathematical relationship between device failure time and applied electric field strength or voltage. Commonly used models include the E-model, the 1 / E-model, and the power-law model. In this embodiment of the invention, the electric field acceleration model takes the E-model as an example, by setting the target operating life of the device and the actual operating electric field. The electric field acceleration model is used to inversely deduce the test time required under the accelerating voltage stress, i.e., the upper limit of the screening voltage, as the upper limit of the aging time. The TDDB test compresses the long target life to an executable test time, ensuring that all weak components that cannot reach the target life are stimulated, while avoiding the waste of production capacity and unnecessary stress accumulation on good products due to excessively long test times.

[0040] Figure 3 A flowchart of another method for non-destructive screening of early gate oxide failure in semiconductor devices provided by an embodiment of the present invention is shown below. Figure 3 ,include: S310. Apply a linear gate-source voltage to the gate of the semiconductor device and measure the threshold voltage, wherein the step size of the gate-source voltage is 1V to obtain the curve of the change in threshold voltage versus gate-source voltage. Figure 4 This is a schematic diagram of the change in threshold voltage versus gate-source voltage provided in an embodiment of the present invention. (See attached diagram.) Figure 4 When the gate-source voltage is 37V, the slope of the curve of the change in threshold voltage changes abruptly. This gate-source voltage is taken as the inflection point of the curve, i.e. the upper limit of the screening voltage.

[0041] S320. Perform TDDB tests on a large number of semiconductor devices to be screened to obtain the Weber distribution of semiconductor device failure time. Figure 5 This is a schematic diagram of the Weber distribution curve for failure time provided in an embodiment of the present invention. The horizontal axis represents failure time, the left vertical axis represents the Weber distribution, and the right vertical axis represents the extrapolated failure probability. The measured device failure distribution time is used to deduce the required test time under accelerating voltage stress using an electric field acceleration model, and the upper limit of the selected voltage is used as the upper limit of the aging time.

[0042] S330: During the aging test, the gate-source leakage current is monitored, and if it exceeds the upper limit, the device is deemed to have failed. Figure 6 This is a schematic diagram of the gate-source leakage current variation curve during aging testing provided in an embodiment of the present invention. The horizontal axis represents the test time, and the vertical axis represents the gate-source leakage current.

[0043] S340. If the device failure distribution shows convergence within the upper limit of aging time, and the failure distribution is concentrated in the early stage of aging, it indicates that the accelerated aging test is effective in screening for early gate oxide failures. Figure 7 This is a schematic diagram of the failure curve of the aging test provided in an embodiment of the present invention. See also Figure 7 The aging failure time distribution within the upper limit of the aging time shows a clear convergence phenomenon. The vast majority of defective devices are eliminated in the early stage of testing, and almost no new failures occur in the later stage. This indicates that the current screening voltage and aging time settings are reasonable, and early-failure samples and qualified samples have been successfully separated. If the failure time of the samples participating in the screening is still randomly distributed, it indicates that the upper limit of the screening voltage may be too low or that the wafer itself has significant quality defects. If it is determined that the upper limit of the screening voltage may be too low, the upper limit of the screening voltage is reselected in step S310, for example, by increasing the upper limit of the screening voltage.

[0044] S350. Perform TDDB testing on normal samples after aging screening. The TDDB testing conditions are consistent with those in step S320. Compare the TDDB failure Weber distribution slope and the first extrapolated failure probability (defined as 0.1%) before and after screening. If they are comparable, it is determined that the screening process does not affect the intrinsic reliability of the gate oxide. Figure 8This is a schematic diagram comparing the TDDB results before and after screening according to an embodiment of the present invention. As shown in the diagram, the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability of the qualified samples after screening are basically consistent with the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability of the samples before screening within the allowable range of statistical error. Therefore, the two are considered comparable. At this point, it can be determined that the current upper limit of screening voltage and the upper limit of aging time are reasonable, the screening process has not damaged the intrinsic reliability of the gate oxide, and early failures can be screened.

[0045] Figure 9 This is a schematic diagram of a device for non-destructive screening of early gate oxide failure in semiconductor devices, provided in an embodiment of the present invention. (See attached diagram.) Figure 9 ,include: The first determining module 110 is used to determine the upper limit of the screening voltage based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. The estimation module 120 is used to estimate the upper limit of aging time for the semiconductor device to be screened based on the time-dependent dielectric breakdown test. The second determining module 130 is used to perform aging tests on the semiconductor device to be screened under the highest junction temperature condition, with the upper limit of the screening voltage as the stress voltage, and to determine the aging failure time corresponding to the early failure sample in the semiconductor device to be screened based on the gate-source leakage current. The determination module 140 is used to determine the effectiveness of the screening based on the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, the current screening condition is determined to be effective.

[0046] Specifically, the first determining module 110 performs a scanning test on the threshold voltage of the semiconductor device to be screened, measuring the change in gate-source voltage. For example, a stepped voltage application method can be used, starting from an initial gate-source voltage and gradually increasing the gate-source voltage. After each level of gate-source voltage is applied, the characteristic relationship between the threshold voltage and the gate-source voltage change can be statistically obtained, and the inflection point of the gate-source voltage change can be determined. The inflection point reflects the critical point at which the threshold voltage changes from a stable state to exhibiting negative drift. The gate-source voltage corresponding to the inflection point is used as the upper limit of the screening voltage. It should be noted that the stable state of the threshold voltage can refer to a state with only minor recoverable fluctuations. Traditional screening schemes often rely on experience to set high voltages, which can easily lead to cumulative damage to the gate oxide of qualified devices, creating long-term reliability risks. This embodiment of the invention ensures that the screening stress is strictly controlled below the damage threshold by real-time monitoring of the threshold voltage drift characteristics, which is more conducive to the requirements of non-destructive screening.

[0047] The estimation module 120 applies a constant voltage or electric field, much higher than the normal operating voltage, to the semiconductor device under screening at high temperature, and monitors the leakage current flowing through the gate oxide layer in real time. When the current suddenly and sharply rises above the upper limit, the failure time at this point can be recorded. By selecting a suitable electric field acceleration model, the experimental data can be fitted to obtain the device lifetime under the target electric field. Optionally, the electric field acceleration model includes at least one of the E-model, 1 / E model, and power-law model. An appropriate electric field acceleration model can be selected based on the structural characteristics of the semiconductor device. For example, the lifetime of the E-model is mainly determined by the electric field strength and is suitable for thicker oxide layers or medium electric fields. The 1 / E model is based on the anodic hole injection model and is suitable for extremely thin oxide layers. The power-law model is widely used in SiC and low-voltage logic devices.

[0048] For example, in this embodiment of the invention, the electric field acceleration model uses the E-model as an example, which sets the target operating life of the device and the actual operating electric field. The electric field acceleration model is used to inversely deduce the test time required under the accelerating voltage stress, i.e., the upper limit of the screening voltage, as the upper limit of the aging time. The TDDB test compresses the long target lifespan into an executable test time, ensuring that all weak components that cannot reach the target lifespan are excited, while avoiding wasted production capacity and unnecessary stress accumulation on good products due to excessively long test times.

[0049] The second determination module 130 provides the highest junction temperature condition and applies a screening voltage upper limit to the gate of all devices. By collecting the gate-source leakage current of each device, when the gate-source leakage current of a semiconductor device exceeds the upper limit of the leakage current threshold, it indicates that the gate oxide layer is completely damaged. The current time is recorded to obtain the aging failure time, and the device is identified as an early failure sample. For devices that have reached the specified aging time but have not exceeded the limit, they are judged to have passed the screening and are identified as qualified samples.

[0050] The judgment module 140 statistically analyzes the aging failure time of all samples judged as early failures. If the aging failure time distribution shows obvious convergence within the upper limit of the aging time, for example, most defective devices are eliminated in the early stage of testing and almost no new failures occur in the later stage, it indicates that the current screening voltage and aging time settings are reasonable, and the early failure samples and qualified samples have been successfully separated. The current screening conditions are deemed effective and can be applied to batch measurement.

[0051] Optionally, the apparatus for non-destructive screening of early gate oxide failure in semiconductor devices also includes: The aging module is used to perform time-dependent dielectric breakdown tests on qualified samples from semiconductor devices that have passed the aging test, and to obtain the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability of the qualified samples. The comparison module is used to compare the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide; if the comparison results show that the data degrades after screening, the upper limit of the screening voltage is reduced. The loop module is used to repeatedly execute all the aforementioned steps from calculating the upper limit of the aging time of the semiconductor device to be screened to completing the above comparison process, based on the reduced upper limit of the screening voltage, until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

[0052] Optionally, the first determining module includes: The measurement unit is used to apply incremental gate-source voltages to multiple semiconductor devices to be screened and to measure the threshold voltage at each gate-source voltage level. The first determining unit is used to determine the relationship curve based on the gate-source voltage and the threshold voltage; The second determining unit is used to determine the gate-source voltage at which the threshold voltage begins to drift negatively, as the upper limit of the screening voltage, based on the relationship curve.

[0053] Optional, the calculation module includes: The test unit is used to perform high-temperature time-dependent dielectric breakdown tests on the semiconductor devices to be screened. The calculation unit is used to calculate the aging time of the semiconductor device to be screened under the upper limit of the screening voltage, corresponding to the target service life, using the electric field acceleration model, and serves as the upper limit of the aging time.

[0054] The apparatus for non-destructive screening of early gate oxide failures in semiconductor devices provided in this embodiment of the invention and the method for non-destructive screening of early gate oxide failures in semiconductor devices provided in any embodiment of the invention belong to the same inventive concept and have corresponding beneficial effects. For technical details not covered in this embodiment, please refer to the method for non-destructive screening of early gate oxide failures in semiconductor devices provided in any embodiment of the invention.

[0055] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for non-destructive screening of early gate oxide failure in semiconductor devices, characterized in that, include: The upper limit of the screening voltage is determined based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. The upper limit of aging time for the semiconductor devices to be screened is calculated based on time-dependent dielectric breakdown tests. Under the highest junction temperature condition, the semiconductor device to be screened is subjected to aging test with the upper limit of the screening voltage as the stress voltage, and the aging failure time corresponding to the early failure sample in the semiconductor device to be screened is determined according to the gate-source leakage current. The effectiveness of the screening is determined by the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, then the current screening condition is determined to be effective.

2. The method for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 1, characterized in that, If the aging failure time distribution is randomly distributed within the upper limit of the aging time, then the upper limit of the screening voltage is increased or the wafer quality is determined to have defects.

3. The method for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 1, characterized in that, After determining the screening effectiveness through the convergence of the aging failure time distribution, the following steps are also included: The qualified samples from the semiconductor devices to be screened after aging tests are subjected to the time-dependent dielectric breakdown test to obtain the failure Weber distribution slope of the qualified samples and the failure time corresponding to the first extrapolated failure probability. The failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample are compared with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the time-dependent dielectric breakdown test of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide. If the comparison results show that the data degrades after filtering, then the upper limit of the filtering voltage is reduced; Based on the reduced upper limit of the screening voltage, the steps from calculating the upper limit of the aging time of the semiconductor device to be screened to completing the above comparison process are executed cyclically until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

4. The method for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 1, characterized in that, The upper limit of the screening voltage is determined based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened, including: An incremental gate-source voltage is applied to a plurality of the semiconductor devices to be screened, and a threshold voltage is measured at each gate-source voltage level; A relationship curve is determined based on the gate-source voltage and the threshold voltage; Based on the relationship curve, the gate-source voltage at which the threshold voltage begins to drift negatively is determined as the upper limit of the screening voltage.

5. The method for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 1, characterized in that, The upper limit of the aging time for the semiconductor devices to be screened, calculated based on time-dependent dielectric breakdown tests, includes: High-temperature time-dependent dielectric breakdown tests were performed on the semiconductor devices to be screened. The aging time of the semiconductor device to be screened under the upper limit of the screening voltage is calculated using an electric field acceleration model, corresponding to the target service life, and is used as the upper limit of the aging time.

6. The method for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 5, characterized in that, The electric field acceleration model includes at least one of the E-model, the 1 / E model, and the power-law model.

7. An apparatus for non-destructive screening of early gate oxide failure in semiconductor devices, characterized in that, include: The first determining module is used to determine the upper limit of the screening voltage based on the characteristic relationship between the threshold voltage and the gate-source voltage variation of the semiconductor device to be screened. The estimation module is used to estimate the upper limit of the aging time of the semiconductor device to be screened based on the time-dependent dielectric breakdown test. The second determining module is used to perform an aging test on the semiconductor device to be screened under the highest junction temperature condition, with the upper limit of the screening voltage as the stress voltage, and to determine the aging failure time corresponding to the early failure sample in the semiconductor device to be screened based on the gate-source leakage current. The determination module is used to determine the effectiveness of the screening based on the convergence of the aging failure time distribution. If the aging failure time distribution is within the upper limit of the aging time and shows convergence, the current screening condition is determined to be effective.

8. The apparatus for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 7, characterized in that, Also includes: An aging module is used to perform the time-dependent dielectric breakdown test on qualified samples from the semiconductor devices to be screened after aging tests, and to obtain the failure Weber distribution slope and the failure time corresponding to the first extrapolated failure probability of the qualified samples. The comparison module is used to compare the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the qualified sample with the failure Weber distribution slope and failure time corresponding to the first extrapolated failure probability of the time-dependent dielectric breakdown test of the semiconductor device to be screened before the aging test screening. If the comparison results show that the two are comparable, it is determined that the screening process has not damaged the intrinsic reliability of the gate oxide. If the comparison results show that the data degrades after filtering, then the upper limit of the filtering voltage is reduced; The loop module is used to repeatedly execute the steps from calculating the upper limit of the aging time of the semiconductor device to be screened to completing the above comparison process, based on the reduced upper limit of the screening voltage, until the comparison result determines that the screening process has not damaged the intrinsic reliability of the gate oxide.

9. The apparatus for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 7, characterized in that, The first determining module includes: A measurement unit is configured to apply incremental gate-source voltages to a plurality of said semiconductor devices to be screened, and to measure a threshold voltage at each said gate-source voltage level; The first determining unit is configured to determine a relationship curve based on the gate-source voltage and the threshold voltage; The second determining unit is used to determine the gate-source voltage at which the threshold voltage begins to drift negatively as the upper limit of the screening voltage, based on the relationship curve.

10. The apparatus for non-destructive screening of early gate oxide failure in semiconductor devices according to claim 7, characterized in that, The calculation module includes: The test unit is used to perform high-temperature time-dependent dielectric breakdown tests on the semiconductor devices to be screened. The calculation unit is used to calculate the aging time of the semiconductor device to be screened under the upper limit of the screening voltage, corresponding to the target service life, using the electric field acceleration model, and use it as the upper limit of the aging time.

Images