Wafer rotating method and device, wafer detection system and readable storage medium
By constructing a wafer distribution map to determine the location and spatial relationship of effective cells, the problem of wafer rotation failure in the prior art was solved, and stable rotation processing of low-yield wafers was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- MATRIXTIME ROBOTICS (SHANGHAI) CO LTD
- Filing Date
- 2026-01-20
- Publication Date
- 2026-06-12
AI Technical Summary
In existing technologies, when wafer straightening methods have low wafer yield, unclear marking patterns, or incomplete chip coverage, the marking points may fall into blank areas or be covered by defects, leading to straightening failure.
By constructing a wafer distribution map, the effective cell locations are determined, and the rotation correction is determined based on the spatial relationship between the cell locations, thus realizing the wafer rotation adjustment.
It improves the stability of the system, is suitable for wafers with defects and low yield, and avoids identification errors at large angles using traditional methods.
Smart Images
Figure CN122206232A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor inspection technology, and is a method for detecting defects on the surface of a wafer, specifically a wafer straightening method, apparatus, wafer inspection system, and readable storage medium. Background Technology
[0002] In the field of semiconductor wafer inspection technology, it is necessary to determine the current position of the wafer to be inspected and to rotate and adjust wafers whose relative positions do not meet the requirements. This process is called rotational straightening. Generally, in existing technologies, wafer rotational straightening is performed by obtaining the spatial relative positions of marker points on the wafer, determining the current rotational straightening amount based on these spatial relative positions, and then performing the rotational straightening.
[0003] However, when the above solution is used for wafers with low yield, unclear marking patterns, or chips that do not cover the entire wafer to form a defect, the marking point area may fall in a blank area or be covered by defects, resulting in rotation failure. Summary of the Invention
[0004] To address the technical problems in the prior art, embodiments of this application provide a wafer straightening method, apparatus, wafer inspection system, and readable storage medium. By introducing a wafer distribution map from the process as prior information, the available effective cells of the current wafer are automatically determined from the wafer distribution map. The positions of two spatially representative cells among the effective cells are determined, and the straightening amount of the current wafer is determined based on the spatial relationship between these cell positions, thereby achieving wafer straightening.
[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, a wafer rotation correction method is provided, the method comprising: retrieving a wafer distribution map of the wafer to be rotated, determining the distribution state of all cells on the wafer distribution map, and determining a first cell position based on the distribution state; each cell being a bare die; determining a second cell position as the farthest cell position relative to the first cell position within a unit field of view based on the first cell position and the unit spacing between each cell; acquiring real-time images of the first cell position and the second cell position, determining the center coordinates of the first cell position and the second cell position in the real-time images, and determining the rotation amount of the wafer to be rotated based on the deviation between the center coordinates of the first cell position and the second cell position.
[0006] In some specific implementations, determining the position of the first unit based on the distribution state includes: determining whether the position of the center unit on the wafer distribution map is in a valid state; when the position of the center unit is in a valid state, determining the position of the center unit as the position of the first unit.
[0007] In some specific implementations, determining the position of the first unit based on the distribution state includes: when the position of the central unit is invalid, determining the sequence with the densest distribution of valid states in the first and second directions as the first optimal sequence and the second optimal sequence, determining the position of the unit closest to the central unit position in the first optimal sequence and the second optimal sequence as the first unit position, and the sequence in which the first unit position is located as the target optimal sequence.
[0008] In some specific implementations, the farthest unit position relative to the first unit position within a unit field of view is determined as the second unit position based on the first unit position and the unit interval between each unit. This includes: determining a maximum offset based on the unit interval and a preset offset angle; determining a maximum allowable offset based on the unit field of view and the maximum offset; and determining the independent unit position corresponding to the maximum allowable offset as the second unit position.
[0009] In some specific implementations, the maximum offset is the maximum offset of the target optimal sequence where the first unit is located in another direction.
[0010] In some specific implementations, a maximum allowable offset is determined based on the unit field of view and the maximum offset. The edge position containing only independent units within the unit field of view is determined at the maximum offset. The offset corresponding to the edge position is the maximum allowable offset, and the effective unit position at the edge position is the second edge position.
[0011] In some specific implementations, obtaining real-time images of the first unit position and the second unit position includes: adjusting the unit field of view to a real-time field of view based on the first unit position and the second unit position, and obtaining a real-time image containing the first unit position and the second unit position based on the real-time field of view.
[0012] Secondly, a wafer straightening device is provided, the device comprising: a first position determination module for determining a first unit position; each unit being a bare wafer; a second position determination module for determining the farthest unit position relative to the first unit position within a unit field of view as the second unit position; and a rotation amount determination module for determining the rotation amount of the wafer to be straightened based on the deviation between the center coordinates of the first unit position and the second unit position.
[0013] Thirdly, a wafer inspection system is provided, comprising: an image acquisition device facing the wafer to be inspected and having multiple objective lens groups and sensors, each objective lens group having a different imaging magnification; a memory storing a wafer distribution map of the wafer to be inspected; and a processor connected to the memory and the image acquisition device, and executing the wafer straightening method described in any of the above embodiments.
[0014] Fourthly, a computer-readable storage medium is provided, the computer-readable storage medium storing computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement the wafer rotation method described in any of the preceding claims.
[0015] The embodiments of the present invention bring the following beneficial effects: The technical solution provided in this application constructs a wafer distribution map of the distribution state of each unit on the wafer, determines the positions of the first and second units with high correlation on the wafer distribution map, and determines the rotational deviation within the current wafer based on the spatial positional deviation of the first and second unit positions. Based on this rotational deviation, the wafer rotation is controlled. Compared to existing technologies, this application eliminates the reliance on fixed, perfect wafer images, achieving dynamic adaptation through the wafer distribution map, making it more suitable for wafer rotation processing with defects and low yield. By setting adaptive spacing rules and layering strategies, it avoids recognition errors that occur in traditional methods at large angles, improving system stability.
[0016] Other features and advantages of this disclosure will be set forth in the following description, or some features and advantages may be inferred from the description or determined without doubt, or may be learned by practicing the techniques described above.
[0017] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] The methods, systems, and / or procedures shown in the accompanying drawings will be further described with reference to exemplary embodiments. These exemplary embodiments will be described in detail with reference to the drawings. These exemplary embodiments are non-limiting exemplary embodiments, wherein example figures represent similar mechanisms in the various views of the drawings.
[0020] Figure 1 This is a structural diagram of a wafer defect detection system.
[0021] Figure 2 This is a schematic diagram of a wafer rotation correction method.
[0022] Figure 3 This is a schematic diagram of the wafer distribution.
[0023] Figure 4 This is a schematic diagram of a wafer slewing device.
[0024] Figure 5 This is a schematic diagram of a readable medium structure. Detailed Implementation
[0025] To better understand the above technical solutions, the technical solutions of this application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of this application and the specific features in the embodiments are detailed descriptions of the technical solutions of this application, rather than limitations on the technical solutions of this application. In the absence of conflict, the embodiments of this application and the technical features in the embodiments can be combined with each other.
[0026] In the detailed description below, numerous specific details are illustrated with examples to provide a comprehensive understanding of the relevant guidance. However, it will be apparent to those skilled in the art that this application can be practiced without these details. In other instances, well-known methods, procedures, systems, components, and / or circuits have been described at a relatively high level without detail to avoid unnecessarily obscuring aspects of this application.
[0027] This application uses flowcharts to illustrate the execution process performed by a system according to embodiments of this application. It should be clearly understood that the execution processes in the flowcharts may not be executed sequentially. Instead, these execution processes may be executed in reverse order or simultaneously. Additionally, at least one other execution process may be added to the flowchart. One or more execution processes may be deleted from the flowchart.
[0028] This application provides a wafer inspection system for detecting defects on the wafer surface. It acquires an image of the wafer surface to be inspected and processes the image to obtain information about the defects present on the wafer surface. In this embodiment, "wafer" generally refers to a substrate formed of semiconductor or non-semiconductor materials. Examples include (but are not limited to) single-crystal silicon, gallium arsenide, gallium nitride, and indium phosphide. Such substrates are typically found and / or processed in semiconductor manufacturing facilities. In some cases, a wafer may contain only a substrate (i.e., a bare die). Alternatively, a wafer may contain one or more layers of different materials formed on the substrate. The one or more layers formed on the wafer may be "patterned" or "unpatterned." For example, a wafer may contain multiple dies with repeatable pattern features.
[0029] This defect detection system comprises at least three parts: a light source, an objective lens, and an image sensor. The light source generates an incident light beam on the wafer surface. The objective lens transmits the reflected light beam from the wafer surface to the image sensor, which then images the wafer surface based on the reflected beam. A processing center then processes the wafer surface image to determine defects and their characteristics.
[0030] Furthermore, the wafer to be inspected is moved from the previous process stage to the inspection system by an external transfer device. The wafer moves along a path according to the current field of view of the image sensor, thereby obtaining an image corresponding to each unit on the wafer. Based on the image of each unit, it is determined whether there are surface defects in each unit of the wafer. Due to the accuracy requirements for acquiring unit images, the field of view of the image sensor should only include the current unit. This can be understood as the field of view of the image sensor being set to only be able to acquire a complete or partial image of a single unit, and not to produce two adjacent units in the same image.
[0031] In existing technologies, achieving the aforementioned technical effects requires accurate placement of the wafer under inspection. Based on this accurate position, adjusting the field of view and movement step size of the image sensor allows for the acquisition of a complete or partial image of a unit during each acquisition process. However, in general, because the wafer under inspection is placed within the wafer inspection system by an external transfer device from the previous process stage, spatial deviations are unavoidable. These deviations primarily involve spatial rotational positioning, meaning the dies on the wafer are not strictly aligned horizontally or vertically relative to the image sensor.
[0032] Therefore, before acquiring images of the wafer to be inspected, the spatial position of the wafer to be inspected needs to be rotated to ensure that the wafer to be inspected is placed in the target position, that is, the arrangement of the dies on the wafer relative to the image sensor is set in the horizontal and vertical directions.
[0033] Generally, the above-mentioned rotational straightening process is mainly achieved by setting markers on the wafer. Specifically, a wafer image containing at least two markers is acquired, and the relative positional relationship of the two markers on the wafer image is determined. Based on the relative positional relationship, it is determined whether the current spatial position of the wafer meets the requirements.
[0034] This technical solution can be used as a fast straightening method when the marking pattern on the wafer surface is clear and the wafer is complete. However, when the wafer yield is low, the marking pattern is not obvious, or the chip does not cover the entire wafer to form a defect, the marking point area may fall in the blank area or the marking point is covered by defects, so the straightening process cannot be achieved by the above method.
[0035] Therefore, see Figure 1 To address this technical problem, this embodiment provides a wafer inspection system 10, which retrieves a wafer distribution map of the current wafer to be inspected formed during the process, determines at least two cell positions on the wafer distribution map, determines the spatial position deviation of the at least two cell positions, and determines the rotation amount based on the spatial position deviation.
[0036] Specifically, this system includes an image acquisition device 11, a memory 12, and a processor 13. The image acquisition device is positioned facing the wafer to be inspected and is equipped with multiple objective lens groups and sensors. Each objective lens group has a different imaging magnification and is used to acquire wafer images within the corresponding field of view of the current wafer to be inspected.
[0037] The memory stores a wafer distribution map of the wafer to be inspected; wherein, the wafer distribution map is a distribution image of each unit, i.e., the grain, generated during the wafer fabrication process, used to indicate the distribution state of the grains on the current wafer.
[0038] The processor, connected to the memory and image acquisition device respectively, is used to execute the wafer rotation method.
[0039] For further details on the wafer rotation method, please refer to [link / reference]. Figure 2 As shown, it includes the following steps: Step S21. Retrieve the wafer distribution map of the wafer to be rotated, determine the distribution state of all units on the wafer distribution map, and determine the position of the first unit based on the distribution state.
[0040] See Figure 3This is a wafer distribution map corresponding to a typical wafer shard. This map shows whether a corresponding grain exists in each cell of the wafer. A wafer distribution map is a commonly used graphical representation in wafer fabrication processes. It is a two-dimensional matrix that accurately records the state of each cell on the wafer. Each cell represents a grain grid, and the distribution state indicates whether a corresponding grain exists in each cell. If no grain is found in the current cell, it is considered a failed cell; conversely, if a grain is found, it is considered a valid cell.
[0041] In this embodiment, the wafer distribution map is obtained by loading the process file of the current wafer, which can be achieved using existing semiconductor process methods and will not be elaborated further in this embodiment. The purpose of obtaining the wafer distribution map is to determine the optimal cell position within the wafer distribution, and then determine another corresponding cell position based on this optimal cell position. Then, the actual spatial positions on the current wafer corresponding to the above two cell positions are obtained, and the angular deviation of the current wafer is determined based on the actual spatial positions.
[0042] Therefore, the first cell position in this embodiment is the optimal cell position. This first cell position is the location of the effective cell, and the optimal cell position is used for spatial point positioning of the wafer. Therefore, the center cell position on the wafer distribution map is preferentially selected as the optimal cell position.
[0043] Specifically, the location of the center cell is first determined on the wafer distribution map, and it is determined whether the center cell location is in an effective state. If the center cell location is in an effective state, then the center cell location is determined as the first cell location.
[0044] Furthermore, if the center cell position is invalid, it cannot be determined as the first cell position, and the first cell position needs to be determined again. The logic for this secondary determination of the first cell position involves first determining the distribution of valid state cells on the wafer distribution map along the first and second directions. In this embodiment, the first and second directions represent rows or columns of the wafer, respectively. Therefore, in this process, the density of valid state distribution corresponding to each row and column on the wafer distribution map is first determined, and the densest row or column is selected.
[0045] In this context, the density of effective state distribution refers to the concentration of units with effective states. The density of effective state units in each row or column is determined, and the row or column with the highest density is taken as the final optimal sequence. Specifically, the optimal sequence corresponding to a row is the first optimal sequence, and the optimal sequence corresponding to a column is the second optimal sequence.
[0046] Furthermore, in the obtained first optimal sequence or second optimal sequence, the unit position closest to the central unit position is determined as the first unit position.
[0047] Step S22. Based on the first unit position and the unit interval between each unit, determine the farthest unit position relative to the first unit position within the unit field of view as the second unit position.
[0048] In this embodiment, the determination of the second unit position is used to correlate it with the first unit position. A line segment on the wafer is constructed using these two points. The difference between the actual spatial position of this line segment and the standard spatial position is used to determine the wafer's rotational deviation. Furthermore, this line segment is preferably distributed along a first direction or a second direction; that is, for the first unit position, it should be a unit position in the same row or column as the first unit position. In this way, the obtained line segment meets the standard requirements of spatial distribution, and the spatial deviation is easier to determine compared to a line segment parallel to an inclined line segment. The degree of deviation and the specific rotation angle are also easier to determine.
[0049] Furthermore, to ensure more accurate determination of rotational deviation, the distance between the first and second unit positions is maximized according to geometric principles, resulting in line segments that better represent the spatial distribution of the wafer. Therefore, in this embodiment, the second unit position should be the farthest unit position relative to the first unit position.
[0050] The determination of the second unit position begins by determining the maximum offset based on the unit interval and a preset offset angle. Then, the maximum allowable offset is determined based on the unit field of view and the maximum offset. The independent unit position corresponding to the maximum allowable offset is then defined as the second unit position. This process ensures that the image corresponding to the second unit position will not be crosstalked to the up / down or left / right columns due to rotation offset, thereby limiting its offset in the first or second direction.
[0051] Furthermore, for the preset offset angle as an empirical threshold, it is determined based on the largest actual offset angle in the historical process.
[0052] Specifically, the above process starts from the first cell position and searches for the second cell with a valid state on the wafer distribution map along the direction of the target optimal sequence. The interval between the second cell position and the first cell position cannot exceed the maximum allowable offset. This process ensures that even when there is a large wafer deflection, the second cell position can still be accurately imaged and identified.
[0053] Step S23. Obtain real-time images of the first unit position and the second unit position, determine the center coordinates of the first unit position and the second unit position in the real-time images, and determine the rotation amount of the positive wafer to be rotated based on the deviation of the center coordinates of the first unit position and the second unit position.
[0054] In this embodiment, two methods are included for acquiring real-time images of the first and second unit positions.
[0055] The first method involves adjusting the unit field of view based on the distance between the first and second unit positions on the wafer distribution map as the real-time field of view, and acquiring a real-time image containing both the first and second unit positions based on this real-time field of view. The real-time image obtained by this method simultaneously contains both the first and second unit positions, and subsequent deviation identification is based on the relative spatial positions of the first and second unit positions on this real-time image.
[0056] Another method involves acquiring a first real-time image of the first unit position based on a unit field of view, and then moving the image acquisition device to the second unit position to acquire a second real-time image of that position. The movement path of the image acquisition device is determined based on an image distribution state diagram. Since the second unit position is located in the optimal sequence direction, the movement of the image acquisition device is along either the first or second direction. Furthermore, because the second unit position is determined in step S22 to be the farthest unit in the optimal sequence direction that can be acquired within a unit field of view, even with wafer rotational deviations, the image acquisition device can still acquire a complete second real-time image of the second unit position based on the unit field of view.
[0057] Furthermore, the two types of image acquisition results mentioned above also have different processing procedures when determining rotational deviation.
[0058] Specifically, for a real-time image that simultaneously contains a first unit position and a second unit position, the first center point and the second center point corresponding to the first unit position and the second unit position are first determined respectively. Then, the first spatial coordinates and the second spatial coordinates of the first center point and the second center point on the real-time image are determined. Then, the deviation angle and the corresponding rotation amount are determined based on the deviation between the first spatial coordinates and the second spatial coordinates.
[0059] For the first real-time image and the second real-time image acquired respectively, the coordinates of the first center point in the first real-time image with respect to the position of the first unit and the coordinates of the second center point in the second real-time image with respect to the position of the second unit are determined respectively. Then, the deviation angle and the corresponding rotation amount are determined based on the deviation between the first center coordinates and the second center coordinates.
[0060] Although the two methods described above differ in the process of acquiring images, they employ the same method when calculating the deviation angle of the acquired images: determining the deviation corresponding to the coordinates of the center points of the two unit positions in the image.
[0061] In summary, the wafer inspection system and wafer rotation method provided in this application construct a wafer distribution map of the distribution state of each unit on the wafer, determine the positions of highly correlated first and second units on the wafer distribution map, and determine the rotation deviation within the wafer based on the spatial positional deviation of the first and second unit positions. Based on this rotation deviation, the rotation control of the wafer is achieved. Compared with existing technologies, this application eliminates the reliance on fixed, perfect wafer images, achieving dynamic adaptation through the wafer distribution map, making it more suitable for wafer rotation processing with defects and low yield. By setting adaptive spacing rules and layering strategies, the recognition errors that occur in traditional methods at large angles are avoided, improving the stability of the system.
[0062] See Figure 4 In this embodiment, a wafer straightening device 40 is also provided, which includes: First position determination module 41 is used to determine the position of the first unit; each unit is a bare die. The second position determination module 42 is used to determine the farthest unit position relative to the first unit position within a unit field of view as the second unit position; The rotation amount determination module 43 is used to determine the rotation amount of the positive wafer to be rotated based on the deviation of the center coordinates of the first unit position and the second unit position.
[0063] See Figure 5 The present invention also provides a readable medium 50, which stores computer-readable instructions 501, including instructions for performing the aforementioned wafer rotation method.
[0064] The functions and technical effects of the readable medium 50 provided in this embodiment of the invention can be referred to the technical effects of the calibration method in the foregoing embodiments, and will not be repeated here.
[0065] It should be noted that, in the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and / or methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of units / modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or modules may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0066] The units / modules described as separate components may or may not be physically separate. The components shown as units / modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units / modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0067] Furthermore, in the various embodiments of the present invention, the functional units / modules can be integrated into one processing unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated into one unit / module. The integrated unit / module described above can be implemented in hardware or in the form of hardware plus software functional units / modules.
[0068] The integrated unit / module implemented as a software functional unit / module described above can be stored in a computer-readable storage medium. The software functional unit, stored in a storage medium, includes several instructions to cause one or more processors of a computer device (which may be a personal computer, server, or network device, etc.) to execute some steps of the methods described in the various embodiments of the present invention.
[0069] The integrated unit / module implemented as a software functional unit / module described above can be stored in a computer-readable storage medium. The software functional unit, stored in a storage medium, includes several instructions to cause one or more processors of a computer device (which may be a personal computer, server, or network device, etc.) to execute some steps of the methods described in the various embodiments of the present invention.
[0070] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0071] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A wafer rotation correction method, characterized in that, The method includes: Retrieve the wafer distribution map of the wafer to be rotated, determine the distribution state of all cells on the wafer distribution map, and determine the position of the first cell based on the distribution state; each cell is a bare die; Based on the position of the first unit and the unit interval between each unit, the farthest unit position relative to the position of the first unit within the unit field of view is determined as the position of the second unit. Acquire real-time images of the first unit position and the second unit position, determine the center coordinates of the first unit position and the second unit position in the real-time images, and determine the rotation amount of the positive wafer to be rotated based on the deviation of the center coordinates of the first unit position and the second unit position.
2. The wafer rotation correction method according to claim 1, characterized in that, Determining the position of the first unit based on the distribution state includes: determining whether the position of the center unit on the wafer distribution map is in a valid state; when the position of the center unit is in a valid state, determining the position of the center unit as the position of the first unit.
3. The wafer rotation correction method according to claim 2, characterized in that, Determining the position of the first unit based on the distribution state includes: when the position of the central unit is invalid, determining the sequence with the densest distribution of valid states in the first and second directions as the first optimal sequence and the second optimal sequence, determining the position of the unit closest to the central unit position in the first optimal sequence and the second optimal sequence as the first unit position, and the sequence in which the first unit position is located as the target optimal sequence.
4. The wafer rotation correction method according to claim 3, characterized in that, Based on the position of the first unit and the unit interval between each unit, the farthest unit position relative to the position of the first unit within the unit field of view is determined as the second unit position, including: determining a maximum offset based on the unit interval and a preset offset angle, determining a maximum allowable offset based on the unit field of view and the maximum offset, and the independent unit position corresponding to the maximum allowable offset is the second unit position.
5. The wafer rotation correction method according to claim 4, characterized in that, The maximum offset is the maximum offset of the target optimal sequence where the first unit is located in another direction.
6. The wafer rotation correction method according to claim 5, characterized in that, The maximum allowable offset is determined based on the unit field of view and the maximum offset, characterized in that the maximum offset is determined at the edge position containing only independent units within the unit field of view, the offset corresponding to the edge position is the maximum allowable offset, and the effective unit position at the edge position is the second edge position.
7. The wafer rotation correction method according to claim 4, characterized in that, Acquiring real-time images of the first unit position and the second unit position includes: adjusting the unit field of view to a real-time field of view based on the first unit position and the second unit position, and acquiring a real-time image containing the first unit position and the second unit position based on the real-time field of view.
8. A wafer swivel correction device, characterized in that, The device includes: A first position determination module is used to determine the position of a first unit; each unit is a bare die. The second position determination module is used to determine the farthest unit position relative to the first unit position within a unit field of view as the second unit position; The rotation amount determination module is used to determine the rotation amount of the positive wafer to be rotated based on the deviation between the center coordinates of the first unit position and the second unit position.
9. A wafer inspection system, characterized in that, include: The image acquisition device is positioned facing the wafer to be inspected and is equipped with multiple objective lens groups and sensors, each objective lens group having a different imaging magnification. The memory stores a wafer distribution map of the wafer to be tested; The processor is connected to the memory and the image acquisition device, and executes the wafer rotation method according to any one of claims 1-7.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement the wafer rotation method according to any one of claims 1-7.