Detection system, chip and electronic device

Abstract

The present disclosure provides a detection system, a chip and an electronic device, the system comprising at least two detection circuits, a load circuit and a control circuit; a first adjusting resistor is arranged between the detection signal output end of each detection circuit and the power supply signal output end of the other detection circuit. For each detection circuit, the first adjusting resistor connected through the detection signal output end can transmit the power supply signal of the other detection circuit to the detection circuit, that is, the detection signal of the detection circuit and the power supply signal of the other detection circuit are coupled with each other, so that the control circuit correspondingly collects the coupled signal, adjusts the first electric signal based on the signal difference between the coupled signal and the reference signal, and further can guarantee that the power supply signals flowing into the load circuit are balanced. By adding the first adjusting resistor, the signal imbalance problem caused by the line impedance when the PCB layout is not ideal can be offset, and the situation that the load circuit is burned is prevented.

Description

Technical Field

[0001] This disclosure relates to the field of signal detection technology, and more particularly to a detection system, chip, and electronic device. Background Technology

[0002] In practical applications, due to space limitations and cost considerations on printed circuit boards (PCBs), control devices, detection circuits, and loads on the PCB must be placed in fixed positions on the PCB. In the case of multiple detection circuits, the different detection circuits are located in different positions on the PCB, and the corresponding connection wire lengths and line impedances between them and the load circuits may vary. This can lead to an imbalance in the electrical signals flowing into the load, which can easily cause the load circuit to burn out. Summary of the Invention

[0003] This disclosure provides a detection system, chip, and electronic device to at least solve the above-mentioned technical problems existing in the prior art.

[0004] A first aspect of this disclosure provides a detection system, the system comprising at least two detection circuits, a load circuit, and a control circuit;

[0005] Each of the at least two detection circuits is used to receive a first electrical signal and generate a detection signal and a power supply signal based on the received first electrical signal. The load circuit is used to receive power supply signals from the detection circuit; In at least two detection circuits, a first adjustment resistor is provided between the first detection circuit and the second detection circuit; The first regulating resistor of the first detection circuit is used to transmit the power supply signal of the second detection circuit, so that the control circuit determines the coupling signal according to the power supply signal of the second detection circuit and the detection signal of the first detection circuit, and adjusts the first electrical signal received by the first detection circuit based on the signal difference between the coupling signal and the reference signal of the control circuit, so that the power supply signals output by each detection circuit received by the load circuit are balanced. The first detection circuit is one of at least two detection circuits, and the second detection circuit is the other detection circuits excluding the first detection circuit among the at least two detection circuits.

[0006] In one embodiment, the detection circuit includes a first resonant resistor, a resonant capacitor, and a first inductor; The first inductor is used to receive the first electrical signal and output the corresponding power supply signal; The first resonant resistor is used to transmit the potential difference signal based on the DC equivalent impedance of the first inductor; The resonant capacitor is used to generate a corresponding detection signal based on the potential difference signal; In at least two detection circuits, a corresponding first adjustment resistor is provided between the resonant capacitor of each detection circuit and the first inductor of the other detection circuit.

[0007] In one embodiment, the resistance value of the first adjusting resistor is equal to the resistance value of the first resonant resistor.

[0008] In one embodiment, the ratio of the inductance value of the first inductor to the DC equivalent impedance of the inductor is equal to the ratio of the product of the resistance value of the first resonant resistor and the capacitance value of the first resonant capacitor to the number of the detection circuits.

[0009] In one embodiment, the number of the first regulating resistors is equal to the product of the total number of the detection circuits and the total number of the detection circuits minus one.

[0010] In one embodiment, a second regulating resistor is further provided between the first inductor and the resonant capacitor of each detection circuit; The second regulating resistor is used to adjust the reference signal of the same detection circuit based on the power supply signal of each detection circuit.

[0011] In one embodiment, the resistance value of the second regulating resistor is within a first quantity range, and any value within the first quantity range is at least on the order of a thousand times the line impedance of the connection line between the resonant capacitor and the second terminal of the control circuit.

[0012] In one possible implementation, the number of the second regulating resistors is equal to the number of the detection circuits.

[0013] A second aspect of this disclosure provides a chip that includes the detection system described in any of the preceding claims.

[0014] A third aspect of this disclosure provides an electronic device comprising a chip, the chip including the detection system described in any of the preceding claims.

[0015] This disclosure discloses a detection system comprising at least two detection circuits, a load circuit, and a control circuit. A first regulating resistor establishes a path between the detection signal output terminal of each detection circuit and the power supply signal output terminal of other detection circuits. For each detection circuit, the first regulating resistor connected to its detection signal output terminal transmits the power supply signal of other detection circuits to that detection circuit. That is, the detection signal of this detection circuit is coupled with the power supply signal of other detection circuits, allowing the control circuit to acquire the coupled signal. Based on the signal difference between the coupled signal and a reference signal, the control circuit adjusts the first electrical signal, thereby ensuring the balance of the power supply signal flowing into the load circuit. By adding the first regulating resistor, the signal imbalance caused by line impedance when the PCB layout is not ideal can be offset, preventing the load circuit from burning out.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0017] The above and other objects, features, and advantages of this disclosure will become readily apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. Several embodiments of this disclosure are illustrated in the drawings by way of example and not limitation, in which: In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0018] Figure 1 A schematic diagram showing the circuit connection relationship between the multi-detection circuit and the load circuit in the related technology is shown; Figure 2 A schematic diagram showing the circuit connection relationship between the control circuit and the detection circuit of the related technology is provided. Figure 3 The current simulation results of the relevant technology are shown in the figure; Figure 4 A schematic diagram of the circuit composition structure of a detection system according to an embodiment of the present disclosure is shown. Figure 1 ; Figure 5 A schematic diagram of the circuit composition structure of a detection system according to an embodiment of the present disclosure is shown. Figure 2 ; Figure 6 A circuit simulation result diagram of a detection system according to an embodiment of the present disclosure is shown. Detailed Implementation

[0019] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0020] Due to limitations imposed by PCB space layout and other factors, the paths from different detection circuits to the load circuit may differ. For example, during PCB layout, different detection circuits need to be placed in different locations on the PCB, and correspondingly, the distance between the power supply signal output terminal of each detection circuit and the input terminal of the load circuit will vary. Figure 1 As shown, the line lengths between the three detection circuits and the load circuit are different, and the corresponding line impedances Rpcb are also different. In this case, each detection pin of the control circuit is configured with a negative pin ISENxN, as shown below. Figure 2 As shown, for the differential circuits corresponding to each detection pin ISENxP and negative pin ISENxN, even if the PCB layout results in different trace impedances, no current deviation will be introduced; the current is naturally balanced. In other words, even if the line distance between the power supply signal output terminal of each detection circuit and the input terminal of the load circuit is different, there will be no current imbalance on the connection lines between different detection circuits and the load circuit. Therefore, the PCB layout has a relatively small impact on current balance.

[0021] However, if, for the sake of saving pins, only one common negative pin is used for the control circuit (i.e., multiple detection pins share a single common negative pin), the current flowing from each detection circuit to the load circuit will be affected by the line impedance of the connection line between the detection circuit and the load circuit. This means that the current flowing from each detection circuit to the load circuit is different. This current imbalance can cause temperature imbalance, and in severe cases, can easily burn out the corresponding load circuit. Figure 3 As shown, the simulation results show that the current balance error between the three detection circuits reaches 30%, that is, the average value of the three-phase current is about 16.67A, one phase current is 19.4A, another phase is 13.42A, the error ratio is 5.98 / 16.67, which is about 36.4%, exceeding 30%, and cannot meet the design requirements (<10%).

[0022] Based on this, embodiments of this disclosure provide a detection system to solve the aforementioned technical problems, such as... Figure 4 As shown, the system includes at least two detection circuits 100, a load circuit 200, and a control circuit 300; Each of the at least two detection circuits 100 is used to receive a first electrical signal and generate a detection signal and a power supply signal based on the received first electrical signal; The load circuit 200 is used to receive the power supply signal from the detection circuit 100; In at least two detection circuits 100, a first adjustment resistor Rm is provided between the first detection circuit and the second detection circuit; The first regulating resistor Rm of the first detection circuit is used to transmit the power supply signal of the second detection circuit, so that the control circuit 300 determines the coupling signal according to the power supply signal of the second detection circuit and the detection signal of the first detection circuit, and adjusts the first electrical signal received by the first detection circuit based on the signal difference between the coupling signal and the reference signal of the control circuit 300, so that the power supply signals output by each detection circuit received by the load circuit 200 are balanced. The first detection circuit is one of at least two detection circuits 100, and the second detection circuit is the other detection circuits among the at least two detection circuits 100 excluding the first detection circuit.

[0023] In this embodiment, the control circuit 300 is provided with a number of detection pins matching the number of detection circuits 100. The detection signal of each detection circuit 100 is acquired by the corresponding detection pin of the control circuit 300. That is, the detection signal output terminal of each detection circuit 100 is connected to the corresponding detection pin ISENxP, such as detection pin ISEN1P and detection pin ISEN2P. The control circuit 300 is provided with a common negative pin CSN, and the reference signal corresponding to the common negative pin is the average value of the power supply signals of all detection circuits 100. For each detection circuit 100, the control circuit 300 adjusts the first electrical signal input to the detection circuit according to the signal difference Vsenx between the detection signal V(ISENxP) acquired by the corresponding detection pin and the reference signal Vo,av corresponding to the common negative pin. This can then adjust the power supply signal of the input load circuit 200 generated based on the first electrical signal to power the load in the load circuit 200, such as a graphics processing unit (GPU) or a frame buffer (FB).

[0024] Ideally, the control circuit 300 can accurately adjust the first electrical signal input to each detection circuit based on the above signal difference. However, due to the asymmetrical layout of the actual PCB, the length of the connection line between the detection circuit 100 and the load circuit 200 located at different positions is different, and the corresponding line impedance Rpcb is different.

[0025] Taking the case of two detection circuits as an example, the line impedance of the connection line between the front detection circuit and the load circuit is Rpcb1, and the line impedance of the connection line between the rear detection circuit and the load circuit is Rpcb2. The current corresponding to the first electrical signal input to the front detection circuit is I. L1 The output power supply signal corresponds to the voltage Vo1, and the current corresponding to the first electrical signal input to the subsequent detection circuit is I. L2 The output power supply signal corresponds to the voltage Vo2. Where Vo1 = Vo + I L1 Rpcb1, Vo2 = Vo + I L2 Rpcb2, Vo represents the actual voltage level of the power supply signal input to the load circuit. The reference signal Vo,av = (Vo1 + Vo2) / 2, so Vsen1, determined based on V(ISEN1P) - Vo,av, and Vsen2, determined based on V(ISEN2P) - Vo,av, will introduce a deviation related to the difference in Rpcb. Ideally, the control circuit determines the current value I of different detection circuits using the VsenX signal. Lx When a current imbalance is detected, the conduction time and frequency of different detection circuits are adjusted to balance the current. However, because Rpcb-related deviations are introduced in Vsen1 and Vsen2 in this embodiment, the actual VsenX acquired by the control circuit 300 may not equal the true value. Based on this, incorrect current adjustment may occur. The greater the difference between different Rpcb values, the easier it is to cause current imbalance, i.e., current I... L1 With current I L2 The more unequal they are.

[0026] Based on this, this embodiment adds a first regulating resistor Rm, that is, each detection circuit is connected to other detection circuits by a first regulating resistor Rm, which establishes a path between the detection signal output terminal of each detection circuit and the power supply signal output terminal of other detection circuits. For each detection circuit, the first regulating resistor Rm connected to its detection signal output terminal can transmit the power supply signal of other detection circuits to that detection circuit, that is, the detection signal of the detection circuit and the power supply signal of other detection circuits are coupled to each other, so that the signal actually collected by the corresponding detection pin of the control circuit 300 is the coupled signal. The first electrical signal is adjusted based on the signal difference between the coupled signal and the reference signal, which can offset the current imbalance problem caused by the line impedance when the PCB layout is not ideal.

[0027] Taking two detection circuits as an example, a first regulating resistor Rm is connected between the detection signal output terminal of the first detection circuit and the power supply signal output terminal of the second detection circuit. Specifically, the first end of the first regulating resistor Rm is connected to the ISEN1P detection point, and the second end is connected to the Vo2 detection point of the second detection circuit. This allows the output voltage Vo2 of the second detection circuit to be introduced into the ISEN1P detection point of the first detection circuit. The effect of the output voltage Vo2 at the ISEN1P detection point can offset the portion of the error term contributed by Vo2. Similarly, the effect of the output voltage Vo1 at the ISEN2P detection point can offset the portion of the error term contributed by Vo1, thereby eliminating the detection error introduced by the PCB trace impedance difference. This enables the control circuit 300 to obtain accurate current information, thus achieving multi-phase current balance.

[0028] Therefore, this embodiment achieves the purpose of offsetting the current deviation caused by the line impedance Rpcb by adding a first adjusting resistor Rm without changing the original layout of each component on the PCB. The first adjusting resistor Rm can form cross coupling between different detection circuits, offsetting the error caused by the line impedance of the connection line between the detection circuit 100 and the load circuit 200 when different detection circuits output current to the load circuit 200. This allows the control circuit 300 to accurately adjust the current of each detection circuit 100, thereby ensuring that the current output by different detection circuits 100 to the load circuit 200 is balanced and preventing load damage caused by current imbalance.

[0029] In one embodiment, the detection circuit 100 includes a first resonant resistor Rx, a resonant capacitor Cx, and a first inductor L; The first inductor L is used to receive the first electrical signal and output the corresponding power supply signal; The first resonant resistor Rx is used to transmit the potential difference signal based on the DC equivalent impedance of the first inductor L; The resonant capacitor Cx is used to generate a corresponding detection signal based on the potential difference signal. In at least two detection circuits, a corresponding first adjustment resistor is provided between the resonant capacitor Cx of each detection circuit and the first inductor L of the other detection circuit.

[0030] In this embodiment, each detection circuit includes a first resonant resistor Rx, a resonant capacitor Cx, and a first inductor L. The connection node between the first end of the first resonant resistor Rx and the positive terminal of the resonant capacitor Cx is the input terminal of the detection circuit. The second end of the first resonant resistor Rx is connected to the input terminal of the first inductor L. The negative terminal of the resonant capacitor Cx is simultaneously connected to the output terminal of the first inductor L and the common negative terminal pin of the control circuit.

[0031] In each detection circuit, a first electrical signal is input to the input terminal of the first inductor L, and a power supply signal is output to the load circuit. The first inductor L has a DC equivalent impedance, and a first resonant resistor Rx transmits a potential difference signal based on the DC equivalent impedance to the resonant capacitor Cx. This causes the positive terminal of the resonant capacitor Cx to output a detection signal generated based on the potential difference signal, which is then acquired by the detection pin of the control circuit. Furthermore, in at least two detection circuits, a first adjusting resistor is connected between the positive terminal of the resonant capacitor Cx in each detection circuit and the output terminal of the first inductor L in the other detection circuit.

[0032] Taking two detection circuits as an example, the detection pin ISEN1P of the control circuit is connected to the positive terminal of the resonant capacitor Cx in the first detection circuit, and the negative terminal of the resonant capacitor Cx in the first detection circuit is connected to the common negative pin CSN of the control circuit. The line impedance of the connection line between the output terminal of the first inductor L in the first detection circuit and the input terminal of the load circuit is Rpcb1. Correspondingly, the detection pin ISEN2P of the control circuit is connected to the positive terminal of the resonant capacitor Cx in the second detection circuit, and the negative terminal of the resonant capacitor Cx in the second detection circuit is connected to the common negative pin CSN of the control circuit. The line impedance of the connection line between the output terminal of the first inductor L in the second detection circuit and the input terminal of the load circuit is Rpcb2. A first regulating resistor Rm1 is provided between the positive terminal of the resonant capacitor Cx in the front detection circuit and the output terminal of the first inductor L in the rear detection circuit. A first regulating resistor Rm2 is provided between the positive terminal of the resonant capacitor Cx in the rear detection circuit and the output terminal of the first inductor L in the front detection circuit.

[0033] It should be noted that in the S-domain, the voltage Vcx of the resonant capacitor Cx can be derived based on Irhoff's voltage law, and ideally, the current of each detection circuit can be determined based on the voltage across Vcx and the known DC equivalent impedance DCR of the first inductor L.

[0034] For a circuit that adds a first regulating resistor Rm, the voltage Vcx1 of the resonant capacitor Cx1 in the front detection circuit can be derived based on the following formula.

[0035] (1+sL / DCR) DCR I L1 +Vo1-Vo,av-Rx ((Vo,av+Vcx1-Vo2) / Rm+sCxVcx1)-Vcx1=0 In the formula, L is the inductance of the first inductor L in the front detection circuit, DCR is the DC equivalent impedance of the first inductor L in the front detection circuit, and I... L1Rx is the resistance value of the first resonant resistor Rx in the front detection circuit, Cx is the capacitance value of the resonant capacitor Cx1 in the front detection circuit, Vo,av is the reference voltage collected by the common negative pin CSN of the control circuit, Vo1 is the voltage at the connection point between the output terminal of the first inductor L and the negative terminal of the resonant capacitor Cx1 in the front detection circuit, and Vo2 is the voltage at the connection point between the output terminal of the first inductor L and the negative terminal of the resonant capacitor Cx2 in the rear detection circuit.

[0036] After transforming the above formula, we can obtain: Vcx1=(1+sL / DCR) / (1+sCxRx / (1+Rx / Rm)) DCR / (1+Rx / Rm) I L1 +(Rm-Rx) (Vo1-Vo2) / 2(Rx+Rm) ((1+sCxRx / (1+Rx / Rm)).

[0037] Similarly, Vcx2=(1+sL / DCR) / (1+sCxRx / (1+Rx / Rm)) DCR / (1+Rx / Rm) I L2 +(Rm-Rx) (Vo2-Vo1) / 2(Rx+Rm) ((1+sCxRx / (1+Rx / Rm)), where I L2 This represents the current corresponding to the subsequent detection circuit.

[0038] As can be seen from the above, the closer the resistance value of the first adjusting resistor Rm is to the resistance value of the resonant resistor in the detection circuit, the more significant the change in the value of (Rm-Rx) in the formula. (Vo2-Vo1) / 2(Rx+Rm) The more negligible the effect of the ((1+sCxRx / (1+Rx / Rm)) part is on Vcx1 and Vcx2, the more effectively the current bias caused by the difference in Rpcb can be eliminated, thereby improving the impact of imperfect PCB layout on current balance. Specifically, by adding a first regulating resistor Rm, and designing the resistance value of Rm, the voltage across the resonant capacitor Cx can be made close to the ideal value. Combining this with DCR, the accurate current of the detection circuit can be determined, allowing for precise current adjustment to ensure current balance in each detection circuit.

[0039] In one embodiment, the resistance value of the first adjusting resistor is equal to the resistance value of the first resonant resistor Rx.

[0040] In this embodiment, it is preferable that Rm = Rx, meaning that the resistance value of the first adjusting resistor is equal to the resistance value of the first resonant resistor Rx. When Rm = Rx, (Rm - Rx) (Vo2-Vo1) / 2(Rx+Rm) ((1+sCxRx / (1+Rx / Rm)) corresponds to 0, meaning the latter half of the expressions Vcx1 and Vcx2 is 0. Therefore, the new expressions for Vcx1 and Vcx2 are: Vcx1=(1+sL / DCR) / (1+sCxRx / 2) DCR / 2 IL1; Vcx2=(1+sL / DCR) / (1+sCxRx / 2) DCR / 2 IL2.

[0041] Based on this, by designing the inductance L and DC equivalent impedance DCR of the first inductor L, the resistance Rx of the resonant resistor, the capacitance Cx of the resonant capacitor Cx, and the resonant time constant, the expressions for Vcx1 and Vcx2 can be further optimized. This allows the voltage across the resonant capacitor Cx to approach the ideal value. Based on this, and with the known DCR, the current of the actual detection circuit can be determined for current adjustment.

[0042] In one embodiment, the ratio of the inductance value of the first inductor L to the DC equivalent impedance of the inductor is equal to the ratio of the product of the resistance value of the first resonant resistor Rx and the capacitance value of the first resonant capacitor Cx to the number of detection circuits.

[0043] In this embodiment, it is preferable to design the inductance L and DC equivalent impedance DCR of the first inductor L to be equal to the resonant time constant of the resonant resistor Rx and the resonant capacitor Cx, i.e., L / DCR=RxCx / n.

[0044] Taking two detection circuits as an example, when the inductance L and DC equivalent impedance DCR of the first inductor L are equal to the resonant time constant of the resonant resistor Rx and the resonant capacitor Cx, L / DCR = RxCx / 2, the corresponding new expressions for Vcx1 and Vcx2 are: Vcx1=DCR / 2 IL1; Vcx2=DCR / 2 IL2; That is, when L / DCR = RxCx / 2, a linear correspondence between voltage and current can be achieved. Given DCR, the corresponding current ILx can be directly determined based on the read Vcx. Each detection circuit can determine its corresponding current ILx using the above method, thereby eliminating current bias caused by line impedance and reducing current imbalances.

[0045] In one embodiment, the number of first regulating resistors is equal to the product of the total number of detection circuits and the total number of detection circuits minus one.

[0046] In this embodiment, assuming the total number of detection circuits is N, the number of first regulating resistors is equal to N. (N-1). For example, if there are two detection circuits, a first adjusting resistor is set between the positive terminal of the capacitor in the first detection circuit and the output terminal of the first inductor L in the second detection circuit, and another first adjusting resistor is set between the positive terminal of the capacitor in the second detection circuit and the output terminal of the first inductor L in the first detection circuit, that is, a total of 2. (2-1) = 2. Accordingly, if there are three detection circuits, namely detection circuit A, detection circuit B, and detection circuit C, then a first adjusting resistor is set between the positive terminal of the capacitor of detection circuit A and the output terminals of the first inductors L of detection circuit B and C, respectively. Similarly, a first adjusting resistor is set between the positive terminal of the capacitor of detection circuit B and the output terminals of the first inductors L of detection circuit A and C, and a first adjusting resistor is set between the positive terminal of the capacitor of detection circuit C and the output terminals of the first inductors L of detection circuit A and B, for a total of 3. (3-1) = 6 first regulating resistors. That is, for each detection circuit, the power supply signal output from the first inductor L of other detection circuits can be transmitted through the first regulating resistor connected to the positive terminal of its capacitor. This allows the detection pin of the control circuit connected to that detection circuit to obtain the coupling signal between the detection signal of that detection circuit and the power supply signal of other detection circuits. The current corresponding to that detection circuit is determined based on the signal difference between the coupling signal and the reference signal. Each detection circuit is determined in the above manner, thus determining the current corresponding to all detection circuits. This allows for adjustment when there is an imbalance between the currents, ensuring that the final current input to the load circuit is balanced and preventing damage to the load circuit.

[0047] In one embodiment, a second regulating resistor Rn is further provided between the first inductor L and the resonant capacitor Cx of each detection circuit; The second regulating resistor Rn is used to adjust the reference signal of the same detection circuit based on the power supply signal of each detection circuit.

[0048] In this embodiment, for each detection circuit, a second regulating resistor Rn is provided between the output terminal of the first inductor L and the negative terminal of the resonant capacitor Cx. It should be noted that for each detection circuit, in addition to the line impedance Rpcb between the output terminal of the first inductor L and the input terminal of the load circuit, there is also a line impedance Rlenx between the negative terminal of the resonant capacitor Cx and the common negative terminal pin of the control circuit. Furthermore, due to PCB layout limitations, the length of the connection line between the negative terminal of the resonant capacitor Cx and the common negative terminal pin of the control circuit is different for different detection circuits. Correspondingly, each Rlenx is also different, i.e., the difference between RIsen1 and RIsenn is relatively large, which can also cause current imbalance. The negative terminal potential of the resonant capacitor Cx in each detection circuit is affected by RIsenn. Different RIsenn can easily cause different voltage drops between the negative terminal of the resonant capacitor Cx and the common negative terminal pin CSN of the control circuit, thus making Vsenx inconsistent with reality.

[0049] Based on this, in this embodiment, a second regulating resistor Rn is set between the output terminal of the first inductor L and the negative terminal of the resonant capacitor Cx in each detection circuit. Furthermore, by designing the resistance value of the second regulating resistor Rn to be much larger than the line impedance RIsen, the detection difference caused by the difference between the line impedances RIsenn is minimized, thereby eliminating the current imbalance caused by the difference between RIsen when the PCB layout is not ideal, thus solving the current imbalance problem. After each detection circuit is connected to the second regulating resistor Rn, the reference potential of the negative terminal of the resonant capacitor Cx directly pulls the power supply potential Von of the output terminal of the first inductor L in this detection circuit, such as Vo1, Vo2, etc. Since the resistance value of the second regulating resistor Rn is much larger than the line impedance RIsen, the voltage drop across R_Isen is negligible relative to the Rn path, and the potential of the negative terminal of the resonant capacitor Cx no longer fluctuates with changes in R_Isen, thus eliminating the voltage drop interference caused by R_Isen. Compared to related technologies that use switching power supplies (SPS) with current monitoring (IMON) functionality, this can reduce the problem of excessive costs caused by the high price of SPS with IMON functionality.

[0050] In one embodiment, the resistance value of the second regulating resistor Rn is within a first quantity range, and any value within the first quantity range is at least on the order of a thousand times the line impedance of the connection line between the resonant capacitor Cx and the second terminal of the control circuit 300.

[0051] In this embodiment, it is preferable to design the resistance value of the second regulating resistor Rn to be between 1 and 10 ohms, that is, thousands to tens of thousands of times that of RIsen, which can effectively solve the problem of detection difference caused by the difference between miniaturized R_Isenn.

[0052] In one embodiment, the number of second regulating resistors Rn is equal to the number of detection circuits 100.

[0053] In this embodiment, for each detection circuit, only one second regulating resistor Rn needs to be set between the output terminal of its first inductor L and the negative terminal of the resonant capacitor Cx. That is, assuming the number of detection circuits 100 is N, the number of second regulating resistors Rn is also N. Figure 5 As shown, N=3, meaning three detection circuits are set up. A second regulating resistor Rn is set between the output terminal of the first inductor L of each detection circuit and the negative terminal of the resonant capacitor Cx, for a total of 3. A first regulating resistor is set between the positive terminal of the resonant capacitor Cx of each detection circuit and the output terminal of the first inductor L of each other detection circuit, for a total of 6. (See diagram) Figure 6 As shown in the simulation, when there are three detection circuits, the current balance error between the three phases is 3.6%. Regardless of whether the load is light (50A) or heavy (130A), the difference in current between each phase is very small, which meets the design requirements (<10%).

[0054] In summary, the positive terminal of the resonant capacitor Cx of each detection circuit in this disclosure is connected to the output terminal of the first inductor L of other detection circuits, i.e., the front end of Rpcb, through a first adjusting resistor Rm. The negative terminal of the resonant capacitor Cx of each detection circuit is connected to the output terminal of the first inductor L of the same detection circuit, i.e., the front end of Rpcb, through a second adjusting resistor Rn. By designing Rm=Rx, L / DCR=RxCx / n, and Rn=1-10 ohms, the current imbalance problem caused by differences between various Rpcb and R_Isen due to imperfect PCB layout is eliminated. There is no need to change the original PCB layout; that is, it is not necessary to make Rpcbn equal for each detection circuit, nor is it necessary to make each R_Isenn equal. This eliminates current errors caused by line impedance even when the PCB layout cannot be changed. Furthermore, it eliminates the need for expensive SPS with IMON functionality, effectively saving production costs.

[0055] A second aspect of this disclosure provides a chip that includes the detection system described above.

[0056] A third aspect of this disclosure provides an electronic device, which includes a chip, and the chip includes the detection system described above.

[0057] Electronic devices are intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic devices can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0058] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0059] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0060] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction methods implemented in a process. Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0061] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0062] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0063] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0064] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A detection system, characterized in that, The system includes at least two detection circuits, a load circuit, and a control circuit. Each of the at least two detection circuits is used to receive a first electrical signal and generate a detection signal and a power supply signal based on the received first electrical signal. The load circuit is used to receive power supply signals from the detection circuit; In at least two detection circuits, a first adjustment resistor is provided between the first detection circuit and the second detection circuit; The first regulating resistor of the first detection circuit is used to transmit the power supply signal of the second detection circuit, so that the control circuit determines the coupling signal according to the power supply signal of the second detection circuit and the detection signal of the first detection circuit, and adjusts the first electrical signal received by the first detection circuit based on the signal difference between the coupling signal and the reference signal of the control circuit, so that the power supply signals output by each detection circuit received by the load circuit are balanced. The first detection circuit is one of at least two detection circuits, and the second detection circuit is the other detection circuits excluding the first detection circuit among the at least two detection circuits.

2. The detection system according to claim 1, characterized in that, The detection circuit includes a first resonant resistor, a resonant capacitor, and a first inductor; The first inductor is used to receive the first electrical signal and output the corresponding power supply signal; The first resonant resistor is used to transmit the potential difference signal based on the DC equivalent impedance of the first inductor; The resonant capacitor is used to generate a corresponding detection signal based on the potential difference signal; In at least two detection circuits, a corresponding first adjustment resistor is provided between the resonant capacitor of each detection circuit and the first inductor of the other detection circuit.

3. The detection system according to claim 2, characterized in that, The resistance value of the first adjusting resistor is equal to the resistance value of the first resonant resistor.

4. The detection system according to claim 2, characterized in that, The ratio of the inductance value of the first inductor to the DC equivalent impedance of the inductor is equal to the ratio of the product of the resistance value of the first resonant resistor and the capacitance value of the first resonant capacitor to the number of the detection circuits.

5. The detection system according to claim 1, characterized in that, The number of the first regulating resistors is equal to the product of the total number of the detection circuits and the total number of the detection circuits minus one.

6. The detection system according to claim 2, characterized in that, A second regulating resistor is also provided between the first inductor and the resonant capacitor of each detection circuit; The second regulating resistor is used to adjust the reference signal of the same detection circuit based on the power supply signal of each detection circuit.

7. The detection system according to claim 6, characterized in that, The resistance value of the second regulating resistor is within a first quantity range, and any value within the first quantity range is at least on the order of a thousand times the line impedance of the connection line between the resonant capacitor and the second terminal of the control circuit.

8. The detection system according to claim 6, characterized in that, The number of the second regulating resistors is equal to the number of the detection circuits.

9. A chip, characterized in that, The chip includes the detection system according to any one of claims 1-8.

10. An electronic device, characterized in that, The electronic device includes a chip, the chip comprising the detection system according to any one of claims 1-8.

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