Voltage reduction circuit, chip, and electronic device

Abstract

This application provides a step-down circuit, chip, and electronic device. During startup, the circuit selects either a reference voltage or a soft-start voltage signal based on a soft-start completion signal to output to an overvoltage protection module. This allows the overvoltage protection module to compare the output voltage with the smaller soft-start voltage signal when startup is incomplete. If the output voltage rises much faster than the soft-start voltage signal, it can quickly detect overvoltage and generate an overvoltage detection signal. This signal then slows down the rise of the output voltage during startup. Upon startup completion, the circuit compares the output voltage with the reference voltage signal. Therefore, the output voltage follows the soft-start voltage signal more slowly throughout the startup process, preventing overshoot and improving the soft-start effect.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, specifically to a step-down circuit, chip, and electronic device. Background Technology

[0002] In the field of integrated circuit technology, it is generally necessary to step down the power supply voltage to power various circuits. For example, in low-power MCU applications, the voltage after stepping down the power supply voltage is relatively small, such as 0.9V.

[0003] During the turn-on process of a buck converter, the output voltage is prone to overshoot, which is typically addressed using soft-start technology. Currently, a common soft-start approach involves using a slowly rising soft-start voltage from zero as one input to an error amplifier, comparing it with the output feedback voltage of the buck converter to generate an error detection signal. However, because the rise rate of the buck converter's output voltage is difficult to control and the logic exhibits indeterminate states, a small overshoot can still occur in the output voltage. Summary of the Invention

[0004] In view of the above problems, embodiments of this application provide a step-down circuit, a chip, and an electronic device to solve the above technical problems.

[0005] In a first aspect, embodiments of this application provide a step-down circuit, including: A voltage conversion module is used to step down the input voltage to generate an output voltage; A soft-start module is used to output a soft-start voltage signal during the startup process of the buck circuit, and to generate a soft-start completion signal based on the soft-start voltage signal and a reference voltage. The first selection module is used to select one of the reference voltage or the soft-start voltage signal for output based on the soft-start completion signal; An overvoltage protection module is provided, which compares the output voltage with the voltage output by the first selection module. When the output voltage is greater than the voltage output by the first selection module, an overvoltage detection signal is generated to control the output voltage of the voltage conversion module.

[0006] Secondly, embodiments of this application also provide a chip including the aforementioned step-down circuit.

[0007] Thirdly, embodiments of this application also provide an electronic device, including a device body and a step-down circuit as described above disposed on the device body, or including a device body and a chip as described above disposed on the device body.

[0008] The buck circuit, chip, and electronic device provided in this application select either a reference voltage or a soft-start voltage signal to output to the overvoltage protection module during startup, based on the soft-start completion signal. This allows the overvoltage protection module to compare the output voltage with the smaller soft-start voltage signal when startup is incomplete. If the output voltage rises much faster than the soft-start voltage signal, it can quickly detect overvoltage and generate an overvoltage detection signal. This allows the voltage conversion module to slow down the rise of the output voltage during startup. Upon startup completion, the reference voltage signal is selected for comparison. Therefore, the output voltage follows the soft-start voltage signal more slowly throughout the startup process, avoiding overshoot and improving the soft-start effect.

[0009] These or other aspects of this application will become more apparent in the following description of the embodiments. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A schematic diagram of a step-down circuit provided in an embodiment of this application is shown.

[0012] Figure 2 Another schematic diagram of the step-down circuit provided in the embodiments of this application is shown.

[0013] Figure 3 This illustration shows a schematic diagram of a high-side drive unit in a buck circuit provided in an embodiment of this application. Figure 4 Another schematic diagram of the step-down circuit provided in the embodiments of this application is shown.

[0014] Figure 5 A schematic diagram of a feedback unit in a buck circuit provided in an embodiment of this application is shown.

[0015] Figure 6 Another schematic diagram of the step-down circuit provided in the embodiments of this application is shown.

[0016] Figure 7 Another schematic diagram of the step-down circuit provided in the embodiments of this application is shown.

[0017] Figure 8 A schematic diagram of a chip provided in an embodiment of this application is shown. Detailed Implementation

[0018] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0019] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0020] In the embodiments of this application, it should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0021] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0022] In the description of the embodiments of this application, the words "example" or "for example" are used to indicate exemplification, illustration, or description. Any embodiment or design described as "example" or "for example" in the embodiments of this application is not to be construed as being more preferred or having more advantages than another embodiment or design. The use of the words "example" or "for example" is intended to present relative concepts in a clear manner.

[0023] Furthermore, in the embodiments of this application, "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, including at least one means including one, two, or more, and is not limited to which ones are included. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A and B and C.

[0024] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0025] In the embodiments of this application, the first terminal / first end of each transistor is one of the source and the drain, and the second terminal / second end of each transistor is the other of the source and the drain. Since the source and drain of a transistor can be structurally symmetrical, they can be structurally indistinguishable. That is, the first terminal / first end and the second terminal / second end of the transistor in the embodiments of this application can be structurally indistinguishable. For example, when the transistor is a P-type transistor, the first terminal / first end is the source, and the second terminal / second end is the drain; for example, when the transistor is an N-type transistor, the first terminal / first end is the drain, and the second terminal / second end is the source.

[0026] In the field of integrated circuit technology, it is generally necessary to step down the power supply voltage to power various circuits. For example, in low-power MCU applications, the voltage after stepping down the power supply voltage is relatively small, such as 0.9V.

[0027] In the process of buck circuit from shutdown to startup, in order to prevent the voltage difference between the two input terminals of error amplifier from being too large in the initial stage of startup due to the zero output feedback voltage and the power-on establishment of reference voltage, which would cause the output of error amplifier to be too large, resulting in the turn-on time of the upper switching transistor in buck circuit being too long and the current of energy storage inductor being too large, which would make the output voltage of buck circuit prone to overshoot voltage, soft-start technology is usually used to allow the output of error amplifier to rise slowly.

[0028] Currently, a common approach to soft-start is to use a clock-controlled, slowly rising soft-start voltage, starting from zero, as one input to the error amplifier during the initial startup phase, instead of the reference voltage. This soft-start voltage is compared with the output feedback voltage. Once the soft-start voltage reaches the reference voltage, it is then compared with the output feedback voltage to generate an error detection signal. This allows the output voltages of the error amplifier and the buck converter to rise relatively smoothly. However, because the soft-start voltage rises slowly at a fixed frequency and slope, the slope of the buck converter's output voltage rise is difficult to control. Furthermore, during the startup phase of the buck converter, the internal LDO requires a short settling time. During this very short time, logic instability may still cause a small overshoot in the output voltage. In some applications, it is desirable for the buck converter's output voltage not only to avoid overshoot exceeding the expected output voltage value but also to avoid a rapid drop after rising faster than the soft-start voltage. Therefore, a new circuit architecture is needed during startup to ensure that the buck converter's output voltage rises slowly relative to the soft-start voltage.

[0029] Therefore, this application provides a step-down circuit, a chip, and an electronic device, which will be described in detail below.

[0030] First, refer to Figure 1 , Figure 1 A schematic diagram of a step-down circuit provided in an embodiment of this application is shown. The step-down circuit includes a voltage conversion module 110, a soft-start module 120, a first selection module 130, and an overvoltage protection module 140.

[0031] The voltage conversion module 110 is used to step down the input voltage VIN to generate the output voltage VOUT.

[0032] In some embodiments, refer to Figure 2 , Figure 2This diagram illustrates another schematic of the buck circuit provided in an embodiment of this application. The voltage conversion module 110 includes a high-side transistor MHS, a low-side transistor MLS, a high-side drive unit 111, a low-side drive unit 112, and an energy storage unit 113. The high-side transistor MHS is used to receive the input voltage VIN and charges the energy storage unit 113 when it is on. The low-side transistor MLS is used to discharge the energy storage unit 113 to ground when it is on. The high-side drive unit 111 outputs a high-side drive signal HS to the high-side transistor MHS. The low-side drive unit 112 outputs a low-side drive signal LS to the low-side transistor MLS. The second terminal of the energy storage unit 113 is used to generate an output voltage VOUT. The voltage conversion module 110 can control the charging and discharging of the energy storage unit 113 by enabling the high-side drive unit 111 and the low-side drive unit 112 to output drive signals, thereby controlling the on-state of the high-side transistor MHS and the low-side transistor MLS, and thus converting the input voltage VIN into an output voltage VOUT.

[0033] In one embodiment, the high-side transistor MHS can be a PMOS transistor, the low-side transistor MLS can be an NMOS transistor, and the energy storage unit 113 includes an inductor L. The first terminal of the high-side transistor MHS is connected to the power supply terminal to receive the input voltage VIN, the second terminal of the high-side transistor MHS is connected to the first terminal of the inductor L, and the control terminal of the high-side transistor MHS is connected to the output terminal of the high-side drive unit 111 to receive the high-side drive signal HS. The first terminal of the low-side transistor MLS is connected to the first terminal of the inductor L, the second terminal of the low-side transistor MLS is connected to the ground terminal, and the control terminal of the low-side transistor MLS is connected to the output terminal of the low-side drive unit 112 to receive the low-side drive signal LS. The second terminal of the inductor L is used to generate the output voltage VOUT. When the high-side transistor MHS is turned on, the input voltage VIN charges the inductor L. When the low-side transistor MLS is turned on and the high-side transistor MHS is turned off, the inductor L discharges to the ground terminal. According to the volt-second balance principle, the output voltage is equal to the input voltage multiplied by the duty cycle of the high-side transistor. Therefore, the output voltage is always less than the input voltage, achieving a voltage reduction effect.

[0034] The soft-start module 120 is used to output a soft-start voltage signal SS during the startup process of the buck circuit, and to generate a soft-start completion signal SS_DONE based on the soft-start voltage signal SS and the reference voltage REF; wherein, the soft-start voltage signal SS continuously increases from zero. In one embodiment, during the startup process of the buck circuit, the soft-start module 120 generates a soft-start voltage signal SS that slowly increases from zero at a fixed frequency and slope, thereby outputting a continuously increasing soft-start voltage signal SS, and detects the soft-start voltage signal SS. When the soft-start voltage signal SS is greater than the reference voltage REF, the soft-start module 120 generates a first-level soft-start completion signal SS_DONE, for example, a high-level soft-start completion signal SS_DONE; correspondingly, when the soft-start voltage signal SS is less than the reference voltage REF, the soft-start module 120 generates a second-level soft-start completion signal SS_DONE, for example, a low-level soft-start completion signal SS_DON.

[0035] One input terminal of the first selection module 130 is connected to a reference voltage REF, and the other input terminal of the first selection module 130 is connected to the soft-start module 120 to receive a soft-start voltage signal SS. The selection control terminal of the first selection module 130 is connected to the soft-start module 120 to receive a soft-start completion signal SS_DONE. The first selection module 130 is used to select either the reference voltage REF or the output soft-start voltage signal SS for output based on the soft-start completion signal SS_DONE. In one embodiment, when the first selection module 130 obtains a soft-start completion signal SS_DONE of a first level, it selects to output the reference voltage REF. When it obtains a soft-start completion signal SS_DONE of a second level, it selects to output the soft-start voltage signal SS. In another embodiment, the first-level soft-start completion signal SS_DONE is generated when the soft-start voltage signal SS is greater than the reference voltage REF for a first preset duration. Therefore, the first selection module 130 selects to output the reference voltage REF when the soft-start voltage signal SS is greater than the reference voltage REF for the first preset duration; otherwise, it outputs the soft-start voltage signal SS. The first level can be a high level, meaning that the first selection module 130 can select to output the reference voltage REF when it receives a high-level soft-start completion signal SS_DONE. Correspondingly, the second level can be a low level, meaning that the first selection module 130 can select to output the soft-start voltage signal SS when it receives a low-level soft-start completion signal SS_DONE.

[0036] One input terminal of the overvoltage protection module 140 is connected to the output terminal of the first selection module 130, and the other input terminal of the overvoltage protection module 140 is connected to the second terminal of the inductor L to receive the output voltage VOUT. The overvoltage protection module 140 is used to compare the output voltage VOUT with the voltage output by the first selection module 130. When the output voltage VOUT is greater than the voltage output by the first selection module 130, an overvoltage detection signal OV is generated to control the output voltage of the voltage conversion module 110. In one embodiment, during the startup process, the overvoltage protection module 140 compares the magnitude of the output voltage VOUT with the soft-start voltage signal SS. When the output voltage VOUT is too large, it can output the overvoltage detection signal OV to the voltage conversion module 110 in time to adjust the output voltage, so that the output voltage can rise slowly during the startup process.

[0037] The solution in this application incorporates a first selection module 130 in the step-down circuit. During startup, based on the soft-start completion signal SS_DONE, it selects either the reference voltage REF or the output soft-start voltage signal SS to output to the overvoltage protection module 140. This allows the overvoltage protection module 140 to compare the smaller soft-start voltage signal SS with the output voltage OUT when startup is incomplete. When the rise rate of the output voltage OUT is significantly faster than that of the soft-start voltage signal SS, it can quickly detect overvoltage at the output voltage OUT and generate an overvoltage detection signal OV. This allows the voltage conversion module 110 to slow down the rise of the output voltage VOUT during startup based on the overvoltage detection signal OV. Upon startup completion, it compares the reference voltage signal REF with the output voltage VOUT. Therefore, the output voltage VOUT can more slowly follow the changes in the soft-start voltage signal SS throughout the startup process, avoiding overshoot and thus improving the soft-start effect.

[0038] In some embodiments, when the voltage conversion module 110 receives the overvoltage detection signal OV, it controls the high-side drive unit 111 to turn off the high-side transistor MHS to slow down the rising trend of the output voltage VOUT during the startup process.

[0039] Since the high-side drive unit 111 controls the high-side transistor MHS to turn off, the charging circuit of the inductor L is disconnected, thereby slowing down the rising trend of the output voltage VOUT during the startup process.

[0040] In some embodiments, the voltage conversion module 110 includes a high-side transistor MHS and a high-side driving unit 111. The high-side driving unit 111 is used to output a high-side driving signal HS to drive the high-side power transistor MHS. The high-side driving unit 111 is also used to adjust the slew rate of the high-side driving signal HS according to the soft-start completion signal SS_DONE to control the high-side power transistor MHS.

[0041] It is understood that the slew rate is the rate of change of current per unit time. In this embodiment, the slew rate of the high-side drive signal HS is adjusted according to the soft-start completion signal SS_DON during the startup process, thereby avoiding large switching jitter of the current of the high-side power transistor MHS during startup, and improving the safety and reliability of the startup process.

[0042] In some embodiments, the slew rate can be adjusted by adjusting the time delay. (See reference...) Figure 3 , Figure 3 The diagram shows a high-side driving unit 111 provided in an embodiment of this application. The high-side driving unit 111 includes a first buffer subunit 1111, a delay subunit 1112, a selection subunit 1113, and a second buffer subunit 1114.

[0043] The first buffer subunit 1111 is used to generate a buffer signal CLKH_BUF according to the control signal CLKH_LS; the delay subunit 1112 is used to generate a delay signal CLKH_DE according to the buffer signal CLKH_BUF; the selection subunit 1113 is used to select one of the buffer signal CLKH_BUF and the delay signal CLKH_DE according to the soft start completion signal SS_DONE and output it to the second buffer subunit 1114. The second buffer subunit 1114 generates a high-side drive signal HS according to the buffer signal CLKH_BUF and the delay signal CLKH_DE and outputs it to the high-side transistor MHS.

[0044] For example, when the selection subunit 1113 is connected to the first-level soft-start completion signal SS_DONE, the selection buffer signal CLKH_BUF is output; when the selection subunit 1113 is connected to the second-level soft-start completion signal SS_DONE, the selection delay signal CLKH_DE is output. In one embodiment, the first buffer subunit 1111 and the second buffer subunit 1114 can be buffers obtained by cascading multiple inverters, the delay subunit 1112 can be an RC delay network, and the selection subunit 1113 can be a two-way selector.

[0045] During the startup phase, before the soft start is complete, a low-level soft start completion signal SS_DONE is output. Upon receiving the low-level soft start completion signal SS_DONE, selection subunit 1113 outputs a delay signal CLKH_DE, which lengthens the delay of the high-side drive signal HS output by the high-side drive unit, reducing the slew rate and thus preventing significant switching jitter during startup. This ensures the safety and reliability of the startup process. During the startup completion phase, selection subunit 1113 skips the delay subunit 1112 based on the high-level soft start completion signal SS_DONE and selects the output buffer signal CLKH_BUF.

[0046] In other embodiments, the slew rate can be adjusted by adjusting the current magnitude. The high-side drive unit 111 may include multiple parallel transistors. The high-side drive unit 111 controls the number of transistors turned on according to the soft-start completion signal SS_DONE to adjust the slew rate of the high-side drive unit 111. Specifically, during the startup phase, the selection subunit 1113 triggers a digital control signal based on the low-level soft-start completion signal SS_DONE, reducing the number of parallel transistors turned on, thereby reducing the overall drive current of the high-side drive unit 111 and thus lowering the slew rate. During the startup completion phase, the selection subunit 1113 triggers a digital control signal based on the high-level soft-start completion signal SS_DONE, increasing the number of parallel transistors turned on, thereby increasing the overall drive current of the high-side drive unit 111 and thus increasing the slew rate.

[0047] In some embodiments, refer to Figure 4 , Figure 4 This illustration shows another schematic diagram of the step-down circuit provided in an embodiment of this application. The voltage conversion module 110 further includes a feedback unit 114, a current comparison unit 115, a logic unit 116, and a level conversion unit 117.

[0048] The feedback unit 114 is used to generate an error detection signal VC based on the output voltage VOUT and the reference signal VREF. Specifically, one input terminal of the feedback unit 114 is connected to the second terminal of the inductor L to receive the output voltage VOUT, and the other input terminal of the feedback unit 114 is connected to the reference voltage REF. By comparing the difference between the output voltage VOUT and the reference voltage REF, the error detection signal VC is generated.

[0049] The current comparison unit 115 is used to generate the detection current Isens of the high-side transistor MHS according to the error detection signal VC, and compare the detection current Isens with the load current Iload to output the comparison result COMP. Specifically, the current comparison unit 115 is connected to the feedback unit 114 to obtain the error detection signal VC. The current comparison unit 115 is also connected to the high-side transistor MHS to generate the detection current Isens of the high-side transistor MHS according to the error detection signal VC, and to obtain the load current Iload of the high-side transistor MHS. By comparing the load current Iload with the detection current Isens to generate the comparison result COMP, feedback regulation can be realized.

[0050] Logic unit 116 is used to perform logic processing based on the comparison result COMP and the overvoltage signal OV, and output control logic; level conversion unit 117 is used to perform voltage conversion on the control logic to generate a control signal CLKH_LS for driving the high-side drive unit 111.

[0051] In some embodiments, refer to Figure 5 , Figure 5 A schematic diagram of the feedback unit 114 in the step-down circuit provided in the embodiment of this application is shown. The feedback unit 114 includes a voltage divider subunit 1141 and an error amplification subunit 1142. Voltage divider subunit 1141 is used to receive the output voltage VOUT and divide the output voltage VOUT to obtain the feedback voltage FB. In one embodiment, voltage divider subunit 1141 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is used to receive the output voltage VOUT. The second end of the first resistor R1 is connected to the first end of the second resistor R2. The second end of the second resistor R2 is connected to the ground terminal. The first end of the second resistor R2 is connected to the input terminal of the error amplifier subunit 1142 to provide the feedback voltage FB to the error amplifier subunit 1142.

[0052] The error amplification subunit 1142 is used to generate an error detection signal VC based on the feedback voltage FB and the reference voltage REF or the soft-start voltage signal SS. In one embodiment, the error amplification subunit 1142 includes an error amplifier EA, the first input terminal of the error amplifier EA is connected to the reference voltage REF, the second input terminal of the error amplifier EA is connected to the soft-start voltage signal SS, the third input terminal of the error amplifier EA is connected to the feedback voltage FB, and the fourth input terminal of the error amplifier EA is connected to a disable signal Disable, wherein the disable signal Disable is used to control whether the error amplifier EA is working.

[0053] When the soft-start module 120 outputs a first-level soft-start completion signal SS_DONE, that is, when the soft-start voltage signal SS is greater than the reference voltage REF, the error amplification subunit 1142 generates an error detection signal VC based on the feedback voltage FB and the reference voltage REF. When the soft-start module 120 outputs a second-level soft-start completion signal SS_DONE, that is, when the soft-start voltage signal SS is less than the reference voltage REF, the error amplification subunit 1142 generates an error detection signal VC based on the feedback voltage FB and the soft-start voltage signal SS. In other words, the error amplification subunit 1142 selects whether to use the reference voltage REF or the soft-start voltage signal SS to compare with the feedback voltage FB based on the soft-start completion signal SS_DONE.

[0054] Continue to refer to Figure 5 The feedback unit 114 also includes a voltage compensation unit 1143; the voltage compensation unit 1143 is used to compensate the error detection signal VC to improve the stability of the error detection signal VC.

[0055] In one embodiment, the voltage compensation unit 1143 includes a first capacitor C1, a second capacitor C2, and a third resistor R3. The first plate of the first capacitor C1 is connected to the error detection signal VC, and the second plate of the first capacitor C1 is connected to the ground terminal. The first terminal of the third resistor R3 is connected to the error detection signal VC, and the second terminal of the third resistor R3 is connected to the first plate of the second capacitor C2. The second plate of the second capacitor C2 is connected to the ground terminal. The first capacitor C1, the second capacitor C2, and the third resistor R3 form an RC compensation network to improve the stability of the error detection signal VC.

[0056] In some embodiments, refer to Figure 6 , Figure 6 Another schematic diagram of the step-down circuit provided in the embodiment of this application is shown. The current comparison unit 115 includes a current detection subunit 1151, a voltage-to-current subunit 1152, and a current comparison subunit 1153.

[0057] The current detection subunit 1151 is used to mirror the current of the high-side transistor MHS for current detection; the voltage-to-current subunit 1152 is used to generate the detection current Isens of the current detection subunit 1151 based on the error detection signal VC; and the current comparison subunit 1153 is used to compare the detection current Isens with the load current Iload of the high-side transistor MHS to generate the comparison result COMP.

[0058] In one embodiment, the current detection subunit 1151 may include multiple detection transistors Msens. The first terminals of the multiple detection transistors Msens are interconnected, the control terminals of the multiple detection transistors Msens are interconnected, and the second terminals of the multiple detection transistors Msens are respectively connected to the first terminal of their respective selection switches. The second terminals of the selection switches are interconnected. The detection transistors Msens may be PMOS transistors, and the corresponding selection switches may also be PMOS transistors. The control terminal of the high-side transistor MHS is connected to the control terminal of each detection transistor Msens. The first terminal of each detection transistor Msens is connected to a power supply terminal to receive the input voltage VIN. The detection transistors Msens and the high-side transistor MHS form a current mirror structure to achieve current detection.

[0059] The current detection subunit 1151 can control the number of conducting detection transistors Msens via a switch selection signal, thereby controlling the current mirror ratio. For example, the current detection subunit 1151 can control the aforementioned plurality of selection switches by receiving a switch selection signal. In one embodiment... Figure 6Taking the switch selection signal <2:0> as an example, <2:0> is a 3-bit control signal. Correspondingly, the number of detection transistors Msens and selection switches can be 3 each. Assuming the switch selection signal is 001, the actions of the 3 selection switches are, in sequence, off, off, and on.

[0060] Understandable, Figure 6 The control signals in this embodiment are for illustrative purposes only. This application does not limit the specific number of selector switches. That is, the number of detection transistors Msens in the current detection subunit 1151 can be set according to actual needs.

[0061] In some embodiments, continue to refer to Figure 6 The logic unit 116 includes a logic subunit 1161, a trigger subunit 1162, and a low-side power supply unit 1163.

[0062] The logic subunit 1161 is used to generate a logic signal LOG based on the comparison result COMP and the overvoltage detection signal OV. Specifically, the logic subunit 1161 is also connected to the current comparison unit 115 to obtain the comparison result COMP. When either the overvoltage detection signal OV or the comparison result COMP is high, the logic signal LOG output by the logic subunit 1161 is low and is output to the trigger subunit 1162 to achieve feedback regulation.

[0063] Trigger subunit 1162 is used to output high-side control signal CLKH and low-side control signal CLKL according to logic signal LOG and reference clock signal CLK_SET; level conversion unit 117 is used to perform level conversion on high-side control signal CLKH to obtain control signal CLKH_LS; high-side drive unit 111 is used to generate high-side drive signal HS according to soft start completion signal SS_DONE and control signal CLKH_LS; low-side drive unit 112 is used to generate low-side drive signal LS according to low-side control signal CLKL.

[0064] In one embodiment, logic subunit 1161 can be a NOR gate, and trigger subunit 1162 can be an RS flip-flop. Besides inputting the overvoltage detection signal OV and the comparison result COMP, logic subunit 1161 can also input a disable signal Disable, which controls whether logic subunit 1161 operates. The S terminal of trigger subunit 1162 is connected to the reference clock signal CLK_SET, and the R terminal of trigger subunit 1162 is connected to the output terminal of logic subunit 1161 to input the logic signal LOG. The terminal is connected to the level conversion unit 117 to output a high-side control signal CLKH to the level conversion unit 117, triggering the subunit 1162. The output terminal of the level conversion unit 117 is connected to the low-side drive unit 112 to output a low-side control signal CLKL to the low-side drive unit 112. When any one of the overvoltage detection signal OV, the disable signal Disable, or the comparison result COMP is high, the logic signal LOG is low. The output terminal of the level conversion unit 117 is connected to the high-side drive unit 111 to output a control signal CLKH_LS to the high-side drive unit 111.

[0065] In addition, the low-side power supply unit 1163 is connected to the power supply terminal to receive the input voltage VIN. The low-side power supply unit 1163 is also connected to the low-side drive unit 112 to provide the low-side power supply voltage supply to the low-side drive unit 112. The low-side drive unit 112 is also connected to the ground terminal PGND.

[0066] In some embodiments, refer to Figure 7 , Figure 7 This illustration shows another schematic diagram of a buck circuit provided in an embodiment of this application. The buck circuit also includes a discontinuous conduction mode detection module 150.

[0067] The discontinuous conduction mode detection module 150 is connected to the first end of the inductor L and the ground terminal PGND respectively. The discontinuous conduction mode detection module 150 is used to detect whether the current of the inductor L drops to zero, and then outputs the discontinuous conduction mode detection signal DMD, thereby indicating whether the buck circuit has entered the discontinuous conduction mode.

[0068] Specifically, the high-side drive unit 111 is connected to the power supply terminal to receive the input voltage VIN, the high-side drive unit 111 is connected to the high-side transistor MHS to provide the high-side drive signal HS to the high-side transistor MHS, the high-side drive unit 111 can also receive the discontinuous conduction mode detection signal DMD when generating the high-side drive signal HS, and the high-side drive unit 111 is also connected to the ground terminal HS_GND.

[0069] In some embodiments, continue to refer to Figure 7 , Figure 7 Another schematic diagram of the step-down circuit provided in this application embodiment is shown. The current comparison unit 115 may further include a slope compensation unit 154, which is used to generate a slope compensation signal I_slope. The voltage-to-current subunit 1152 is connected to the slope compensation unit 154 and the error amplification subunit 1142 respectively to receive the slope compensation signal I_slope and the error detection signal VC. At the same time, the voltage-to-current subunit 1152 is connected to the current detection subunit 1151, thereby generating the detection current Isens of the current detection subunit 1151 according to the slope compensation signal I_slope and the error detection signal VC.

[0070] Among them, the voltage-to-current subunit 1152 can be a voltage-to-current chip. When the current detection subunit 1151 includes multiple detection transistors Msens, the voltage-to-current subunit 1152 is connected to the second terminal of the selection switch, and the detection current Isens flows to the reference ground inside the voltage-to-current subunit 1152.

[0071] Continue to refer to Figure 7 The current comparison unit 115 may further include a delay control unit 1155. The delay control unit 1155 generates a delay control signal Blanking based on the high-side drive signal HS. The current comparison subunit 1153 compares the load current Iload with the detected current Isens under the control of the delay control signal Blanking to generate a comparison result COMP. The current comparison subunit 1153 may also be connected to a disable signal Disable to control whether the current comparison subunit 1153 operates.

[0072] Specifically, the delay control unit 1155 is connected to the high-side drive unit 111 to receive the high-side drive signal HS, and the current comparison subunit 1153 is connected to the delay control unit 1155 to receive the delay control signal Blanking. The delay control unit 1155 provides a delay duration for the current comparison subunit 1153 to ensure the accuracy of feedback adjustment. The delay control signal Blanking enables or disables the current comparison subunit 1153. For example, the current comparison subunit 1153 can be disabled when the delay control signal Blanking is high, and enabled when the delay control signal Blanking is low. When the buck circuit is under light load, the delay duration provided by the delay control unit 1155 can be shortened. Shortening the delay duration provided by the delay control unit 1155 can be done by shortening the delay duration to a smaller value, or the delay duration can be removed directly.

[0073] In one embodiment, the delay control unit 1155 may use an RC delay network to provide a delay duration for the current comparison subunit 1153. The delay control unit 1155 may be equipped with a short-circuit switch connected in parallel with the RC delay network. The short-circuit switch can be turned on to bypass the RC delay network and achieve the effect of removing the delay duration.

[0074] In addition, the RC delay network can use a resistor array or a capacitor array. The resistance value of the resistor array can be controlled by controlling the number of selected resistors, or the capacitance value of the capacitor array can be controlled by controlling the number of selected capacitors. The resistor array can be connected in series or in parallel, with each resistor connected to its corresponding selector switch. Similarly, the capacitor array can be connected in series or in parallel, with each capacitor connected to its corresponding selector switch. By controlling the on / off state of the selector switches, the resistance or capacitance value of either the resistor array or the capacitor array can be reduced, thus shortening the delay time. Shortening the delay time provided by the delay control unit 1155 reduces the logic delay of the buck circuit and improves the slew rate of the high-side drive unit 111.

[0075] Additionally, refer to Figure 8 This application also provides a chip 200, which includes the aforementioned step-down circuit. A chip (Integrated Circuit, IC) is also called a chip, and this chip can be, but is not limited to, a System-on-Chip (SoC) chip or a System-in-Package (SIP) chip. Since the chip 200 of this application possesses the step-down circuit of the above embodiments, it has all the beneficial effects of the step-down circuit in the above embodiments, and will not be repeated here.

[0076] In addition, this application also provides an electronic device, which includes a device body and a step-down circuit or chip as described above disposed within the device body. The electronic device may be, but is not limited to, a weight scale, body fat scale, nutrition scale, infrared electronic thermometer, pulse oximeter, body composition analyzer, power bank, wireless charger, fast charger, car charger, adapter, display, USB (Universal Serial Bus) docking station, stylus, true wireless earphones, car infotainment screen, automobile, smart wearable device, mobile terminal, and smart home device. Smart wearable devices include, but are not limited to, smartwatches, smart bracelets, and neck massagers. Mobile terminals include, but are not limited to, smartphones, laptops, tablets, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart robot vacuums, and smart lights. Since the electronic device of this application possesses the step-down circuit or chip described in the above embodiments, it has all the beneficial effects of the step-down circuit or chip described in the above embodiments, which will not be repeated here.

[0077] It should also be understood that the various implementation methods provided in this application can be combined arbitrarily to achieve different beneficial effects.

[0078] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Although this application has disclosed preferred embodiments as above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any indirect modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A step-down circuit, characterized in that, include: A voltage conversion module is used to step down the input voltage to generate an output voltage; A soft-start module is used to output a soft-start voltage signal during the startup process of the buck circuit, and to generate a soft-start completion signal based on the soft-start voltage signal and a reference voltage. The first selection module is used to select one of the reference voltage or the soft-start voltage signal for output based on the soft-start completion signal; An overvoltage protection module is provided, which compares the output voltage with the voltage output by the first selection module. When the output voltage is greater than the voltage output by the first selection module, an overvoltage detection signal is generated to control the output voltage of the voltage conversion module.

2. The step-down circuit according to claim 1, characterized in that, When the soft-start voltage signal is greater than the reference voltage, a first-level soft-start completion signal is generated; when the soft-start voltage signal is less than the reference voltage, a second-level soft-start completion signal is generated. The first selection module is used to select the output of the reference voltage when the soft-start completion signal of the first level is obtained; And, when the soft-start completion signal of the second level is obtained, to select to output the soft-start voltage signal.

3. The step-down circuit according to claim 1, characterized in that, The voltage conversion module includes a high-side transistor and a high-side driving unit for driving the high-side transistor. When the voltage conversion module receives the overvoltage detection signal, it controls the high-side driving unit to turn off the high-side transistor to slow down the rising trend of the output voltage during the startup process.

4. The step-down circuit according to claim 2, characterized in that, The voltage conversion module includes a high-side transistor and a high-side driving unit. The high-side driving unit is used to output a high-side driving signal to drive the high-side power transistor. The high-side drive unit is further configured to adjust the slew rate of the high-side drive signal according to the soft-start completion signal to control the high-side power transistor.

5. The step-down circuit according to claim 4, characterized in that, The high-side driving unit includes a first buffer subunit, a delay subunit, a selection subunit, and a second buffer subunit; The first buffer subunit is used to generate a buffer signal according to the control signal; The delay subunit is used to generate a delay signal based on the buffer signal; The selection subunit is used to select one of the buffer signal and the delay signal from the soft start completion signal and output it to the second buffer subunit; The second buffer subunit is used to generate the high-side drive signal based on one of the buffer signal and the delay signal.

6. The step-down circuit according to claim 4, characterized in that, The high-side drive unit includes multiple transistors connected in parallel. The high-side drive unit controls the number of transistors turned on according to the soft-start completion signal to adjust the slew rate of the high-side drive unit.

7. The step-down circuit according to claim 5, characterized in that, The voltage conversion module also includes a feedback unit, a current comparison unit, a logic unit, and a level conversion unit; The feedback unit is used to generate an error detection signal based on the output voltage and the reference signal; The current comparison unit is used to generate a detection current based on the error detection signal, compare the detection current with the load current, and output the comparison result. The logic unit is used to perform logic processing based on the comparison result and the overvoltage detection signal, and output control logic; The level conversion unit is used to perform voltage conversion on the control logic to generate the control signal for controlling the high-side drive unit.

8. The step-down circuit according to claim 7, characterized in that, The feedback unit includes a voltage divider subunit and an error amplification subunit; The voltage divider subunit is used to receive the output voltage and divide the output voltage to obtain a feedback voltage; When the soft-start module outputs the soft-start completion signal at the first level, the error amplification subunit is used to generate the error detection signal based on the feedback voltage and the reference voltage; When the soft-start module outputs the second-level soft-start completion signal, the error amplification subunit is used to generate the error detection signal based on the feedback voltage and the soft-start voltage signal.

9. The step-down circuit according to claim 7, characterized in that, The current comparison unit includes a current detection subunit, a voltage-to-current conversion subunit, and a current comparison subunit; The current detection subunit is used to mirror the current of the high-side transistor for current detection; The voltage-to-current subunit is used to generate the detection current of the current detection subunit based on the error detection signal; The current comparison subunit is used to compare the detected current with the load current of the high-side transistor and output the comparison result.

10. A chip, characterized in that, Includes the step-down circuit as described in any one of claims 1 to 9.

11. An electronic device, characterized in that, It includes a device body and a step-down circuit as described in any one of claims 1 to 9 disposed on the device body, or it includes a device body and a chip as described in claim 10 disposed on the device body.

Images