A double-coupled inductor voltage-clamped high-gain interleaved boost converter

Abstract

This invention proposes a dual-coupled inductor voltage-clamped high-gain interleaved boost converter. The main power circuit consists of a DC input voltage source Vin, two coupled inductors L1 and L2 with a turns ratio of 1:n, seven capacitors, seven diodes, and two MOSFET switches. By introducing a voltage clamping path in the leakage inductance path of the coupled inductors, the voltage spikes caused by leakage inductance energy at the MOSFET turn-off time are suppressed, effectively reducing the Vds stress of the switches and preventing device failure due to overvoltage. The overall boost capability is improved through the synergistic cooperation of the coupled inductors and multi-stage voltage multiplier units. The two-phase main circuit adopts an interleaved operation strategy, which automatically and continuously supplies input current, significantly suppressing input current ripple and providing stable energy input for subsequent stages. Combined with multi-stage voltage multiplier units, the voltage amplification factor is greatly improved, maintaining low current ripple and good dynamic response even under high boost ratio conditions. This invention has the advantages of high boost ratio, low voltage stress, high energy conversion efficiency, and simple control logic.

Description

Technical Field

[0001] This invention belongs to the field of power electronic DC-DC converter technology, and particularly relates to a dual-coupled inductor voltage clamping high-gain interleaved Boost converter. Background Technology

[0002] Against the backdrop of accelerated energy structure upgrading, scenarios such as photovoltaics, energy storage, and electric vehicles place higher demands on DC-DC boost stages: extremely high boost ratios (typically exceeding 10 times) must be achieved over a wide input voltage fluctuation range, while simultaneously maintaining efficiency above 95%, low cost, and long-term reliability. While existing boost converters and their high-gain improvements can increase output voltage through cascading, coupling inductors, or switching capacitors, the repeated energy exchange between capacitors and magnetic components often leads to additional losses. Furthermore, the voltage stress on the switching transistors and input current ripple increase significantly with increasing gain, thus limiting the overall optimization of efficiency, power density, and cost. Taking grid-connected photovoltaics as an example, the output of a single module is typically only 20–40 V, but it needs to be boosted to approximately 380 V or even higher to match the DC bus or grid interface. If traditional multi-stage high-gain solutions are adopted, device stress, losses, and the scale of passive components easily drive up system costs and reduce performance, making it difficult to meet the dual goals of "high efficiency + economy" for new energy equipment. Therefore, how to achieve ultra-high voltage gain (>10 times) while maintaining low switching voltage stress, small input current ripple, high efficiency, and good engineering economy remains a key challenge that needs to be solved in the current DC-DC boost technology field.

[0003] To address the aforementioned issues, this application proposes a dual-coupled inductor voltage-clamped high-gain interleaved boost converter. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of existing technologies by proposing a dual-coupled inductor voltage clamping high-gain interleaved boost converter. This converter has advantages such as high boost ratio, low device stress, high efficiency, easy control implementation, low cost, and high cost-effectiveness. It is suitable for scenarios requiring high DC bus voltage under low input voltage conditions.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a dual-coupled inductor voltage clamping high-gain interleaved Boost converter, comprising a DC voltage source Vin, a first coupled inductor L1, a second coupled inductor L2, a first switch S1, a second switch S2, a first capacitor to a seventh capacitor C1-C7, and a first diode to a seventh diode D1-D7.

[0006] The positive terminal of the DC voltage source (Vin) is connected to one end of the first leakage inductance (Lk1) and the second leakage inductance (Lk2), respectively. The other end of the first leakage inductance (Lk1) is connected to one end of the first magnetizing inductance (Lm1) and the first primary winding (N1a), respectively. The first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected in parallel. The other ends of the first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected to the drain of the first MOSFET (S1), one end of the first capacitor (C1), the cathode of the sixth diode (D6), one end of the sixth capacitor (C6), and one end of the third capacitor (C3), respectively. The source of the first MOSFET (S1) is connected to the negative terminal of the DC voltage source (Vin).

[0007] The other end of the second leakage inductance (Lk2) is connected to one end of the second magnetizing inductance (Lm2) and the second primary winding (N2a), respectively, and the second magnetizing inductance (Lm2) and the second primary winding (N2a) are connected in parallel. The other ends of the second magnetizing inductance (Lm2) and the second primary winding (N2a) are respectively connected to the drain of the second MOSFET (S2), one end of the second capacitor (C2), and the anode of the first diode (D1). The source of the second MOSFET (S2) is connected to the negative terminal of the DC voltage source (Vin).

[0008] The cathode of the first diode (D1) is connected to the other end of the first capacitor (C1) and the anode of the second diode (D2); the cathode of the second diode (D2) is connected to the other end of the second capacitor (C2) and one end of the first primary winding (N1b), the other end of the first primary winding (N1b) is connected to one end of the second primary winding (N2b), and the other end of the second primary winding (N2b) is connected to one end of the fifth capacitor (C5), the anode of the third diode (D3), and one end of the fourth capacitor (C4);

[0009] The cathode of the third diode (D3) is connected to the anode of the fourth diode (D4) and the other end of the third capacitor (C3); the cathode of the fourth diode (D4) is connected to the anode of the seventh diode (D7) and the other end of the fifth capacitor (D5); the other end of the fourth capacitor (C4) is connected to the anode of the sixth diode (D6) and the cathode of the fifth diode (D5); the other end of the sixth capacitor (C6) is connected to the anode of the fifth diode (D5), one end of the seventh capacitor (C7), and the negative terminal of the output side.

[0010] The cathode of the seventh diode (D7) is connected to the other end of the seventh capacitor (C7) and the positive terminal of the output side.

[0011] By adopting the above technical solutions: A novel circuit topology and operating mode are adopted. The core lies in achieving that the voltage stress of the switching tube is only the output voltage through the specific connection and reuse of components, significantly reducing the losses at the moment of the switching tube's conduction and cutoff. The output gain is (3 + n)(1 + D) times that of a conventional boost converter. Among them, the seventh capacitor C7 serves as the output filter capacitor, and the voltage across its two ends is the output voltage of the converter. The key to this circuit lies in constructing an absorption unit for the leakage inductance energy and a shared voltage multiplier network. Specifically, the input voltage transfers energy to the capacitor networks on both sides through two coupled inductors L1 and L2 respectively; multiple capacitors and the secondary of the coupled inductor are charged or participate in feeding energy to the output in different series combinations during the conduction and cutoff of the switching tube, thereby gradually accumulating and increasing the output voltage.

[0012] Preferably, the expression of the theoretical voltage gain G of the converter is:

[0013]

[0014] Where, V0 is the output voltage, Vin is the input voltage, D is the conduction duty cycle of the first switching tube S1 and the second switching tube S2, and n is the turns ratio of 1:n between the primary coil and the secondary coil of the coupled inductor.

[0015] Preferably, the control terminals of the first switching tube S1 and the second switching tube S2 receive drive signals with a phase difference of 180° and the same duty cycle (0.5 < D < 1). There are three operating modes within one switching cycle: S1 conducts while S2 does not conduct, S1 conducts while S2 conducts, and S1 does not conduct while S2 conducts.

[0016] By adopting the above technical solutions: The first switching tube S1 and the second switching tube S2 have a phase difference of 180° and the same duty cycle (0.5 < D < 1), and there is no need to set a dead time, which greatly simplifies the drive and control circuits.

[0017] Preferably, in the first operating mode: the first switch (S1) is turned on, the second switch (S2) is not turned on, the DC voltage source (Vin) charges the primary winding of the first coupled inductor (L1), and at the same time the primary winding of the second coupled inductor (L2) discharges; the first capacitor (C1) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the first diode (D1), the first capacitor (C1), and the first switch (S1). Since the first diode (D1) is forward-biased, the Vds2 voltage of the second switch (S2) is clamped by the first capacitor C1; that is, the energy of the leakage inductance Lk2 of the second coupled inductor L2 is absorbed by the first capacitor C1. In this way, the leakage inductance energy is not wasted and the problem of the leakage inductance voltage surging in the reverse direction at the moment the MOSFET switch is turned off, which causes the Vds voltage of the MOSFET switch to be too high at the moment of turn-off, is solved. The third capacitor (C3) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), the third diode (D3), the third capacitor (C3), and the first switching transistor (S1); the fourth capacitor (C2) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), and the fourth switching transistor (S1). The circuit consisting of capacitor (C4), sixth diode (D6), and first switch (S1) charges the fourth capacitor (C4); the circuit consisting of DC voltage source (Vin), primary winding of second coupling inductor (L2), second capacitor (C2), secondary winding of first coupling inductor (L1), secondary winding of second coupling inductor (L2), fifth capacitor (C5), seventh diode (D7), seventh capacitor (C7), sixth diode (D6), and first switch (S1) charges the seventh capacitor (C7) and supplies power to the load.

[0018] Preferably, in the second operating mode: both the first switch (S1) and the second switch (S2) are turned on, and the DC voltage source (Vin) charges both the primary winding of the first coupled inductor (L1) and the primary winding of the second coupled inductor (L2); all the first diodes to the seventh diodes (D1-D7) are in the reverse turn-off state; all the first capacitors to the sixth capacitors (C1-C6) have no circuit and no voltage or current change; the seventh capacitor (C7) supplies power to the load alone.

[0019] Preferably, in the third operating mode: the first switch (S1) is not turned on, the second switch (S2) is turned on, the DC voltage source (Vin) charges the primary winding of the second coupled inductor (L2), and at the same time the primary winding of the first coupled inductor (L1) discharges; the second capacitor (C2) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the first capacitor (C1), the second diode (D2), the second capacitor (C2), and the second switch (S2). Since the second diode (D2) is forward-biased, the Vds1 voltage of the first switch (S1) is clamped by the first capacitor (C1) and the second capacitor (C2); that is, the energy of the leakage inductance Lk1 of the first coupled inductor L1 is absorbed by the first capacitor C1 and the second capacitor C2. In this way, the leakage inductance energy is not wasted and the problem of the leakage inductance voltage surging in the reverse direction at the moment the MOSFET switch is turned off, which causes the Vds voltage of the MOSFET switch to be too high at the moment of turn-off, is solved. The fifth capacitor (C5) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the third capacitor (C3), the fourth diode (D4), the fifth capacitor (C5), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2); the sixth capacitor (C6) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the sixth capacitor (C6), the fifth diode (D5), the fourth capacitor (C4), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2); the seventh capacitor (C7) supplies power to the load separately.

[0020] Preferably, the duty cycle D is adjustable in the range of 0.5-1.

[0021] By adopting the above technical solution, a stable and extremely high voltage boost ratio can be achieved over a wide range by adjusting D.

[0022] Preferably, the voltage stress Vds experienced by the first switch S1 and the second switch S2 is:

[0023]

[0024] The performance of the present invention is improved through three core designs: First, by using capacitance sharing / reuse and energy transfer path reconstruction, a unique voltage multiplier circuit is constructed, reducing redundant energy storage components and ineffective energy cycles, reducing the number of devices and loss superposition at the source, and improving gain and cost indicators; Second, energy storage components are adopted, which can be serially connected with the secondary of the coupled inductor in turn when the switching tubes are turned off, greatly increasing the output gain while limiting the voltage stress of the switching tubes (the peak voltage stress borne by the switching tubes (S1, S2) is effectively clamped, and its theoretical value is only that is , far lower than the output voltage, reducing the selection cost of MOSFETs; Third, the phases of the two switching tubes differ by 180°, and the duty cycles are the same (0.5<D<1). There is no need to consider dead time, the control is simple, and the cost of the MOSFET drive circuit part can be reduced.

[0025] 2. Compared with the traditional high-gain Boost topology, on the premise of achieving the same or even higher boost ratio, the present invention uses a coupled inductor and a voltage clamping unit to achieve lower voltage stress of the switching tubes and higher conversion efficiency with fewer components, while solving the problem of turn-off spikes caused by leakage inductance, significantly improving the reliability and safety of the circuit. The input current of this converter is continuous and has small ripple, and the interference to the front-end power supply is extremely low, especially suitable for applications with typical low input voltage and high output voltage levels in green energy systems such as battery power supply, photovoltaic front-end boost, and fuel cells. The present invention has the characteristics of high boost ratio, small device stress, low switching loss, simple control, high efficiency, low electromagnetic interference, easy modular expansion, and better comprehensive cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a schematic structural diagram of the present invention;

[0027] Figure 2 is an equivalent circuit diagram when MOSFET S1 is turned on and S2 is turned off in an embodiment of the present invention;

[0028] Figure 3 is an equivalent circuit diagram when MOSFET S1 is turned on and S2 is turned on in an embodiment of the present invention;

[0029] Figure 4 is an equivalent circuit diagram when MOSFET S1 is turned off and S2 is turned on in an embodiment of the present invention;

[0030] Figure 5 is the input voltage Vin = 30V during simulation;

[0031] Figure 6The output voltage V0 waveform simulation diagram in this embodiment of the invention is shown without considering the leakage inductance of the coupling inductor. (Where the coupling inductor ratio n=1 and the duty cycle is 0.55).

[0032] Figure 7 The waveform simulation diagram of the switching transistor voltage Vds in this embodiment of the invention is shown without considering the leakage inductance of the coupling inductor; (where the coupling inductor turns ratio n=1 and the duty cycle is 0.55).

[0033] Figure 8 The output voltage V0 waveform simulation diagram in this embodiment of the invention takes into account the leakage inductance of the coupling inductor. (Where the coupling inductor ratio n=1, the magnetizing inductance Lm=200uH, the leakage inductance Lm=4uH, and the duty cycle D is 0.55).

[0034] Figure 9 The simulation diagram of the switching transistor voltage Vds waveform in this embodiment of the invention takes into account the leakage inductance of the coupling inductor. (Where the coupling inductor ratio n=1, the magnetizing inductance Lm=200uH, the leakage inductance Lm=4uH, and the duty cycle D is 0.55). Detailed Implementation

[0035] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings, so that those skilled in the art can better understand the advantages and features of the present invention, thereby making a clearer definition of the scope of protection of the present invention. The embodiments described in this invention are only some embodiments of the present invention, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0036] Example:

[0037] Combination Figure 1 As shown, this embodiment provides a dual-coupled inductor voltage-clamped high-gain interleaved Boost converter, including: a DC voltage source, a first coupled inductor L1, a second coupled inductor L2, a first switch S1, a second switch S2, a first capacitor to a seventh capacitor C1-C7, and a first diode to a seventh diode D1-D7. The seventh capacitor C7 serves as the output filter capacitor, and the voltage across it is the output voltage of the converter. The converter uses a total of 2 coupled inductors, 2 switches, 7 capacitors, and 7 diodes.

[0038] The specific connection relationships of the circuit are as follows: Figure 1 As shown:

[0039] The positive terminal of the DC voltage source (Vin) is connected to one end of the first leakage inductance (Lk1) and the second leakage inductance (Lk2), respectively. The other end of the first leakage inductance (Lk1) is connected to one end of the first magnetizing inductance (Lm1) and the first primary winding (N1a), respectively. The first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected in parallel. The other ends of the first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected to the drain of the first MOSFET (S1), one end of the first capacitor (C1), the cathode of the sixth diode (D6), one end of the sixth capacitor (C6), and one end of the third capacitor (C3), respectively. The source of the first MOSFET (S1) is connected to the negative terminal of the DC voltage source (Vin).

[0040] The other end of the second leakage inductance (Lk2) is connected to one end of the second magnetizing inductance (Lm2) and the second primary winding (N2a), respectively. The second magnetizing inductance (Lm2) and the second primary winding (N2a) are connected in parallel. The other ends of the second magnetizing inductance (Lm2) and the second primary winding (N2a) are connected to the drain of the second MOSFET (S2), one end of the second capacitor (C2), and the anode of the first diode (D1), respectively. The source of the second MOSFET (S2) is connected to the negative terminal of the DC voltage source (Vin).

[0041] The cathode of the first diode (D1) is connected to the other end of the first capacitor (C1) and the anode of the second diode (D2); the cathode of the second diode (D2) is connected to the other end of the second capacitor (C2) and one end of the first stage winding (N1b); the other end of the first stage winding (N1b) is connected to one end of the second stage winding (N2b); and the other end of the second stage winding (N2b) is connected to one end of the fifth capacitor (C5), the anode of the third diode (D3), and one end of the fourth capacitor (C4).

[0042] The cathode of the third diode (D3) is connected to the anode of the fourth diode (D4) and the other end of the third capacitor (C3). The cathode of the fourth diode (D4) is connected to the anode of the seventh diode (D7) and the other end of the fifth capacitor (D5). The other end of the fourth capacitor (C4) is connected to the anode of the sixth diode (D6) and the cathode of the fifth diode (D5). The other end of the sixth capacitor (C6) is connected to the anode of the fifth diode (D5), one end of the seventh capacitor (C7), and the negative terminal of the output side.

[0043] The cathode of the seventh diode (D7) is connected to the other end of the seventh capacitor (C7) and the positive terminal of the output side.

[0044] The voltage gain of the boost converter; where n is the turns ratio 1:n of the primary and secondary windings of the coupled inductor, and D is the duty cycle of the first switch S1 and the second switch S2, with an adjustment range greater than 0.5 and less than 1.

[0045] The circuit of this invention has three operating modes within one switching cycle, determined by the switching actions of switching transistors S1 and S2, and their equivalent circuits are as follows: Figure 2 , Figure 3 and Figure 4 As shown:

[0046] Mode 1: Combination Figure 2 As shown, the first switch (S1) is turned on, and the second switch (S2) is not turned on. The DC voltage source (Vin) charges the primary winding of the first coupled inductor (L1), while the primary winding of the second coupled inductor (L2) discharges. The first capacitor (C1) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the first diode (D1), the first capacitor (C1), and the first switch (S1). Since the first diode (D1) is forward-biased, the Vds2 voltage of the second switch (S2) is clamped by the first capacitor C1. That is, the energy of the leakage inductance Lk2 of the second coupled inductor L2 is absorbed by the first capacitor C1. This not only avoids wasting the leakage inductance energy but also solves the problem that the leakage inductance voltage surges in the reverse direction when the MOSFET switch is turned off, causing the Vds voltage of the MOSFET switch to be too high at the moment of turn-off. The third capacitor (C3) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), the third diode (D3), the third capacitor (C3), and the first switching transistor (S1); the fourth capacitor (C2) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), and the fourth switching transistor (S1). The circuit consisting of capacitor (C4), sixth diode (D6), and first switch (S1) charges the fourth capacitor (C4); the circuit consisting of DC voltage source (Vin), primary winding of second coupling inductor (L2), second capacitor (C2), secondary winding of first coupling inductor (L1), secondary winding of second coupling inductor (L2), fifth capacitor (C5), seventh diode (D7), seventh capacitor (C7), sixth diode (D6), and first switch (S1) charges the seventh capacitor (C7) and supplies power to the load.

[0047] Mode 2: Combination Figure 3As shown, both the first switch (S1) and the second switch (S2) are turned on. The DC voltage source (Vin) charges both the primary winding of the first coupled inductor (L1) and the primary winding of the second coupled inductor (L2). The first diode to the seventh diode (D1-D7) are all in the reverse turn-off state. The first capacitor to the sixth capacitor (C1-C6) have no circuit and no voltage or current change. The seventh capacitor (C7) supplies power to the load alone.

[0048] Mode 3: Combination Figure 4 As shown, the first switch (S1) is not conducting, and the second switch (S2) is conducting. The DC voltage source (Vin) charges the primary winding of the second coupled inductor (L2), while the primary winding of the first coupled inductor (L1) discharges. The second capacitor (C2) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the first capacitor (C1), the second diode (D2), the second capacitor (C2), and the second switch (S2). Since the second diode (D2) is forward conducting, the Vds1 voltage of the first switch (S1) is clamped by the first capacitor (C1) and the second capacitor (C2). That is, the energy of the leakage inductance Lk1 of the first coupled inductor L1 is absorbed by the first capacitor C1 and the second capacitor C2. This not only avoids wasting the leakage inductance energy but also solves the problem that the leakage inductance voltage surges in the reverse direction at the moment the MOSFET switch is turned off, causing the Vds voltage of the MOSFET switch to be too high at the moment of turn-off. The fifth capacitor (C5) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the third capacitor (C3), the fourth diode (D4), the fifth capacitor (C5), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2); the sixth capacitor (C6) is charged through a circuit consisting of a DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the sixth capacitor (C6), the fifth diode (D5), the fourth capacitor (C4), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2); the seventh capacitor (C7) supplies power to the load separately.

[0049] in Figure 5 The input voltage during simulation is Vin = 30V; Figure 6 Without considering the leakage inductance of the coupling inductor, the simulated waveform of the output voltage V0 in this embodiment of the invention (where the coupling inductor ratio n=1 and the duty cycle is 0.55) shows that it achieves a stable output voltage of up to 790V, verifying its strong boost capability. Figure 7When the leakage inductance of the coupled inductor is not considered, the simulation diagram of the voltage Vds waveform of the switching tube in the embodiment of the present invention (where the turns ratio n of the coupled inductor is 1 and the duty cycle is 0.55). The voltage stress borne by the switching device is extremely low, only about 70V, far lower than the output voltage of 790V. The lower stress allows the selection of low-cost and low on-resistance MOSFETs. Combined with the streamlined number of devices (only 18 main and passive components, namely 2 coupled inductors, 2 switching tubes, 7 capacitors, and 7 diodes), it jointly promotes the reduction of system cost and the improvement of conversion efficiency. In addition, the phases of switching tubes S1 and S2 differ by 180° and the duty cycles are the same (0.5 < D < 1), so there is no need to set a dead time, which simplifies the driving and control logic. Therefore, the present invention effectively achieves the comprehensive optimization of high gain, low stress, high efficiency, low cost, and simple control. Figure 8 When the leakage inductance of the coupled inductor is considered, the simulation diagram of the output voltage V0 waveform in the embodiment of the present invention (where the turns ratio n of the coupled inductor is 1, the magnetizing inductance Lm = 200uH, the leakage inductance Lm = 4uH, and the duty cycle D is 0.55); Figure 9 When the leakage inductance of the coupled inductor is considered, the simulation diagram of the voltage Vds waveform of the switching tube in the embodiment of the present invention (where the turns ratio n of the coupled inductor is 1, the magnetizing inductance Lm = 200uH, the leakage inductance Lm = 4uH, and the duty cycle D is 0.55). It can be seen from the figure that when the leakage inductance of the coupled inductor is taken into account, the voltage stress on the switching tube is still about 70V and there is no voltage spike, verifying the effectiveness of the voltage clamping unit.

[0050] To sum up, while achieving the same or even higher boost capability, the present invention realizes lower switching stress and better efficiency performance with a more streamlined device configuration. This converter is suitable for the typical "low input voltage - high output voltage level" application requirements in green energy systems such as battery power supply, photovoltaic front-end boost, and fuel cells. It has the characteristics of high boost ratio, small device stress, low switching loss, simple control, high conversion efficiency, and more advantageous comprehensive cost.

[0051] The descriptions and practices disclosed in the present invention are easy to think and understand for ordinary technical personnel in the technical field. And without departing from the principle of the present invention, several improvements and retouches can be made. Therefore, the modifications or improvements made without deviating from the spirit of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A double-coupled-inductor voltage-clamped high-gain interleaved Boost converter, characterized in that, It includes a DC voltage source (Vin), a first coupling inductor (L1), a second coupling inductor (L2), a first switching transistor (S1), a second switching transistor (S2), a first capacitor to a seventh capacitor (C1-C7), and a first diode to a seventh diode (D1-D7); The positive terminal of the DC voltage source (Vin) is connected to one end of the first leakage inductance (Lk1) and the second leakage inductance (Lk2), respectively. The other end of the first leakage inductance (Lk1) is connected to one end of the first magnetizing inductance (Lm1) and the first primary winding (N1a), respectively. The first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected in parallel. The other ends of the first magnetizing inductance (Lm1) and the first primary winding (N1a) are connected to the drain of the first MOSFET (S1), one end of the first capacitor (C1), the cathode of the sixth diode (D6), one end of the sixth capacitor (C6), and one end of the third capacitor (C3), respectively. The source of the first MOSFET (S1) is connected to the negative terminal of the DC voltage source (Vin). The other end of the second leakage inductance (Lk2) is connected to one end of the second magnetizing inductance (Lm2) and the second primary winding (N2a), respectively, and the second magnetizing inductance (Lm2) and the second primary winding (N2a) are connected in parallel. The other ends of the second magnetizing inductance (Lm2) and the second primary winding (N2a) are respectively connected to the drain of the second MOSFET (S2), one end of the second capacitor (C2), and the anode of the first diode (D1). The source of the second MOSFET (S2) is connected to the negative terminal of the DC voltage source (Vin). The cathode of the first diode (D1) is connected to the other end of the first capacitor (C1) and the anode of the second diode (D2); the cathode of the second diode (D2) is connected to the other end of the second capacitor (C2) and one end of the first primary winding (N1b), the other end of the first primary winding (N1b) is connected to one end of the second primary winding (N2b), and the other end of the second primary winding (N2b) is connected to one end of the fifth capacitor (C5), the anode of the third diode (D3), and one end of the fourth capacitor (C4); The cathode of the third diode (D3) is connected to the anode of the fourth diode (D4) and the other end of the third capacitor (C3); the cathode of the fourth diode (D4) is connected to the anode of the seventh diode (D7) and the other end of the fifth capacitor (D5); the other end of the fourth capacitor (C4) is connected to the anode of the sixth diode (D6) and the cathode of the fifth diode (D5); the other end of the sixth capacitor (C6) is connected to the anode of the fifth diode (D5), one end of the seventh capacitor (C7), and the negative terminal of the output side. The cathode of the seventh diode (D7) is connected to the other end of the seventh capacitor (C7) and the positive terminal of the output side.

2. The dual-coupled inductor voltage-clamped high-gain interleaved Boost converter of claim 1, wherein, The voltage gain G of the converter is expressed as follows: Where V0 is the output voltage, Vin is the input voltage, D is the duty cycle of the first switch (S1) and the second switch (S2), and n is the turns ratio 1:n of the primary and secondary coils of the coupled inductor.

3. The dual-coupled inductor voltage-clamped high-gain interleaved Boost converter of claim 2, wherein, The control terminals of the first switch (S1) and the second switch (S2) receive drive signals with the same duty cycle but 180° out of phase. Within one switching cycle, there are three working modes: (S1) on (S2) off, (S1) on (S2) on, and (S1) off (S2) on.

4. A dual-coupled inductor voltage-clamped high-gain interleaved Boost converter according to claim 3, characterized in that, In the first operating mode: the first switch (S1) is turned on, the second switch (S2) is not turned on, the DC voltage source (Vin) charges the primary winding of the first coupled inductor (L1), and at the same time the primary winding of the second coupled inductor (L2) discharges; the first capacitor (C1) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the first diode (D1), the first capacitor (C1), and the first switch (S1). Since the first diode (D1) is forward-biased, the Vds2 voltage of the second switch (S2) is clamped by the first capacitor C1; the voltage is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), the third diode (D3), and the third capacitor. The circuit consisting of (C3) and the first switch (S1) charges the third capacitor (C3); the circuit consisting of the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), the fourth capacitor (C4), the sixth diode (D6), and the first switch (S1) charges the fourth capacitor (C4); the circuit consisting of the DC voltage source (Vin), the primary winding of the second coupled inductor (L2), the second capacitor (C2), the secondary winding of the first coupled inductor (L1), the secondary winding of the second coupled inductor (L2), the fifth capacitor (C5), the seventh diode (D7), the seventh capacitor (C7), the sixth diode (D6), and the first switch (S1) charges the seventh capacitor (C7), and simultaneously supplies power to the load.

5. A dual-coupled inductor voltage-clamped high-gain interleaved Boost converter according to claim 3, characterized in that, In the second operating mode: both the first switch (S1) and the second switch (S2) are turned on, and the DC voltage source (Vin) charges both the primary winding of the first coupled inductor (L1) and the primary winding of the second coupled inductor (L2); the first diode to the seventh diode (D1-D7) are all in the reverse turn-off state; the first capacitor to the sixth capacitor (C1-C6) have no circuit and no voltage or current change; the seventh capacitor (C7) supplies power to the load alone.

6. A dual-coupled inductor voltage-clamped high-gain interleaved Boost converter according to claim 3, characterized in that, In the third operating mode: the first switch (S1) is not turned on, the second switch (S2) is turned on, the DC voltage source (Vin) charges the primary winding of the second coupled inductor (L2), and at the same time the primary winding of the first coupled inductor (L1) discharges; the second capacitor (C2) is charged through the circuit formed by the DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the first capacitor (C1), the second diode (D2), the second capacitor (C2), and the second switch (S2). Since the second diode (D2) is forward-biased, the Vds1 voltage of the first switch (S1) is clamped by the first capacitor (C1) and the second capacitor (C2); the DC voltage source (Vin) and the first coupled inductor (S2) charge the primary winding of the second coupled inductor (L2). The circuit consisting of the primary winding of (L1), the third capacitor (C3), the fourth diode (D4), the fifth capacitor (C5), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2) charges the fifth capacitor (C5); the circuit consisting of the DC voltage source (Vin), the primary winding of the first coupled inductor (L1), the sixth capacitor (C6), the fifth diode (D5), the fourth capacitor (C4), the secondary winding of the second coupled inductor (L2), the secondary winding of the first coupled inductor (L1), the second capacitor (C2), and the second switch (S2) charges the sixth capacitor (C6); the seventh capacitor (C7) supplies power to the load separately.

7. A dual-coupled inductor voltage-clamped high-gain interleaved Boost converter according to claim 2, characterized in that, The duty cycle D can be adjusted within the range of 0.5-1.

8. A dual-coupled inductor voltage-clamped high-gain interleaved Boost converter according to claim 1, characterized in that, The voltage stress on the first switch (S1) and the second switch (S2) is: Where V0 is the output voltage and D is the duty cycle.

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