A method, system and circuit for self-checking and pre-charging of a dc bus of an inverter relay

Abstract

This invention discloses an integrated charging and testing method, system, and circuit for inverter relay self-testing and DC bus pre-charging. The method comprises five core steps: capacitor charge discharge, initial state verification, self-testing and phased pre-charging of phase relay sticking faults, self-testing of relay closure faults, and completion of self-testing and pre-charging. Phased pre-charging of the DC bus is simultaneously completed during the relay self-testing process, achieving integrated charging and testing. This invention can complete relay fault judgment and precise location using only voltage sampling, eliminating the need for additional current sensors; relays A and B in the same series can share drive signals, reducing the control chain; and zero-differential voltage retraction of the relays is achieved through controllable semiconductor switches, eliminating current surges. This invention significantly shortens inverter start-up time, reduces hardware costs, and improves system operational reliability.

Description

Technical Field

[0001] This invention relates to the field of relay self-testing technology for three-phase four-arm inverters, specifically to a method, system, and circuit for inverter relay self-testing and DC bus pre-charging that integrates charging and testing. Background Technology

[0002] According to power equipment safety regulations, each power line of a grid-connected inverter requires two relays connected in series to achieve safety redundancy and ensure electrical isolation safety during equipment maintenance and shutdown. For a three-phase four-arm inverter, at least eight power-side relays are needed for phases A, B, and C plus phase N, resulting in a large number of control signals and high system complexity. Furthermore, in applications such as AFE mode under a DC microgrid, energy storage inverters need to pre-charge the DC bus capacitors from the AC side to establish the DC bus voltage and avoid the large current surge caused by direct switching.

[0003] In existing technologies, relay self-testing and DC bus pre-charging are typically executed as two independent processes, resulting in long inverter startup times and redundant processes. Furthermore, existing relay self-testing schemes often rely on current sampling for fault diagnosis. In high-power applications, the high-current-range current sensor used for control cannot be reused, requiring the additional configuration of a small-range, high-precision current sensor, increasing system hardware cost and complexity. Existing technology document CN117169706A discloses a relay self-testing method, but this method struggles to establish DC-side voltage through AC-side pre-charging. Its pre-charging capability is strongly correlated with the value of the parallel resistor in the relay: if the resistance is too large, the pre-charging capability is insufficient and the pre-charging time is too long; if the resistance is too small, it can easily generate a large current surge to the LC filter capacitor, damaging the device. Simultaneously, this scheme requires sampling the grid-side current, resulting in high hardware costs and an inability to accurately pinpoint the specific location and type of relay fault.

[0004] Therefore, there is an urgent need for an inverter relay control scheme that can integrate relay self-testing with bus pre-charging process, reduce control signal and hardware costs, accurately locate faults, and eliminate current surges. Summary of the Invention

[0005] In view of the problems existing in the prior art, the present invention provides an inverter relay self-test and DC bus pre-charge method, system and circuit that integrates charging and testing. It deeply integrates the full self-test of the relay with the DC bus pre-charge process, realizes charging and testing in one, reduces start-up time, reduces control signal and hardware costs, and can accurately locate the fault location and type of the relay. Moreover, there is no large current impact during the relay energizing process.

[0006] This invention provides a method for integrated charging and testing of inverter relay self-testing and DC bus pre-charging, applied to a three-phase four-arm inverter system. In this system, two relays are connected in series on each of the A, B, and C phases and the N phase power circuit. A controllable semiconductor switch is connected in parallel to one of the relays in each phase. The method includes:

[0007] S1 Capacitor Charge Discharge: Close the DC side discharge relay, and use the sampling circuit to detect the DC side bus voltage and the inverter side voltage of each phase until all detected voltages are less than the preset threshold, thus completing the DC side capacitor charge discharge.

[0008] S2 Initial State Verification: Disconnect all relays and controllable semiconductor switches, and detect the DC bus voltage and the inverter side voltage of each phase through the sampling circuit. If any voltage is not less than the preset threshold, it is determined to be an initial voltage fault.

[0009] S3 Phase-by-Phase Relay Sticking Fault Self-Check and Phased Pre-charge: The relays and controllable semiconductor switches of phases C, N, A, and B are sequentially switched on and off. The difference between the inverter-side voltage and the grid-side voltage of the corresponding phase is used to determine whether the corresponding relay has a sticking fault. During the self-check process, the DC bus capacitor is pre-charged in two stages: the N-phase dual relays are closed and the A-phase controllable semiconductor switch is closed. The first stage pre-charges the DC bus capacitor to the peak value of the grid phase voltage, and the second stage pre-charges it to the peak value of the grid line voltage.

[0010] S4 relay closing fault self-check: During the synchronous execution of pre-charge and self-check, the difference between the inverter side voltage and the grid side voltage of the corresponding phase is used to determine whether the corresponding relay has a failure to close.

[0011] S5 completes self-test and pre-charge: If all self-test steps are fault-free and the DC bus voltage reaches the preset voltage value within the preset charging time, then the relay full self-test and DC bus pre-charge are completed.

[0012] As a preferred embodiment of the present invention, the controllable semiconductor switch is a thyristor, or a MOSFET or IGBT fully controllable semiconductor device; before the relay is closed, the corresponding parallel controllable semiconductor switch is closed first, and the relay is closed only after the voltage difference across the relay is less than a preset threshold, thereby eliminating the current surge to the capacitor of the LC filter component when the relay is energized.

[0013] In a preferred embodiment of the present invention, in step S3, the relays in phase A and phase B share a common drive control signal, and the on / off state of the relays in phase A and phase B is synchronously controlled by the same drive signal.

[0014] In a preferred embodiment of the present invention, in steps S3 and S4, the determination of relay sticking fault and closing fault is achieved by the voltage signal collected by the sampling module, without the need for an additional current sampling sensor.

[0015] As a preferred embodiment of the present invention, the phased pre-charging in step S3 specifically involves: first closing the two series relays Kn1 and Kn2 of phase N to pre-charge the DC bus capacitor to the peak voltage of the grid phase through the pre-charging branch of phase C; after completing the self-checking step for relay sticking faults in phases A and B in S3, closing the controllable semiconductor switch Qa1 of phase A to pre-charge the DC bus capacitor to the peak voltage of the grid line.

[0016] As a preferred embodiment of the present invention, in steps S3 and S4, the location and fault type of the specific relay that has a sticking fault or a failure to close can be located.

[0017] This invention provides an integrated inverter relay self-test and bus pre-charge system for performing the aforementioned integrated inverter relay self-test and DC-side bus pre-charge method. The system includes:

[0018] The sampling module is used to collect DC bus voltage, A / B / C three-phase inverter side voltage, and A / B / C three-phase grid side voltage.

[0019] The control unit is electrically connected to the sampling module and is used to receive the voltage sampling signal from the sampling module, execute the method, and output the corresponding drive control signal.

[0020] The driving circuit has its input terminal electrically connected to the control unit and its output terminal electrically connected to the execution component, and is used to drive the relay and controllable semiconductor switch of the execution component to switch on and off according to the driving control signal;

[0021] The actuator is connected in series between the LC filter component of the three-phase four-arm inverter and the grid terminal. Two redundant relays are connected in series on the A, B, C and N phase power circuits of the actuator. One of the relays in each phase is connected in parallel with a controllable semiconductor switch. The C phase is also provided with a pre-charge branch with a pre-charge resistor.

[0022] As a preferred embodiment of the present invention, the power component of the three-phase four-bridge inverter is a two-level or three-level power conversion circuit, and the LC filter component is an LC type filter or an LCL type filter.

[0023] This invention provides an inverter relay self-test and DC-side bus pre-charge circuit for the above-mentioned system, comprising a DC-side circuit, a three-phase four-bridge power conversion circuit, an LC filter circuit, a relay execution circuit, and a grid-side circuit.

[0024] The DC side circuit includes a bus capacitor C_Bus and a discharge branch, wherein the discharge branch includes a discharge relay K1 and a discharge resistor R2 connected in series.

[0025] The DC terminal of the three-phase four-bridge power conversion circuit is connected to the DC side circuit, and the AC terminal is connected to the LC filter circuit.

[0026] The relay execution circuit is connected in series between the LC filter circuit and the grid-side circuit, including phase A branch, phase B branch, phase C branch and phase N branch;

[0027] The A-phase branch includes relays Ka1 and Ka2 connected in series, and a controllable semiconductor switch Qa1 is connected in parallel across the two ends of relay Ka1;

[0028] The B-phase branch includes relays Kb1 and Kb2 connected in series, and a controllable semiconductor switch Qb1 is connected in parallel across the two ends of relay Kb1;

[0029] The C-phase branch includes relays Kc1 and Kc2 connected in series, and a controllable semiconductor switch Qc1 is connected in parallel across the two ends of relay Kc1; the C-phase branch also includes a pre-charge branch connected in parallel, which includes relays Kc3 and Kc4 connected in series and a pre-charge resistor R1.

[0030] The N-phase branch includes relays Kn1 and Kn2 connected in series;

[0031] The relay Ka1 of phase A and the relay Kb1 of phase B share a common driving signal, and the relay Ka2 of phase A and the relay Kb2 of phase B share a common driving signal.

[0032] By adopting the above technical solution, the present invention has the following beneficial effects:

[0033] 1. This invention deeply integrates the relay full self-test with the DC bus pre-charging process. During the relay self-test, the DC bus capacitor is pre-charged simultaneously, eliminating the need to execute two separate processes. This achieves integrated charging and testing, significantly shortening the inverter's startup time, improving the system's response speed, and greatly reducing startup time.

[0034] 2. The relay fault diagnosis of the present invention is based entirely on voltage sampling signals, without the need for additional current sampling sensors. The original voltage sampling circuit of the inverter system can be directly reused, which greatly reduces hardware costs. At the same time, the two relays A and B in the same series can share one drive signal, which reduces the number of control signals and the complexity of the drive circuit, and simplifies the system design.

[0035] 3. By controlling the on / off states in phases and steps and judging voltage differences, this invention can accurately locate the specific relay position where a sticking fault or a failure to close fault occurs. At the same time, it can distinguish the fault type, which facilitates subsequent equipment maintenance and fault diagnosis and improves the maintainability of the system.

[0036] 4. Before the relay is closed, the corresponding parallel controllable semiconductor switch is closed first. The relay is closed only after the voltage difference across the relay is less than a preset threshold. This completely eliminates the large current impact on the LC filter capacitor when the relay is energized, avoids device damage, and improves the device lifespan and system reliability.

[0037] 5. This invention completes the pre-charging in two stages: closing the N-phase dual relays and closing the A-phase controllable semiconductor switch. The charging resistor of the pre-charging branch can be flexibly set according to factors such as the size of the DC-side capacitor, charging time, and heat dissipation requirements. It is not limited by the relay self-test function and has excellent ability to establish DC-side voltage through AC-side pre-charging, making it compatible with inverter systems of different power levels. Attached Figure Description

[0038] Figure 1 This is a circuit diagram of the three-phase four-arm inverter system of the present invention;

[0039] Figure 2 This is a flowchart of the capacitor charge discharge process of the present invention;

[0040] Figure 3 This is a flowchart of the relay self-test and bus pre-charging process of the present invention. Detailed Implementation

[0041] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0042] Example 1

[0043] This embodiment discloses a method, system, and circuit for integrated relay self-testing and bus pre-charging applied to a three-phase four-arm inverter. The core is to deeply integrate the full self-testing of the relay with the pre-charging of the DC bus, and to complete the pre-charging simultaneously during the self-testing process. At the same time, it can achieve accurate fault location, reduce system cost and complexity, and eliminate current surges.

[0044] First, combine Figure 1 The overall structure of the three-phase four-arm inverter system used in this invention will be described below:

[0045] The system includes a DC load terminal, power components, LC filter components, execution components, a power grid terminal, a sampling module, an MCU / DSP control unit, and a drive circuit.

[0046] The DC load terminal is connected to the DC load R3; the power component is a three-phase four-arm power conversion circuit, with the DC side bus capacitor C_Bus connected to the DC terminal and the AC terminal connected to the LC filter component; the LC filter component uses an LC type filter, including filter inductors for four phases A, B, C, and N, and filter capacitors for three phases A, B, and C; the execution component is connected in series between the LC filter component and the grid terminal, including relay branches for four phases A, B, C, and N, and a pre-charge branch for phase C; the grid terminal is a three-phase grid Grid_A, Grid_B, and Grid_C; the sampling module collects the DC bus voltage V_Dc, the inverter-side voltages V_Inv_An, V_Inv_Bn, and V_Inv_Cn for each phase, and the grid-side voltages V_Grid_An, V_Grid_Bn, and V_Grid_Cn for each phase, and the sampled signals are input to the MCU / DSP control unit; the MCU / DSP outputs drive control signals to the drive circuit according to the sampled signals and preset logic, and the drive circuit controls the on / off of the relays and controllable semiconductor switches of the execution component.

[0047] The specific topology of the execution components is as follows: Phase A branch has relays Ka1 and Ka2 connected in series, with a thyristor Qa1 connected in parallel across Ka1; Phase B branch has relays Kb1 and Kb2 connected in series, with a thyristor Qb1 connected in parallel across Kb1; Phase C branch has relays Kc1 and Kc2 connected in series, with a thyristor Qc1 connected in parallel across Kc1; Phase C also has a pre-charge branch connected in parallel, which includes relays Kc3 and Kc4 connected in series and a pre-charge resistor R1; Phase N branch has relays Kn1 and Kn2 connected in series. Phase A's Ka1 and Phase B's Kb1 share a common drive signal, and Phase A's Ka2 and Phase B's Kb2 share a common drive signal, thereby reducing the number of control signals. A discharge branch is also provided on the DC side, which includes a discharge relay K1 connected in series and a discharge resistor R2, used for discharging the charge from the DC bus capacitor.

[0048] It should be noted that the power components in this embodiment can be other power conversion circuits such as two-level or three-level circuits, the LC filter components can be other types of filter circuits such as LCL type, and the thyristors can be replaced with fully controllable semiconductor devices such as MOSFETs and IGBTs, all of which fall within the protection scope of this invention.

[0049] Combination Figure 2 The specific implementation process of the capacitor charge discharge of the present invention will be described below:

[0050] Before executing the relay self-test and pre-charge process, the capacitor charge discharge step is performed first to ensure the safety of the system's initial state. After the process begins, the discharge relay K1 is closed, and the bus capacitor C_Bus discharges charge through the discharge resistor R2. The sampling module monitors the DC bus voltage V_Dc, the A-phase inverter side voltage V_Inv_An, the B-phase inverter side voltage V_Inv_Bn, and the C-phase inverter side voltage V_Inv_Cn in real time. It determines whether all detected voltages are less than the preset threshold 1. If not, K1 remains closed, and discharge continues; if so, the capacitor charge discharge is completed, K1 is opened, and the discharge process ends.

[0051] Combination Figure 3 This paper details the implementation process of the relay self-test and bus pre-charge integrated charging and testing system of the present invention. This process simultaneously completes the self-testing of all relays for sticking faults and closing faults, as well as the phased pre-charge of the DC bus capacitor. The specific steps are as follows:

[0052] Step 1: Initial State Verification

[0053] After the process is started, all relays and thyristors are disconnected first, and the system initial state safety check is performed.

[0054] The sampling module detects the DC bus voltage V_Dc, the A-phase inverter side voltage V_Inv_An, the B-phase inverter side voltage V_Inv_Bn, and the C-phase inverter side voltage V_Inv_Cn, and determines whether V_Dc, V_Inv_An, V_Inv_Bn, and V_Inv_Cn are all less than a preset threshold of 1.

[0055] If any voltage is not less than the threshold 1, it is determined to be fault 1: initial voltage fault, the process is terminated and the fault is reported.

[0056] If all voltages are less than the threshold 1, proceed to the next step.

[0057] Step 2: Self-test for Kn2 relay sticking fault

[0058] First, close relays Kc3 and Kc4 of the C-phase pre-charge branch, then open relay Kn2 and close relay Kn1.

[0059] The sampling module detects the voltage V_Inv_Cn on the C-phase inverter side and determines whether V_Inv_Cn is greater than a preset threshold 2.

[0060] If the test result is yes, it is determined to be fault 2: Kn2 relay sticking fault. The process is terminated and the fault is reported.

[0061] If the test result is negative, proceed to the next step.

[0062] Among them, the minimum value of threshold 2 is set not lower than threshold 1, and the maximum value is generally not higher than (threshold 1 + 2 * sampling accuracy * peak voltage of the grid side).

[0063] Step 3: Self-test for Kn1 relay sticking fault

[0064] Disconnect relay Kn1 and close relay Kn2.

[0065] Continuously monitor the voltage V_Inv_Cn on the C-phase inverter side and determine whether V_Inv_Cn is greater than threshold 2:

[0066] If the test result is yes, it is determined to be fault 3: Kn1 relay sticking fault. The process is terminated and the fault is reported.

[0067] If the test result is negative, proceed to the next step.

[0068] Step 4: Self-check for N-phase relay closure fault and first-stage pre-charge

[0069] Simultaneously close relays Kn1 and Kn2 to initiate the first stage of DC bus pre-charging (with both N-phase relays fully closed, the DC bus capacitor is pre-charged to the peak value of the grid phase voltage through the C-phase pre-charging branch).

[0070] Within a preset charging time t1, the DC bus voltage V_Dc is continuously monitored to determine whether V_Dc is greater than a preset threshold 3 within the charging time t1.

[0071] If V_Dc does not reach threshold 3 within time t1, it is determined to be fault 4: phase voltage charging to DC side timeout fault (Kn1 and Kn2 closing fault), the process is terminated and the fault is reported.

[0072] If V_Dc reaches the threshold 3 within time t1, the first stage of pre-charging is completed, confirming that there is no closing fault in the N-phase relays, and proceeding to the next step.

[0073] The charging time t1 is generally not less than R1*C_Bus*5, where R1 is the pre-charging resistor and C_Bus is the DC bus capacitor.

[0074] Step 5: Self-test for Ka2 relay sticking fault

[0075] Close relays A-phase Ka1 and B-phase Kb1, and open relays A-phase Ka2 and B-phase Kb2.

[0076] Detect the voltage difference between the inverter side and the grid side of phase A, and determine whether |V_Inv_An-V_Grid_An| < threshold 4 is true:

[0077] If the condition is met, it is determined to be fault 5: Ka2 relay sticking fault. The process is terminated and the fault is reported.

[0078] If this does not work, proceed to the next step.

[0079] Step 6: Self-test for Kb2 relay sticking fault

[0080] Detect the voltage difference between the B-phase inverter side and the grid side, and determine whether |V_Inv_Bn-V_Grid_Bn|<threshold 4 is true:

[0081] If the condition is met, it is determined to be fault 6: Kb2 relay sticking fault. The process is terminated and the fault is reported.

[0082] If this does not work, proceed to the next step.

[0083] Step 7: Self-test for Ka1 relay sticking fault

[0084] Disconnect relays A-phase Ka1 and B-phase Kb1, and close relays A-phase Ka2 and B-phase Kb2.

[0085] Detect the voltage difference of phase A and determine whether |V_Inv_An-V_Grid_An| < threshold 4 is true:

[0086] If the condition is met, it is determined to be fault 7: Ka1 relay sticking fault. The process is terminated and the fault is reported.

[0087] If this does not work, proceed to the next step.

[0088] Step 8: Self-test for Kb1 relay sticking fault

[0089] Detect the voltage difference of phase B and determine whether |V_Inv_Bn-V_Grid_Bn| < threshold 4 is true:

[0090] If the condition is met, it is determined to be fault 8: Kb1 relay sticking fault. The process is terminated and the fault is reported.

[0091] If this does not work, proceed to the next step.

[0092] Step 9: Second Stage Pre-charge

[0093] Detect the absolute value of the A-phase grid voltage and determine whether |V_Grid_An| < threshold 5 is true:

[0094] If the condition is not met, continue the loop check;

[0095] If successful, close phase A thyristor Qa1 to start the second stage of DC bus pre-charging (pre-charging the bus capacitor to the peak value of the grid line voltage).

[0096] Within a preset charging time t2, the DC bus voltage V_Dc is continuously monitored to determine whether V_Dc is greater than a preset threshold 6 within the charging time t2.

[0097] If V_Dc does not reach the threshold 6 within time t2, it is determined to be fault 9: line voltage charging DC side timeout fault (Ka2 closing fault), the process is terminated and the fault is reported.

[0098] If V_Dc reaches the threshold of 6 within time t2, the second stage of pre-charging is completed, and the process proceeds to the next step.

[0099] The charging time t2 is generally equal to t1.

[0100] Step 10: Kc2 relay sticking fault self-test

[0101] Disconnect relays Kc3 and Kc4 of the C-phase precharge branch, and then perform the first step of the C-phase relay adhesion self-test: disconnect relay Kc2 and close relay Kc1.

[0102] Detect the voltage difference between the C-phase inverter side and the grid side, and determine whether |V_Inv_Cn-V_Grid_Cn|<threshold 4 is true:

[0103] If the condition is met, it is determined to be fault 10: Kc2 relay sticking fault. The process is terminated and the fault is reported.

[0104] If this does not work, proceed to the next step.

[0105] Step 11: Self-test for Kc1 relay sticking fault

[0106] Perform the second step of the self-test for C-phase relay adhesion: Close Kc2 relay and open Kc1 relay.

[0107] Detect the voltage difference between phase C and determine whether |V_Inv_Cn-V_Grid_Cn| < threshold 4 is true.

[0108] If confirmed, the fault is identified as fault 11: Kc1 relay sticking fault. The process is terminated and the fault is reported.

[0109] If this does not work, proceed to the next step.

[0110] Step 12: Kb2 relay closure fault self-test

[0111] Detect the absolute value of the B-phase grid voltage and determine whether |V_Grid_Bn| < threshold 5 is true:

[0112] If the condition is not met, continue the loop check;

[0113] If true, close phase B thyristor Qb1.

[0114] Detect the voltage difference of phase B and determine whether |V_Inv_Bn-V_Grid_Bn| < threshold 4 is true:

[0115] If not, determine it as fault 12: Kb2 relay closure fault, terminate the process and report the fault;

[0116] If successful, proceed to the next step.

[0117] Step 13: Self-check for Ka1 relay closure fault

[0118] Close the relays Ka1 for phase A and Kb1 for phase B, and disconnect the thyristors Qa1 for phase A and Qb1 for phase B.

[0119] Detect the voltage difference of phase A and determine whether |V_Inv_An-V_Grid_An| < threshold 4 is true:

[0120] If not, it is determined to be fault 13: Ka1 relay closure fault, the process is terminated and the fault is reported;

[0121] If successful, proceed to the next step.

[0122] Step 14: Kb1 relay closure fault self-test

[0123] Detect the voltage difference of phase B and determine whether |V_Inv_Bn-V_Grid_Bn| < threshold 4 is true:

[0124] If not, it is determined to be fault 14: Kb1 relay closure fault, the process is terminated and the fault is reported;

[0125] If successful, proceed to the next step.

[0126] Step 15: Kc2 relay closure fault self-check

[0127] Detect the absolute value of the C-phase grid voltage and determine whether |V_Grid_Cn| < threshold 5 is true:

[0128] If the condition is not met, continue the loop check;

[0129] If true, close the C-phase thyristor Qc1.

[0130] Detect the voltage difference between phase C and determine whether |V_Inv_Cn-V_Grid_Cn| < threshold 4 is true.

[0131] If not, it is determined to be fault 15: Kc2 relay closure fault, the process is terminated and the fault is reported;

[0132] If successful, proceed to the next step.

[0133] Step 16: Kc1 relay closure fault self-test

[0134] Close the C-phase Kc1 relay and disconnect the C-phase Qc1 thyristor.

[0135] Detect the voltage difference between phase C and determine whether |V_Inv_Cn-V_Grid_Cn| < threshold 4 is true.

[0136] If not, it is determined to be fault 16: Kc1 relay closure fault, the process is terminated and the fault is reported;

[0137] If successful, all relay sticking faults and closing faults will be self-tested, the DC bus will be pre-charged in stages, the process will end, and the inverter can enter normal operating mode.

[0138] The threshold values ​​1-6 are as follows:

[0139] Threshold 1 is generally set to be no less than 35V. If this voltage is too low, the detection time may be insufficient, which may lead to detection failure. If it is too high, it may cause a large inrush current during the detection process. In different examples, the threshold 1 can be adjusted according to the acceptable inrush current. In this embodiment, threshold 1 is set to 35V.

[0140] Threshold 2, the minimum value is set not lower than threshold 1, and the maximum value is generally not higher than (threshold 1 + 2 * sampling accuracy * peak voltage of the grid side).

[0141] Threshold 3 is equal to (peak phase voltage on the grid side - 15V), where 15V is the margin value used in this example. This margin value can be adjusted in different examples by factors such as detection time, sampling accuracy, and peak voltage on the grid side.

[0142] Threshold 4 is equal to (15V), where 15V is the margin value used in this example. This margin value can be adjusted in different examples by factors such as detection time, sampling accuracy and peak grid voltage.

[0143] The purpose of threshold 5 is to ensure that the thyristor closes near the zero voltage crossing. In this example, it is equal to (15V). Threshold 5 can be adjusted in different examples by factors such as the size of C in the LCL filter, the software sampling interval and accuracy, and the total software and hardware delay for SCR activation.

[0144] Threshold 6 is equal to (peak line voltage on the grid side - 15V), where 15V is the margin value used in this example. This margin value can be adjusted in different examples by factors such as detection time, sampling accuracy, and peak line voltage on the grid side.

[0145] Throughout the process, fault diagnosis of all relays is achieved through voltage sampling signals, eliminating the need for additional current sensors and allowing direct reuse of the system's existing voltage sampling circuit. Relays A and B in the same series share the same drive signal, reducing the number of control signals. The phased pre-charging process is deeply integrated with the relay self-test, eliminating the need for an additional pre-charging process and significantly shortening the startup time. Simultaneously, before the relay closes, the parallel thyristor is closed first, and the relay is closed only when the voltage difference across the relay approaches zero, completely eliminating the large current impact on the LC filter capacitor when the relay is energized, thus improving the system's reliability.

[0146] All components mentioned in this article are general standard parts or components known to those skilled in the art. Their structures and principles can be learned by those skilled in the art through technical manuals or conventional experimental methods, so they will not be described in detail here.

[0147] While the specific embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention, and modifications or variations without creative effort are still within the protection scope of the present invention.

Claims

1. A self-testing and DC bus pre-charging method for inverter relays integrating charging and testing, applied to a three-phase four-arm inverter system, wherein two relays are connected in series on each of the A, B, and C phases and the N phase power circuit of the three-phase four-arm inverter system, and a controllable semiconductor switch is connected in parallel to one row of relays in each phase, characterized in that... The method includes: S1 Capacitor Charge Discharge: Close the DC side discharge relay, and use the sampling circuit to detect the DC side bus voltage and the inverter side voltage of each phase until all detected voltages are less than the preset threshold, thus completing the DC side capacitor charge discharge. S2 Initial State Verification: Disconnect all relays and controllable semiconductor switches, and detect the DC bus voltage and the inverter side voltage of each phase through the sampling circuit. If any voltage is not less than the preset threshold, it is determined to be an initial voltage fault. S3 Phase-by-Phase Relay Sticking Fault Self-Check and Phased Pre-charge: The relays and controllable semiconductor switches of phases C, N, A, and B are sequentially switched on and off. The difference between the inverter-side voltage and the grid-side voltage of the corresponding phase is used to determine whether the corresponding relay has a sticking fault. During the self-check process, the DC bus capacitor is pre-charged in two stages: the N-phase dual relays are closed and the A-phase controllable semiconductor switch is closed. The first stage pre-charges the DC bus capacitor to the peak value of the grid phase voltage, and the second stage pre-charges it to the peak value of the grid line voltage. S4 relay closing fault self-check: During the synchronous execution of pre-charge and self-check, the difference between the inverter side voltage and the grid side voltage of the corresponding phase is used to determine whether the corresponding relay has a failure to close. S5 completes self-test and pre-charge: If all self-test steps are fault-free and the DC bus voltage reaches the preset voltage value within the preset charging time, then the relay full self-test and DC bus pre-charge are completed.

2. The inverter relay self-testing and DC bus pre-charging method integrating charging and testing according to claim 1, characterized in that, The controllable semiconductor switch is a thyristor, or a MOSFET or IGBT fully controllable semiconductor device. Before the relay is closed, the corresponding parallel controllable semiconductor switch is closed first. The relay is closed only after the voltage difference across the relay is less than a preset threshold, thus eliminating the current surge to the capacitor of the LC filter component when the relay is energized.

3. The inverter relay self-testing and DC bus pre-charging method integrating charging and testing according to claim 1, characterized in that, In S3, the relays in phase A and phase B share a common drive control signal, and the on / off state of the relays in phase A and phase B is synchronously controlled by the same drive signal.

4. The inverter relay self-testing and DC bus pre-charging method integrating charging and testing according to claim 1, characterized in that, In S3 and S4, the determination of relay sticking fault and closing fault is achieved by the voltage signal collected by the sampling module, without the need for an additional current sampling sensor.

5. The inverter relay self-testing and DC bus pre-charging method integrating charging and testing according to claim 1, characterized in that, The phased pre-charging in S3 is as follows: First, close the two series relays Kn1 and Kn2 of phase N to pre-charge the DC bus capacitor to the peak voltage of the grid phase through the pre-charging branch of phase C; after completing the self-checking steps for relay sticking faults in phases A and B in S3, close the controllable semiconductor switch Qa1 of phase A to pre-charge the DC bus capacitor to the peak voltage of the grid line.

6. The inverter relay self-testing and DC bus pre-charging method integrating charging and testing according to claim 1, characterized in that, In S3 and S4, the location and fault type of the specific relay that caused the sticking fault or the inability to close the circuit are determined.

7. A charging and testing integrated inverter relay self-test and DC-side bus pre-charge system, used to execute the charging and testing integrated inverter relay self-test and DC-side bus pre-charge method as described in any one of claims 1-6, characterized in that, The system includes: The sampling module is used to collect DC bus voltage, A / B / C three-phase inverter side voltage, and A / B / C three-phase grid side voltage. The control unit is electrically connected to the sampling module and is used to receive the voltage sampling signal from the sampling module, execute the method, and output the corresponding drive control signal. The driving circuit has its input terminal electrically connected to the control unit and its output terminal electrically connected to the execution component, and is used to drive the relay and controllable semiconductor switch of the execution component to switch on and off according to the driving control signal; The actuator is connected in series between the LC filter component of the three-phase four-arm inverter and the grid terminal. Two redundant relays are connected in series on the A, B, C and N phase power circuits of the actuator. One of the relays in each phase is connected in parallel with a controllable semiconductor switch. The C phase is also provided with a pre-charge branch with a pre-charge resistor.

8. The inverter relay self-testing and DC bus pre-charging system integrating charging and testing according to claim 7, characterized in that, The power components of the three-phase four-bridge inverter are two-level or three-level power conversion circuits, and the LC filter components are LC type filters or LCL type filters.

9. A charging and testing integrated inverter relay self-test and DC-side bus pre-charge circuit for the system of claim 7 or 8, characterized in that, Includes DC-side circuit, three-phase four-arm power conversion circuit, LC filter circuit, relay execution circuit, and grid-side circuit; The DC side circuit includes a bus capacitor C_Bus and a discharge branch, wherein the discharge branch includes a discharge relay K1 and a discharge resistor R2 connected in series. The DC terminal of the three-phase four-bridge power conversion circuit is connected to the DC side circuit, and the AC terminal is connected to the LC filter circuit. The relay execution circuit is connected in series between the LC filter circuit and the grid-side circuit, including phase A branch, phase B branch, phase C branch and phase N branch; The A-phase branch includes relays Ka1 and Ka2 connected in series, and a controllable semiconductor switch Qa1 is connected in parallel across the two ends of relay Ka1; The B-phase branch includes relays Kb1 and Kb2 connected in series, and a controllable semiconductor switch Qb1 is connected in parallel across the two ends of relay Kb1; The C-phase branch includes relays Kc1 and Kc2 connected in series, and a controllable semiconductor switch Qc1 is connected in parallel across the two ends of relay Kc1; the C-phase branch also has a pre-charge branch connected in parallel. The N-phase branch includes relays Kn1 and Kn2 connected in series.

10. The inverter relay self-test and DC-side bus pre-charge circuit integrating charging and testing according to claim 9, characterized in that: The pre-charge branch includes relays Kc3 and Kc4 connected in series with a pre-charge resistor R1; the relay Ka1 of phase A and the relay Kb1 of phase B share a common drive signal, and the relay Ka2 of phase A and the relay Kb2 of phase B share a common drive signal.

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