Modulation method and system for suppressing frequency-doubled circulating current of parallel hybrid ANPC three-level inverter

Abstract

This invention belongs to the field of power electronics technology and discloses a method and system for frequency doubling and circulating current suppression modulation of a parallel hybrid ANPC three-level inverter. Through space vector screening, sector reconstruction, and reasonable configuration of redundant vectors, this invention can simultaneously achieve circulating current suppression, output line voltage frequency doubling, midpoint potential control, and switching frequency decoupling of the parallel inverter without additional hardware. It overcomes the problems of existing modulation methods that require discarding a large number of effective vectors and are difficult to take into account multiple control objectives. This enables the parallel hybrid ANPC three-level inverter to achieve higher voltage utilization, better output power quality, and higher system operating efficiency in high-power application scenarios.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, specifically relating to a method and system for frequency doubling circulating current suppression modulation of parallel hybrid ANPC three-level inverters. Background Technology

[0002] Clean energy boasts significant advantages such as low carbon emissions, environmental friendliness, and strong sustainability. With the continuous expansion of new energy power generation and the promotion of modular applications of power electronic devices, high-power inverters have gradually become an important development direction for power electronic systems. To meet the demands of high-power applications, multi-level inverter topologies have been proposed and extensively studied. Among them, three-level inverters, due to their advantages of high output voltage levels, low output harmonic content, and low device voltage stress, are widely used in new energy power generation, grid-connected energy storage, and high-voltage high-power transmission. Three-level active neutral-point clamp (ANPC) inverters not only achieve equivalent output voltage frequency multiplication at lower switching frequencies but also feature decoupling of switching device frequencies, meaning that some switching devices operate at high frequencies while others switch only at the fundamental frequency. This characteristic provides the conditions for introducing silicon carbide (SiC) devices into inverters. By adopting a hybrid structure that combines SiC devices with traditional Si devices, the efficiency and output power quality of the inverter can be significantly improved while ensuring controllable system costs. Therefore, the hybrid ANPC three-level inverter is gradually becoming a topology with development potential in high-power application scenarios.

[0003] In practical applications, due to the limitations of the current-carrying capacity and power rating of a single inverter module, when the system capacity is further increased, it is usually necessary to expand the system's output power by operating multiple inverter modules in parallel. Parallel systems control multiple inverters as a whole through a unified modulation strategy, which not only increases the number of output levels but also improves output voltage quality and system power density. However, in non-isolated parallel systems, multiple inverters share a DC bus and are connected to a common point on the AC side, which can easily create circulating current paths between modules. Circulating current introduces additional losses, increases electromagnetic interference, and leads to uneven current distribution among parallel modules, potentially even causing overcurrent damage to devices. Simultaneously, the three-level topology itself suffers from DC-side midpoint potential fluctuations. When capacitor parameters are mismatched or the three-phase load is unbalanced, the midpoint potential is prone to shift, increasing low-order harmonics and reducing system efficiency.

[0004] To address circulating current and midpoint potential fluctuations, existing technologies typically employ either hardware compensation or software control. Hardware methods improve system characteristics by adding independent power supplies, isolation transformers, or compensation circuits, but significantly increase system size, cost, and control complexity. In contrast, software methods based on modulation strategies or control algorithms do not require additional hardware, offering advantages such as low cost and versatility, thus becoming a research focus. However, existing software methods often require discarding some effective space vectors, thereby reducing DC-side voltage utilization and increasing total harmonic distortion of the output voltage. Furthermore, current research primarily targets traditional ANPC topologies and has not yet proposed a unified modulation strategy applicable to parallel hybrid ANPC three-level inverters, making it difficult to simultaneously achieve key performance indicators such as frequency doubling modulation, circulating current suppression, switching frequency decoupling, and midpoint potential balance. Summary of the Invention

[0005] The purpose of this invention is to overcome the problem that existing modulation methods usually require discarding some effective vectors when suppressing circulating current in parallel systems, making them difficult to apply to parallel hybrid ANPC three-level inverters and simultaneously achieve frequency doubling modulation, circulating current suppression, switching frequency decoupling, and midpoint potential control. This invention provides a frequency doubling circulating current suppression modulation method and system for parallel hybrid ANPC three-level inverters.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, the present invention provides a method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter, comprising the following steps: Construct an inverter system model, which is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point. The output voltage model of the parallel inverter is established based on the switching functions of each bridge arm in the inverter system model, and the equivalent switching state of the parallel inverter is determined. Based on the output voltage model of the parallel inverter, the circulating current expression of the parallel system is derived, and the circulating current factor is defined to characterize the circulating current variation between the parallel inverters. The spatial vectors are filtered based on the circulation factor to obtain a set of spatial vectors that satisfy the circulation suppression condition; Sector reconstruction is performed on the spatial vector set to obtain a reference vector, and the vector combination is determined based on the position of the reference vector; Calculate the action time of each vector in the vector combination, and construct a space vector modulation sequence based on the action time of each vector; Based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model, redundant switching states are selected, and midpoint potential control is performed. Space vector modulation sequence control is used to control the inverter switching devices.

[0007] A further improvement of the present invention is that the hybrid ANPC three-level inverter includes SiC-MOSFET devices and Si-IGBT devices, with the SiC-MOSFET devices used for high-frequency switching and the Si-IGBT devices used for low-frequency switching.

[0008] A further improvement of this invention is that the bridge arm switching function is used to represent the on-state of the inverter bridge arm, the equivalent multilevel output state of the parallel inverter is determined according to the bridge arm switching function, and the output voltage model of the parallel inverter is established according to all the equivalent multilevel output states of the parallel inverter.

[0009] A further improvement of this invention is that the circulation factor is: S cz = S a2 + S b2 + S c2 - S a1 - S b1 - S c1 in, S a1 For the switching function of phase a of the first inverter, S b1 For the switching function of phase b of the first inverter, S c1 For the c-phase switching function of the first inverter, S a2 For the switching function of phase a of the second inverter, S b2 For the switching function of phase b of the second inverter, S c2 This is the switching function for phase c of the second inverter.

[0010] A further improvement of the present invention is that, when filtering spatial vectors according to the circulation factor, vectors with a circulation factor of 0 and vectors with a circulation factor of ±1 are selected as modulation vectors.

[0011] A further improvement of the present invention is that, when reconstructing the sector of the spatial vector set, the partition where the reference vector is located is determined based on the reference voltage vector angle and the modulation index.

[0012] A further improvement of the present invention is that, when calculating the action time of each vector in the vector combination, a reference vector is synthesized by three spatial vectors in each partition, and the action time of each vector in the vector combination within one switching cycle is calculated according to the volt-second balance principle.

[0013] A further improvement of this invention is that, when using space vector modulation sequence control of inverter switching devices, by changing the arrangement order of redundant switching states, the output line voltage completes two changes within one switching cycle, thus doubling the output line voltage frequency.

[0014] A further improvement of the present invention is that, when using space vector modulation sequence to control the inverter switching devices, the hybrid ANPC three-level inverter is controlled by space vector modulation sequence to perform switching operations at the base frequency or a set frequency, while the hybrid ANPC three-level inverter is controlled to perform switching operations at the switching frequency, thereby decoupling the switching frequencies of the switching devices.

[0015] Secondly, the present invention provides a parallel hybrid ANPC three-level inverter frequency doubling circulating current suppression modulation system, comprising the following steps: The inverter system model building module is used to build an inverter system model. The inverter system model is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point. The switch state acquisition module is used to establish the output voltage model of the parallel inverter based on the switching functions of each bridge arm in the inverter system model, and to determine the equivalent switch state of the parallel inverter. The circulating current factor acquisition module is used to derive the circulating current expression of the parallel system based on the output voltage model of the parallel inverters, and to define the circulating current factor to characterize the circulating current variation between the parallel inverters. The spatial vector set acquisition module is used to filter spatial vectors according to the circulation factor to obtain a spatial vector set that meets the circulation suppression condition; The vector combination acquisition module is used to reconstruct the spatial vector set by sector to obtain the reference vector, and determine the vector combination based on the position of the reference vector. The modulation sequence acquisition module is used to calculate the action time of each vector in the vector combination and construct a space vector modulation sequence based on the action time of each vector. The switching control module is used to select redundant switching states and perform midpoint potential control based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model. It uses space vector modulation sequence control to control the inverter switching devices.

[0016] Compared with the prior art, the present invention has the following beneficial effects: This invention constructs a parallel hybrid ANPC three-level inverter system model and establishes an output voltage model based on the bridge arm switching function, thus establishing a clear mathematical relationship between the switching state and output voltage of the parallel system. Based on this, the circulating current expression of the parallel system is derived, and a circulating current factor is introduced, enabling quantitative analysis of the circulating current generation mechanism in the parallel system. This invention uses the circulating current factor to filter space vectors, retaining more effective space vectors while ensuring controllable circulating current. This achieves circulating current suppression while maintaining high DC-side voltage utilization, thereby reducing output voltage harmonic content and improving inverter output power quality. After obtaining a set of space vectors that meet the circulating current suppression conditions, this invention reconstructs the space vector set by sector and determines the vector combination based on the reference vector position, making space vector modulation applicable to the topology of parallel hybrid ANPC three-level inverters. This solves the problem that traditional space vector modulation methods are difficult to directly apply to parallel hybrid ANPC three-level inverters. Simultaneously, by calculating the action time of each vector in the vector combination and constructing a space vector modulation sequence, the precise synthesis of the output voltage is achieved while ensuring volt-second balance, enabling the inverter to maintain stable operation while possessing higher modulation flexibility. In the process of constructing the modulation sequence, this invention rationally arranges the redundant switch states, ensuring that the output line voltage changes twice within one switching cycle, thereby achieving output line voltage frequency multiplication and increasing the inverter's equivalent switching frequency. Since the increase in equivalent switching frequency effectively reduces low-order harmonics in the output current and voltage, it can significantly improve the inverter's output power quality and facilitate the optimization of filter parameters. This invention combines the DC-side capacitor voltage difference and the three-phase output current during modulation to select redundant switch states, thereby achieving dynamic balance control of the DC-side midpoint potential. Midpoint potential control can be achieved without adding additional hardware circuitry, effectively suppressing midpoint potential shifts caused by capacitor parameter mismatch or load asymmetry, reducing the content of low-order harmonics in the system, and improving the stability and reliability of the inverter system. In summary, this invention, through space vector filtering, sector reconstruction, and reasonable configuration of redundant vectors, can simultaneously achieve circulating current suppression, output line voltage frequency multiplication, midpoint potential control, and switching frequency decoupling of parallel inverters without the need for additional hardware. This overcomes the problems of existing modulation methods that require discarding a large number of effective vectors and are difficult to balance multiple control objectives. As a result, the parallel hybrid ANPC three-level inverter can achieve higher voltage utilization, better output power quality, and higher system operating efficiency in high-power application scenarios. Attached Figure Description

[0017] Figure 1 This is a topology diagram of a three-phase parallel HANPC three-level inverter with resistive and inductive loads.

[0018] Figure 2 This is the spatial vector diagram of sector I of the parallel HANPC three-level inverter.

[0019] Figure 3 The switching functions and output line voltages of two different modulation sequences for sector D1 are given; where (a) is sequence 1 and (b) is sequence 2.

[0020] Figure 4 This is the spatial vector diagram of sector I for the circulating current suppression frequency doubling spatial vector modulation method.

[0021] Figure 5 The values ​​of the A-phase switching function for each vector in the spatial vector diagram are determined.

[0022] Figure 6 The diagram shows the effect of decoupling the switching frequency.

[0023] Figure 7 This is the equivalent circuit diagram of a parallel HANPC three-level inverter.

[0024] Figure 8 To consider the circulating current suppression frequency doubling space vector modulation of parallel three-level inverters that decouples the midpoint potential control and switching frequency.

[0025] Figure 9 This is a flowchart of the modulation algorithm proposed in this invention.

[0026] Figure 10 This is an experimental platform for the P-HANPCTL inverter.

[0027] Figure 11 The waveforms of the three-phase output current and circulating current of the sub-inverter are shown; where (a) is... m = 0.2; (b) is m = 0.5, (c) is m = 0.8.

[0028] Figure 12 The output current and midpoint potential fluctuation of the P-HANPCTL inverter; where (a) is m = 0.2; (b) is m = 0.5, (c) is m = 0.8.

[0029] Figure 13 FFT analysis of phase A output current under different modulation degrees; where (a) is m = 0.2; (b) is m = 0.5, (c) is m = 0.8.

[0030] Figure 14Two sub-inverters are switched on phase A at different frequencies for the Si switching transistor; where (a) is 150Hz and (b) is 50Hz.

[0031] Figure 15 This refers to the switching action of the A-phase switching transistors of the two sub-inverters when the modulation index is 0.8.

[0032] Figure 16 This is a flowchart of the present invention; Figure 17 This is a system diagram of the present invention. Detailed Implementation

[0033] To further understand the content of this invention, the invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments are merely illustrative and not limiting of the invention.

[0034] Example 1: See Figure 16 The method for frequency doubling circulating current suppression modulation of parallel hybrid ANPC three-level inverters includes the following steps: S1. Construct an inverter system model. The inverter system model is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point.

[0035] S2. Establish the output voltage model of the parallel inverter based on the switching functions of each bridge arm in the inverter system model, and determine the equivalent switching state of the parallel inverter.

[0036] S3. Based on the output voltage model of the parallel inverter, derive the circulating current expression of the parallel system and define the circulating current factor to characterize the circulating current variation between the parallel inverters.

[0037] S4. Based on the circulation factor, the spatial vectors are filtered to obtain a set of spatial vectors that meet the circulation suppression condition.

[0038] S5. Reconstruct the spatial vector set by sector to obtain the reference vector, and determine the vector combination based on the position of the reference vector.

[0039] S6, calculate the action time of each vector in the vector combination, and construct a space vector modulation sequence based on the action time of each vector.

[0040] S7 selects redundant switching states based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model, performs midpoint potential control, and uses space vector modulation sequence control of the inverter switching devices.

[0041] Example 2: See Figure 17The parallel hybrid ANPC three-level inverter frequency doubling circulating current suppression modulation system includes the following steps: The inverter system model building module is used to build an inverter system model. The inverter system model is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point.

[0042] The switch state acquisition module is used to establish the output voltage model of the parallel inverter based on the switching functions of each bridge arm in the inverter system model, and to determine the equivalent switch state of the parallel inverter.

[0043] The circulating current factor acquisition module is used to derive the circulating current expression of the parallel system based on the output voltage model of the parallel inverters, and to define the circulating current factor to characterize the circulating current variation between the parallel inverters.

[0044] The spatial vector set acquisition module is used to filter spatial vectors based on circulation factors to obtain a spatial vector set that satisfies the circulation suppression condition.

[0045] The vector combination acquisition module is used to reconstruct the spatial vector set by sector to obtain the reference vector, and determine the vector combination based on the position of the reference vector.

[0046] The modulation sequence acquisition module is used to calculate the duration of action of each vector in the vector combination and construct a spatial vector modulation sequence based on the duration of action of each vector.

[0047] The switching control module is used to select redundant switching states and perform midpoint potential control based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model. It uses space vector modulation sequence control to control the inverter switching devices.

[0048] Example 3: The object of the present invention is Figure 1 The diagram shows a parallel HANPC three-level inverter. The two inverters share a common DC terminal and an AC load terminal. Apcc, Bpcc, and Cpcc are the common points on the three-phase AC sides of the two inverters, respectively.

[0049] Taking phase A as an example for analysis, the schematic diagram of phase A branch of the parallel HANPC inverter is as follows: Figure 1 As shown in the diagram. Each bridge of this inverter contains 12 active switches, where the switching transistors... T a2 , T a3 as well as T ′ a2 , T ′ a3These are the SiC-MOSFETs in the first and second inverters, respectively. Switches. T a1 , T a4 , T a5 and T a6 as well as T ′ a1 , T ′ a4 , T ′ a5 and T ′ a6 These are the Si-IGBT transistors of the first inverter and the second inverter, respectively.

[0050] For a HANPC three-level inverter, the output voltages at the AC bridge midpoint O and the DC bridge midpoint N can be expressed by switching functions as follows: (1) In the formula, These are the phase voltages of a three-phase power grid; Let N be the voltage between points N and n. Considering the three-phase power grid voltage balance, the grid voltage at this time... Add the left and right sides of equation (1) respectively: in, X = A1, B1, C1, A2, B2, C2. x = a1, b1, c1, a2, b2, c2. This is to achieve switching frequency decoupling. S x The values ​​of are shown in Table 1.

[0051] Table 1. Switching Frequency Decoupling Switching Function of HANPC Three-Level Inverter

[0052] Figure 1 In the middle, A pcc The voltage at a point can be expressed as (2) make S a = S a1 + S a2 The output voltage at point pcc of phase A and the equivalent switching function are shown in Table 2.

[0053] Table 2 A pccOutput voltage and equivalent switching function of the point

[0054] As shown in Table 2, two three-level inverters connected in parallel are equivalent to one five-level inverter. The difference is that a five-level inverter has five voltage levels per phase ('0', '1', '2', '3', '4'), resulting in 53 switching states across the three phases; while a parallel HANPC three-level inverter has only five voltage levels per phase ('0', '1', '2', '3', '4'), resulting in 53 switching states across the three phases. + ', '1 - ', '2 + ', '2 - ', '2 = ', '3 + ', '3 - There are nine voltage levels in total, with 93 switching states in three phases. However, simple analysis shows that the two states with zero output voltage are '2'. + 'and'2 - This will cause a large current surge in the single-phase bridge, and the use of these two states should be avoided in practice. Therefore, in the design of the parallel HANPC inverter modulation method, only one state with an output voltage of 0 can be used. = '.

[0055] The integrated space vector modulation of a parallel three-level inverter can be equivalent to a five-level SVPWM. Its SVPWM vector diagram is the same as that of a five-level SVPWM vector diagram, except that each basic vector has more redundant switching states than the five-level basic vector. Taking sector I as an example, its basic space vector diagram is as follows: Figure 2 As shown in the figure, the switching states of each vector are shown in Table 3.

[0056] Table 3 Switching states of each vector in sector I of the space vector of the parallel HANPC three-level inverter

[0057] It is not difficult to see from Table 3 that although '2' was removed + 'and'2 - With two switching states, the integrated space vector modulation of the parallel HANPC three-level inverter offers far more switching states than the space vector modulation of a traditional 5-level inverter. More switching states mean more degrees of freedom for inverter performance optimization, such as switching frequency decoupling, output line voltage frequency multiplication, zero-sequence circulating current suppression, differential-mode circulating current suppression, and neutral point potential control. Details will be discussed in later chapters.

[0058] To improve the output power quality of inverters, introducing higher-performance SiC devices can directly increase the switching frequency, thereby improving the inverter's output power quality. Alternatively, using modulation strategies to increase the equivalent switching frequency is a more economical and effective method for improving the output power quality of high-power inverters. Applying modulation methods that can increase the equivalent switching frequency to hybrid inverters can significantly improve power quality. Figure 1 It is easy to see that the research object of this invention adopts a connection method with a common DC bus and a common AC side. Although this topology can save the DC voltage source, it also provides a path for circulating current to flow in the parallel system, which can seriously affect the normal operation of the system.

[0059] Therefore, the modulation method used for parallel HANPC three-level inverters should suppress circulating current while increasing the equivalent switching frequency.

[0060] exist Figure 1 In the three-phase three-wire system shown, the voltage applied across the load is always the line voltage. Therefore, increasing the frequency of the output line voltage can effectively improve the output power quality of the inverter.

[0061] Sequence 1: 000 => 1 + 00 =>1 + 1 + 0 => 1 + 1 + 1 + =>2 = 1 + 1 + =>2 = 2 = 1 + =>2 = 2 = 2 = =>2 = 2 = 2 = =>2 = 2 = 1 - =>2 = 1 - 1 - =>1 - 1 - 1 - =>1 - 1 - 0 => 1 - 00 => 000; Sequence 2: 1 - 1 - 1 - =>2 = 1 - 1 -=>2 = 2 = 1 - =>2 = 2 = 2 = =>2 = 2 = 1 + =>2 = 1 + 1 + =>1 + 1 + 1 + =>1 + 1 + 1 + =>2 = 1 + 1 + =>2 = 2 = 1 + =>2 = 2 = 2 = =>2 = 2 = 1 - =>2 = 1 - 1 - =>1 - 1 - 1 - .

[0062] Both sequences used V 0, V 1 and V 2. Reference vector synthesis is performed, but with different redundancy states and arrangement methods. The equivalent switching functions of these two sequences, the switching functions of each sub-inverter, and the relationship between the output line voltages are as follows: Figure 3 As shown in (a) and (b).

[0063] As can be seen from the figure, the switching functions of both sequence sub-inverters undergo only one change from 0 to 1 to 0 or 1 to 0 to 1. However, the output line voltages differ significantly: the output line voltage of sequence 1 is symmetrical about the neutral line, while the output line voltage of sequence 2 cycles twice. This means that using sequence 2 for modulation can make the frequency of the output line voltage twice the switching frequency. Therefore, sequence 2 can significantly improve the equivalent switching frequency of the inverter, which is beneficial for the parameter design of the control system and the improvement of output power quality.

[0064] exist Figure 1In the P-HANPCTL inverter topology shown, based on the voltage between the DC side midpoint N and the AC side common point pcc of the two inverter modules, and neglecting the line impedance, the corresponding three-phase differential equations can be listed as follows: (3) The expression for circulation is defined as follows: (4) Adding the three differential expressions in equation (3) and substituting equation (4) into the equation, we can obtain the differential expression for the circulation as follows: (5) Define circulation factor S cz = S a2 + S b2 + S c2 - S a1 - S b1 - S c1 The expression for the zero-sequence circulation can be derived as follows: (6) In the formula, i z0 For the initial zero-sequence circulation, under the initial condition i z0 It is zero. From equation (6), we know that when... S cz When = 0, the circulation can always remain zero; when S cz When >0, circulation increases; when S cz When <0, circulation decreases. The absolute value of the circulation factor | S cz The larger the value of |, the faster the circulation changes, enabling rapid suppression of the circulation, but | S cz An excessively large circulation factor can cause significant fluctuations in the circulation. Therefore, the circulation factor should be selected based on system requirements.

[0065] To ensure the quality of the current waveform output by parallel inverters, the circulating current between the parallel inverters should be as small as possible. Therefore, it is necessary to... Figure 2 Based on this, spatial vectors are selected. When S cz When = 0, the circulating current of the parallel system is basically zero. Select the vectors that meet the conditions from Table 3. The vectors that meet the conditions are shown in Table 4.

[0066] Table 4. Vector of zero circulation factor

[0067] It is not difficult to see from Table 4 that if we let S cz = 0, the available vectors are significantly fewer than in Table 3, making it impossible to simultaneously achieve frequency multiplication of the output line voltage and decoupling of the switching frequencies of the switching transistors within the hybrid topology. In the actual operation of parallel inverters, a small controllable circulating current is acceptable. To obtain more degrees of freedom and achieve more control objectives, a modulation method can be introduced... S cz = ±1 vectors. As analyzed in 2.2, to suppress circulation, the ideal spatial vector sequence must contain both positive and negative circulation factors, and their durations within a single switching cycle must be equal. Table 3 selects vectors that meet these conditions. S cz The vectors with a value of ±1, and the vectors that satisfy the conditions and their circulation factors are shown in Table 5.

[0068] Table 5. Vectors with circulation factors of ±1

[0069] Combining Tables 4 and 5, the spatial vector map formed by these vectors in sector I and Figure 2 The traditional 5-level space vector diagram shown is the same. To satisfy the principles of similar vector synthesis and the principle that the switching transistor only turns on and off once per switching cycle, the new space vector diagram is as follows: Figure 4 As shown.

[0070] In the picture D 2, D 3. The reason for this division is to take into account V 1, V 2 and V When phase B is coupled, its switching state will undergo a level transition from '0' to '2'. This will prevent the switching frequencies of the SiC devices and Si devices in the HANPC three-level inverter from being decoupled, which violates the original intention of differentiating the switching frequencies of the hybrid topology. Therefore... D 2-sector use V 0, V 1 and V 4 is used to synthesize the reference vector. D 3-sector use V 0, V 2 and V 4. Use this to synthesize the reference vector. Figure 4 The reasons for dividing the middle sector and D 2, D 3. Same.

[0071] This section uses cell D1 to illustrate a method for achieving circulating current suppression using modulation sequences. Cell D1 can be represented by the following two sequences: Sequence 1: 000 => 1 + 00 =>1 + 1 + 0 => 1 + 1 + 1 + =>2 = 1 + 1 + =>2 = 2 = 1 + =>2 = 2 = 2 = =>2 = 2 = 2 = =>2 = 2 = 1 - =>2 = 1 - 1 - =>1 - 1 - 1 - =>1 - 1 - 0 => 1 - 00 => 000; Sequence 2: 1 + 1 + 1 - =>2 = 1 + 1 - =>2 = 2 = 1 - =>2 = 2 = 2 = =>2 = 2 = 1 + =>2 = 1 - 1 + =>1 - 1 - 1 + =>1 - 1 - 1 + =>2 = 1 - 1 + =>2 = 2 = 1 + =>2 = 2= 2 = =>2 = 2 = 1 - =>2 = 1 + 1 - =>1 + 1 + 1 - .

[0072] Adding the circulation factors of each vector in the half-cycle and full-cycle of sequence 1 yields: S cz(half) = 0-1-2-3-2-1+0 = -9; S cz(total) = -9+0+1+2+3+2+1+0 = 0. It can be seen that the sum of the circulating current factors in the half-cycle modulation sequence of Sequence 1 is not zero, while it is zero for the entire cycle. This means that while using Sequence 1 will not cause uncontrollable circulating current, it will cause significant fluctuations in the circulating current, affecting the power quality of the inverter output. Furthermore, observing Sequence 1 reveals that the vectors that need to be synthesized by the two sub-inverters in each half-cycle are different. If the vectors that need to be synthesized by the two sub-inverters are different, it will lead to significant fluctuations in the differential-mode circulating current. Therefore, Sequence 1 will cause significant fluctuations in the circulating current, making this sequence unusable.

[0073] Adding the circulation factors of each vector in the half-cycle and full-cycle of sequence 2 yields: S cz(half) = -1+0+1+0-1+0+1=0; S cz(total) = 2× S cz(half) = 0. It can be seen that the sum of the circulating current factors of the half-cycle and full-cycle modulation sequences of Sequence 2 is zero. This means that using Sequence 2 makes the zero-sequence circulating current of the parallel inverter controllable and with minimal fluctuation within one switching cycle. Furthermore, by observing the switching state of Sequence 2, it is easy to see that the vectors that need to be synthesized by the two sub-inverters in both the half-cycle and full-cycle are the same, which can suppress differential-mode circulating current. Therefore, switching sequence 2 can not only suppress zero-sequence circulating current and differential-mode circulating current but also reduce the fluctuation of the circulating current.

[0074] In the actual operation of a parallel HANPC three-level inverter, there are two objectives that must be considered: the decoupling of the switching frequencies of the Si and SiC switches and the control of the midpoint potential.

[0075] Because a single HANPC three-level inverter has multiple zero-output voltage states, the entire topology can be decoupled into three parts: voltage clamping circuit, high-speed switching circuit, and commutation circuit. However, in a parallel inverter, two HANPC three-level inverters work together, making the operating conditions more complex than a single inverter. Therefore, the conditions for decoupling the switching transistors need further analysis. Reference

[13] analyzed the conditions for decoupling the switching frequency by starting with the characteristics of the modulation method having positive and negative half-cycles. This invention will analyze the conditions for decoupling the switching frequency of the switching transistors in a parallel HANPC three-level inverter from the perspective of space vectors.

[0076] Taking phase A as an example, Figure 5 The switching function of each vector A phase in the equivalent 5-level space vector diagram of the parallel HANPC three-level inverter is given.

[0077] from Figure 5 As can be seen, the diagram can be divided into four layers from the outside to the inside. We will analyze it from the outside to the inside.

[0078] 1) Outermost layer ( Figure 5 As shown): In this region, the reference vector is... Figure 2 shown V 6~ V 14 Vector synthesis, their A-phase equivalent switching function is as follows Figure 5 As shown in the figures, it's easy to see a clear boundary in the equivalent switching function of phase A within this region. The switching functions appearing in sectors III and IV of the left half-plane are only '0' and '1'. + (1 - At this time, the zero output voltage state of the two sub-inverters is selected as shown in Table 1. - This allows for the decoupling of the switching frequency of the switching transistors. The same principle applies to sector I and sector VI in the right half-plane.

[0079] Special attention needs to be paid to sectors II and V, which are located on the boundary line. In these two sectors, there are cases where the equivalent switching function is '2'. If '2' is selected... + 'or'2 - These two states must be used in pairs if they cause significant bridge voltage surges in a switching sequence. This means that the equivalent switching function of phase A will have '2'. + ' =>'2 - When the value of '' changes, both sub-inverters will experience a change in their output switching function from '2' to '0', meaning the switching frequencies of the switching transistors cannot be decoupled. Therefore, 2 + (2 -Neither of these two states should appear in the modulation sequence of a parallel HANPC three-level inverter, considering both bridge voltage surge and switching frequency decoupling. (Using '2') = The switching frequency can be decoupled by the state.

[0080] In this region, Si devices can operate at the base frequency, and SiC devices can operate at the switching frequency.

[0081] 2) Innermost layer ( Figure 5 As shown): In this region, the reference vector is... Figure 2 shown V 0~ V 2. Vector Synthesis. In this region, the equivalent switching functions of phase A in the left and right planes are essentially the same. The difference lies in that phase A in the left half-plane has a '0' state, while phase A in the right half-plane has a '4' state. This means that there is no inherent boundary line in this region similar to the outermost layer, but a custom boundary line can be defined by setting rules. For example, the fundamental frequency operation of the Si switch can be set, which means switching the clamping state every 180 degrees in the spatial vector diagram. That is, in the right half-plane of the spatial vector diagram, only the phase A switching function of '0' to '2' is selected. = The reference vector is synthesized from the vectors of ', and only the A-phase switch function is selected in the left half-plane. = The reference vector is synthesized using vectors from ' to '4'. Similarly, we can set the Si switch to operate once every 30° or 60°. These additional degrees of freedom can be utilized in other control objectives such as midpoint potential control to improve the quality of the output power.

[0082] In this region, Si devices can operate at any frequency (controllable), and SiC devices can operate at a switching frequency.

[0083] 3) Sub-outer layer ( Figure 5 As shown): In this region, the reference vector is... Figure 2 shown V 3~ V 9-vector synthesis. This region is related to... Figure 5 The regions shown are exactly the same, and the equivalent switching function of phase A has a clear dividing line.

[0084] 4) Sub-inner layer ( Figure 5 As shown): In this region, the reference vector is... Figure 2 shown V 1~ V 5. Vector synthesis. This region is related to... Figure 5 The regions shown are exactly the same, allowing Si devices to operate at arbitrary (controllable) frequencies and SiC devices to operate at switching frequencies.

[0085] In summary, the effect of decoupling the switching frequency of the parallel HANPC three-level inverter is as follows: Figure 6 As shown, Figure 6 The region in the middle can enable Si switches to operate at the base frequency and SiC switches to operate at a high frequency. Figure 6 The region in the middle can enable Si switches to operate at any set frequency, and SiC switches to operate at high frequency.

[0086] Imbalance in the neutral point potential of a three-level inverter can disrupt the sinusoidal symmetry of the output voltage and deteriorate the power quality of the inverter output. If the neutral point potential is not controlled, it can lead to a complete shift in the neutral point potential, damaging the DC capacitor and switching devices.

[0087] To analyze the impact of switching states on the midpoint potential, each phase bridge of the parallel HANPC three-level inverter can be equivalently represented as two single-pole three-throw switches. The equivalent circuit diagram of the three-level converter is shown below. Figure 7 As shown.

[0088] from Figure 7 As can be seen, the fluctuation of the capacitor's midpoint potential is caused by the midpoint current. i NP and DC filter capacitor C dc1 and C dc2 The magnitude of the fluctuation Δ at the midpoint potential is determined by the value of the fluctuation. V NP The rate of change can be expressed as (7) Since the size of the filter capacitor is fixed, the analysis of the midpoint current is straightforward. i NP What factors can suppress fluctuations in the midpoint potential?

[0089] Define the positive directions of the neutral point current and the three-phase output current of the converter as follows: Figure 7 As shown, analysis of the switching states reveals that the midpoint current of each phase bridge is jointly determined by the switching states of the two sub-inverters. The influence of the output vector of a single inverter on the midpoint potential is the same as that of a traditional three-level inverter. That is, (1) the zero vector and the large vector have no effect on the midpoint; (2) the medium vector causes low-frequency fluctuations with very small amplitude at the midpoint potential that are uncontrollable; (3) the two redundant switching states corresponding to the small vector affect the midpoint current. i NP The effect is the opposite; it is a controllable quantity for the midpoint current.

[0090] After analyzing the vectors in Tables 4 and 5, it is not difficult to find V 0, V 4, V 6,V 9, V 10 , V 11 , V 12 , V 13 and V 14 All switching states are composed of zero vector, medium vector and large vector, so these vectors do not cause a shift in the DC side midpoint potential; V 1, V 2, V 3 and V The redundant state of phase 5 involves switching states that introduce opposite neutral currents. Therefore, the neutral current introduced by the redundant vector within one switching cycle should be zero. Assuming the three-phase currents are sinusoidal and symmetrical, sampling is performed twice within one switching cycle. Although the neutral current introduced in each switching cycle is not zero, considering the symmetry of the three-phase currents, the DC-side voltage will remain constant within one fundamental cycle. V 7 and V 8. There are only two redundant switching states, and the neutral current introduced by the two switching states cannot cancel each other out within one switching cycle. In order to maintain the DC side neutral point voltage balance, V 7 and V 8 will be discarded.

[0091] Based on the above analysis, in order to satisfy the principle of combining similar vectors, the new spatial vector map is as follows: Figure 8 As shown.

[0092] Taking sector I as an example, Figure 8 middle D 1~ D 13 Both regions can achieve circulating current suppression and line voltage frequency doubling modulation. D 1~ D The 5-zone configuration enables bidirectional control of the midpoint potential and decoupling of the switching frequency of the switching transistor (the switching frequency of the Si switching transistor is controllable). D 6~ D 13 The region can achieve zero fluctuation of the fundamental frequency of the midpoint potential and decoupling of the switching frequency of the switching transistor (Si switching transistor switching fundamental frequency operation).

[0093] from Figure 8 It can be seen that the boundaries between the 13 communities are: Mark 1, Mark 2, Mark 3, Mark 4, Mark 5 and Mark 6. It is determined that the expressions for these boundaries are as follows: When 0 < θ When ≤ 30° (8) When 30° < θ When ≤ 60° (9) Comparison modulation ratio m The reference vector can be determined by the boundary conditions. V ref The specific cell location. The cell determination rules are shown in Table 6. Modulation ratio is defined. m as follows: (10) Table 6. Criteria for determining the partition where the reference vector is located

[0094] Within each sector, the reference vector is composed of three fundamental vectors. Based on the volt-second balance principle, the duration of action of the fundamental vectors within each sector can be calculated, as shown in Table 7.

[0095] Table 7. Formula for calculating the proportion of basic vector action time in each partition of sector I.

[0096] The modulation sequences between cells in sector I of the circulating current suppression frequency-doubled space vector modulation method considering midpoint potential control and switching frequency decoupling are shown in Table 8. Due to space limitations, '5' represents '2' in Table 8. = 'Status; Use '6' to represent '1' - '; Use '1' to represent '1' + '; Use '8' to represent '3' - '; Use '3' to represent '3' + '.

[0097] Table 8 Modulation sequences of each cell in sector I

[0098] In Table 8, the clamping state P indicates that the switching states of the two inverters' switching transistors at this time use '2' and '1' as shown in Table 1. + The reference vector is synthesized from two states. The clamping state N indicates the switching state of the two sub-inverters, using '0' and '1' as shown in Table 1. - 'The two states are used to synthesize the reference vector.'

[0099] The flag entries in Table 8 are flag bits used to label the switch sequence for midpoint potential control. It is easy to see... D1~ D Each of the nine regions has two complementary sequences, and D 10 ~ D 13 The region contains only one sequence. This is because of the observation... Figure 8 It is not difficult to see that as long as D 1~ D Since zone 9 has midpoint potential control capability, the modulation method proposed in this invention will only lose its midpoint potential control capability when the modulation degree is at its maximum under full modulation. However, this situation is rare in the actual operation of the inverter. D 10 ~ D 13 Not controlling the midpoint potential of a sector does not affect the midpoint potential control capability of the modulation algorithm proposed in this invention.

[0100] Define Δ u NP for Figure 7 The difference between the lower capacitor voltage and the upper capacitor voltage is shown. The flag bits corresponding to various midpoint potential conditions are shown in Table 9.

[0101] Table 9 Modulation sequences of the midpoint potential control algorithm for each cell in sector I.

[0102] Combining the contents of Tables 6-9 and as follows Figure 9 The algorithm flowchart shown can realize the integrated circulating current suppression frequency doubling space vector modulation method proposed in this invention, which considers midpoint potential control and switching frequency decoupling, and is applicable to parallel hybrid ANPC three-level inverters.

[0103] To verify the accuracy of the present invention, according to Figure 1 The P-HANPCTL inverter topology shown is built using a DSP / FPGA hardware platform as follows: Figure 10 The experimental platform shown is comprised of a TI DSP (TMS320F28346) and a Xilinx FPGA (XC6SLX25). Experimental parameters are shown in Table 10.

[0104] Table 10 Experimental Parameters

[0105] First, the three-phase output current and calculated circulating current waveforms of a single HANPC3L inverter at modulation indices of 0.2, 0.5, and 0.8 are shown below. Figure 11 As shown in (a)(b)(c).

[0106] from Figure 11From (a), it is easy to see that the output current amplitude of a single inverter is approximately 1.2A, and the output current amplitude of the parallel inverters is 2.4A. The circulating current fluctuates periodically and returns to zero in each switching cycle, with a maximum value of approximately 150mA. The amplitude of the circulating current is approximately 6.25% of the output current amplitude, indicating good circulating current suppression. Similarly... Figure 11 (b) and (c) show that when m=0.5, the amplitude of the circulating current is approximately 5.12% of the output current amplitude, and when m=0.8, the amplitude of the circulating current is approximately 3.85% of the output current amplitude. It can be seen that the suppression effect of the circulating current is better with the increase of the modulation index. This is mainly because the amplitude of the circulating current is limited by the modulation sequence design, and the amplitude does not change significantly with the increase of the modulation index.

[0107] To verify the effectiveness of the proposed modulation method for output current frequency multiplication and midpoint potential control, the output current and midpoint potential of the inverter were observed under different modulation indices. When the modulation indices were 0.2, 0.5, and 0.8 (with the switching frequency of the Si switching transistor set as the base frequency), the fluctuations in the output current and midpoint potential of the P-HANPC3L inverter were as follows: Figure 12 As shown in (a), (b), and (c), the FFT analysis diagrams of the phase A current under different modulation indices are as follows. Figure 13 As shown in (a)(b)(c).

[0108] from Figure 12 (a) It is easy to see that the maximum fluctuation of the midpoint potential at this time is about 0.51V, which is very small, and the midpoint potential control effect is very good. Moreover, it can be observed that the fluctuation of the midpoint potential will have a peak when the low-frequency Si tube switches, and the frequency of the peak is up to 100Hz. The time when the peak appears corresponds to the operation time of the low-frequency tube, indicating that the low-frequency tube is operating at a frequency of 50Hz at this time. Figure 12 (b) It can be seen that the fluctuation of the midpoint potential at this time is also about 0.52V, and the frequency of the midpoint potential peak is 100Hz. Figure 12 (c) It can be seen that there is a very small low-frequency fluctuation in the midpoint potential at this time, which is approximately 0.65V. In summary... Figure 12 The midpoint potential fluctuations in (a), (b), and (c) show that the fluctuations in the inverter's midpoint potential during the experiment are consistent with the theoretical analysis above, proving that the modulation method proposed in this invention can effectively control the midpoint potential fluctuations.

[0109] observe Figure 13It is easy to see from (a)(b)(c) that under the three different modulation schemes, the harmonics of the inverter output current are mainly concentrated around 4.8kHz, while the harmonics around the switching frequency of 2.4kHz are basically non-existent. This proves that the modulation method proposed in this invention can increase the equivalent switching frequency of the inverter output current to twice the switching frequency.

[0110] Finally, to verify that the modulation method proposed in this invention can achieve decoupling of the switching frequencies of the switching transistors, the switching operations of all switching transistors in the inverter were observed. From the above analysis, it can be seen that when 0 ≤ m < 0.5, the switching frequency of the Si switching transistor can be freely set. When 0.5 ≤ m < 1, the switching frequency of the Si switching transistor is the fundamental frequency.

[0111] When m=0.2 and the operating frequency of the Si switch is set to 150Hz (3 times the base frequency), the switching actions of the A-phase switches of the two sub-inverters of the P-HANPC3L inverter are as follows: Figure 14 As shown in (a). When the operating frequency of the Si switch is set to 50Hz (base frequency), the switching operations of the A-phase switches of the two sub-inverters are as follows: Figure 14 As shown in (b).

[0112] from Figure 14 As can be seen from (a), Figure 1 The Si-IGBT shown has a maximum switching frequency of 150Hz. It doesn't operate continuously at 150Hz because when the low-frequency transistor can operate, the direction of the midpoint potential shift is the same as the previous cycle. Therefore, the clamping situation of the low-frequency transistor is the same for both cycles. Meanwhile, the SiC switch operates 48 times per cycle, which is equivalent to a switching frequency of 2.4kHz. From... Figure 14 As can be seen in (b), Si switches operate at the base frequency while SiC switches operate at the switching frequency.

[0113] When m=0.8, the switching action of the A-phase switching transistors of the two sub-inverters of the P-HANPC3L inverter is as follows: Figure 15 As shown.

[0114] from Figure 15 It can be seen that when m=0.8, the Si switch operates at the fundamental frequency, while the SiC switch operates at the switching frequency. Combined with... Figure 14 and Figure 15 It can be proven that the modulation method proposed in this invention can achieve decoupling of the switching frequency of the inverter switching transistor.

[0115] To address the problems of low switching frequency and difficulty in current amplification in high-power inverters, this invention proposes a novel parallel hybrid ANPC three-level inverter and an integrated circulating current suppression frequency doubling space vector modulation method suitable for this inverter, which considers midpoint potential control and switching frequency decoupling.

[0116] This invention achieves frequency multiplication of the output line voltage through the rational arrangement of redundant vectors. Then, by deriving and analyzing the circulating current of the parallel inverter, a selection principle for redundant vectors is obtained, and the redundant vectors are selected according to this principle. Based on this, the influencing factors of the midpoint potential of the P-HANPC3L inverter are analyzed, and the space vectors are further selected. The integrated space vector diagram of the parallel three-level inverter is reconstructed based on the selection results. After summarizing and analyzing the switching states of the space vector diagram, it is found that the P-HANPC3L inverter can achieve different switching frequency decoupling for different modulation indices. Finally, this finding is incorporated into the reconstructed integrated space vector diagram of the P-HANPC3L inverter, proposing a novel space vector modulation method. The proposed novel integrated space vector modulation method can achieve output line voltage frequency multiplication and switching frequency decoupling while suppressing circulating current and midpoint potential fluctuations.

[0117] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. A method for suppressing and modulating frequency doubling circulating current in a parallel hybrid ANPC three-level inverter, characterized in that, Includes the following steps: Construct an inverter system model, which is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point. The output voltage model of the parallel inverter is established based on the switching functions of each bridge arm in the inverter system model, and the equivalent switching state of the parallel inverter is determined. Based on the output voltage model of the parallel inverter, the circulating current expression of the parallel system is derived, and the circulating current factor is defined to characterize the circulating current variation between the parallel inverters. The spatial vectors are filtered based on the circulation factor to obtain a set of spatial vectors that satisfy the circulation suppression condition; Sector reconstruction is performed on the spatial vector set to obtain a reference vector, and the vector combination is determined based on the position of the reference vector; Calculate the action time of each vector in the vector combination, and construct a space vector modulation sequence based on the action time of each vector; Based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model, redundant switching states are selected, and midpoint potential control is performed. Space vector modulation sequence control is used to control the inverter switching devices.

2. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, The hybrid ANPC three-level inverter includes SiC-MOSFET devices and Si-IGBT devices. The SiC-MOSFET devices are used for high-frequency switching, and the Si-IGBT devices are used for low-frequency switching.

3. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, The bridge arm switching function is used to represent the on-state of the inverter bridge arm. The equivalent multilevel output state of the parallel inverter is determined based on the bridge arm switching function. The output voltage model of the parallel inverter is established based on all the equivalent multilevel output states of the parallel inverter.

4. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, The circulation factor is: S cz = S a2 + S b2 + S c2 - S a1 - S b1 - S c1 in, S a1 For the switching function of phase a of the first inverter, S b1 For the switching function of phase b of the first inverter, S c1 For the c-phase switching function of the first inverter, S a2 For the switching function of phase a of the second inverter, S b2 For the switching function of phase b of the second inverter, S c2 This is the switching function for phase c of the second inverter.

5. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, When filtering spatial vectors based on circulation factors, vectors with circulation factors of 0 and ±1 are selected as modulation vectors.

6. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, When reconstructing sectors of a spatial vector set, the partition where the reference vector is located is determined based on the reference voltage vector angle and the modulation index.

7. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, When calculating the duration of action of each vector in the vector combination, a reference vector is synthesized by three spatial vectors in each partition, and the duration of action of each vector in the vector combination within one switching cycle is calculated according to the volt-second balance principle.

8. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, When space vector modulation sequence control is used to control the switching devices of the inverter, the output line voltage is multiplied by changing the arrangement order of redundant switching states so that the output line voltage changes twice within one switching cycle.

9. The method for frequency doubling circulating current suppression modulation of a parallel hybrid ANPC three-level inverter according to claim 1, characterized in that, When using space vector modulation sequence control for inverter switching devices, the hybrid ANPC three-level inverter is controlled by space vector modulation sequence to perform switching operations at the base frequency or a set frequency, while simultaneously controlling the hybrid ANPC three-level inverter to perform switching operations at the switching frequency, thereby decoupling the switching frequencies of the switching devices.

10. A parallel hybrid ANPC three-level inverter frequency doubling circulating current suppression modulation system, characterized in that, Includes the following steps: The inverter system model building module is used to build an inverter system model. The inverter system model is formed by connecting at least two hybrid ANPC three-level inverters in parallel. All hybrid ANPC three-level inverters share a DC bus and are connected to the AC side common point. The switch state acquisition module is used to establish the output voltage model of the parallel inverter based on the switching functions of each bridge arm in the inverter system model, and to determine the equivalent switch state of the parallel inverter. The circulating current factor acquisition module is used to derive the circulating current expression of the parallel system based on the output voltage model of the parallel inverters, and to define the circulating current factor to characterize the circulating current variation between the parallel inverters. The spatial vector set acquisition module is used to filter spatial vectors according to the circulation factor to obtain a spatial vector set that meets the circulation suppression condition; The vector combination acquisition module is used to reconstruct the spatial vector set by sector to obtain the reference vector, and determine the vector combination based on the position of the reference vector. The modulation sequence acquisition module is used to calculate the action time of each vector in the vector combination and construct a space vector modulation sequence based on the action time of each vector. The switching control module is used to select redundant switching states and perform midpoint potential control based on the DC-side capacitor voltage difference and three-phase output current of the inverter system model. It uses space vector modulation sequence control to control the inverter switching devices.

Images