Time synchronization method, system, vehicle and device of vehicle
By establishing a time base through a primary synchronization node and a backup synchronization node, microsecond-level unified time synchronization of multiple on-chip systems in a vehicle is achieved, solving the problems of high hardware cost and high wiring complexity in existing technologies, and improving the reliability and security of the system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ANHUI DEEPWAY TECHNOLOGY CO LTD
- Filing Date
- 2026-03-25
- Publication Date
- 2026-06-19
AI Technical Summary
The existing time synchronization methods for various electronic control units in vehicles suffer from high hardware costs, high wiring complexity, and high deployment difficulty. In particular, under a multi-SOC architecture, the complexity of PPS allocation lines increases significantly, reducing system reliability.
The system uses a primary synchronization node to obtain time information from the global navigation satellite system, constructs a time reference, and achieves time synchronization of multiple on-chip systems through a microsecond-level time accumulator and a smoothing compensation mechanism. A backup synchronization node is introduced to ensure the high reliability and time continuity of the system.
It achieves a microsecond-level unified time base for multiple on-chip systems in vehicles, significantly reducing hardware costs and wiring complexity, supporting high-precision time synchronization between heterogeneous multiprocessors, and is easy to deploy in existing automotive electronic architectures, thereby improving system reliability and functional safety levels.
Smart Images
Figure CN122247545A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of vehicle technology, and in particular to a method, system, vehicle, and device for time synchronization of vehicles. Background Technology
[0002] In related technologies, time synchronization methods for various electronic control units in vehicles, such as on-chip systems, include synchronization methods using IEEE 1588 PTP precision clock synchronization, frequency synchronization technology based on the physical layer of Synchronous Ethernet (SyncE), and synchronization strategies using direct GNSS + SOC connection. The following technical problems exist: IEEE 1588 PTP precision clock synchronization has high hardware platform requirements, significantly increasing system costs. SyncE (Synchronous Ethernet) requires end-to-end physical layer support, with stringent deployment conditions. In-vehicle Ethernet systems generally suffer from heterogeneous devices and diverse topologies, making it difficult to guarantee end-to-end synchronization capabilities and resulting in extremely high deployment difficulty. The GNSS + SOC direct connection solution has extremely high cabling complexity under a multi-SOC architecture. In this solution, each SOC needs to independently connect to the GNSS PPS signal and independently connect to the GNSS NMEA data interface. As the number of SOCs increases, the PPS distribution lines multiply, serial signals need to be distributed in parallel, and PCB routing and wiring harness complexity significantly increases. This increases system costs and reduces the overall vehicle reliability. Summary of the Invention
[0003] Based on this, it is necessary to provide a vehicle time synchronization method, system, vehicle, and device to address the above-mentioned technical problems, so as to realize a unified time reference at the microsecond level for multiple on-chip systems in the vehicle, significantly reduce hardware costs and wiring complexity, and allow the master synchronization node to directly participate in and lead the time synchronization system, which is easy to deploy in existing vehicle electronic architectures.
[0004] Firstly, a time synchronization method for a vehicle is provided, the vehicle including a master synchronization node and multiple on-chip systems, the time synchronization method comprising: The primary synchronization node obtains time information from the global navigation satellite system; The primary synchronization node constructs a time base based on the time information; Upon receiving a time synchronization request from at least one of the multiple on-chip systems, the time base is synchronized to the on-chip system. The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference. The on-chip system compensates for the local time based on the time deviation.
[0005] In some examples, the time information includes a PPS pulse signal and a time message signal, wherein the rising edge of the PPS pulse signal is aligned with the UTC second boundary, and the time message signal includes the UTC second value, date information, location, and validity identifier.
[0006] In some examples, the primary synchronization node constructs a time base based on the time information, including: The master synchronization node captures the rising edge of the PPS pulse signal and aligns the rising edge of the PPS pulse signal with the UTC second boundary; The primary synchronization node parses the time message signal to obtain the UTC second value; The time base is constructed by associating the UTC second boundary with the UTC second value.
[0007] In some examples, the on-chip system determines the time deviation based on the transmission time of the synchronization request and the reception time of the time reference, including: The on-chip system obtains the round-trip delay based on the time of sending the synchronization request and the time of receiving the time base. The time deviation is obtained based on the round-trip delay and the time reference.
[0008] In some examples, the on-chip system compensates for the local time based on the time deviation, including: The local time of the on-chip system is compensated by the time deviation using a preset smoothing compensation mechanism, wherein the compensation includes phase compensation and frequency compensation.
[0009] In some examples, the vehicle also includes a backup synchronization node, which performs time synchronization with the primary synchronization node. When the primary synchronization node is normal, it performs time synchronization for each on-chip system. When the primary synchronization node is abnormal, the backup synchronization node takes over from the primary synchronization node to perform time synchronization for each on-chip system.
[0010] Secondly, a vehicle time synchronization system is provided, including a master synchronization node and multiple on-chip systems, wherein: The primary synchronization node is used to obtain time information from the global navigation satellite system, construct a time reference based on the time information, and synchronize the time reference to the on-chip system after receiving a time synchronization request from at least one on-chip system among multiple on-chip systems. The on-chip system is used to determine the time deviation based on the sending time of the synchronization request and the receiving time of the time reference, and to compensate the local time based on the time deviation.
[0011] Thirdly, a vehicle is provided, comprising: a time synchronization system for the vehicle according to the second aspect described above.
[0012] Fourthly, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the steps of the vehicle time synchronization method described in the first aspect and any possible implementation of the first aspect.
[0013] Fifthly, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps of the vehicle time synchronization method of the first aspect and any possible implementation thereof.
[0014] Sixthly, a computer program product is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the vehicle time synchronization method of the first aspect and any possible implementation thereof.
[0015] The embodiments of this application realize a microsecond-level unified time base for multiple on-chip systems in a vehicle, meet the high-precision time synchronization requirements between heterogeneous multiprocessors, significantly reduce hardware costs and wiring complexity, and the master synchronization node can directly participate in and lead the time synchronization system, which is easy to deploy in existing vehicle electronic architecture. Attached Figure Description
[0016] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 A flowchart of a vehicle time synchronization method provided in an embodiment of this application; Figure 2 A structural block diagram of a vehicle time synchronization system provided in an embodiment of this application; Figure 3 This is a structural block diagram of a computer device provided in an embodiment of this application. Detailed Implementation
[0017] The present application will now be described in further detail with reference to the embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the application. Furthermore, it should be noted that, for ease of description, only the parts relevant to the application are shown in the accompanying drawings.
[0018] It should be noted that, unless otherwise specified, the embodiments and features of the embodiments in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.
[0019] The following describes in detail, with reference to the accompanying drawings, a vehicle time synchronization method, system, vehicle, and device according to embodiments of this application.
[0020] The vehicle includes a main synchronous node MCU (Microcontroller Unit) and multiple system-on-chip (SoC) chips.
[0021] Figure 1 This is a flowchart of a vehicle time synchronization method according to an embodiment of this application. Figure 1 As shown, the vehicle time synchronization method according to an embodiment of this application includes the following steps: S101: The primary synchronization node obtains time information from the global navigation satellite system.
[0022] In one embodiment of this application, the time information includes a PPS pulse signal and a time message signal, wherein the rising edge of the PPS pulse signal is aligned with the UTC second boundary, and the time message signal includes a UTC second value, date information, location, and validity identifier.
[0023] Specifically, the Global Navigation Satellite System (GNSS) provides an external absolute time reference. The GNSS provides at least two types of time signals to the primary synchronization node (MCU): Pulse Per Second (PPS) signals and time message signals. PPS (Pulse Per Second) signal: GNSS periodically outputs PPS pulse signals. The rising edge of the PPS pulse signal is aligned with the UTC second boundary and has the following characteristics: The pulse period is stable, with an error typically less than 100 ns; Strong anti-shake capability; It can be used as a high-precision hardware second reference.
[0024] The time message signal is a GNSS synchronous output message data containing time information, including UTC seconds, date information, and positioning and validity indicators. GPRMC (Minimum Positioning Information); GPGGA (Global Positioning System Positioning Data).
[0025] S102: The master synchronization node constructs a time reference based on the time information.
[0026] In one embodiment of this application, the primary synchronization node constructs a time base based on the time information, including: the primary synchronization node capturing the rising edge of the PPS pulse signal and aligning the rising edge of the PPS pulse signal with the UTC second boundary; the primary synchronization node parsing the time message signal to obtain the UTC second value; and associating the UTC second boundary with the UTC second value to construct the time base.
[0027] Specifically, this includes hardware connection and interface configuration, PPS rising edge capture and second boundary marking, GNSS time message parsing, PPS and UTC time binding mechanism, construction of microsecond-level time accumulator, and generation of a continuous, monotonically increasing master time base, among which: Hardware connection and interface configuration: The MCU is simultaneously connected to the GNSS PPS signal output port and the time data communication interface. The hardware input acquisition unit and the high-resolution counter are both driven by the same clock source to ensure consistency in time measurement. Specifically: The PPS signal is connected to the MCU via GPIO or a dedicated timer input pin; The time data interface can be UART, SPI, I²C, CAN, or other serial communication interfaces; The MCU is internally configured with a hardware input capture unit for high-precision capture of the rising edge of the PPS. The MCU is internally configured with a high-resolution timer or free-running counter for time-division counting.
[0028] The PPS rising edge captures and marks the second boundary. The GNSS periodically outputs the PPS pulse signal, whose rising edge is strictly aligned with the UTC second boundary. The MCU uses a hardware input capture mechanism, which is completed at the hardware level. This effectively avoids errors caused by interrupt latency and software scheduling jitter, thereby achieving sub-microsecond second boundary positioning accuracy. The following operations are performed each time the PPS rising edge arrives: Capture the current count value of the high-resolution counter; Record this count value as the starting reference point for the current UTC second; Generates a PPS capture event flag for subsequent time binding processing.
[0029] GNSS time message parsing: The MCU continuously receives time messages such as GPRMC and GPGGA from the GNSS module via the time data interface. The MCU can obtain the absolute UTC time information corresponding to the PPS pulse. The MCU performs the following parsing steps on the GPRMC message: Verify message integrity and checksum; Extract the UTC time field, including hour, minute, second, and date information; Determine the validity of the time indicator to confirm that the GNSS is in a valid positioning and timing state; The parsed UTC second value is cached in the time binding module.
[0030] The PPS and UTC time binding mechanism associates the PPS second boundary with the UTC second value because the PPS signal itself does not contain second value information: Upon receiving a valid GPRMC message, record the UTC second value it indicates; Correlate the UTC second value with the most recently captured PPS rising edge in time; Confirm the correspondence between PPS and UTC second values to establish a second-level time base; If there is a delay or brief loss of time messages within a continuous PPS period, the MCU can use the binding relationship of the previous second to recursively calculate and ensure time continuity.
[0031] The construction of the microsecond-level time accumulator involves the MCU using its internal high-precision timer or free-running counter after establishing the second-level time base. The timer operates at a fixed frequency, such as 1 MHz or higher; The timer is reset or reference calibration is performed on each rising edge of PPS; Within the PPS cycle, the timer count value serves as the sub-second time offset; Seconds field: Based on GNSS UTC seconds value; Microsecond field: The accumulated value of the timer based on PPS.
[0032] The CU continuously executes the following logic during system operation to generate a continuously, monotonically increasing master time base: Update the seconds field each time a PPS arrives; Time is continuously advanced using a microsecond accumulator within the PPS interval; Ensure that the timestamps are monotonically increasing, without rollback or jumps; When a GNSS time anomaly or PPS loss is detected, the MCU automatically switches to timekeeping mode, pauses the second field update, and continues to advance the time based on the microsecond counter until GNSS is restored.
[0033] S103: After receiving a time synchronization request from at least one of the multiple on-chip systems, synchronize the time base to the on-chip system.
[0034] In other words, the system-on-chip (SoC) sends a time synchronization request to the MCU. Specifically, the SoC initiates the time synchronization request to the MCU periodically or through event-triggered methods, including the following: Initial time calibration after system startup; Periodic time correction; Local time drift exceeding the threshold was detected; Realign after switching between primary and backup MCUs.
[0035] The time synchronization request message content, the time synchronization request message sent by the SOC, includes at least: Message sequence number; Send the timestamp at local time; SOC identification information; Validation fields; The message was sent to the MCU via Ethernet.
[0036] When the MCU receives a time synchronization request message from the SOC via Ethernet, it performs the following steps: In the message receiving and processing flow, the current master time base is read; The primary time reference is encapsulated as a timestamp in the form of seconds and microseconds; Attach master time status information to the response message, including GNSS lock status, timekeeping status, etc. The time synchronization response message is returned to the corresponding SOC via Ethernet.
[0037] The MCU's main time base is calibrated by GNSS PPS and driven by a high-precision counter, generating timestamps with absolute time attributes and microsecond-level resolution. S104: The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference.
[0038] In one embodiment of this application, the system-on-chip determines the time deviation based on the transmission time of the synchronization request and the reception time of the time reference, including: the system-on-chip obtains the round-trip delay based on the transmission time of the synchronization request and the reception time of the time reference; and obtains the time deviation based on the round-trip delay and the time reference.
[0039] Specifically, when the SOC receives the time synchronization response message returned by the MCU, it records the local time reception time Ts2.
[0040] The SOC calculates the round-trip time based on the MCU master timestamp Tm carried in the response message: RTT= Ts2 Ts1 Assuming the uplink and downlink delays of the Ethernet link are approximately symmetrical, the SOC further calculates the time deviation between its local time and the MCU's master time: ΔT = Tm + RTT / 2 Ts2 Where ΔT represents the offset of the SOC's local time relative to the MCU's main time base, i.e., the time deviation.
[0041] S105: The on-chip system compensates for the local time based on the time deviation.
[0042] In one embodiment of this application, the on-chip system compensates for the local time based on the time deviation, including: compensating for the local time of the on-chip system through the time deviation using a preset smoothing compensation mechanism, wherein the compensation includes phase compensation and frequency compensation.
[0043] To avoid jumps caused by directly modifying the time, a software smoothing compensation method is used to correct the SOC local time in this specific example. This includes phase compensation, frequency compensation, and filtering and stabilization control. Phase compensation refers to the process of breaking down a large time deviation into multiple small adjustments when a large time deviation is detected, and gradually correcting the local time offset over multiple synchronization cycles.
[0044] Frequency compensation refers to: when a continuous drift trend of the SOC local clock is detected, fine-tuning the frequency of the local timer or system clock; so that the SOC local time is locked to the MCU master time for a long time.
[0045] Filtering and stability control refers to the SOC filtering the results of multiple synchronizations, including the following methods: Mean filtering; Weighted moving average; Digital phase-locked loop (DPLL) model.
[0046] In one embodiment of this application, the time correction further includes periodic synchronization and continuous correction, that is, during operation, ensuring that the SOC can maintain high-precision consistency with the MCU time reference even under long-term operation and different load conditions, specifically including: The SOC continuously sends time synchronization requests to the MCU at preset intervals; The MCU periodically broadcasts timestamp information; The SOC integrates request / response and broadcast information to continuously correct the local time.
[0047] In one embodiment of this application, the vehicle further includes a backup synchronization node, which is time-synchronized with the primary synchronization node. When the primary synchronization node is normal, it performs time synchronization for each on-chip system. When the primary synchronization node is abnormal, the backup synchronization node takes over from the primary synchronization node to perform time synchronization for each on-chip system.
[0048] Specifically, a dual-MCU hot standby architecture is introduced, including: Master MCU: responsible for receiving GNSS time, building the master time base and providing time synchronization services to the outside world; Backup MCU: maintains time consistency synchronization with the master MCU under normal conditions, and automatically takes over the master time synchronization function when the master MCU fails or malfunctions.
[0049] The main MCU and the backup MCU communicate bidirectionally via a dedicated communication link or vehicle Ethernet to achieve real-time interaction of time, status and health information.
[0050] Role division and operating modes of primary and backup MCUs, normal operating mode (primary control mode): The main MCU receives the PPS signal and time message output by the GNSS module; The main MCU establishes the vehicle's unique time base; The main MCU provides time synchronization services to each SOC; The backup MCU does not provide time services to the SOC; it only operates as a time backup node.
[0051] Synchronous standby mode (hot standby mode): The backup MCU continuously receives time synchronization information from the master MCU; The backup MCU synchronously maintains the master time base and the replica status; The backup MCU monitors the operating status and time status of the main MCU.
[0052] The backup MCU has the ability to take over the role of the master time node at any time.
[0053] The master / slave time consistency synchronization mechanism periodically synchronizes the following information from the master MCU to the standby MCU: Current main timestamp (seconds + microseconds); GNSS locked state; PPS capture status; Timekeeping mode parameters; Main MCU health status information; Synchronization method: The primary MCU sends a time synchronization message to the backup MCU via Ethernet or a dedicated link. The backup MCU then performs the following operations based on the received time information: Calibrate its own local time base; Compare the time deviations and perform smoothing compensation; Ensure that the time error with the main MCU is kept within a preset threshold; The main MCU fault detection mechanism allows the backup MCU to detect the status of the main MCU through one or more of the following methods: Periodic heart rate monitoring; Main MCU time broadcast loss detection; Master time drift anomaly detection; The main MCU self-diagnostic status is reported.
[0054] When an abnormality or fault is detected in the main MCU, the backup MCU enters the main control takeover decision process.
[0055] Primary / standby failover and seamless takeover mechanism. Primary / standby failover can be triggered by one of the following conditions: Main MCU heartbeat timeout; The main MCU lost GNSS lock and could not keep time. Main MCU software or hardware failure; The main MCU is experiencing a timeout error.
[0056] After confirming a failure in the primary MCU, the backup MCU performs the following operations: Switch your own role to the main time point; Enable GNSS time reception or continue advancing time based on timekeeping parameters; Broadcast the new master time service status to the outside world; Notify the SOC of the main time node switching information.
[0057] To ensure time continuity during primary / standby switchover and avoid time rollback or abrupt changes caused by the switchover, this application adopts the following measures: The primary and backup MCUs have maintained a high degree of time consistency before the switchover; During the switchover, the process will continue based on the current time of the MCU. The SOC identifies the handover process through time status indicators; The time compensation algorithm smoothly absorbs small deviations.
[0058] High reliability support in GNSS abnormal scenarios, when GNSS signal is abnormal: The main MCU or backup MCU automatically enters standby mode; Continue to provide time synchronization services to the SOC; Mark the current reliability level.
[0059] After GNSS recovery: Execution time realignment; Smoothing eliminates time-drift; Ensure time consistency.
[0060] With dual MCU hot standby and high reliability design, the time synchronization system has no single point of failure; it meets the requirements of intelligent driving systems for time continuity and safety; it improves system robustness and availability; and it supports safety design requirements.
[0061] The vehicle time synchronization method described in this application achieves a vehicle-wide time synchronization accuracy of ±1 μs. Through PPS capture, microsecond-level counters, and network compensation algorithms, microsecond-level time consistency among multiple System-on-Chips (SOCs) is achieved. The MCU serves as the primary synchronizer, supporting one or more SOCs. With the MCU acting as a unified time source, the number of SOCs is unlimited, and the system exhibits excellent scalability. Based on standard Ethernet, it eliminates the need for hardware timestamps, avoiding the high-cost hardware requirements of IEEE 1588 and SyncE, and is compatible with existing automotive Ethernet platforms. It supports a timekeeping mode after PPS failure, ensuring system time continuity and availability during GNSS anomalies. It supports automatic hot standby switching between dual MCUs, significantly improving system reliability and functional safety levels. It supports time status identification, anomaly detection, fault switching, and system-level monitoring, making it suitable for intelligent driving applications.
[0062] The vehicle time synchronization method according to the embodiments of this application realizes a microsecond-level unified time base for multiple on-chip systems in the vehicle, significantly reducing hardware costs and wiring complexity. The master synchronization node can directly participate in and lead the time synchronization system, and it is easy to deploy in existing vehicle electronic architectures.
[0063] Figure 2 This is a structural block diagram of a vehicle time synchronization system according to an embodiment of this application. Figure 2 As shown, a vehicle time synchronization system according to an embodiment of this application includes: a master synchronization node 210 and multiple on-chip systems 220, wherein: The primary synchronization node 210 is used to obtain time information from the global navigation satellite system, construct a time reference based on the time information, and synchronize the time reference to the on-chip system after receiving a time synchronization request sent by at least one on-chip system among multiple on-chip systems. The on-chip system 220 is used to determine the time deviation based on the transmission time of the synchronization request and the reception time of the time reference, and to compensate the local time based on the time deviation.
[0064] The vehicle time synchronization system according to the embodiments of this application realizes a microsecond-level unified time base for multiple on-chip systems in the vehicle, significantly reducing hardware costs and wiring complexity. The master synchronization node can directly participate in and lead the time synchronization system, and it is easy to deploy in existing vehicle electronic architectures.
[0065] Specific limitations regarding the vehicle time synchronization system can be found in the limitations of the vehicle time synchronization method described above, and will not be repeated here. The various modules of the aforementioned vehicle time synchronization system can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the corresponding operations of each module.
[0066] Furthermore, a vehicle is provided, comprising: a time synchronization system for the vehicle according to any of the above embodiments. This vehicle implements a microsecond-level unified time base for multiple on-chip systems, significantly reducing hardware costs and wiring complexity. The master synchronization node can directly participate in and lead the time synchronization system, making it easy to deploy in existing vehicle electronic architectures.
[0067] Furthermore, other components and functions of the vehicle according to the embodiments of this application are known to those skilled in the art and will not be described in detail here.
[0068] In one embodiment, a computer device is provided. Figure 3 This is a structural block diagram of the computer device provided in the embodiments of this application, with reference to... Figure 3 The computer device includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the aforementioned vehicle time synchronization method embodiment. For example, it executes: the primary synchronization node obtains time information from the Global Navigation Satellite System; The primary synchronization node constructs a time base based on the time information; Upon receiving a time synchronization request from at least one of the multiple on-chip systems, the time base is synchronized to the on-chip system. The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference. The on-chip system compensates for the local time based on the time deviation.
[0069] This application also provides a computer-readable storage medium storing a computer program. When the processor executes the computer program, it implements the aforementioned vehicle time synchronization method embodiment. For example, it executes: the primary synchronization node obtains time information from the Global Navigation Satellite System; The primary synchronization node constructs a time base based on the time information; Upon receiving a time synchronization request from at least one of the multiple on-chip systems, the time base is synchronized to the on-chip system. The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference. The on-chip system compensates for the local time based on the time deviation.
[0070] This application provides a computer program product including instructions that, when executed, cause the method described in this application embodiment to be performed. For example, it can execute... Figure 1 The various steps of the vehicle time synchronization method shown include, for example, the primary synchronization node obtaining time information from the Global Navigation Satellite System; The primary synchronization node constructs a time base based on the time information; Upon receiving a time synchronization request from at least one of the multiple on-chip systems, the time base is synchronized to the on-chip system. The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference. The on-chip system compensates for the local time based on the time deviation.
[0071] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the methods described above. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.
[0072] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0073] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for time synchronization of vehicles, characterized in that, The vehicle includes a master synchronization node and multiple on-chip systems, and the time synchronization method includes: The primary synchronization node obtains time information from the global navigation satellite system; The primary synchronization node constructs a time base based on the time information; Upon receiving a time synchronization request from at least one of the multiple on-chip systems, the time base is synchronized to the on-chip system. The on-chip system determines the time deviation based on the time of sending the synchronization request and the time of receiving the time reference. The on-chip system compensates for the local time based on the time deviation.
2. The vehicle time synchronization method according to claim 1, characterized in that, The time information includes a PPS pulse signal and a time message signal, wherein the rising edge of the PPS pulse signal is aligned with the UTC second boundary, and the time message signal includes the UTC second value, date information, location and validity identifier.
3. The vehicle time synchronization method according to claim 2, characterized in that, The primary synchronization node constructs a time base based on the time information, including: The master synchronization node captures the rising edge of the PPS pulse signal and aligns the rising edge of the PPS pulse signal with the UTC second boundary; The primary synchronization node parses the time message signal to obtain the UTC second value; The time base is constructed by associating the UTC second boundary with the UTC second value.
4. The vehicle time synchronization method according to claim 1, characterized in that, The on-chip system determines the time deviation based on the transmission time of the synchronization request and the reception time of the time reference, including: The on-chip system obtains the round-trip delay based on the time of sending the synchronization request and the time of receiving the time base. The time deviation is obtained based on the round-trip delay and the time reference.
5. The vehicle time synchronization method according to claim 1, characterized in that, The on-chip system compensates for the local time based on the time deviation, including: The local time of the on-chip system is compensated by the time deviation using a preset smoothing compensation mechanism, wherein the compensation includes phase compensation and frequency compensation.
6. The vehicle time synchronization method according to claim 1, characterized in that, The vehicle also includes a backup synchronization node, which performs time synchronization with the primary synchronization node. When the primary synchronization node is normal, it performs time synchronization for each on-chip system. When the primary synchronization node is abnormal, the backup synchronization node takes over from the primary synchronization node to perform time synchronization for each on-chip system.
7. A vehicle time synchronization system, characterized in that, Includes a master synchronization node and multiple on-chip systems, among which: The primary synchronization node is used to obtain time information from the global navigation satellite system, construct a time reference based on the time information, and synchronize the time reference to the on-chip system after receiving a time synchronization request from at least one on-chip system among multiple on-chip systems. The on-chip system is used to determine the time deviation based on the sending time of the synchronization request and the receiving time of the time reference, and to compensate the local time based on the time deviation.
8. A vehicle, characterized in that, include: The vehicle time synchronization system according to claim 7.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the vehicle time synchronization method according to any one of claims 1-6.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the vehicle time synchronization method according to any one of claims 1-6.