Image sensing device and imaging system including the same

Abstract

An image sensing device and an imaging system are disclosed. In one embodiment, an image sensing device includes: a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, and the second pixel including a second active region having a second region size smaller than the first region size. Each of the first pixel and the second pixel may include an avalanche diode, an anti-reflective layer disposed on the avalanche diode, and a light-receiving pattern disposed on the anti-reflective layer.

Description

Technical Field

[0001] The technologies and embodiments disclosed in this patent document generally relate to image sensing devices and imaging systems including the same. Background Technology

[0002] Recently, Time-of-Flight (TOF) technology has received significant attention. TOF involves illuminating an object with pulsed light from a light source located in or around a sensor, receiving the reflected light, and measuring the round-trip time. This time measurement is used to determine the distance between the object and the light source based on the principle of the constant speed of light. To ensure accurate TOF measurements, an immediate reaction is required when the reflected light is detected by the light-receiving element. Therefore, highly sensitive photoelectric conversion elements are necessary. For this purpose, single-photon avalanche diodes (SPADs) fabricated using CMOS process technology have been actively researched and developed. Summary of the Invention

[0003] The disclosed techniques can be implemented in some embodiments to provide an image sensing device designed to receive light and measure the distance to a target object based on illuminance-selective high-sensitivity single-photon avalanche diode (SPAD) or low-sensitivity SPAD.

[0004] The disclosed technology can also be implemented in some embodiments to provide an imaging system designed to select a high-sensitivity SPAD and a low-sensitivity SPAD based on illumination, and to measure the distance to the target object by using a second beam reflected from the target object through one of the high-sensitivity SPAD and the low-sensitivity SPAD to illuminate a first beam of light onto the target object using a light source.

[0005] The disclosed techniques can also be implemented in some embodiments to provide an imaging system designed to solve other problems beyond those described above.

[0006] In embodiments of the disclosed technology, an image sensing device may include: a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, and the second pixel including a second active region having a second region size smaller than the first region size. Each of the first pixel and the second pixel may include an avalanche diode, an anti-reflective layer disposed on the avalanche diode, and a light-receiving pattern disposed on the anti-reflective layer.

[0007] In another embodiment, an imaging system may include: a light source configured to emit a first light beam toward a target object; and an image sensing device including a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, and the second pixel including a second active region having a second region size smaller than the first region size. Each of the first pixel and the second pixel can receive a second light beam reflected by the target object, and the first pixels of the first pixel group and the first pixels of the second pixel group can be configured to be adjacent to each other, and the second pixels of the first pixel group and the second pixels of the second pixel group can be configured to be adjacent to each other.

[0008] In some implementations, a first pixel group and a second pixel group are included. Each pixel group includes a first pixel having a first region size and a second pixel having a second region size smaller than the first region size. The first pixel and the second pixel (SP) of each pixel group are selectively turned on / off based on the illuminance value of the environment surrounding the image sensing device. For example, when the illuminance value is equal to or greater than a reference illuminance value, the second pixel of each pixel group is turned on and receives light reflected by the target object, and when the illuminance value is less than the reference illuminance value, the first pixel (SP) of each pixel group is turned on and receives light reflected by the target object. In this way, the distance to the target object can be measured more accurately by taking into account the illuminance of the environment surrounding the image sensing device.

[0009] In some embodiments, the first pixel of the first pixel group and the first pixel of the second pixel group (SP) can be configured to be adjacent to each other, and the second pixel of the first pixel group and the second pixel of the second pixel group can be configured to be adjacent to each other. Based on the illumination of the environment around the image sensing device described above, each of the first pixel (SP1, SP2, SP3, SP4) and the second pixel (SP1, SP2, SP3, SP4) is selectively operated, and because the first pixel of the first pixel group, the first pixel of the second pixel group, the second pixel of the first pixel group, and the second pixel of the second pixel group (SP) are configured to be adjacent to each other, the light receiving rate can be increased.

[0010] In some implementations, in low-light environments, because each of the first pixels (SP) of the first pixel group and the second pixel group generates digital data, and the image signal processor processes and sums each digital data generated by the first pixels (SP) of the first pixel group and the second pixel group, the accuracy of distance measurement can be improved.

[0011] In some implementations, a first pixel group and a second pixel group are included, each pixel group including a first pixel having a first region size and a second pixel having a second region size smaller than the first region size, and the first pixel and the second pixel (SP) of each pixel group can be selectively turned on or off depending on whether the distance to the target object is long or short, thereby allowing for more accurate distance measurement while taking into account ambient illuminance.

[0012] The effects that can be obtained from the disclosed technology are not limited to those mentioned above, and other effects that are not explicitly stated can also be achieved. Attached Figure Description

[0013] Figure 1 This is a block diagram illustrating an imaging system based on an implementation method.

[0014] Figure 2 This is a planar diagram of the pixel array based on the implementation method.

[0015] Figure 3 yes Figure 2 A magnified planar view of region Q1 in the image.

[0016] Figure 4 It is along Figure 3 The cross-sectional view taken by the A-A' line in the diagram.

[0017] Figure 5 An example of a direct ToF method for pixels (SP) is shown.

[0018] Figure 6 An example of an indirect ToF method for pixels (SP) is shown.

[0019] Figure 7 An imaging system based on an implementation method is illustrated.

[0020] Figure 8 The mode of a single-photon avalanche diode based on the implementation method is illustrated.

[0021] Figure 9 It is a graph that converts pixel data generated from the second pixel (SP) based on the implementation method into a histogram.

[0022] Figure 10 It is a graph that converts pixel data generated from the fourth pixel (SP) based on the implementation method into a histogram.

[0023] Figure 11 This is a diagram illustrating an imaging system based on an implementation method.

[0024] Figure 12 This is a diagram illustrating an imaging system under illumination below a reference value.

[0025] Figure 13 This is a plan view illustrating the channel region of the light source illuminating the first beam according to an embodiment.

[0026] Figure 14 This is a plan view illustrating the illumination of a second beam onto a pixel array based on an embodiment.

[0027] Figure 15 This is an example of a histogram obtained by summing pixel data generated from the second pixel (SP) of a pixel group, based on an implementation method.

[0028] Figure 16 This is a diagram illustrating an imaging system under illuminance equal to or greater than a reference illuminance value.

[0029] Figure 17 This is an example of a histogram obtained by summing pixel data generated from the fourth pixel (SP) of a pixel group, based on an implementation method.

[0030] Figure 18 This is a block diagram illustrating an imaging system based on another implementation.

[0031] Figure 19 This is a diagram illustrating an imaging system based on another implementation.

[0032] Figure 20 and Figure 21 This is a chart that illustrates a histogram of pixel data generated from illumination pixels (SP). Detailed Implementation

[0033] The chapter headings used in this document are for ease of understanding only and do not limit the scope of the implementation methods to the chapters they describe.

[0034] Figure 1 This is a block diagram illustrating an imaging system based on an implementation method.

[0035] Reference Figure 1 Imaging system 1 can refer to, for example, a digital still camera for capturing still images or a digital video camera for capturing moving images. For example, imaging system 1 can be implemented as a digital SLR camera (DSLR), a mirrorless camera, or a mobile phone (e.g., a smartphone), but is not limited thereto. Imaging system 1 may include a device having a lens and an image pickup element, enabling the device to capture a target object and thus create an image of the target object.

[0036] The imaging system 1 may include an image sensing device 100 and an image signal processor 200.

[0037] Image sensing device 100 can measure distance using the principle of time-of-flight (TOF). Image sensing device 100 may include a light receiving pattern LM, a pixel array 110, a pixel driver 120, a timing controller 130, a light source driver 140, and a readout circuit 150. Imaging system 1 based on the disclosed technology may also include a light sensor 300. Imaging system 1 may also include a light source LS. In some implementations, light sensor 300 may refer to a photodetector capable of detecting light, measuring illuminance, responding to changes in the amount of received light, and / or converting light into electricity.

[0038] The light source LS can illuminate a target object TO in response to a clock signal (e.g., a reference pulse signal MLS) from the light source driver 140. The light source LS can include a laser diode LD, a light-emitting diode (LED), a near-infrared laser (NIR), a point light source, a white light lamp, a monochromatic illuminator incorporating a monochromator, other laser light source LSs, and combinations thereof for emitting light with a specific wavelength (such as infrared or visible light). For example, the light source LS can emit infrared light with wavelengths from 800 nm to 1000 nm. For ease of description, Figure 1 A single light source LS is shown; however, multiple light source LSs may be arranged around a light receiving pattern LM. Alternatively, multiple light source LSs may be arranged around a light receiving pattern LM. In the embodiments, a vertical cavity surface-emitting laser (VCSEL) including a point source has been given as an example of a light source LS, but the disclosed technology is not limited thereto.

[0039] The light-receiving pattern LM can collect light reflected from the target object TO and focus the light onto the pixels (SP1, SP2, SP3, SP4) of the pixel array 110. The light-receiving pattern LM may include a focusing lens with a glass or plastic surface, or another cylindrical optical element. The light-receiving pattern LM may include a lens group formed by at least one lens.

[0040] Pixel array 110 may include a plurality of pixels (SP1, SP2, SP3, SP4) arranged continuously in a two-dimensional matrix structure. That is, pixel array 110 may include a plurality of pixels (SP) arranged continuously along a first direction DR1 and a second direction DR2. Each pixel (SP1, SP2, SP3, SP4) may include a pixel region. Each pixel (SP) may perform photoelectric conversion on a second beam L2 (or incident light) received by a light-receiving pattern LM, and may generate and output a pixel signal as an electrical signal corresponding to the second beam L2. Here, the pixel signal may be a signal indicating information corresponding to the distance to a target object TO, rather than a signal indicating the color of the target object TO. Each of the plurality of pixels may include a single-photon avalanche diode.

[0041] A pixel array 110, which includes multiple pixels SP, can detect the distance to a target object TO using a direct Time-of-Flight (ToF) method. Direct ToF is a method for calculating the distance to a target object TO by directly measuring the round-trip time from the point in time when a pulse of light is irradiated onto the target object TO to the point in time when the pulse of light is reflected from the target object TO and returns, and calculating the round-trip time and the speed of light. However, the disclosed technique is not limited to this, and the pixel array 110, which includes multiple pixels SP, can also detect the distance to a target object TO using an indirect ToF method. In one example, the indirect ToF method can measure distance using light by detecting the phase shift of a continuously modulated light wave reflected from the object (instead of directly measuring the time it takes for the light pulse to travel to and return from the object).

[0042] Pixel driver 120 can drive pixel array 110 according to the control of timing controller 130. For example, pixel driver 120 can generate a quench control signal for controlling a quench operation, which reduces the reverse bias voltage applied to pixel SP to the breakdown voltage or lower. That is, pixel driver 120 can control the on / off of pixel SP in response to the control signal of timing controller 130.

[0043] The readout circuit 150 is disposed on one side of the pixel array 110 and can calculate the time delay between the pulse signal (or pixel signal) output from each pixel SP and the reference pulse, and generate digital data (pixel data) corresponding to the time delay (see [link to relevant documentation]). Figure 7 The TDC (Time to Digital Conversion) section 151 of the readout circuit 150 is used to store (see...) Figure 7 The readout circuit 150 contains a TDC buffer 153 for digital data. The readout circuit 150 can send the stored digital data to the image signal processor 200 under the control of the timing controller 130.

[0044] The timing controller 130 can control the overall operation of the image sensing device 100. That is, the timing controller 130 can generate timing signals for controlling the operation of the pixel driver 120 and the light source driver 140. In addition, the timing controller 130 can control the activation or deactivation of the readout circuit 150, and can control the simultaneous or sequential transmission of digital data stored in the readout circuit 150 to the image signal processor 200.

[0045] The light source driver 140 can generate a clock signal that can operate the light source LS according to the control of the timing controller 130.

[0046] The image signal processor 200 can process digital data (or pixel data) input from the image sensing device 100 and generate a depth image (e.g., in the form of a histogram) representing the distance to the target object TO. In some implementations, the image signal processor 200 can calculate the distance to the target object TO pixel by pixel based on the time delay represented by the digital data received from the readout circuit 150.

[0047] The image signal processor 200 can control the operation of the image sensing device 100. In one example, the image signal processor 200 can analyze digital data input from the image sensing device 100 to determine the mode of the image sensing device 100, and can control the image sensing device 100 to operate in the determined mode.

[0048] The image signal processor 200 can perform image signal processing relative to the generated depth image to remove noise and improve image quality. The depth image output from the image signal processor 200 can be stored in the internal or external memory of the imaging system 1, or in a device in which the imaging system 1 is embedded, or can be displayed on a display upon user request or automatically. Alternatively, the depth image output from the image signal processor 200 can be used to control the operation of the imaging system 1 or a device in which the imaging system 1 is embedded.

[0049] Figure 2 This is a planar diagram of the pixel array based on the implementation method. Figure 3 yes Figure 2 A magnified plan view of region Q1 in the diagram. (Refer to...) Figure 2 and Figure 3 The pixel array 110 may include multiple pixels (SP1, SP2, SP3, SP4), and each pixel (SP1, SP2, SP3, SP4) may include a pixel region PX (in Figure 1 (PX_G1) and non-pixel regions NPX. Multiple pixel regions may include a first pixel region PX1, a second pixel region PX2, a third pixel region PX3, and a fourth pixel region PX4, but the disclosed technology is not limited thereto. For example, multiple pixels (SP1, SP2, SP3, SP4) may form multiple pixel groups. For example, pixel array 110 may include multiple pixel groups. For example, multiple pixel groups may include a first pixel group (PX_G1), a second pixel group (PX_G2), a third pixel group (PX_G3), and a fourth pixel group (PX_G4), but the disclosed technology is not limited thereto.

[0050] Each pixel group (PX_G1 to PX_G4) may include the first pixel to the fourth pixel (SP). The first pixel to the fourth pixel (SP) can be divided according to the area (or width) of the active region (AA1, AA2, AA3, AA4) of the pixel region (PX1, PX2, PX3, PX4) of each pixel (SP1, SP2, SP3, SP4).

[0051] For example, the area or size (or width W1, W2) of each of the regions of the first active region AA1 and the second active region AA2 is greater than the area (or width W3) of the third active region AA3, and the area (or width W3) of the third active region AA3 is greater than the area (or width W4) of the fourth active region AA4. The width W1 of the first active region AA1 and the width W2 of the second active region AA2 may be the same, but the disclosed technology is not limited thereto.

[0052] like Figure 2 As shown, pixels in each pixel group (PX_G1 to PX_G4) can be set adjacent to the same pixels in the adjacent pixel groups (PX_G1 to PX_G4).

[0053] For example, the first pixel group (PX_G1) may include a third pixel SP3 located on the other side of the first direction DR1 and on the side of the second direction DR2, a fourth pixel SP4 located on the side of the first direction DR1 and on the side of the second direction DR2, a first pixel SP1 located on the other side of the first direction DR1 and on the other side of the second direction DR2, and a second pixel SP2 located on the side of the first direction DR1 and on the other side of the second direction DR2.

[0054] For example, the second pixel group (PX_G2) may include a fourth pixel SP4 located on the other side of the first direction DR1 and on the side of the second direction DR2, a third pixel SP3 located on the side of the first direction DR1 and on the side of the second direction DR2, a second pixel SP2 located on the other side of the first direction DR1 and on the other side of the second direction DR2, and a first pixel SP1 located on the side of the first direction DR1 and on the other side of the second direction DR2.

[0055] For example, the third pixel group (PX_G3) may include a first pixel SP1 located on the other side of the first direction DR1 and on the side of the second direction DR2, a second pixel SP2 located on the side of the first direction DR1 and on the side of the second direction DR2, a third pixel SP3 located on the other side of the first direction DR1 and on the other side of the second direction DR2, and a fourth pixel SP4 located on the side of the first direction DR1 and on the other side of the second direction DR2.

[0056] For example, the fourth pixel group (PX_G4) may include a second pixel SP2 located on the other side of the first direction DR1 and on the side of the second direction DR2, a first pixel SP1 located on the side of the first direction DR1 and on the side of the second direction DR2, a fourth pixel SP4 located on the other side of the first direction DR1 and on the other side of the second direction DR2, and a third pixel SP3 located on the side of the first direction DR1 and on the other side of the second direction DR2.

[0057] like Figure 2 As shown, the first pixel (SP1) of each pixel group (PX_G1 to PX_G4) can be set to be adjacent to each other (refer to PXa), the second pixel (SP2) of each pixel group (PX_G1 to PX_G4) can be set to be adjacent to each other (refer to PXb), the third pixel (SP3) of each pixel group (PX_G1 to PX_G4) can be set to be adjacent to each other (refer to PXc), and the fourth pixel (SP4) of each pixel group (PX_G1 to PX_G4) can be set to be adjacent to each other (refer to PXd).

[0058] In other words, according to the pixel array 110 based on the disclosed technology, pixels (SP1 to SP4) with the same width (or area) in the active regions (AA1, AA2, AA3, AA4) can be set to be adjacent to each other.

[0059] The following will refer to Figure 4 Describe the cross-sectional structure of each pixel region (PX1 to PX4).

[0060] Figure 4 It is along Figure 3 A cross-sectional view taken from line A-A'. Figure 4 The cross-sectional structures of the first pixel region (PX1) and the second pixel region (PX2) are illustrated only as examples. However, the cross-sectional structures of the first and second pixel regions (PX1, PX2) can also be applied to the third and fourth pixel regions (PX3, PX4). See reference... Figure 2 and Figure 3 As shown, the width W1 of the first active region AA1 and the width W2 of the second active region AA2 can be the same.

[0061] Reference Figure 4The pixel array 110 based on the implementation may include a circuit portion CEP, a single-photon avalanche diode (SPAD) on the circuit portion CEP, a first trench portion DTI and a second trench portion BTG inside the single-photon avalanche diode (SPAD), an anti-reflective layer ARP on the single-photon avalanche diode (SPAD), and a light-receiving pattern LM on the anti-reflective layer ARP. In some implementations, a single-photon avalanche diode (SPAD) may refer to a photodetector such as a photodiode, which can detect a single photon based on an avalanche phenomenon to generate a significantly large current from a small amount of incident light.

[0062] The circuit section CEP can be located beneath the single-photon avalanche diode (SPAD) and can include transistors, wiring layers, and interlayer insulating layers. The transistors may include readout transistors, analog quenching transistors formed beneath the SPAD, etc. The following will refer to... Figure 7 Describe a transistor.

[0063] A single-photon avalanche diode (SPAD) may include a first semiconductor region CD1, a second semiconductor region CD2, an intermediate region MA between the first semiconductor region CD1 and the second semiconductor region CD2, and a substrate portion SUB on the second semiconductor region CD2 and the intermediate region MA.

[0064] The first semiconductor region CD1 can be an n-type semiconductor region, and the second semiconductor region CD2 can be a p-type semiconductor region. For example, p-type ions can include boron (B) ions, and n-type ions can include phosphorus (P) and / or arsenic (As) ions. For example, the first semiconductor region CD1 can include a 1-1 semiconductor region CD1a, which is an n+ type semiconductor region, and a 1-2 semiconductor region CD1b, which is an n- type semiconductor region, on the circuit portion CEP, and the second semiconductor region CD2 can include a 2-1 semiconductor region CD2a, which is a p+ type semiconductor region, and a 2-2 semiconductor region CD2b, which is a p- type semiconductor region, on the 2-1 semiconductor region CD2a.

[0065] For example, semiconductor region CD1a of 1-1 may have a higher doping concentration of n-type impurities than the doping concentration of n-type impurities in semiconductor region CD1b of 1-2, and semiconductor region CD2a of 2-1 may have a higher doping concentration of p-type impurities than the doping concentration of p-type impurities in semiconductor region CD2b of 2-2. However, the disclosed technology is not limited thereto, and the first semiconductor region CD1 and the second semiconductor region CD2 may each have an n-type semiconductor region and a p-type semiconductor region.

[0066] In some implementations, the vertical positions of semiconductor region CD1a (1-1) and semiconductor region CD1b (1-2) can be changed, and the vertical positions of semiconductor region CD2a (2-1) and semiconductor region CD2b (2-2) can be changed.

[0067] The intermediate region MA can be disposed between the first semiconductor region CD1 and the second semiconductor region CD2. The intermediate region MA can be disposed on the upper surface of the first semiconductor region CD1. The mechanism of electrons (e-) and holes (h+) in the intermediate region MA will be described below.

[0068] The substrate portion SUB can be disposed on the intermediate region MA and the second semiconductor region CD2. The substrate portion SUB can include an n-type semiconductor region or a p-type semiconductor region. However, the doping concentration of the impurities in the substrate portion SUB can be lower than the doping concentration of the impurities in the first semiconductor region CD1 and the second semiconductor region CD2, respectively.

[0069] A first groove H1 can be formed in the non-pixel region NPX of the substrate portion SUB. The first groove H1 can be recessed in the thickness direction of the substrate portion SUB. For example, the first groove H1 can completely penetrate the substrate portion SUB from its upper surface to its lower surface. A first trench portion DTI can be formed in the first groove H1. The first trench portion DTI can be formed by a deep trench process. The first trench portion DTI can completely fill the first groove H1.

[0070] In the pixel regions (PX1, PX2) of the substrate portion SUB, a second groove H2 can be formed, and one or two second grooves H2, or three or more second grooves H2, can be provided. A second trench portion BTG can be provided in the second groove H2, therefore, one or two second trench portions BTG, or three or more second trench portions BTG, can be provided. The first trench portion DTI and the second trench portion BTG can include the same material. For example, the first trench portion DTI and the second trench portion BTG can include an insulating material. Examples of insulating materials are hafnium oxide (HfO2) or silicon oxide (SiO2), but are not limited thereto. The refractive index of the first trench portion DTI can be, for example, from about 1.4 to about 2.0, but is not limited thereto. The first trench portion DTI can be used to totally reflect a second beam L2 (or incident light) incident on the first trench portion DTI to a single-photon avalanche diode SPAD. The second trench portion BTG can be used to scatter the second beam L2 incident from the light receiving pattern LM. Each of the first trench portion DTI and the second trench portion BTG can be used to increase the optical path or scatter light by total internal reflection of light into a single-photon avalanche diode (SPAD). For this reason, they are used to improve the efficiency of photoelectric conversion. In some embodiments, the first trench portion DTI may be designed to comprise polysilicon (Poly Si), and the aforementioned insulating material is formed on the sidewalls of the polysilicon, but the disclosed technology is not limited thereto.

[0071] An anti-reflective layer ARP can be disposed on a single-photon avalanche diode (SPAD) and a first trench portion DTI. The anti-reflective layer ARP can be in direct contact with both the SPAD and the DTI. The ARP can comprise the same material as the DTI, but the disclosed techniques are not limited thereto. The ARP can be formed in the same process as the DTI and can be integrally bonded to it. The ARP can be used to prevent total internal reflection of light incident from a light-receiving pattern LM on the SPAD. For this purpose, the ARP can have a refractive index between, but is not limited to, the refractive index of the LM and the SPAD. For example, the refractive index of the ARP can be from about 1.4 to about 2.0, but is not limited thereto.

[0072] A light-receiving pattern LM can be disposed on the anti-reflective layer ARP. The light-receiving pattern LM can be used to allow light incident from the outside to be received by each pixel area (PX1, PX2). For this purpose, the light-receiving pattern LM can have an upwardly convex lens shape and can be formed of a material with a large refractive index difference compared to the refractive index of external air. For example, the refractive index of the light-receiving pattern LM can be from about 1.5 to about 1.7, but is not limited thereto. Figure 4 As shown, the light-receiving pattern LM can be continuously disposed in the pixel regions (PX1, PX2) and non-pixel regions (NPX), and the end of the convex lens shape can be located at the center of the pixel regions (PX1, PX2), but is not limited thereto. For example, the light-receiving pattern LM can be discontinuous in the non-pixel regions (NPX), and in this case, each of the multiple light-receiving patterns (LM) can be disposed in each of the pixel regions (PX1, PX2).

[0073] Although not illustrated, in some implementations, a grid portion may be provided on the anti-reflective layer ARP in the non-pixel region (NPX). The grid portion may include an air structure or reflective metal, but the disclosed techniques are not limited thereto.

[0074] Single-photon avalanche diodes (SPADs) can be used as photoelectric conversion elements including photosensitive pn junctions. That is, SPADs can detect objects generated by phototransformation (see [link to SPAD]). Figure 1 The single photon reflected by the TO in the L2 (a single photon of L2) can generate pixel data (or current pulse, pixel signal, pulse signal) corresponding to the detected single photon. In this case, avalanche breakdown is triggered by a single photon incident in Geiger mode, where a reverse bias voltage higher than the breakdown voltage is applied as the voltage between the cathode and anode, and pixel data can be generated through a series of processes. Here, avalanche breakdown can occur in the intermediate region MA inside the single-photon avalanche diode SPAD. Holes (h+) can be located in one region of the intermediate region MA adjacent to the second semiconductor region CD2, and electrons (e-) can be located in another region of the intermediate region MA adjacent to the first semiconductor region CD1. Holes (h+) in one region and electrons (e-) in the other region can form electron-hole pairs to recombine with each other. Electron (e-)-hole (h+) pairs can be ionized by photon collisions with the second beam L2.

[0075] In some implementations, collisional ionization occurs when the electric field is increased by applying a reverse bias voltage to a single-photon avalanche diode (SPAD). Through collisional ionization, electron (e-)-hole (h+) pairs are generated as electrons (e-) generated by the incident photons move due to the strong electric field. As the electrons (e-) and holes (h+) generated by collisional ionization collide with each other, a large number of charge carriers can be generated.

[0076] Figure 5 An example of a direct ToF method for pixels (SP) is shown.

[0077] Reference Figures 1 to 5 When the image sensing device 100 is activated, the light source LS can illuminate the target object (TO) with a first beam L1 (or illumination light) via a reference pulse signal MLS. The time point at which the pulse of the reference pulse signal MLS is generated can be defined as the reference pulse time point (RPT). The pixel array 110 and the readout circuit 150 can detect the pulse signal reflected from the target object (TO) and becoming incident, and generate pixel data PD.

[0078] Image signal processor 200 can process pixel data PD input from image sensing device 100 and generate a depth image (in the form of a histogram) indicating the distance to a target object (TO). When applying the direct ToF method, image signal processor 200 can calculate the distance to the target object (TO) pixel by pixel based on the time delay indicated by the pixel data (PD) received from readout circuit 150. Image signal processor 200 can analyze pixel data PD and determine the time point when the value of pixel data PD is equal to or greater than a threshold data as the pulse detection time point PST. A description of the value of pixel data PD being equal to or greater than the threshold data is provided below. Image signal processor 200 can calculate the time of flight Δt (ToF) as the time interval from reference pulse time point (RPT) to pulse detection time point (PST), and calculate the calculated time of flight Δt and the speed of light (e.g., by multiplying the value obtained by dividing Δt by 2 by the speed of light) to calculate the distance between the target object TO and image sensing device 100.

[0079] Figure 6 An example of an indirect ToF method for pixels (SP) is shown.

[0080] Reference Figures 1 to 6When the image sensing device 100 is activated, the light source LS can illuminate the target object (TO) with a first beam L1 (or illumination light) via a reference pulse signal MLS. The time point at which the pulse of the reference pulse signal MLS is generated can be defined as the reference pulse time point (RPT). The pixel array 110 and the readout circuit 150 can detect the pulse signal reflected from the target object (TO) and becoming incident, and generate pixel data PD.

[0081] The image signal processor 200 can process pixel data PD input from the image sensing device 100 and generate a depth image (in the form of a histogram) indicating the distance to a target object (TO). When applying the indirect ToF method, the image signal processor 200 can base its depth image on the phase delay indicated by the pixel data (PD) received from the readout circuit 150. To calculate the distance to the target object (TO) pixel by pixel.

[0082] For ease of description, the following text will focus on the direct ToF method to describe the disclosed techniques.

[0083] Figure 7 An imaging system based on an implementation method is illustrated.

[0084] Reference Figure 7 The imaging system based on the implementation may include a single-photon avalanche diode (SPAD), an analog quenching transistor (QX), a readout transistor (RT), a readout circuit (150), and an ISP (In-Signal Block) 200. An anode AND can be formed at one end of the SPAD, and a cathode CAT can be formed at the other end. The anode AND and cathode CAT are opposite to each other, and their positions can be interchanged. For example, the anode AND can be the second semiconductor region CD2 of the SPAD, and the cathode CAT can be the first semiconductor region CD1 of the SPAD, but the disclosed technology is not limited thereto. A diode voltage VSPAD can be applied to the anode AND of the SPAD. The cathode CAT can be connected to a first node N1. A second beam L2 is applied to the SPAD (see...). Figure 4 The analog quench transistor QX is connected to the first node N1. An analog quench voltage VDD can be applied to the first electrode of the analog quench transistor QX. The second electrode of the analog quench transistor QX can be connected to the first node N1. A quench control signal QCS can be applied to the gate electrode of the analog quench transistor QX, and the conduction or cutoff of the analog quench transistor QX can be controlled according to the quench control signal QCS.

[0085] The readout transistor RT can be connected to the first node N1. The first electrode of the readout transistor RT can be connected to the first node N1, and its second electrode can be connected to the readout circuit 150. A readout control signal RCS can be applied to the gate electrode of the readout transistor RT, and the readout transistor RT can be turned on or off according to the readout control signal RCS.

[0086] Figure 8 The mode of a single-photon avalanche diode based on the implementation method is illustrated. Figure 8 The horizontal axis in the diagram shows the force applied to a single-photon avalanche diode (see [reference]). Figure 7 The voltage VR of the SPAD in the figure, and the vertical axis therein shows the voltage from the single-photon avalanche diode (see Figure 7 The current IR output by the SPAD in the middle.

[0087] Reference Figure 7 and Figure 8 The single-photon avalanche diode (SPAD) can operate in a linear mode with a reverse bias voltage below the breakdown threshold voltage to generate an output current proportional to the intensity of incident light containing multiple photons, and in a Geiger mode for detecting single photons. The linear and Geiger modes of the SPAD can be selected based on the breakdown voltage VBV. The SPAD can operate in Geiger mode when the voltage applied to it is equal to or greater than the breakdown voltage VBV, and in linear mode when the voltage applied to it is less than the breakdown voltage VBV. The voltage VR applied to the SPAD can be based on a negative (-) voltage. Therefore, in the disclosed art, it is assumed that the larger the negative (-) value, the larger the voltage amplitude. However, the disclosed art is not limited to this. In both linear and Geiger modes, the diode voltage VR can have a constant amplitude.

[0088] For example, the diode voltage VSPAD can be set to a voltage less than the breakdown voltage VBV. When the diode voltage VSPAD is greater than the breakdown voltage VBV, the diode SPAD may become able to enter Geiger mode even if the analog quench transistor QX is not turned on. In this case, avalanche will be randomly generated even without the application of light L2, and a large current IR can be generated from the diode SPAD. Therefore, the diode voltage VSPAD can preferably be set to a voltage less than the breakdown voltage VBV.

[0089] Further description of Geiger mode and linear mode, with the amplitude of each voltage as an example. The breakdown voltage VBV can be -20V, and the diode voltage VSPAD can be -19V. When the analog quench transistor QX is off, the voltage applied to the diode SPAD is -19V and less than the breakdown voltage VBV, and the diode SPAD operates in linear mode. In linear mode, even if light L2 is incident on the diode SPAD, although the amplitude of the current IR increases proportionally to the number of charge carriers (e- or h+) generated by impact ionization, the amplitude of the current IR output from the diode SPAD may be small, and the number of charge carriers may be low. Even if the analog quench transistor QX is on, when the analog quench voltage VDD is less than 1V, the voltage VR applied to the diode SPAD is -19V (a voltage less than 1V), which is less than the breakdown voltage VBV, therefore the diode SPAD operates in linear mode.

[0090] Reset operation

[0091] In the reset operation ( Figure 8 In step “③”, when a simulated quenching voltage VDD of 1V is applied, the voltage VR applied to diode SPAD becomes equal to the breakdown voltage VBV. From this point onward, diode SPAD operates in Geiger mode. In Geiger mode, as the voltage VR applied to diode SPAD increases, the amplitude of the current IR output from diode SPAD increases sharply. However, during reset operation (… Figure 8 In point “③”, when the voltage VR applied to the diode SPAD is set equal to the breakdown voltage VBV, due to some error, the diode SPAD may operate in linear mode (instead of Geiger mode). Therefore, during the reset operation ( Figure 8 In section “③”, the voltage VR applied to the SPAD diode can be set up to the operating voltage VOP. For example, the operating voltage VOP can be greater than the breakdown voltage VBV, for example, it can be assumed to be -23V. That is, the operating voltage VOP is preset to be greater than the breakdown voltage VBV, and during the reset operation ( Figure 8 In step “③”, the operation of increasing the voltage VR applied to diode SPAD up to the operating voltage VOP is performed by using a simulated quenching voltage VDD. To increase the voltage applied to diode SPAD to -23V, which is the operating voltage VOP, the simulated quenching voltage VDD must be 4V (-19V - 4V = -23V). The voltage obtained by subtracting the breakdown voltage VBV from the operating voltage VOP can be the set voltage VEX, which in this case can be -3V.

[0092] avalanche operation

[0093] In avalanche operations ( Figure 8In the case of "①"), multiple collisional ionizations occur within the SPAD diode, generating numerous charge carriers. Therefore, the amplitude of the output current IR from the SPAD diode may be relatively large. In other words, because the amplitude of the output current IR is large, it is possible to achieve avalanche operation (…) within the SPAD diode. Figure 8 Execute in the “①” section as shown in the reference. Figure 5 The operation described above generates a pulse signal that is reflected from the target object TO and becomes incident. When the readout transistor RT is turned on, the pulse signal generated from the diode SPAD is provided to the readout circuit 150. The TDC 151 of the readout circuit 150 generates pixel data PD based on the pulse signal generated and provided from the diode SPAD, and the TDC buffer 153 stores the generated pixel data PD.

[0094] Quenching operation

[0095] In quenching operation ( Figure 8 In step “②”, the analog quenching transistor QX is turned off, and because of this, the voltage VR applied to diode SPAD can drop back to the level of diode voltage VSPAD. Based on the implementation method, the diode SPAD repetitive reset operation ( Figure 8 (③) and avalanche operation ( Figure 8 (①) and quenching operation ( Figure 8 (② in the text).

[0096] Figure 9 It is a graph that converts pixel data generated from the second pixel (SP) based on the implementation method into a histogram. Figure 10 It is a graph that converts pixel data generated from the fourth pixel (SP) based on the implementation method into a histogram. Figure 9 and Figure 10 The horizontal axis in the graph represents time t, and its vertical axis represents the signal strength.

[0097] Pixel data PD is based on Figure 7 The described diode SPAD is generated in Geiger mode. ISP (see...) Figure 7 The 200 in the middle can convert the pixel data PD of each diode SPAD into a histogram. Figure 9 and Figure 10 Each pixel SP in the image is generated by a diode SPAD exposed to the same illumination conditions and from a target object located at the same distance (see [link]). Figure 1 The TO signal in the middle is reflected and becomes the incident pulse signal.

[0098] Reference Figure 3 , Figure 9 and Figure 10The diode SPAD of the second pixel SP2 can have a second width W2, and the diode SPAD of the fourth pixel SP4 can have a fourth width W4, which is smaller than the second width W2. Generally, the width of the diode SPAD and the signal strength are proportional. That is, it can be considered that the larger the width of the diode SPAD, the higher its sensitivity. For example, the diode SPADs of the first and second pixels (SP1, SP2) can have the highest sensitivity, the diode SPAD of the third pixel (SP3) can have medium sensitivity, and the diode SPAD of the fourth pixel (SP4) can have low sensitivity, but the disclosed technology is not limited to this. Therefore, as... Figure 9 and Figure 10 As shown, based on the same illumination conditions and target objects located at the same distance (see...) Figure 1 In the TO), the signal strength of pixel data PD generated by the diode SPAD of the second pixel (SP2) can be greater than the signal strength of pixel data PD generated by the diode SPAD of the fourth pixel (SP4).

[0099] Imaging systems based on implementation methods (see implementation details) Figure 1 The characteristic of 1) is that it selectively operates diode SPADs with high sensitivity, medium sensitivity, and low sensitivity (receiving light through the corresponding diode SPAD) under each different illumination condition. For example, in a low-illuminance environment, a relatively large amount of light must be received, therefore, a diode SPAD with high sensitivity is operated, while in a high-illuminance environment, a relatively small amount of light can be received, therefore, a diode SPAD with low sensitivity can be operated. In some embodiments, it can be based on the target object (see [reference]). Figure 1 The distance to the TO (transmission point) selectively operates a diode SPAD with high sensitivity, medium sensitivity, or low sensitivity (receiving light through the corresponding diode SPAD). For example, when the distance is relatively long, a diode SPAD with high sensitivity can be operated, while when the distance is relatively short, a diode SPAD with low sensitivity can be operated.

[0100] Figure 11 This is a diagram illustrating an imaging system based on an implementation method.

[0101] Reference Figure 7 and Figure 11 The imaging system 1 based on the implementation method may include multiple pixels (SP1, SP2, SP3, SP4). Figure 11 In the example, the first pixel group (PX_G1) is illustrated; however, the operations of the second pixel group (PX_G2) through the fourth pixel group (PX_G4) can be the same as those of the first pixel group (PX_G1).

[0102] The pixels (SP1, SP2, SP3, SP4) of the first pixel group (PX_G1) can be interconnected. For example, each pixel (SP1, SP2, SP3, SP4) can share the first node N1. The gate electrode of the analog quenching transistor QX of each pixel (SP1, SP2, SP3, SP4) can be connected to the pixel driver 120 respectively. The pixel driver 120 can apply a quenching control signal QCS to the gate electrode of the analog quenching transistor QX of each pixel (SP1, SP2, SP3, SP4), thereby becoming able to control the on / off state of the analog quenching transistor QX of each pixel (SP1, SP2, SP3, SP4).

[0103] As described above, the imaging system 1 based on the embodiment is characterized in that the imaging system 1 selectively operates diodes SPADs (which receive light through corresponding diodes SPADs) having high sensitivity, medium sensitivity, or low sensitivity under each different illumination condition. Therefore, the pixel driver 120 can control the on / off state of the analog quenching transistor QX of each pixel (SP1, SP2, SP3, SP4) based on the ambient illumination determined by the light sensor 300. Thus, the light sensor 300 can sense the ambient illumination, determine whether the sensed illumination is equal to or greater than a reference illumination or less than a reference illumination, and can provide the determination result to the timing controller 130.

[0104] When the sensed illuminance is less than the reference illuminance, the timing controller 130 can provide the pixel driver 120 with a signal to turn on the analog quench transistor QX of the first pixel (SP1) or the second pixel (SP2), and when the sensed illuminance is equal to or greater than the reference illuminance, the timing controller 130 can provide the pixel driver 120 with a signal to turn on the analog quench transistor QX of the fourth pixel (SP4).

[0105] In some embodiments, the reference illuminance sensed by the light sensor 300 can be multiple values ​​having two or more different reference illuminance levels. For example, the reference illuminance may include a first reference illuminance and a second reference illuminance greater than the first reference illuminance. When the sensed illuminance is less than the first reference illuminance, the timing controller 130 may provide a signal to the pixel driver 120 to turn on the analog quench transistor QX of the first pixel (SP1) or the second pixel (SP2). When the sensed illuminance is equal to or greater than the first reference illuminance and less than the second reference illuminance, the timing controller 130 may provide a signal to the pixel driver 120 to turn on the analog quench transistor QX of the third pixel (SP3). When the sensed illuminance is equal to or greater than the second reference illuminance, the timing controller 130 may provide a signal to the pixel driver 120 to turn on the analog quench transistor QX of the fourth pixel (SP4). Hereinafter, for ease of description, the disclosed technique will focus on the case where there is one reference illuminance.

[0106] Figure 12 This is a diagram illustrating an imaging system under illumination less than a reference illuminance value.

[0107] Reference Figure 12 When the ambient illuminance is less than the reference illuminance, the pixel driver 120 can apply a turn-on quenching control signal QCS to the analog quenching transistor QX of the second pixel SP2, and can apply a cut-off quenching control signal QCS to the analog quenching transistor QX of the remaining pixels (SP1, SP3, SP4). As a result, the analog quenching transistor QX of the second pixel SP2 is turned on, and the analog quenching transistor QX of the remaining pixels (SP1, SP3, SP4) can be turned off. Therefore, the second beam reflected from the target object TO (see...) Figure 1 The pulse signal (or pixel signal) generated by L2) is generated from the diode SPAD of the second pixel (SP2) that is turned on, and the generated pulse signal can be provided to the readout circuit 150 through the readout transistor RT.

[0108] Figure 13 This is a plan view illustrating the channel region of the light source illuminating the first beam according to an embodiment. Figure 14 This is a plan view illustrating the illumination of a second beam onto a pixel array based on an embodiment.

[0109] Reference Figures 12 to 14 The light source LS may include a vertical-cavity surface-emitting laser (VCSEL), and the light source LS may include a pixel group ( Figure 3The pixel groups (PX_G1, PX_G2, PX_G3, PX_G4) in the image correspond to the channel groups (LSAa, LSAb, LSAc, LSAd). In some embodiments of the disclosed technology, the fact that the channels of the light source LS correspond to the pixels (SP) means that the first light beam L1 output from the corresponding channel is reflected from the target object TO and becomes incident on the corresponding pixel (SP). For example, the first channel group (LSAa) can output the first light beam L1 corresponding to the first pixel group (PX_G1), the second channel group (LSAb) can output the first light beam L1 corresponding to the second pixel group (PX_G2), the third channel group (LSAc) can output the first light beam L1 corresponding to the third pixel group (PX_G3), and the fourth channel group (LSAd) can output the first light beam L1 corresponding to the fourth pixel group (PX_G4).

[0110] As shown above (refer to the reference) Figure 12 In the imaging system 1 based on the embodiment, when the ambient illuminance is less than the reference illuminance, the pixel driver 120 applies a quenching control signal QCS at an on level to the analog quenching transistor QX of the second pixel (SP2). Therefore... Figure 3 Only the second pixel (SP2) in each pixel group (PX_G1, PX_G2, PX_G3, PX_G4) is operated.

[0111] As shown above (refer to the reference) Figure 13 The light source LS, based on the implementation method, can output the second beam L2 from all channels, regardless of the operating pixels (SP1, SP2, SP3, SP4).

[0112] Figure 15 This is an example of a histogram obtained by summing pixel data generated from the second pixel (SP) of a pixel group, based on an implementation method.

[0113] Reference Figure 15 Under illuminance levels less than the reference illuminance, each pixel group ( Figure 3 The operation only operates on the second pixel (SP2) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4). A pulse signal (or pixel signal) is generated for the second pixel (SP2) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4), and the generated pulse signal is provided to the readout circuit (see [link]). Figure 12 (150 in the middle). Readout circuit (see...) Figure 12 The ISP 200 (150) converts the pulse signal generated by the second pixel (SP2) into pixel data and provides the pixel data to the ISP 200. The ISP 200 converts the received pixel data into a histogram (see [link]). Figure 15(see the left image in the image), and sum the data of each transformed pixel (see [image]). Figure 15 (The right image in the image).

[0114] In this implementation, even if the ambient illumination is less than the reference illumination, the imaging system can still receive a large amount of second beams via the diodes SPAD of the highly sensitive second pixels (SP2) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4) (see [link]). Figure 14 The L2 in the image is used to generate valid pixel data. Furthermore, because the pixel data generated from the second pixel (SP2) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4) is summed, target objects can be accurately sensed even in low-light environments (see L2). Figure 1 The distance of TO in the equation.

[0115] Figure 16 This is a diagram illustrating an imaging system under illuminance equal to or greater than a reference illuminance value. Figure 17 This is an example of a histogram obtained by summing pixel data generated from the fourth pixel (SP) of a pixel group, based on an implementation method.

[0116] Reference Figure 16 and Figure 17 When the ambient illuminance is equal to or greater than the reference illuminance, the pixel driver 120 can apply a turn-on quenching control signal QCS to the analog quenching transistor QX of the fourth pixel (SP4), and can apply a cut-off quenching control signal QCS to the analog quenching transistor QX of the remaining pixels (SP1, SP2, SP3). As a result, the analog quenching transistor QX of the fourth pixel (SP4) can be turned on, and the analog quenching transistor QX of the remaining pixels (SP1, SP2, SP3) can be turned off. Therefore, the second beam reflected from the target object TO (see...) Figure 1 The pulse signal (or pixel signal) generated by L2 is generated from the diode SPAD of the fourth pixel (SP4) that is turned on, and the generated pulse signal can be provided to the readout circuit 150 through the readout transistor RT.

[0117] Under illuminance less than the reference illuminance, each pixel group ( Figure 3 The operation only operates on the fourth pixel (SP4) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4). A pulse signal (or pixel signal) is generated for the fourth pixel (SP4) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4), and the generated pulse signal is provided to the readout circuit 150. The readout circuit (see...) Figure 12The ISP 200 (150) converts the pulse signal generated by the fourth pixel (SP4) into pixel data and provides the pixel data to the ISP 200. The ISP 200 converts the received pixel data into a histogram (see [link]). Figure 17 (see the left image in the image), and sum the data of each transformed pixel (see [image]). Figure 17 (The right image in the image).

[0118] In this implementation, when the illuminance is equal to or greater than the reference illuminance, the imaging system can receive a small amount of the second beam of light via a diode SPAD of the low-sensitivity fourth pixel (SP4) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4) (see [link]). Figure 14 The L2 in the model is used to generate valid pixel data. See reference... Figure 8 As stated, the current IR output from the diode SPAD in Geiger mode can have a particularly large amplitude. Therefore, in environments with high illumination, a large signal may be output (which may also generate noise), and reducing the received second beam L2 may be necessary.

[0119] Furthermore, because the pixel data generated from the fourth pixel (SP4) of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4) is summed, the target object can be accurately sensed (see [link]). Figure 1 The distance of TO in the equation.

[0120] In the following description, an imaging system according to another embodiment will be described. In describing these embodiments, references to already understood embodiments will be omitted. Figures 1 to 17 Redundant or detailed descriptions of previously described reference designations or configurations.

[0121] Figure 18 This is a block diagram illustrating an imaging system based on another implementation. Figure 19 This is a diagram illustrating an imaging system based on another implementation. Figure 20 and Figure 21 This is a chart that illustrates a histogram of pixel data generated from illumination pixels (SP).

[0122] Reference Figures 18 to 21 The imaging system 1_1 according to this embodiment and the imaging system according to Figure 1 and Figure 11 The difference in imaging system 1 is that imaging system 1_1 has a light sensor 300 (see LPX) disposed inside pixel array 110_1.

[0123] In some implementations, the light sensor LPX is disposed within the pixel array 110_1 and can be formed in the form of a single-photon avalanche diode similar to a pixel. Figure 18The example shown uses a single light sensor LPX, but the disclosed technology is not limited to this, and multiple light sensors LPX can exist. Furthermore, although the example illustrates that the light sensor LPX is disposed on the outer side of the pixel array 110_1, the disclosed technology is not limited to this, and the light sensor LPX can be disposed between pixels (SP1, SP2, SP3, SP4).

[0124] like Figure 19 As shown, the light sensor LPX senses the illuminance in the surrounding environment and provides the sensing result (in the form of a pulse signal) to the readout circuit 150. The readout circuit 150 generates pixel data based on the pulse signal (or pixel signal) provided from the light sensor LPX and provides the pixel data to the ISP 200.

[0125] like Figure 20 and Figure 21 As shown, the light sensor LPX can sense the illuminance in the surrounding environment during a specific time period, and the ISP 200 can determine that the average illuminance is equal to or greater than the reference illuminance TH (see [reference]). Figure 20 ), or the average illuminance is less than the reference illuminance TH (see Figure 21 When the average illuminance is equal to or greater than the reference illuminance TH, the timing controller 130 can provide the pixel driver 120 with a signal to turn on the analog quench transistor QX of the fourth pixel (SP4), and when the average illuminance is less than the reference illuminance TH, the timing controller 130 can provide the pixel driver 120 with a signal to turn on the analog quench transistor QX of the first pixel (SP1) or the second pixel (SP2).

[0126] In some implementations, a highly sensitive diode SPAD can be operated when the distance is relatively long, while a low-sensitivity diode SPAD can be operated when the distance is relatively short.

[0127] For example, refer to Figure 16 It omits the light sensor 300 and can operate on each pixel group (see...). Figure 3 The fourth pixel (SP4) of the PX_G1 to PX_G4 pixels. Pixel driver 120 can apply a turn-on quench control signal QCS to the analog quench transistor QX of the fourth pixel SP4, and can apply a turn-off quench control signal QCS to the analog quench transistor QX of the remaining pixels (SP1, SP2, SP3). Therefore, the second beam reflected from the target object TO (see...) Figure 1The pulse signal (or pixel signal) generated by L2 in the image is generated from the SPAD of the conducting fourth pixel (SP4), and the generated pulse signal can be provided to the readout circuit 150 through the readout transistor RT. The readout circuit 150 converts the pulse signal generated by the fourth pixel (SP4) into pixel data and provides the pixel data to the ISP 200. The ISP 200 converts the received pixel data into a histogram and sums up each converted pixel data. Furthermore, the ISP 200 can determine the target object based on the summed pixel data (see [link to documentation]). Figure 1 The TO in the figure indicates whether the target object is at a distance or a distance. For example, when the summed pixel data is equal to or greater than the reference value or reference precision, the target object can be determined to be at a distance, while when the summed pixel data is less than the reference value or reference precision, the target object can be determined to be at a distance.

[0128] When the summed pixel data is equal to or greater than the reference value or reference precision, the distance to the target object TO can be measured based on the summed pixel data generated by the fourth pixel (SP4). When the summed pixel data is less than the reference value or reference precision, the first pixel or the second pixel (SP1, SP2) can be manipulated to generate a pulse signal (or pixel signal) again and provide the pulse signal to the readout circuit 150. The readout circuit 150 can convert the pulse signal generated by the first pixel (SP1) or the second pixel (SP2) into pixel data respectively and provide the pixel data to the ISP 200. The ISP 200 converts each provided pixel data into a histogram and sums up each converted pixel data. In this case, the distance to the target object TO can be measured based on the summed pixel data.

[0129] The disclosed techniques can be implemented in some embodiments to provide image sensing devices and imaging systems that will be discussed below.

[0130] In an embodiment, an image sensing device may include: a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, the second pixel including a second active region having a second region size smaller than the first region size, and each of the first pixel and the second pixel may include an avalanche diode, an anti-reflective layer disposed on the avalanche diode, and a light receiving pattern disposed on the anti-reflective layer.

[0131] In various embodiments of the image sensing apparatus based on the disclosed technology, the first pixel of the first pixel group and the first pixel of the second pixel group may be configured to be adjacent to each other, and the second pixel of the first pixel group and the second pixel of the second pixel group (SP) may be configured to be adjacent to each other.

[0132] In various embodiments of the image sensing device based on the disclosed technology, the avalanche diode may include a first semiconductor region, a second semiconductor region, and a substrate portion on the first semiconductor region and the second semiconductor region.

[0133] In various embodiments of the image sensing device based on the disclosed technology, the first pixel may also include an intermediate region between the first semiconductor region and the second semiconductor region.

[0134] In various embodiments of the image sensing device based on the disclosed technology, the first pixel may further include a second trench portion recessed into the substrate portion in the thickness direction.

[0135] In various embodiments of the image sensing device based on the disclosed technology, the image sensing device may further include: a non-pixel region surrounding each pixel, and a first trench portion may be disposed in the non-pixel region.

[0136] In various embodiments of the image sensing device based on the disclosed technology, the first pixel and the second pixel may include an analog quenching transistor that is turned on by a quenching control signal, and an avalanche diode is connected to the analog quenching transistor.

[0137] In various embodiments of the image sensing device based on the disclosed technology, an analog quenching voltage is applied to the first electrode of an analog quenching transistor, the second electrode of which may be connected to an avalanche diode, and the gate electrode of which may be controlled by a quenching control signal.

[0138] In various embodiments of the image sensing device based on the disclosed technology, the image sensing device may further include: a light sensor, and when the illuminance of the surrounding environment is equal to or greater than a reference illuminance, the analog quenching transistor of the second pixel of the first pixel group and the analog quenching transistor of the second pixel of the second pixel group may be turned on by the light sensor.

[0139] In various embodiments of the image sensing device based on the disclosed technology, when the ambient illuminance is less than the reference illuminance, the analog quenching transistor of the first pixel of the first pixel group and the analog quenching transistor of the first pixel of the second pixel group can be turned on by the light sensor.

[0140] In image sensing devices based on various embodiments of the disclosed technology, the light sensor can be configured as an avalanche diode.

[0141] In various embodiments of the image sensing device based on the disclosed technology, the first pixel and the second pixel of the first pixel group can be electrically connected, and the first pixel and the second pixel of the second pixel group can be electrically connected.

[0142] In various embodiments of the image sensing device based on the disclosed technology, the first and second pixels (SP) of each pixel group can be selectively turned on / off according to the illumination of the surrounding environment.

[0143] In another embodiment, an imaging system may include: a light source configured to illuminate a first light beam onto a target object; and an image sensing device including a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, the second pixel including a second active region having a second region size smaller than the first region size, and each of the first pixel and the second pixel being capable of receiving a second light beam reflected by the target object, the first pixel of the first pixel group and the first pixel of the second pixel group being configured to be adjacent to each other, and the second pixel of the first pixel group and the second pixel of the second pixel group being configured to be adjacent to each other.

[0144] In imaging systems based on various embodiments of the disclosed technology, the first pixel and the second pixel of the first pixel group can be electrically connected, and the first pixel and the second pixel of the second pixel group can be electrically connected.

[0145] In imaging systems based on various embodiments of the disclosed technology, the first and second pixels of each pixel group can be selectively turned on / off according to the illumination of the surrounding environment.

[0146] In imaging systems based on various embodiments of the disclosed technology, a light source can illuminate a first beam toward a target object to correspond to a first pixel or a second pixel selectively activated for each pixel group.

[0147] In an imaging system based on various embodiments of the disclosed technology, the imaging system may further include: a readout circuit configured to calculate a time delay between a pulse signal output from a selectively activated first pixel or second pixel of each pixel group and a reference pulse, and to generate and store pixel data corresponding to the time delay.

[0148] In an imaging system according to various embodiments of the disclosed technology, the imaging system may further include: an image signal processor configured to process pixel data input from a readout circuit and generate a depth image indicating the distance to a target object.

[0149] In imaging systems based on various embodiments of the disclosed technology, each of the first pixel and the second pixel may include an avalanche diode, and the avalanche diode may include a first semiconductor region, a second semiconductor region, and a substrate portion on the first semiconductor region and the second semiconductor region.

[0150] This document only describes some implementations and examples of the disclosed technology, and other implementations, enhancements and modifications can be made based on the content described and illustrated in this patent document.

[0151] Cross-reference to related applications

[0152] This patent document claims priority and benefit to Korean Patent Application No. 10-2024-0188311, filed on December 17, 2024, the entire contents of which are incorporated herein by reference for all purposes.

Claims

1. An image sensing device, the image sensing device comprising: A first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, and the second pixel including a second active region having a second region size smaller than the first region size. Each of the first pixel and the second pixel includes an avalanche diode, an anti-reflective layer disposed on the avalanche diode, and a light-receiving pattern disposed on the anti-reflective layer.

2. The image sensing device according to claim 1, in, The first pixel of the first pixel group and the first pixel of the second pixel group are set to be adjacent to each other, and the second pixel of the first pixel group and the second pixel of the second pixel group are set to be adjacent to each other.

3. The image sensing device according to claim 1, in, The avalanche diode includes a first semiconductor region, a second semiconductor region, and a substrate portion on the first semiconductor region and the second semiconductor region.

4. The image sensing device according to claim 3, in, Each of the first pixel in the first pixel group and the first pixel in the second pixel group further includes an intermediate region between the first semiconductor region and the second semiconductor region.

5. The image sensing device according to claim 3, in, The first pixel further includes a second trench portion recessed into the substrate portion in the thickness direction.

6. The image sensing device according to claim 1, further comprising: The non-pixel region surrounding each pixel The first groove portion is located in the non-pixel region.

7. The image sensing device according to claim 1, in, Each of the first pixel and the second pixel includes an analog quench transistor, which is turned on by a quench control signal, wherein the avalanche diode in each of the first pixel and the second pixel is electrically connected to the analog quench transistor.

8. The image sensing device according to claim 7, in, The simulated quenching transistor includes: a first electrode to which a simulated quenching voltage is applied; a second electrode electrically connected to the avalanche diode; and a gate electrode controlled by the quenching control signal.

9. The image sensing device according to claim 7, further comprising: A light sensor that detects light. Wherein, in response to the illuminance value of the environment around the light sensor being equal to or greater than a reference illuminance value, the analog quenching transistor of the second pixel of the first pixel group and the analog quenching transistor of the second pixel of the second pixel group are turned on by the light sensor based on the detected light.

10. The image sensing device according to claim 9, in, In response to an ambient illuminance value around the light sensor being less than a reference illuminance value, the analog quenching transistor of the first pixel in the first pixel group and the analog quenching transistor of the first pixel in the second pixel group are activated by the light sensor based on the detected light.

11. The image sensing device according to claim 9, in, The optical sensor includes an avalanche diode.

12. The image sensing device according to claim 1, in, The first pixel and the second pixel of the first pixel group are electrically connected to each other, and the first pixel and the second pixel of the second pixel group are electrically connected to each other.

13. The image sensing device according to claim 12, in, The first and second pixels of each pixel group are selectively turned on or off based on the illuminance value of the environment surrounding the image sensing device.

14. The image sensing device according to claim 12, in, The first and second pixels of each pixel group are selectively turned on or off based on their distance from the target object.

15. An imaging system, the imaging system comprising: A light source that emits a first beam of light to illuminate a target object; as well as An image sensing device includes a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including a first pixel and a second pixel, the first pixel including a first active region having a first region size, and the second pixel including a second active region having a second region size smaller than the first region size. Each of the first pixel and the second pixel receives a second light beam reflected by the target object under the illumination of the first light beam. Wherein, the first pixel of the first pixel group and the first pixel of the second pixel group are set to be adjacent to each other, and In this configuration, the second pixel of the first pixel group and the second pixel of the second pixel group are set to be adjacent to each other.

16. The imaging system according to claim 15, in, The first pixel and the second pixel of the first pixel group are electrically connected to each other, and the first pixel and the second pixel of the second pixel group are electrically connected to each other.

17. The imaging system according to claim 16, in, The first and second pixels of each pixel group are selectively turned on or off based on the illumination value of the environment surrounding the image sensing device.

18. The imaging system according to claim 17, in, The light source emits the first beam toward the target object to correspond to the first pixel or the second pixel of each pixel group that is selectively turned on.

19. The imaging system of claim 17, further comprising: The readout circuit calculates (1) the time delay between the pulse signal output from the first or second pixel of each pixel group that is selectively turned on and (2) the reference pulse, and generates and stores pixel data corresponding to the time delay.

20. The imaging system of claim 19, further comprising: An image signal processor processes the pixel data generated by the readout circuit and generates a depth image indicating the distance to the target object.

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