Single and joint debugging HiL test method based on multi-controller dynamic switching

Abstract

The application relates to the technical field of HiL testing, and discloses a single and joint debugging HiL testing method based on multi-controller dynamic switching, which comprises the following steps: S1, configuring test parameters, selecting a test mode and a measured controller combination through an upper computer control unit, wherein the test mode comprises a single test mode and a joint debugging mode; S2, constructing a target test loop through a relay switch box according to the test parameters, wherein the target test loop is a single controller test loop or a multi-controller linkage loop; S3, running a simulation model through a real-time processor, generating simulation working condition signals and transmitting the simulation working condition signals to the measured controller, and realizing signal interaction between an integrated HiL test cabinet and the measured controller through IO board cards and communication interface cards; and S4, collecting feedback signals of the measured controller and operation data of the target test loop, uploading the feedback signals and the operation data to the upper computer control unit for analysis and processing to generate a test report, so that full coverage of single testing and joint debugging of multiple controllers is realized, and the completeness of the test is ensured.

Description

Technical Field

[0002] This application relates to the technical field of HiL testing, and in particular to HiL testing methods for individual and joint debugging based on dynamic switching of multiple controllers. Background Technology

[0004] With the rapid development of the new energy vehicle industry, the integration of electronic control systems is constantly improving, and the number and functional complexity of core controllers are increasing in tandem. The collaborative performance of key controllers such as BMS (Battery Management System), MCU (Motor Controller), VCU (Vehicle Controller), and BCM (Body Controller) directly determines the operational safety, reliability, and power performance of the entire vehicle. Therefore, the demand for multi-controller collaborative verification is becoming increasingly urgent.

[0005] Existing HiL (Hardware-in-the-Loop) testing technologies are mainly designed for single controllers and are difficult to adapt to the complex needs of multi-controller testing, resulting in the following prominent technical problems:

[0006] Firstly, the resource utilization rate is low and the testing cost is high. Each traditional HiL system can only be adapted to the testing of 1-2 specific controllers. If it is necessary to complete the joint debugging of multiple controllers, multiple independent HiL cabinets need to be deployed, which not only significantly increases the hardware procurement and maintenance costs, but also leads to a high idle rate of cabinets during non-testing periods, resulting in a waste of resources.

[0007] Secondly, the joint debugging suffers from poor compatibility and low switching efficiency. The HiL systems corresponding to different controllers are independently designed in core components such as power modules (high voltage / low voltage), signal interfaces (CAN / LIN / Ethernet), and fault injection units. During joint debugging, multiple systems need to be connected through external wiring. This not only easily causes electromagnetic interference between high voltage signals and low voltage signals, affecting the accuracy of test data, but also requires reconfiguration of the test environment, which greatly increases the switching workload of a single joint debugging and seriously prolongs the test cycle.

[0008] Third, the test scenario coverage is incomplete. Traditional HiL testing can only verify the static parameters of a single controller (such as voltage sampling accuracy and current output stability), and cannot simulate the dynamic collaborative working conditions of multiple controllers during vehicle operation. This results in a large deviation between the test results and the actual operating state of the vehicle, making it difficult to effectively verify the reliability of the collaborative logic between controllers and failing to meet the verification requirements for multi-controller collaborative operation. Summary of the Invention

[0010] To address the aforementioned technical problems, this application provides a HiL testing method based on dynamic switching of multiple controllers for both individual and joint debugging, employing the following technical solution:

[0011] The HiL testing method based on dynamic switching of multiple controllers for individual and joint debugging includes the following steps:

[0012] S1. Configure test parameters, select test modes and combinations of controllers under test through the host computer control unit. The test modes include individual test mode and joint debugging mode.

[0013] S2. The integrated HiL test cabinet constructs a target test circuit based on the test parameters through a relay switching box. The target test circuit is either a single controller test circuit or a multi-controller linkage circuit.

[0014] S3: The real-time processor runs the simulation model, generates simulated operating condition signals and transmits them to the controller under test. At the same time, it realizes signal interaction between the integrated HiL test cabinet and the controller under test through IO board and communication interface card.

[0015] S4. Collect the feedback signal of the controller under test and the operating data of the target test circuit, upload them to the host computer control unit for analysis and processing, and generate a test report.

[0016] By adopting the above technical solution, through the collaboration of the host computer control unit, the integrated HiL test cabinet and the controller under test, a single system can fully cover the individual testing and joint debugging of multiple controllers. This completely solves the problem of requiring multiple cabinets for traditional HiL testing, greatly improves the utilization rate of hardware resources, and ensures the integrity of the test through closed-loop signal interaction, providing an integrated solution for multi-controller testing.

[0017] Optionally, in step S1, the test parameters further include observation indicators, test case selection, and fault injection type. The observation indicators include high-pressure status, gear signal, torque data, and fault information. The test cases are loaded through the test case management module of the host computer control unit and support batch automated execution.

[0018] By adopting the above technical solutions, refining the test parameter types, and clarifying the loading and batch execution methods of test cases, the dimensions and flexibility of testing are enriched. The comprehensiveness of the observation indicators ensures a multi-faceted evaluation of the controller's performance, while the automated batch execution function reduces manual intervention, lowers operational complexity, further improves testing efficiency, and adapts to testing needs in different scenarios.

[0019] Optionally, in step S2, the process of constructing the target test circuit using the relay switching box includes:

[0020] Receive loop switching commands from the host computer control unit, and based on the preset loop topology library, quickly reconstruct the test loop by controlling the on / off state of the relay switching board;

[0021] The loop topology library pre-stores individual controller test loop topologies and multi-controller linkage loop topologies.

[0022] By adopting the above technical solution, and through the on / off control of the preset circuit topology library and relay switching board, the test circuit can be quickly reconstructed, avoiding the external wiring operations during traditional joint debugging. This not only shortens the circuit switching time but also reduces the risk of signal interference caused by external wiring, improves the compatibility and convenience of joint debugging, and ensures the smooth connection of the test process.

[0023] Optionally, when the relay switching box constructs a multi-controller linkage loop, a loop priority scheduling algorithm is adopted to perform loop switching from high to low according to priority P.

[0024] By adopting the above technical solutions, the loop priority scheduling algorithm provides a scientific basis for loop selection in multi-controller joint debugging by quantifying key factors such as signal transmission delay, interference risk and reconstruction complexity. It can prioritize the construction of linkage loops with high real-time performance, strong stability and easy reconstruction, effectively avoid the blindness of loop switching and ensure the signal transmission quality and test efficiency of multi-controller collaborative testing.

[0025] Optionally, in step S3, the simulated operating condition signal includes a normal operating condition signal and a fault operating condition signal;

[0026] The fault condition signal is generated by the high-voltage fault box of the integrated HiL test cabinet, including at least one of overvoltage, overcurrent, relay sticking, insulation abnormality, undervoltage, short circuit, overload and communication interruption. The timing of the fault condition signal injection is preset by the host computer control unit according to the test case or triggered in real time.

[0027] By adopting the above technical solution, various fault condition signals are generated through the high-voltage fault box, and the injection timing can be flexibly set, so that the test scenario can be extended from normal operating conditions to various fault conditions. This fills the gap that traditional tests can only verify static parameters, and can comprehensively evaluate the response performance of the controller and multiple controller combinations in fault scenarios, improve the comprehensiveness and authenticity of the test, and provide support for the verification of controller fault handling logic.

[0028] Optionally, in step S3, the simulation model is a multi-controller dynamic collaborative simulation model, and the input parameters of the model include environmental parameters, vehicle state parameters and control command parameters, and the output parameters are simulated operating condition signals.

[0029] By adopting the above technical solution, the multi-controller dynamic collaborative simulation model accurately simulates the dynamic interaction logic of multiple controllers during vehicle operation by clearly defining the input and output parameters and dynamic collaborative calculation relationships. This breaks through the limitations of traditional static testing, makes the test scenario closer to the actual operating state of the vehicle, significantly reduces the deviation between the test results and the actual working conditions, and effectively verifies the collaborative reliability between multiple controllers.

[0030] Optionally, in step S4, the analysis and processing includes signal validity verification, control logic correctness verification, and collaborative response performance evaluation. The signal validity verification is achieved by comparing the deviation between the feedback signal and a preset threshold.

[0031] By adopting the above technical solution, a standardized test data evaluation system was established through signal validity verification formulas and multi-dimensional analysis and processing methods. This system can quickly identify the validity of feedback signals and the correctness of controller control logic, accurately evaluate the collaborative response performance of multiple controllers, avoid interference from invalid data on test results, and improve the accuracy and reliability of test results.

[0032] Optionally, the controller under test includes at least one of the following: battery management system (BMS), motor controller (MCU), vehicle controller (VCU), and body controller (BCM) of a new energy vehicle.

[0033] The combination of controllers under test in the joint debugging mode can be any combination of two or more controllers.

[0034] The communication interface card supports CAN, LIN and Ethernet communication protocols, enabling high-speed data interaction between the integrated HiL test cabinet and the controller under test and the host computer control unit.

[0035] By adopting the above technical solution, the coverage of the controller under test and the communication protocols supported by the communication interface card are clarified, enabling the test method to adapt to various combinations of core controllers of new energy vehicles, while being compatible with mainstream communication protocols. This enhances the versatility and adaptability of the test method, eliminating the need to adjust the test system separately for different controllers or communication protocols, and further reducing test costs.

[0036] Optionally, the host computer control unit also integrates an AI-assisted optimization module, which includes a data training unit and a parameter optimization unit. The data training unit uses a gradient descent algorithm to train historical test data to generate a test parameter optimization model. The input of the parameter optimization model is the historical test scenario, controller type, and test results, and the output is the optimal test case and loop configuration parameters. The parameter optimization unit adjusts the current test parameters in real time according to the optimal test case and loop configuration parameters.

[0037] By adopting the above technical solutions, the execution of invalid test cases is effectively reduced, the rationality of test parameter configuration is improved, and the test cycle is further shortened while ensuring test accuracy, thus achieving a dual optimization of test efficiency and effectiveness.

[0038] In summary, this application includes at least the following beneficial technical effects:

[0039] This application effectively solves the problems of low resource utilization, poor compatibility in joint debugging, and limited test scenarios in existing HiL testing technologies through integrated design and intelligent control, and has significant technical advantages: The integrated HiL test cabinet integrates all the hardware modules required for multi-controller testing. A single system can support individual testing and arbitrary combination joint debugging of multiple controllers without the need to deploy multiple independent cabinets, greatly reducing hardware procurement and maintenance costs, and avoiding resource waste caused by idle cabinets; The relay switching box realizes rapid reconstruction of test circuits based on the loop topology library and priority scheduling algorithm, without the need for external wiring. It not only eliminates electromagnetic interference of high-voltage signals to low-voltage signals, but also greatly shortens the loop switching time and improves the efficiency of joint debugging; The multi-controller dynamic collaborative simulation model can simulate the dynamic collaborative working conditions during the operation of the whole vehicle. Combined with the multi-type fault injection function of the high-voltage fault box, the test scenarios cover the entire scenario from single controller static parameter verification to multi-controller dynamic collaboration and fault response verification. The test results are closer to the actual operating state of the whole vehicle, effectively improving the verification accuracy of individual controller performance and collaborative logic reliability. Attached Figure Description

[0041] Figure 1 This is a flowchart illustrating the HiL test method for individual and joint debugging based on dynamic switching of multiple controllers;

[0042] Figure 2 This is a module connection diagram of the system used in the HiL test method for individual and joint debugging in this application;

[0043] Figure 3 This is the design schematic diagram of the system used in the standalone and joint debugging HiL test methods in this application. Detailed Implementation

[0045] The embodiments of this application are described in detail below, and examples of the embodiments are shown in the accompanying drawings.

[0046] In the description of this specification, the references to "certain embodiments," "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples" refer to specific features, structures, materials, or characteristics described in connection with the described embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0047] This application discloses a HiL test method for individual and joint debugging based on dynamic switching of multiple controllers, referring to... Figure 1 This includes the following steps:

[0048] S1. Configure test parameters, select test modes and combinations of controllers under test through the host computer control unit. The test modes include individual test mode and joint debugging mode.

[0049] S2. The integrated HiL test cabinet constructs a target test circuit based on the test parameters through a relay switching box. The target test circuit is either a single controller test circuit or a multi-controller linkage circuit.

[0050] S3: The real-time processor runs the simulation model, generates simulated operating condition signals and transmits them to the controller under test. At the same time, it realizes signal interaction between the integrated HiL test cabinet and the controller under test through IO board and communication interface card.

[0051] S4. Collect the feedback signal of the controller under test and the operating data of the target test circuit, upload them to the host computer control unit for analysis and processing, and generate a test report.

[0052] The controller under test includes at least one of the following: battery management system (BMS), motor controller (MCU), vehicle controller (VCU), and body controller (BCM) for new energy vehicles.

[0053] The combination of controllers under test in the joint debugging mode can be any combination of two or more controllers (such as BMS+BCM, MCU+VCU+BCM, etc.).

[0054] The communication interface card supports CAN, LIN and Ethernet communication protocols to achieve high-speed data interaction between the integrated HiL test cabinet and the controller under test and the host computer control unit. When the BMS uses the CAN protocol for communication, the communication interface card switches to the CAN channel. When the VCU uses the Ethernet protocol for communication, it switches to the Ethernet channel to ensure the stability and high speed of data interaction (Ethernet communication rate ≥100Mbps, CAN communication rate ≥500kbps).

[0055] The table below shows the system module composition for implementing the HiL test method based on dynamic switching of multiple controllers for individual and joint debugging. Specific module connections are as follows: Figure 2 As shown;

[0056] Module Name Core components Functional positioning PDU power distribution box Power supply management unit Distribute power to each module within the rack Programmable power supply Low-voltage programmable power supply (0-36V, ±0.1V accuracy), high-voltage programmable power supply (0-800V, compatible with high-voltage platforms) The low-voltage programmable power supply powers the controller, while the high-voltage power supply simulates the total voltage at the battery pack terminals. IO board Multi-channel digital / analog I / O board Enables analog / digital signal acquisition and output between the cabinet and the controller, and fault injection into the controller pins. Battery Simulator Individual cell voltage simulation, individual cell temperature simulation, insulation resistance simulation, bus current simulation Simulated BMS adaptation test Relay switching box Relay switching board Supports rapid switching between single controller loops and multi-controller linkage loops. High-voltage fault box Eight types of fault injection modules, including high-voltage circuit simulation, overvoltage, overcurrent, relay sticking, and insulation abnormality. Simulate high-voltage system faults and verify the fault linkage response of multiple controllers. Communication interface card Multi-channel CAN / LIN / Ethernet communication card Achieve high-speed data interaction between the cabinet, controller, and host computer. Real-time processor Real-time simulation model execution enables closed-loop interaction between the controller, model, and physical signals, improving running speed.

[0057] Specifically, the host computer control unit includes an industrial server (running CANoe software), a GUI human-machine interface, and a test case management module. Engineers can manually set observation indicators (such as high-pressure status, gear signal, torque data, fault information, etc.) through the GUI interface, and can flexibly expand according to the type of controller under test (such as adding headlight control status, door lock signal, etc. during BCM testing), select the test mode (individual test or joint debugging), and specify the combination of controllers under test (such as selecting BMS for individual test, and selecting VCU+MCU+BMS for joint debugging) to complete the configuration of test parameters. The test case management module pre-stores individual test cases and multi-controller joint debugging test cases for various controllers, which can be manually selected or batch loaded and executed by engineers. When executing in batches, the execution order, interval time and termination conditions can be set through the host computer to realize automated testing and reduce manual intervention.

[0058] The integrated HiL test cabinet integrates core modules such as PDU power distribution box, programmable power supply (low voltage 0-36V±0.1V accuracy, high voltage 0-800V), IO board, battery simulator, relay switching box, high voltage fault box, communication interface card and real-time processor. The PDU power distribution box provides 220V or 12V power to each module in the cabinet. After receiving the loop switching command from the host computer, the relay switching box, based on the pre-stored loop topology library, controls the on / off state of the internal relay switching board to build a linkage loop between multiple controllers and cabinet modules during joint debugging, without the need for external wiring.

[0059] The process of building the loop topology library is as follows: First, the test signal requirements of various individual controllers are pre-analyzed (e.g., BMS requires battery cell voltage and insulation resistance analog signals, MCU requires torque request and speed feedback signals) and the signal interaction logic for joint debugging of multiple controllers (e.g., signal flow when VCU-MCU-BMS are linked). The corresponding loop topology structure is then constructed and stored in the storage unit of the relay switching box. When a loop switching command is received, the relay switching box matches the corresponding topology structure from the topology library according to the test mode and controller combination in the command, controls the on / off state of the internal relay switching board, and quickly completes loop reconstruction. The reconstruction time is ≤5s, significantly improving switching efficiency.

[0060] When constructing a multi-controller linkage loop using a relay switching box, a loop priority scheduling algorithm is adopted to perform loop switching from high to low priority P.

[0061] The application scenario of the loop priority scheduling algorithm is the situation where there are multiple potential linkage loop topologies during the joint debugging of multiple controllers (such as combinations like VCU + MCU + BMS, VCU + BCM + BMS, etc.). The optimal switching order is determined through the algorithm.

[0062] The expression of the loop priority scheduling algorithm is: P = A × T + B × S + C × R. Here, P is the loop switching priority, A, B, and C are weight coefficients (0 < A, B, C < 1, and A + B + C = 1), T is the signal transmission delay threshold between controllers (unit: ms, representing the real-time requirement of signal interaction between controllers, with a value range of 0.1 - 10 ms), S is the loop signal interference coefficient (0 < S < 1, and the smaller the value, the lower the loop signal interference risk), and R is the loop reconstruction complexity (0 < R < 5, and the smaller the value, the fewer the operation steps required for loop reconstruction).

[0063] In practical applications, the weight coefficients can be adjusted according to test requirements. For example, in a test scenario emphasizing real-time performance, A takes a value of 0.4, B takes a value of 0.3, and C takes a value of 0.3; the value of T is set according to the controller type. For example, the signal transmission delay threshold between VCU and MCU is set to 1 ms, and the signal transmission delay threshold between BMS and VCU is set to 5 ms; S is determined through the statistical analysis of previous test data. For example, for a loop where high-voltage signals and low-voltage signals are separated, S takes a value of 0.2, and for a mixed loop, S takes a value of 0.8; R is determined according to the number of relay actions required for the loop. When the number of actions is 1 - 2, R takes a value of 1, when the number of actions is 3 - 4, R takes a value of 3, and when the number of actions is 5 or more, R takes a value of 5. After the algorithm calculates the priority P of each candidate loop, the switching is performed in descending order of P to ensure that loops with high real-time performance, low interference, and easy reconstruction are constructed first.

[0064] The real-time processor runs a multi-controller dynamic co-simulation model, generates simulated working condition signals (such as battery cell voltage and motor torque demand under normal working conditions, overvoltage signals under fault conditions, etc.) according to the test parameters in step S1, and transmits them to the tested controller through a communication interface card; at the same time, the IO board card realizes the acquisition and output of analog / digital signals between the cabinet and the tested controller, and the communication interface card realizes high-speed data interaction through CAN, LIN or Ethernet protocols, forming a signal closed-loop of "simulation model - cabinet - tested controller".

[0065] The high-voltage fault box has eight built-in fault injection modules. The implementation methods for each type of fault are as follows: overvoltage faults are implemented by adjusting the output voltage of the high-voltage programmable power supply to a preset overvoltage value (such as 1.2 times the rated total voltage of the battery pack); overcurrent faults are implemented by simulating a current signal exceeding the rated range through the IO board; relay sticking faults are implemented by controlling the simulated relay in the high-voltage fault box to keep it closed; insulation abnormality faults are implemented by adjusting the insulation resistance simulation unit of the battery simulator to a preset abnormal value (such as <100MΩ); undervoltage, short circuit, overload, and communication interruption faults are implemented through voltage regulation, signal short circuit simulation, load simulation, and communication signal blocking modules, respectively. The fault injection timing can be preset to a specific time after the test starts (such as 10 seconds after start-up), or respond in real time to the trigger command of the host computer (such as manual triggering when the engineer discovers a test abnormality).

[0066] Regarding the multi-controller dynamic collaborative simulation model, its construction process is as follows: Based on the vehicle dynamics principle and controller control logic, a simulation model is built that includes an environmental sub-model (simulating environmental parameters such as temperature, humidity, and road conditions), a vehicle state sub-model (simulating the operating states of the motor, battery, and vehicle body), and a control interaction sub-model (simulating the instruction transmission and feedback logic between controllers). Its expression is: Y(t)=f(X(t),U(t),K), where Y(t) is the simulated operating condition output signal at time t, X(t) is the vehicle state feedback parameter at time t (including motor speed, remaining battery charge, and high-voltage circuit voltage), U(t) is the upper computer control instruction parameter at time t (including torque request, gear command, and fault trigger command), K is the model calibration coefficient (adapted according to the controller parameters of different vehicle models, with a value range of 0.8-1.2), and f is the collaborative simulation mapping function, used to simulate the dynamic interaction logic between multiple controllers.

[0067] Among the input parameters, environmental parameters are preset or adjusted in real time by the host computer (e.g., low temperature environment is set to -20℃, high temperature environment is set to 60℃), vehicle status parameters are dynamically updated by the real-time processor based on feedback signals, and control command parameters are issued by the host computer based on test cases; the co-simulation mapping function f is determined according to the controller's control strategy. For example, after the VCU receives the high voltage power-on status of the BMS, it sends a torque request to the MCU. The torque request value is calculated based on the current vehicle speed, gear, and remaining battery power. The mapping function f can be built and embedded in the real-time processor using MATLAB / Simulink tools.

[0068] The IO board and communication interface card collect feedback signals from the controller under test (such as insulation resistance feedback from BMS and motor speed feedback from MCU) and operating data of the target test circuit (such as circuit voltage, current, and signal transmission delay) in real time, and upload them to the host computer control unit. After the host computer analyzes and processes the data, it automatically generates a test report containing test results, data curves, and fault response information.

[0069] The analysis and processing include signal validity verification, control logic correctness verification, and collaborative response performance evaluation. The signal validity verification is achieved by comparing the deviation between the feedback signal and a preset threshold.

[0070] In signal validity verification, the deviation formula is: ΔV = |V1 - V0|, where ΔV is the signal deviation value, V1 is the actual feedback signal value, and V0 is the preset standard signal value. When ΔV ≤ ΔV t (ΔV) t The allowable deviation threshold is set according to the controller type, and the value ranges from 0.01V to 0.1V. A valid signal is determined when this threshold is met. t Based on the controller's performance specifications, such as the BMS's voltage sampling accuracy requirement of ±0.05V, then ΔV t Set to 0.05V, the signal is considered valid when the deviation between the actual feedback voltage and the standard voltage is ≤0.05V;

[0071] The correctness of the control logic is verified by comparing the output signal of the controller under test with the preset logic output (e.g., after receiving the high voltage ready signal from the BMS, the VCU should send a torque request to the MCU; if it does not send such a request, the control logic is deemed abnormal).

[0072] The performance evaluation of the coordinated response is achieved by analyzing the delay time and response consistency of the signal interaction between multiple controllers (e.g., after the MCU receives the torque request from the VCU, it should feed back the speed signal within 50ms; otherwise, the coordinated response performance is deemed unsatisfactory).

[0073] The host computer control unit also integrates an AI-assisted optimization module, which includes a data training unit and a parameter optimization unit. The data training unit uses a gradient descent algorithm to train historical test data to generate a test parameter optimization model. The input of the parameter optimization model is the historical test scenario, controller type, and test results, and the output is the optimal test case and loop configuration parameters. The parameter optimization unit adjusts the current test parameters in real time according to the optimal test case and loop configuration parameters.

[0074] The specific implementation steps of the AI-assisted optimization module are as follows:

[0075] (1) Data collection: Collect historical test data, including test scenarios (such as normal temperature test, low temperature fault test), controller type and combination, test parameters (such as test cases, loop configuration parameters), and test results (such as test pass rate, signal deviation value, and collaborative response delay).

[0076] (2) Data preprocessing: Clean the collected historical data, remove abnormal data (such as invalid data caused by test interruption), and standardize the data (such as converting signal deviation values ​​of different magnitudes to the 0-1 range).

[0077] (3) Model training: Initialize model parameters θ0 (test case weights are initially set to equal values, and loop configuration parameters are initially set to default values), η is the learning rate (range 0.001-0.01, used to control the parameter update step size), set the learning rate η=0.005, and the loss function threshold J t =0.005; Calculate the loss function J(θ) for the nth iteration. n If J(θ) n )≥J t Then calculate the gradient ∇J(θ) n ), and according to the update formula θ n+1 =θ n- η×∇J(θ n Update the model parameters; repeat the iteration process until J(θ) is reached. n )<J t Training is complete, and the optimized model with test parameters is obtained;

[0078] Where, θ n For the model parameters in the nth iteration (including test case weights and loop configuration parameters), θ n+1 Let ∇J(θ) be the model parameters for the (n+1)th iteration. n Let be the gradient of the loss function J(θ) at the nth iteration, where J(θ) = (1 / m) × Σ|Y pre -Y ant | (m is the number of historical test data samples, Y) pre Y is the test result predicted by the model. ant (This refers to the actual test results).

[0079] (4) Parameter optimization: During the current test, the test scenario, controller type and combination input optimization model are used to obtain the optimal test case and loop configuration parameters. The parameter optimization unit compares the optimal parameters with the current test parameters. If the deviation exceeds 10%, the current test parameters are adjusted in real time (such as changing the test case or adjusting the signal transmission delay threshold in the loop configuration), thereby improving test efficiency (reducing the execution of invalid test cases) and accuracy (reducing signal deviation).

[0080] The following is based on Figure 3 The system design principles illustrated, combined with specific test scenarios, further illustrate the technical solution of this invention:

[0081] (a) Individual test scenarios (taking BMS testing as an example)

[0082] Test configuration: The engineer selects "Individual Test Mode" through the host computer GUI interface, specifies the controller under test as BMS, configures the observation indicators as high voltage status, individual unit voltage sampling value, insulation resistance value, and fault alarm signal, selects "BMS voltage sampling accuracy test case" and "BMS insulation resistance detection test case", sets the fault injection type to insulation abnormality fault, and the injection time to 15 seconds after the test starts.

[0083] Loop construction: The host computer sends a loop switching command to the relay switching box. The relay switching box matches the BMS individual test loop topology from the loop topology library, controls the internal relay switching board to disconnect, and constructs the test loop of "PDU power distribution box → programmable power supply → battery simulator → IO board → BMS → communication interface card → real-time processor".

[0084] Signal interaction: The real-time processor runs a dynamic co-simulation model, generates simulated operating condition signals (single cell voltage 2.8-4.2V, insulation resistance 200-500MΩ) through the battery simulator, and transmits them to the BMS through the IO board; after receiving the signal, the BMS performs voltage sampling and insulation resistance detection, and feeds back the sampled value and high voltage ready signal to the communication interface card. The communication interface card uploads the feedback signal to the real-time processor and the host computer.

[0085] Fault Injection and Data Processing: 15 seconds after test startup, the host computer triggers an insulation abnormality fault injection command. The high-voltage fault box controls the insulation resistance simulation unit of the battery simulator to reduce the insulation resistance to 50MΩ. The IO board collects the fault alarm signal and sampling data from the BMS and uploads it to the host computer. The host computer verifies the voltage sampling accuracy using the signal validity verification formula ΔV=|V1-V0| (V0 is the standard output voltage of the battery simulator, V1 is the BMS sampling value, ΔV...). t =0.05V), analyze the response time and alarm accuracy of BMS to insulation abnormal faults, and generate a test report.

[0086] (II) Joint debugging scenario (taking VCU+MCU+BMS as an example)

[0087] Test configuration: The engineer selects "Joint Debugging Mode", specifies the controller combination under test as VCU+MCU+BMS, configures the observation indicators as high voltage status, torque request signal, motor speed feedback, and remaining battery power, selects "VCU-MCU-BMS Dynamic Collaborative Test Case", selects overvoltage fault as the fault injection type, and injects the fault 30 seconds after the test starts.

[0088] Loop Construction: The host computer issues a loop switching command, and the relay switching box calculates the priority based on the loop priority scheduling algorithm (A=0.4, B=0.3, C=0.3; T=2ms, S=0.2, R=2, P=0.4×2+0.3×0.2+0.3×2=1.46), matches the optimal loop topology, and constructs the linkage loop of "VCU→communication interface card→real-time processor→MCU→IO board→BMS→CAN bus→VCU".

[0089] Signal interaction: The real-time processor runs the simulation model and generates environmental parameters (normal temperature 25℃), vehicle status parameters (initial vehicle speed 0km / h), and control command parameters (VCU torque request 50N·m); after receiving the command, the VCU sends the torque request to the MCU via the CAN bus, and at the same time receives the high voltage ready signal fed back by the BMS; the MCU executes the torque request and feeds back the motor speed signal (1500r / min) to the VCU and the host computer; the BMS monitors the high voltage circuit voltage in real time and feeds back the remaining battery power (80%).

[0090] Fault Injection and Data Processing: 30 seconds after test start, the high-voltage fault box triggers an overvoltage fault (the output voltage of the high-voltage programmable power supply rises to 1.2 times the rated value); after the BMS detects the overvoltage signal, it sends a high-voltage fault alarm to the VCU via the CAN bus; after receiving the alarm, the VCU immediately sends a torque stop request to the MCU; the host computer collects the feedback signals of each controller, analyzes the correctness of the control logic (whether the VCU stops the torque request after receiving the BMS fault alarm) and the collaborative response delay (the time from BMS alarm to MCU stop response ≤ 100ms), and adjusts the test case weights through the AI-assisted optimization module to improve the efficiency of subsequent tests.

[0091] As can be seen from the above specific implementation methods, the testing method of this application is simple to operate, can be flexibly adapted to individual testing and joint debugging scenarios, and the test results are accurate and reliable, fully meeting the needs of multi-controller testing for new energy vehicles.

[0092] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A HiL test method based on dynamic switching of multiple controllers for individual and joint debugging, characterized in that, Includes the following steps: S1. Configure test parameters, select test modes and combinations of controllers under test through the host computer control unit. The test modes include individual test mode and joint debugging mode. S2. The integrated HiL test cabinet constructs a target test circuit based on the test parameters through a relay switching box. The target test circuit is either a single controller test circuit or a multi-controller linkage circuit. S3: The real-time processor runs the simulation model, generates simulated operating condition signals and transmits them to the controller under test. At the same time, it realizes signal interaction between the integrated HiL test cabinet and the controller under test through IO board and communication interface card. S4. Collect the feedback signal of the controller under test and the operating data of the target test circuit, upload them to the host computer control unit for analysis and processing, and generate a test report.

2. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, In step S1, the test parameters also include observation indicators, test case selection and fault injection type. The observation indicators include high pressure status, gear signal, torque data and fault information. The test cases are loaded through the test case management module of the host computer control unit and support batch automated execution.

3. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, In step S2, the process of constructing the target test circuit using the relay switching box includes: Receive loop switching commands from the host computer control unit, and based on the preset loop topology library, quickly reconstruct the test loop by controlling the on / off state of the relay switching board; The loop topology library pre-stores individual controller test loop topologies and multi-controller linkage loop topologies.

4. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 3, characterized in that, When the relay switching box constructs a multi-controller linkage loop, a loop priority scheduling algorithm is adopted to perform loop switching from high to low priority P.

5. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 3, characterized in that, In step S3, the simulated operating condition signal includes normal operating condition signal and fault operating condition signal; The fault condition signal is generated by the high-voltage fault box of the integrated HiL test cabinet, including at least one of overvoltage, overcurrent, relay sticking, insulation abnormality, undervoltage, short circuit, overload and communication interruption. The timing of the fault condition signal injection is preset by the host computer control unit according to the test case or triggered in real time.

6. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, In step S3, the simulation model is a multi-controller dynamic collaborative simulation model. The input parameters of the model include environmental parameters, vehicle state parameters, and control command parameters, and the output parameters are simulated operating condition signals.

7. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, In step S4, the analysis and processing includes signal validity verification, control logic correctness verification, and collaborative response performance evaluation. The signal validity verification is achieved by comparing the deviation between the feedback signal and a preset threshold.

8. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, The controller under test includes at least one of the following: battery management system (BMS), motor controller (MCU), vehicle controller (VCU), and body controller (BCM) for new energy vehicles. The combination of controllers under test in the joint debugging mode can be any combination of two or more controllers. The communication interface card supports CAN, LIN and Ethernet communication protocols, enabling high-speed data interaction between the integrated HiL test cabinet and the controller under test and the host computer control unit.

9. The HiL test method for individual and joint debugging based on dynamic switching of multiple controllers according to claim 1, characterized in that, The host computer control unit also integrates an AI-assisted optimization module, which includes a data training unit and a parameter optimization unit. The data training unit uses a gradient descent algorithm to train historical test data to generate a test parameter optimization model. The input of the parameter optimization model is the historical test scenario, controller type, and test results, and the output is the optimal test case and loop configuration parameters. The parameter optimization unit adjusts the current test parameters in real time according to the optimal test case and loop configuration parameters.

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