A network table query and data packet processing method of a switch and related devices

Abstract

The application provides a network table query method and data packet processing method of a switch and related devices. A plurality of binary classifiers are set in the on-chip memory of a switch processor. According to the output values of the exact match table, the longest prefix match table and the access control list, the pre-operation results corresponding to the output values are generated through hash operation, and the pre-operation results are pre-stored in the plurality of binary classifiers corresponding to the exact match table, the longest prefix match table and the access control list. When the network table query of the switch is performed, the plurality of binary classifiers can be used to output the output values of the switch network table in parallel based on the pre-operation results. The scheme realizes the isomorphism of the storage structures of the exact match table, the longest prefix match table and the access control list, and can dynamically allocate the storage resources of the on-chip memory when the network table query is performed, so as to adapt to the network table query in different time and different scenes.

Description

Technical Field

[0001] This application relates to the field of communications, and in particular to a method and apparatus for netlist lookup and data packet processing of a switch. Background Technology

[0002] Existing switches typically exhibit the following two characteristics when storing tables: 1. The size of the table is highly dynamic. While the overall size of the table gradually increases over time, the spatial size varies significantly depending on the table type. 2. Different types of tables have different storage structures.

[0003] When storing tables, the aforementioned switches require pre-setting table capacities for different table types. Often, the capacity of one type of table may already be exceeded, while other types of tables still have significant redundancy. Since the switch table capacities are pre-set at the factory, the only solution is to upgrade the switch hardware or replace the entire switch to meet customer needs. For switches located in the backbone network, such network outages could result in incalculable losses.

[0004] Therefore, how to dynamically allocate storage resources for different types of tables within the limited storage capacity of the switch processor, in order to adapt to netlist queries at different times and in different scenarios, has become an urgent technical problem to be solved. Summary of the Invention

[0005] To improve the efficiency of netlist lookup in a switch, this application proposes a method and related apparatus for netlist lookup and data packet processing in a switch. By setting multiple binary classifiers in the on-chip memory of the switch processor, this scheme achieves isomorphism in the storage structures of the exact matching table, the longest prefix matching table, and the access control list. It can dynamically allocate on-chip memory storage resources during netlist lookup to adapt to netlist lookup at different times and in different scenarios.

[0006] In a first aspect, embodiments of this application provide a method for querying a network table of a switch. The switch includes a processor, which includes on-chip memory and multiple binary classifiers. The method is applied to the processor and includes: acquiring a data packet, the data packet including a keyword for querying a first network table, the first network table being of one of the following types: an exact match table, a longest prefix match table, and an access control list; determining an input value for a binary classifier array corresponding to the first network table based on the keyword, the binary classifier array including multiple binary classifiers, each of the multiple binary classifiers pre-storing multiple hash values, the multiple hash values ​​corresponding to the pre-processing results of the first network table output value; inputting the input value into the binary classifier array, and using the multiple binary classifiers, outputting a set-encoded classification result corresponding to the input value in parallel based on the multiple hash values, the set-encoded classification result indicating the output value of the first network table.

[0007] In this application, multiple binary classifiers are configured in the on-chip memory of the switch processor. The pre-processing results corresponding to the output values ​​of the exact match table, longest prefix match table, and access control list are pre-stored in these binary classifiers. During a switch netlist query, these multiple binary classifiers can be used to output the switch netlist values ​​in parallel based on the pre-processing results. This scheme achieves isomorphism in the storage structures of the exact match table, longest prefix match table, and access control list. When storing tables, there is no need to pre-define table capacity for different types of tables, allowing for dynamic allocation of on-chip memory storage resources. This enables the storage of more netlist entries within the limited storage capacity of the processor. Furthermore, during netlist queries, the output values ​​of the first netlist are output using multiple binary classifiers on-chip memory, reducing the number of off-chip memory accesses. This adapts to netlist queries at different times and in different scenarios, improving the switch's netlist query efficiency.

[0008] In some embodiments, the exact matching table includes a physical address table. When the first netlist is a physical address table, determining the input value of the binary classifier array based on the keyword includes: determining the input value of the first binary classifier array based on the keyword; the input value includes the physical address of the target computing device, and the first binary classifier array includes a first number of binary classifiers, wherein the first number of binary classifiers pre-stores the pre-processing results of the port number of the target computing device.

[0009] In this application, the scheme allocates a first binary classifier array for the physical address table and uses the first binary classifier array to store the pre-processing results of the physical address table output values. Since the first binary classifier array includes multiple binary classifiers shared by the exact match table, the longest prefix match table, and the access control list, on-chip memory storage resources can be dynamically allocated during physical address table lookups to achieve dynamic expansion of physical address table storage resources.

[0010] In some embodiments, the input value is input into the binary classifier array, and the multiple binary classifiers are used to output the set-encoded classification result corresponding to the input value in parallel based on the multiple hash values. This includes: performing a hash operation on the physical address to obtain a first hash value; inputting the first hash value into the first binary classifier array, and using the first number of binary classifiers, outputting the set-encoded classification result corresponding to the first hash value in parallel based on the pre-processing result of the port number. The set-encoded classification result is used to indicate the port number of the target computing device.

[0011] In this application, the processor quickly determines whether the port number of the target computing device corresponding to the input value exists in the physical address table by using the first number of binary classifiers in the first binary classifier array, thereby avoiding querying the physical address table in off-chip memory and improving the network table query efficiency of the switch.

[0012] In some embodiments, the exact matching table includes an address resolution protocol table. When the first netlist is an address resolution protocol table, determining the input value of the binary classifier array based on the keyword includes: determining the input value of the second binary classifier array based on the keyword; the input value includes the IP address of the next hop mapping, the second binary classifier array includes a second number of binary classifiers, and the second number of binary classifiers pre-store the pre-processing results of the physical address of the target computing device.

[0013] In this application, the scheme allocates a second binary classifier array for the Address Resolution Protocol (ARP) table, and uses the second binary classifier array to store the pre-processing results of the physical address table output values. Since the second binary classifier array includes multiple binary classifiers shared by the exact match table, the longest prefix match table, and the access control list, on-chip memory storage resources can be dynamically allocated during ARP table queries to achieve dynamic expansion of ARP table storage resources.

[0014] In some embodiments, the step of inputting the input value into the binary classifier array and using the plurality of binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the plurality of hash values ​​includes: performing a hash operation on the IP address of the next-hop mapping to obtain a second hash value; inputting the second hash value into the second binary classifier array and using the second number of binary classifiers to output the set-encoded classification result corresponding to the second hash value in parallel based on the pre-processing result of the physical address, wherein the set-encoded classification result is used to indicate the physical address of the target computing device.

[0015] In this application, the processor uses the second number of binary classifiers in the second binary classifier array to quickly determine whether the physical address of the target computing device corresponding to the input value exists in the Address Resolution Protocol (ARP) table, thus avoiding querying the ARP table in off-chip memory and improving the network table lookup efficiency of the switch.

[0016] In some embodiments, the longest prefix matching table includes a forwarding information table. When the first netlist is a forwarding information table, determining the input value of the binary classifier array based on the keyword includes: determining the input value of the third binary classifier array based on the keyword; the input value includes the IP address of the target computing device, and the third binary classifier array includes a third number of binary classifiers, wherein the third number of binary classifiers pre-stores the pre-processing result of the longest prefix of the target computing device's IP address.

[0017] In this application, the scheme allocates a third binary classifier array for the forwarding information table, and uses the third binary classifier array to store the pre-processing results related to the output values ​​of the forwarding information table. Since the third binary classifier array includes multiple binary classifiers shared by the exact matching table, the longest prefix matching table, and the access control list, on-chip memory storage resources can be dynamically allocated when querying the forwarding information table, so as to realize the dynamic expansion of the forwarding information table storage resources.

[0018] In some embodiments, the step of inputting the input value into the binary classifier array and using the plurality of binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the plurality of hash values ​​includes: performing a hash operation on the IP address of the target computing device to obtain a third hash value; inputting the third hash value into the third binary classifier array, and using the third number of binary classifiers to output the set-encoded classification result corresponding to the third hash value in parallel based on the pre-processing result of the longest prefix of the IP address of the target computing device, wherein the set-encoded classification result is used to indicate the longest prefix of the IP address of the target computing device.

[0019] In this application, the processor uses the third binary classifier in the third binary classifier array to quickly determine whether the longest prefix of the IP address of the target computing device corresponding to the input value exists in the forwarding information table, thereby reducing the number of off-chip memory accesses when querying the forwarding information table and improving the network table query efficiency of the switch.

[0020] In some embodiments, the switch further includes off-chip memory connected to the processor, the off-chip memory including the forwarding information table, the forwarding information table including port numbers corresponding to the longest prefix of the IP address of the target computing device, and the method further includes: obtaining the IP address of the next-hop mapping from the forwarding information table in the off-chip memory based on the longest prefix of the IP address of the target computing device.

[0021] In this application, the processor will only perform an off-chip lookup of the forwarding information table if it determines that the longest prefix of the IP address of the target computing device corresponding to the input value exists in the forwarding information table. This reduces the number of off-chip memory accesses and improves the efficiency of the switch's netlist lookup.

[0022] In some embodiments, when the first netlist is an access control list, the input value includes the IP address of the source computing device and the IP address of the target computing device. Determining the input value of the binary classifier array based on the keyword includes: determining the input value of a fourth binary classifier array based on the IP address of the source computing device; the fourth binary classifier array includes a fourth number of binary classifiers, in which the pre-processing result of the longest prefix of the source computing device's IP address is pre-stored; and determining the input value of a fifth binary classifier array based on the IP address of the target computing device; the fifth binary classifier array includes a fifth number of binary classifiers, in which the pre-processing result of the longest prefix of the target computing device's IP address is pre-stored.

[0023] In this application, the scheme allocates a fourth binary classifier array and a fifth binary classifier array for the access control list, and uses these arrays to store the pre-processing results related to the access control list output values. Since the third binary classifier array includes an exact match table, a longest prefix match table, and multiple binary classifiers shared by the access control list, on-chip memory storage resources can be dynamically allocated during access control list queries, thereby achieving dynamic expansion of access control list storage resources.

[0024] In some embodiments, the step of inputting the input value into the binary classifier array and using the plurality of binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the plurality of hash values ​​includes: performing a hash operation on the IP address of the source computing device to obtain a fourth hash value; inputting the fourth hash value into the fourth binary classifier array, and using the fourth number of binary classifiers to output the set-encoded classification result corresponding to the fourth hash value in parallel based on the pre-processing result of the longest prefix of the IP address of the source computing device, wherein the set-encoded classification result is used to indicate the longest prefix of the IP address of the source computing device; performing a hash operation on the IP address of the target computing device to obtain a fifth hash value; inputting the fifth hash value into the fifth binary classifier array, and using the fifth number of binary classifiers to output the set-encoded classification result corresponding to the fifth hash value in parallel based on the pre-processing result of the longest prefix of the IP address of the target computing device, wherein the set-encoded classification result is used to indicate the longest prefix of the IP address of the target computing device.

[0025] In this application, the processor uses the third binary classifier in the third binary classifier array to quickly determine whether the access control list contains the longest prefix of the source computing device's IP address and the longest prefix of the target computing device's IP address corresponding to the input value. This reduces the number of off-chip memory accesses during access control list queries and improves the network table query efficiency of the switch.

[0026] In some embodiments, the off-chip memory includes the access control list, the access control list includes the execution action of the data packet, the execution action corresponds to the longest IP address prefix of the source computing device and the longest IP address prefix of the target computing device, and the method further includes: obtaining the execution action of the data packet from the access control list of the off-chip memory based on the longest IP address prefix of the source computing device and the longest IP address prefix of the target computing device.

[0027] In this application, the processor will only perform an off-chip lookup of the access control list if it determines that the longest prefix of the source computing device's IP address corresponding to the input value exists in the access control list, as well as the longest prefix of the target computing device's IP address. This reduces the number of off-chip memory accesses and improves the network table lookup efficiency of the switch.

[0028] In some embodiments, the input values ​​further include the port numbers of the source computing device and the target computing device, the execution action corresponds to the longest IP address prefix of the source computing device, the longest IP address prefix of the target computing device, and the port numbers of the source computing device and the target computing device, and the method further includes: obtaining the execution action of the data packet from the access control list of the off-chip memory based on the longest IP address prefix of the source computing device, the longest IP address prefix of the target computing device, the port number of the source computing device, and the port number of the target computing device.

[0029] In some embodiments, the method further includes: if the number of binary classifiers in the binary classifier array corresponding to the first netlist is insufficient, then the starting address and length of the binary classifiers in the first binary classifier array, the second binary classifier array, the third binary classifier array, the fourth binary classifier array, and the fifth binary classifier array are reallocated to expand the number of binary classifiers in the binary classifier array corresponding to the first netlist.

[0030] In this application, by setting multiple binary classifiers in the on-chip memory of the switch processor, the scheme achieves homogeneity in the storage structures of the exact match table, the longest prefix match table, and the access control list. When storing tables, it is not necessary to preset the table capacity for different types of tables, and the storage resources of the on-chip memory can be dynamically allocated. With the limited storage capacity of the processor, more netlist entries can be stored in the on-chip memory, reducing the access efficiency of off-chip memory and improving the netlist query efficiency of the switch.

[0031] Secondly, embodiments of this application provide a data packet processing method for a switch. The switch includes a processor, the processor includes on-chip memory, and the on-chip memory includes multiple binary classifiers. The method is applied to the processor and includes: receiving and parsing data packets to obtain keywords in the data packets, the keywords including the IP address of a source computing device and the IP address of a target computing device; inputting the IP address of the target computing device into a third binary classifier array, and using the third binary classifier array to determine the IP address of the next hop mapping, the third binary classifier array including a third number of binary classifiers, the third number of binary classifiers pre-stores the pre-processing results related to the IP address of the next hop mapping in the forwarding information table; inputting the IP address of the next hop mapping into a second binary classifier array, and using the second binary classifier array to determine the physical address of the target computing device, the second binary classifier array including a second number of binary classifiers, the second number of binary classifiers pre-stores the physical address of the target computing device in the address resolution protocol. The system first calculates the pre-processing results related to the physical address of the target device; it then inputs the physical address of the target computing device into a first binary classifier array, using this array to determine the port number of the target computing device. The first binary classifier array includes a first number of binary classifiers, which pre-store the pre-processing results related to the port number of the target computing device in the physical address table. Next, it inputs the IP address of the source computing device into a fourth binary classifier array and the IP address of the target computing device into a fifth binary classifier array. Using these arrays, it determines the execution action for the data packet. The fourth binary classifier array includes a fourth number of binary classifiers, and the fifth binary classifier array includes a fifth number of binary classifiers. These arrays pre-store the pre-processing results related to the execution action in the access control list. Finally, based on the execution action, it sends the data packet to the target computing device corresponding to the port number or discards the data packet.

[0032] In this application, on the one hand, the processor can determine the port number of the target computing device by querying the physical address table, forwarding information table, and forwarding information table through the first, second, and third binary classifier arrays. On the other hand, the processor can determine the execution action of the data packet by querying the access control list through the fourth and fifth binary classifier arrays, and process the data packet according to the aforementioned execution action. Compared with traditional data packet processing methods, this scheme utilizes binary classifiers for netlist storage, which allows for the storage of more netlist entries in on-chip memory within the limited storage capacity of the processor, reducing the number of off-chip memory accesses during netlist queries and improving the processing efficiency of data packets.

[0033] Thirdly, embodiments of this application provide a processor, the processor including on-chip memory, the on-chip memory including a binary classifier array corresponding to a first netlist, the binary classifier array including multiple binary classifiers, the multiple binary classifiers being used to store pre-processing results related to the output value of the first netlist; the type of the first netlist includes one of an exact matching table, a longest prefix matching table, and an access control list; the processor is used to acquire data packets, determine the input values ​​of the multiple binary classifiers based on keywords in the data packets, input the input values ​​into the multiple binary classifiers, and use the multiple binary classifiers to output a set-encoded classification result corresponding to the input value in parallel based on the pre-processing results, the set-encoded classification result being used to indicate the output value of the first netlist.

[0034] Thirdly, this application proposes a computer-readable storage medium including computer program instructions, which, when executed by a memory, enable the memory to perform the aforementioned network table lookup method for a switch.

[0035] Fourthly, this application proposes a computer program product containing instructions that, when executed by a memory, cause the memory to perform the aforementioned switch netlist lookup method.

[0036] Fifthly, this application proposes a computer-readable storage medium including computer program instructions, which, when executed by a memory, enable the memory to perform the aforementioned data packet processing method for a switch.

[0037] Sixthly, this application proposes a computer program product containing instructions that, when executed by a memory, cause the memory to perform the aforementioned data packet processing method for a switch.

[0038] It should be understood that the beneficial effects achieved by the technical solutions of the third and fourth aspects of the embodiments of this application and the corresponding possible implementation methods can be referred to the above-described technical effects of the first and second aspects, and will not be repeated here. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of the structure of a switch disclosed in this application;

[0040] Figure 2a This is a schematic diagram of the data structure of the physical address table;

[0041] Figure 2b This is a schematic diagram illustrating the scenario where the physical address table is stored in the first binary classifier array;

[0042] Figure 2cThis is a schematic diagram of the data structure of the Address Resolution Protocol (ARP) table;

[0043] Figure 3 This is a schematic diagram of the data structure of the forwarding information table;

[0044] Figure 4 This is a diagram illustrating the data structure of an access control list;

[0045] Figure 5 This is a schematic diagram illustrating a query scenario for the physical address table;

[0046] Figure 6 This is a schematic diagram illustrating a query scenario for the forwarding information table;

[0047] Figure 7a This is a diagram illustrating the first query scenario of an access control list;

[0048] Figure 7b This is a diagram illustrating the second query scenario for access control lists;

[0049] Figure 8a This is a schematic diagram of the first scenario involving the expansion of the forwarding information table storage resources;

[0050] Figure 8b This is a schematic diagram of the second scenario involving the expansion of the forwarding information table storage resources;

[0051] Figure 9 This is a flowchart illustrating a data processing method provided in an embodiment of this application;

[0052] Figure 10 This is a timing diagram illustrating the adjustment of the on-chip memory line table capacity;

[0053] Figure 11 This is a flowchart illustrating a data packet processing method for a switch provided in an embodiment of this application;

[0054] Figure 12 This is a schematic diagram of the structure of a processor provided in this application. Detailed Implementation

[0055] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0056] To facilitate understanding of the technical solution of this application, the relevant terms used in this document are explained below.

[0057] An Exact Match List (EM) is a table used to find matches. It records a set of key-value mappings. For each exact match, the table is searched for a key that exactly matches the input value, and the value corresponding to that key is returned. In this application, the EM table mainly includes a Media Access Control (MAC) table and an Address Resolution Protocol (ARP) table.

[0058] The Longest Prefix Match List (LPM) is a table used for finding matches. It records a mapping between query prefixes and values. For each prefix match query, the LPM needs to find the entry for the longest matching prefix and return the value corresponding to that prefix. In this application, the EM table mainly includes the Forwarding Information Base (FIB) table.

[0059] An Access Control List (ACL) is a rule-based table used for access control. An ACL contains a list of rules, each specifying the matching format for each domain, as well as the rule priority and action. Illustratively, a typical ACL includes source IP address, destination IP address, source port, and destination port. For each incoming packet, the ACL selects the highest-priority matching entry from the list and executes the corresponding action, such as permit or deny.

[0060] With the rapid growth of network traffic, switches need to carry more table entries. However, the slow increase in on-chip capacity of switch chips cannot keep up with the rapid increase in table size. Therefore, how to carry more table entries within limited chip capacity has become a core issue in switch chip design. Among the aforementioned table entries, EM, LPM, and ACL are the three most critical and largest in scale. Although the table entry storage performance of switches can be improved by optimizing memory algorithms or table entry distribution methods, these optimization methods have reached performance bottlenecks and cannot provide effective improvements.

[0061] Existing switches typically exhibit the following two characteristics when storing tables: 1. The size of the tables is highly dynamic. While the overall size of the tables gradually increases over time, the spatial size varies significantly depending on the table type. 2. Different types of tables have different storage structures. When storing tables, these switches need to preset table capacities for different table types. Often, the capacity of one type of table may be exceeded, while other types of tables still have substantial redundancy. Since the table capacity of the switches is preset at the factory, the only way to meet customer needs is through hardware upgrades or complete switch replacement. For switches located in backbone networks, this can lead to network outages that can result in incalculable losses.

[0062] A known method for storing LPM and ACL tables based on a ternary content addressable memory (TCAM) is presented. By utilizing the ternary characteristics of the TCAM chip (0, 1, ignore, or wildcard), keyword entries of arbitrary length are stored by saving keyword masks. For each prefix matching query or access control query, the entry with the lowest address among all matching entries can be selected as the final result.

[0063] The above method also requires pre-setting the capacity for different types of meters before shipment. If it is necessary to adjust the capacity of different types of meters in the TCAM chip, it can only be done offline. Therefore, it is not convenient in practical applications. At the same time, TCAM chips also have many disadvantages such as high price, high power consumption, and limited capacity.

[0064] Another known storage method based on Static Random Access Memory (SRAM) tables offers several advantages. For EM tables, which have relatively simple storage structures, a corresponding hash table can be generated based on the EM table entries and stored in SRAM. This allows for direct lookups during exact matching. For LPM tables, a corresponding trie tree can be generated based on the LPM table and stored in SRAM. Prefix matching queries can then be performed on the trie tree. For ACL tables, a corresponding decision tree can be generated based on the ACL table entries and stored in SRAM. Access control can then be performed based on the decision tree for matching.

[0065] However, the above method also requires the capacity of different types of meters to be preset before leaving the factory, and the method does not support the adjustment of the meter capacity.

[0066] Therefore, how to dynamically allocate storage resources for different types of tables within the limited storage capacity of the switch processor, in order to adapt to netlist queries at different times and in different scenarios, has become an urgent technical problem to be solved.

[0067] To improve the efficiency of network table lookup in a switch, this application proposes a method and related apparatus for network table lookup and data packet processing in a switch. By configuring multiple binary classifiers in the on-chip memory of the switch processor, and generating pre-processing results corresponding to the output values ​​of the exact match table, longest prefix match table, and access control list through hash operations based on the output values ​​of these tables, these pre-processing results are stored in the multiple binary classifiers corresponding to the exact match table, longest prefix match table, and access control list. During network table lookup, these multiple binary classifiers can be used to output the switch network table values ​​in parallel based on the pre-processing results. This scheme achieves isomorphism in the storage structures of the exact match table, longest prefix match table, and access control list, and can dynamically allocate on-chip memory storage resources during network table lookup to adapt to different times and scenarios.

[0068] For example, Figure 1 This is a schematic diagram of the structure of a switch disclosed in this application. As shown in the figure, the switch 10 includes a processor 100 and off-chip memory 200 connected to the processor 100. The processor 100 includes on-chip memory 110. The off-chip memory 200 stores the aforementioned exact match table, longest prefix match table, and access control list.

[0069] The processor 100, serving as the processing and control core of the switch 10, may include one or more of the following: a neural network processing unit (NPU), a digital signal processor (DSP), and an application processor (AP). In actual implementation, the processor 100 may employ an x86 architecture, an ARM architecture, or a computing core implemented using a combination of x86 and ARM architectures. In other words, this application does not limit the type or implementation method of the processor 100.

[0070] To achieve isomorphism in the storage structures of exact match tables, longest prefix match tables, and access control lists, the on-chip memory 110 of the processor 100 includes an EM table lookup module 111, an LPM table lookup module 112, and an ACL lookup module 113, depending on the type of the exact match table, longest prefix match table, and access control list.

[0071] Meanwhile, the on-chip memory 110 also includes an exact match table, a longest prefix match table, and an array of binary classifiers corresponding to the access control list. The array of binary classifiers includes multiple binary classifiers shared by the EM table lookup module 111, the LPM table lookup module 112, and the ACL lookup module 113.

[0072] As mentioned earlier, the EM table includes a physical address table and an address resolution protocol table, while the LPM table includes a forwarding information table.

[0073] To illustrate, the binary classifier arrays include binary classifier array 1 (first binary classifier array) corresponding to the physical address table, binary classifier array 2 (second binary classifier array) corresponding to the address resolution protocol table, binary classifier array 3 (third binary classifier array) corresponding to the forwarding information table, and binary classifier array 4 (fourth binary classifier array) and binary classifier array 5 (fifth binary classifier array) corresponding to the access control list. Each binary classifier array contains multiple binary classifiers.

[0074] Next, we will introduce binary classifiers through the following content.

[0075] Binary classifiers are widely used algorithmic models in data analysis, specifically designed to solve binary classification problems. Binary classification problems refer to classification tasks involving only two categories or labels, typically labeled as 0 and 1, or positive and negative examples. This application, by setting up multiple binary classifiers in on-chip memory, can quickly determine and output the value of a specific binary data bit using any binary classification region. It is understood that this binary data bit can only be "0" or "1".

[0076] This application generates multiple hash values ​​based on the exact match table, the longest prefix match table, and the access control list output values ​​through hash operations. These hash values ​​are then pre-stored in multiple binary classifiers corresponding to the exact match table, the longest prefix match table, and the access control list. The hash values ​​correspond to the pre-processing results of the exact match table, the longest prefix match table, and the access control list output values, respectively.

[0077] The binary classifier array 1 includes a first number of binary classifiers, where multiple hash values ​​from these classifiers correspond to the pre-processing results of the physical address table output values. Binary classifier array 2 includes a second number of binary classifiers, where multiple hash values ​​from these classifiers correspond to the pre-processing results of the address resolution protocol table output values. Binary classifier array 3 includes a third number of binary classifiers, where multiple hash values ​​from these classifiers correspond to the pre-processing results of the forwarding information table output values. Binary classifier array 4 includes a fourth number of binary classifiers, and binary classifier array 5 includes a fifth number of binary classifiers, where multiple hash values ​​from the fourth and fifth classifiers correspond to the pre-processing results of the access control list output values.

[0078] It is worth noting that the above allocation method of binary classifier array is only for the purpose of understanding this application. In actual implementation, the same set of binary classifier arrays can be allocated for netlists of the same type, or an independent binary classifier array can be allocated for each netlist. This application does not limit this.

[0079] In this application, the processor 100 is used to receive data packets transmitted over the network, parse the data packets, obtain keywords in the data packets, and determine the input value of the binary classifier array corresponding to the netlist based on the keywords.

[0080] In some possible implementations, the aforementioned keywords can be used as input values ​​for the corresponding binary classifier arrays in the LPM table lookup module 112 and the ACL lookup module 113. For example, the input value of binary classifier array 3 in the LPM table lookup module 112 includes the IP address of the target computing device; the input value of binary classifier array 4 in the ACL lookup module 113 includes the IP address of the destination computing device, and the input value of binary classifier array 5 includes the IP address of the source computing device.

[0081] In some possible implementations, the aforementioned keywords can also be used as input values ​​for the corresponding binary classifier arrays in the EM table lookup module 111. For example, the input value for binary classifier array 1 in the EM table lookup module 111 is the physical address of the target computing device, and the input value for binary classifier array 2 is the IP address of the next-hop mapping.

[0082] In some possible implementations, the aforementioned keywords can be used as input values ​​for querying access control lists in off-chip memory. For example, the input values ​​for access control lists in off-chip memory may also include the port number of the source computing device and the port number of the target computing device.

[0083] When performing a netlist lookup, the EM table lookup module 111, LPM table lookup module 112, and ACL lookup module 113 utilize the corresponding binary classifier arrays to output set-encoded classification results that match the input values ​​of the exact match table, longest prefix match table, and access control list, based on the hash values ​​in the binary classifiers. These set-encoded classification results are used to indicate the output values ​​of the exact match table, longest prefix match table, and access control list.

[0084] For example, the EM table lookup module 111 is used to input the input values ​​related to the physical address table or address resolution protocol table into the binary classifier array 1 or binary classifier array 2, and use the binary classifier array 1 or binary classifier array 2 to output the set encoding classification result corresponding to the output value of the physical address table or address resolution protocol table in parallel based on multiple hash values ​​in the binary classifier array 1 or binary classifier array 2.

[0085] Schematic, the EM table lookup module 111 inputs the physical address of the target computing device into the binary classifier array 1, and the set encoding classification result output by the binary classifier array 1 is used to indicate the port number of the target computing device; the EM table lookup module 111 inputs the IP address of the next hop mapping into the binary classifier array 2, and the set encoding classification result output by the binary classifier array 2 is used to indicate the physical address of the target computing device.

[0086] The LPM table lookup module 112 is used to input the input values ​​related to the forwarding information table into the binary classifier array 3, and use the binary classifier array 3 to output the set encoding classification result corresponding to the output value of the forwarding information table in parallel based on multiple hash values ​​in the binary classifier array 3.

[0087] Indicatively, the LPM table lookup module 112 inputs the IP address of the target computing device into the binary classifier array 3, and uses the set encoding classification result output by the binary classifier array 3 to indicate the longest prefix of the IP address of the target computing device.

[0088] The LPM table lookup module 112 is also used to send the longest prefix of the target computing device's IP address to the off-chip memory 200 so as to obtain the next-hop mapped IP address corresponding to the longest prefix of the target computing device's IP address from the forwarding information table of the off-chip memory 200.

[0089] The ACL lookup module 113 is used to input the access control list related input values ​​into the binary classifier array 4 or binary classifier array 5, and use the binary classifier array 4 or binary classifier array 5 to output the set-encoded classification result corresponding to the access control list output value in parallel based on multiple hash values ​​in the binary classifier array 4 or binary classifier array 5.

[0090] In a schematic manner, the LPM table lookup module 112 inputs the IP address of the source computing device into the binary classifier array 4. The set-encoded classification result output by the binary classifier array 4 is used to indicate the longest prefix of the source computing device's IP address. The LPM table lookup module 112 inputs the IP address of the target computing device into the binary classifier array 5. The set-encoded classification result output by the binary classifier array 5 is used to indicate the longest prefix of the target computing device's IP address.

[0091] The ACL lookup module 113 is also used to send the longest prefix of the IP address of the source computing device and the target computing device to the off-chip memory 200 so as to obtain the execution action corresponding to the longest prefix of the IP address of the source computing device and the target computing device from the access control list of the off-chip memory 200.

[0092] In some possible implementations, the input values ​​of the access control list may also include the port numbers of the source computing device and the target computing device.

[0093] The ACL lookup module 113 is also used to send the longest prefix of the source computing device's IP address, the longest prefix of the target computing device's IP address, the port number of the source computing device, and the port number of the target computing device to the off-chip memory 200, so as to obtain the execution action of the data packet corresponding to the longest prefix of the source computing device's IP address, the longest prefix of the target computing device's IP address, the port number of the source computing device, and the port number of the target computing device from the access control list of the off-chip memory 200.

[0094] Once the action to be performed on the data packet is determined, the processor 100 can process the data packet according to the action, such as forwarding the data packet to the port of the target computing device or discarding the data packet.

[0095] It is worth noting that, Figure 1 The embodiments shown are merely illustrative. For example, the division of hardware modules in the memory is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple modules or components may be combined or integrated into another component, or some features may be ignored or not executed. At the same time, the functional modules in the various embodiments of this application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0096] For example, Figure 2aThis is a schematic diagram of the physical address table data structure. The keys in the physical address table are the physical addresses of the computing devices, and the values ​​corresponding to these physical addresses are the port numbers of those computing devices. For example, if switch 10 includes 32 ports, all 32 ports of the computing device can be represented using 5-bit binary data. Specifically, the port number corresponding to the computing device with physical address "00:00:00:00:00:01" is "0", and the port number corresponding to the computing device with physical address "00:00:00:00:00:02" is "20". Therefore, the first binary classifier array requires 5 parallel binary classifiers when storing the netlist.

[0097] Indicative, Figure 2b This is a schematic diagram of the scenario where the first binary classifier array stores the physical address table. As shown in the figure, the key of element 1 in the physical address table is the physical address "00:00:00:00:00:02", and the matching result of this key is the port number "20" of a certain computing device port. The binary number corresponding to the above port number is "0b10100". The key of element 2 is the physical address "00:00:00:00:00:01", and the matching result of this key is the port number "0" of a certain computing device port. The binary number corresponding to the above port number is "0b00000".

[0098] In binary classifier array 1, binary classifier 1 is used to store the result of the pre-operation of the 5th bit of the binary number corresponding to the port number in the physical address table. Correspondingly, binary classifiers 2-5 are used to store the result of the pre-operation of the 4th to 1st bits of the binary number.

[0099] In actual implementation, the address range of each binary classifier can be preset, and the start and end addresses of any binary classifier can be determined. When it is necessary to expand or compress a binary classifier, it is only necessary to modify the start and end addresses of the binary classifier and modify the storage content.

[0100] When performing storage operations on binary classifiers, hash functions can be used to calculate the addresses of the binary classifiers corresponding to elements 1 and 2 in the physical address table, and the calculated hash values ​​can be inserted into the five binary classifiers in binary classifier array 1.

[0101] It is worth noting that this application can implement the binary classifier in binary classifier array 1 using either a Bloom filter or a color embedding method. In other words, this application does not limit the specific implementation method of the binary classifier.

[0102] Taking the binary classifier 1 implemented with a Bloom filter as an example, the processor 100 can use the EM table lookup module 111 to calculate the addresses of elements 1 and 2 respectively using hash function 1, hash function 2, and hash function 3, to obtain the addresses of elements 1 and 2 in the binary classifier. The initial value in each binary classifier is "0".

[0103] Indicatively, the fifth bit of the port number "0b10100" in element 1 is "1". Therefore, the hash values ​​calculated by hash function 1, hash function 2, and hash function 3 are all "1". The EM table lookup module 111 can set the hash values ​​in addresses 0, 3, and 6 of binary classifier 1 to 1, indicating that the fifth bit of the output value corresponding to the input value "00:00:00:00:00:02" is "1", as shown by the black arrow in the figure.

[0104] When matching the input value "00:00:00:00:00:02", the EM table lookup module 111 can read the hash values ​​in addresses 0, 3 and 6 of the binary classifier 1 respectively, and according to the same hash value "1", the binary classifier 1 outputs the 5th bit "1" of the port number corresponding to the physical address "00:00:00:00:00:02".

[0105] Correspondingly, if the fifth bit of the middle port number "0b00000" in element 2 is "0", then the EM table lookup module 111 will not perform the hash value insertion operation.

[0106] When matching the input value "00:00:00:00:00:01", the EM table lookup module 111 can use the binary classifier 1 to output the 5th bit "0" of the port number corresponding to the physical address "00:00:00:00:00:01".

[0107] Taking the binary classifier 1 implemented with a color embedding as an example, the initial value in each binary classifier is "00". The EM table lookup module 111 can use hash function 4 and hash function 5 to calculate the hash values ​​corresponding to elements 1 and 2 respectively.

[0108] Schematic: The EM table lookup module 111 can determine the hash value of element 1 as H4(e1) and its mapping address as P2 using hash function 4; and determine the hash value of element 1 as H5(e1) and its mapping address as P1 using hash function 5. The EM table lookup module 111 can insert H4(e1) into the mapping address P2 in binary classifier 1, and insert the hash value H5(e1) into the mapping address P1 in binary classifier 1. Since the fifth bit of the port number "0b10100" in element 1 is "1", it means that the edge without an item between the corresponding nodes of P1 and P2 is a positive edge. Therefore, P1 and P2 need to store the same hash value. Schematic: The EM table lookup module 111 can set the hash values ​​in P1 and P2 to "00".

[0109] When matching the input value "00:00:00:00:00:02", the EM table lookup module 111 can read the hash values ​​of P1 and P2 respectively, and use the binary classifier 1 to output the 5th bit "1" of the port number corresponding to the physical address "00:00:00:00:00:02".

[0110] Accordingly, the EM table lookup module 111 can determine the hash value of element 2 as H4(e2) and its mapping address as P4 using hash function 4; and determine the hash value of element 2 as H5(e2) and its mapping address as P3 using hash function 5. The EM table lookup module 111 can insert H4(e2) into the mapping address P4 in the binary classifier 1, and insert the hash value H5(e2) into the mapping address P3 in the binary classifier 1. Since the fifth bit of the port number "0b00000" in element 2 is "0", it means that the edge without an item between the corresponding nodes of P1 and P2 is a negative edge. Therefore, different hash values ​​need to be stored in P3 and P4. Illustratively, the EM table lookup module 111 can set all hash values ​​in P3 to "11".

[0111] When matching the input value "00:00:00:00:00:01", the EM table lookup module 111 can read the hash values ​​in P3 and P4 respectively, and use the binary classifier 1 to output the 5th bit "0" of the port number corresponding to the physical address "00:00:00:00:00:01".

[0112] Understandably, the EM table lookup module 111 can use the same method to insert the hash values ​​of elements 1 and 2 into binary classifiers 2 to 5.

[0113] When performing MAC table matching for a computing device with a physical address of "00:00:00:00:00:02", the EM table lookup module 111 can obtain the matching value "0b10100" corresponding to the input value "00:00:00:00:00:02" from the binary classifiers 1 to 5 in parallel, so as to obtain the port number "20" of the computing device.

[0114] Similarly, the processor 100 can also use the EM table lookup module 111, LPM table lookup module 112 and ACL lookup module 113 to calculate the hash value of each netlist entry in the same way, and insert the hash value into the corresponding binary classifier array. The process of inserting the hash value into each binary classifier array will not be described again.

[0115] For example, Figure 2c This is a schematic diagram of the Address Resolution Protocol (ARP) data structure. The keys in the ARP table are the IP addresses mapped to the next hop, and the values ​​corresponding to these IP addresses are the physical addresses of the computing devices. For example, the MAC address of a computing device with the IP address "192.168.1.1" is "00:00:00:00:00:01"; and the MAC address of a computing device with the IP address "192.168.2.1" is "00:00:00:00:00:02". If the physical address of these computing devices were identified using binary data, 48 data bits would be required. Therefore, the binary classification array 2 used to store the ARP table entries needs 48 parallel binary classifiers.

[0116] The processor 100 can use the EM table lookup module 111 to insert the preprocessing results of multiple computing device physical addresses in the Address Resolution Protocol (ARP) table into the binary classification array 2, so that the EM table lookup module 111 can output the set-encoded classification result corresponding to the IP address in parallel according to the IP address of a computing device. The set-encoded classification result is used to indicate the physical address of the target computing device.

[0117] For example, Figure 3 This is a schematic diagram of the data structure of the forwarding information table. The key of the forwarding information table is the longest prefix of the target computing device's IP address, and the value corresponding to this key is the IP address mapped to the next hop. For example, if the longest prefix of the target IP address matched by a certain input value is "192.168.*", then the IP address mapped to the next hop is "a". Similarly, if the longest prefix of the target IP address matched by a certain input value is "192.168.1.*", then the IP address mapped to the next hop is "b".

[0118] The longest prefix entry of the target IP address in the forwarding information table can be represented by a trie. The number of levels W of the trie is the same as the length of the binary data of the IP address. For example, if the IP address uses the IPv4 protocol, it corresponds to a 32-level trie.

[0119] In the trie 1, there are 0 to 31 levels, and the initial value of all nodes in levels 0 to 31 is "0". If the value of a node is "1", it means that a corresponding prefix exists.

[0120] Taking the IP address prefix "192.168.*" in the forwarding information table as an example, the binary data corresponding to the prefix "192.168" is "0b1100 0000 1010 1000", and this prefix is ​​located at level 15 in the trie 1.

[0121] Taking the IP address prefix "192.168.1.*" in the forwarding information table as an example, the binary data corresponding to "192.168.1." is "0b1100 0000 1010 1000 0000 0001". This prefix is ​​located at level 23 in the trie 1.

[0122] Therefore, the binary classification array 3 used to store the information of the W-layer trie 1 requires W parallel binary classifiers. Each layer of the trie 1 corresponds to one binary classifier. For example, assuming an IP address using the IPv4 protocol, the binary classification array 3 includes 32 parallel binary classifiers.

[0123] The processor 100 can use the LPM table lookup module 112 to perform hash operations on the node information in the trie 1 to obtain the pre-operation result corresponding to the longest prefix of the target IP address, and insert the above pre-operation result into the corresponding binary classifier, so that the LPM table lookup module 112 can use the binary classifier array 3 to output the set encoding classification result corresponding to the output value of the forwarding information table in parallel based on multiple hash values ​​in the binary classifier array 3.

[0124] To illustrate, consider binary classifier array 3 implemented with a color embedder as an example. The LPM table lookup module 112 determines the mapping addresses P1 and P2 corresponding to the longest prefix "192.168.*" in binary classifier 16 of binary classifier array 3 through hash operations, and inserts the same value "00" into P1 and P2. Similarly, the LPM table lookup module 112 determines the mapping addresses P1 and P2 corresponding to the longest prefix "192.168.1.*" in binary classifier 24 of binary classifier array 3 through hash operations, and inserts the same value "00" into P1 and P2.

[0125] For example, Figure 4This is a schematic diagram of the access control list (ACCUP) data structure. The ACCUP index list includes index 1 and index 2. The key corresponding to index 1 includes one or more of the following: source IP address, destination IP address, source port, and destination port. The value corresponding to the above one or more keys is the action that the switch needs to perform, such as granting access or denying access. The priority of each action in the ACCUP corresponds to its index number; the smaller the index number, the higher the priority.

[0126] For example, if the input values ​​of a data packet include the source IP address "192.168.2.1" and the destination IP address "192.168.1.1", the source IP address "192.168.2.1" can match the longest prefixes "192.168.*" and "192.168..2*" in the access control list; the destination IP address "192.168.1.1" can match the longest prefixes "192.168.*" and "192.168.1.*" in the access control list. These input values ​​can simultaneously match index 1 and index 2 in the access control list. In this case, we prioritize executing the action "allow" corresponding to index 1, based on the index number.

[0127] Understandably, if the input value of a data packet only matches index 2 in the access control list, the switch can reject the access request.

[0128] As can be seen from the entries in the access control list above, the access control list includes entries similar to the exact match table and the longest prefix table, such as the longest prefix of the source IP address and the longest prefix of the destination IP address.

[0129] Therefore, the processor 100 can perform hash operations on the node information in the trie 2 in the same way, insert the result of the pre-operation corresponding to the longest prefix of the source IP address into the 32 binary classifiers in the binary classifier array 4, perform operations on the node information in the trie 3, and insert the result of the pre-operation corresponding to the longest prefix of the target IP address into the 32 binary classifiers in the binary classifier array 5. This will not be elaborated further here.

[0130] For example, Figure 5 This is a schematic diagram of a physical address table query scenario. As shown in the figure, the EM table lookup module 111 includes a binary classifier array 1, which includes 5 parallel binary classifiers. The binary classifiers pre-store the pre-processing results of the physical address table (first netlist) output values.

[0131] When performing a physical address table lookup, if the input value is the physical address of a computing device, "00:00:00:00:00:01".

[0132] First, the processor 100 can use the EM table lookup module 111 to perform a hash operation on the physical address "00:00:00:00:00:01" to obtain the hash value (first hash value) corresponding to the above physical address.

[0133] Then, the EM table lookup module 111 can input the first hash value into the first binary classifier array 1, and use the five binary classifiers in the binary classifier array 1 to output the set-encoded classification result corresponding to the first hash value in parallel based on the pre-processing result of the physical address table output value. The set-encoded classification result is used to indicate the output value in the physical address table.

[0134] For example, taking the implementation of binary classifier array 1 using a Bloom filter as an example, binary classifier array 1 is determined according to the first hash value. Addresses "1", "3" and "6" in binary classifier 1 include the same hash value "1". Then, the EM table lookup module 111 can use the value "1" of the fifth bit of the output port number of binary classifier 1.

[0135] The binary classifier array 1 is determined based on the first hash value. Since the binary classifier 2 in the binary classifier array 1 does not include the corresponding address, the EM table lookup module 111 can use the binary classifier 2 to output the value of the fourth bit "0".

[0136] Understandably, the EM table lookup module 111 can use binary classifier 3 to output the value "1" for the third bit, binary classifier 4 to output the value "0" for the second bit, and binary classifier 5 to output the value "0" for the first bit.

[0137] Finally, the EM table lookup module 111 obtains the set encoding classification result "10100" by combining the values ​​of the 5 binary classifiers. Therefore, the output value of the first netlist determined by the EM table lookup module 111 is the port number "20".

[0138] It is understandable that if the exact matching table is the address resolution protocol table, the EM table lookup module 111 includes a binary classifier array 2 consisting of 48 parallel binary classifiers, and the binary classifier array 2 pre-stores the pre-processing results of the address resolution protocol table output values.

[0139] When performing an address resolution protocol table lookup, if the input value is the IP address of the next hop mapping...

[0140] First, the EM table lookup module 111 performs a hash operation on the IP address of the next-hop mapping to obtain a second hash value.

[0141] Then, the EM table lookup module 111 can input the second hash value into the binary classifier array 2, and use the 48 binary classifiers in the binary classifier array 2 to output the set encoding classification result corresponding to the second hash value in parallel based on the pre-processing result of the physical address. The set encoding classification result is used to indicate the physical address of the target computing device.

[0142] For example, Figure 6 This is a schematic diagram of a query scenario for the forwarding information table. As shown in the figure, the LPM table lookup module 112 includes a binary classifier array 3, which contains 32 parallel binary classifiers. The binary classifiers pre-store the pre-processing results of the longest prefix of the target computing device's IP address.

[0143] When performing a query operation on the forwarding information table, if the input value is the IP address "192.168.1.2"...

[0144] First, the processor 100 can use the LPM table lookup module 112 to perform a hash operation on the IP address "192.168.1.2" to obtain the hash value (third hash value) corresponding to the above IP address.

[0145] Then, the LPM table lookup module 112 can input the second hash value into the third binary classifier array 3. Using the 32 binary classifiers in the binary classifier array 3, based on the pre-processing results of the longest prefix of the target computing device's IP address, it outputs the set-encoded classification result corresponding to the third hash value in parallel. This set-encoded classification result is used to indicate the longest prefix of the target computing device's IP address.

[0146] To illustrate, consider binary classifier 3 implemented with a color embedder as an example. In binary classifier 16 of binary classifier array 3, P1 and P2 include the pre-processing result "00" corresponding to the prefix "192.168.*". In binary classifier 24 of binary classifier array 3, P1 and P2 include the pre-processing result "00" corresponding to the prefix "192.168.1.*".

[0147] The binary classifier array 3 is determined based on the third hash value. Binary classifier 16 of binary classifier array 1 includes the prefix "192.168.*" corresponding to the IP address "192.168.1.2", and binary classifier 24 of binary classifier array 1 includes the prefix "192.168.1.*" corresponding to the IP address "192.168.1.2". Since the depth of the trie 1 corresponding to binary classifier 24 is greater than that of the trie 1 corresponding to binary classifier 16, the longest prefix corresponding to the IP address "192.168.1.2" determined by the LPM table lookup module 112 is "192.168.1.*".

[0148] Finally, the processor can use the LPM table lookup module 112 to use the longest prefix "192.168.1.*" as the matching value, and send the matching value to the off-chip memory 200 through the hash table lookup interface of the LPM table lookup module 112, so as to obtain the IP address "b" of the next hop mapping corresponding to the longest prefix "192.168.1.*" from the forwarding information table of the off-chip memory 200.

[0149] It is worth noting that, in some possible implementations, the processor 100 may also pre-store all entries in the forwarding information table in the corresponding binary classifier array in the LPM table lookup module 112, and complete the lookup of the forwarding information table in the on-chip memory 110.

[0150] For example, Figure 7a This is a schematic diagram of the first query scenario for an Access Control List (ACL). As shown in the figure, the ACL lookup module 113 includes a binary classifier array 4 and a binary classifier array 5. Binary classifier array 4 includes 32 parallel binary classifiers, each pre-stores the pre-processing results of the ACL output values ​​and the source IP address entries. Binary classifier array 5 also includes 32 parallel binary classifiers, each pre-stores the target IP address entries from the ACL.

[0151] When performing an access control list query operation, if the input value is the source IP address and / or the destination IP address, the processor 100 can use the ACL lookup module 113 to determine whether there is a longest prefix corresponding to the source IP address and the destination IP address by using the binary classifiers in the binary classifier array 4 and binary classifier array 5 respectively, according to the forwarding information table query method.

[0152] It is understandable that if the input value is the port number of the source computing device and / or the port number of the target computing device, the processor 100 can use the ACL lookup module 113 to send the port number of the source computing device and / or the port of the target computing device as the matching value to the off-chip storage 200 so that the corresponding matching result can be obtained in the off-chip storage 200 according to the exact matching table method.

[0153] As mentioned earlier, in this application, the query for access control lists can be transformed into a query method involving multiple longest prefix matching tables and exact matching tables. Correspondingly, the access control lists stored in off-chip memory 200 also need to undergo corresponding segmentation processing.

[0154] In some possible implementations, the access control list of off-chip memory 200 can be split into sub-tables corresponding to the longest prefix of the source computing device's IP address, the longest prefix of the target computing device's IP address, the port number of the source computing device, and the port number of the target computing device, based on the matching domain. The sub-tables corresponding to the longest prefix of the source computing device's IP address and the longest prefix of the target computing device's IP address are used as the longest prefix matching table, and the sub-tables corresponding to the port numbers of the source computing device and the port numbers of the target computing device are used as the exact matching table for querying.

[0155] For example, Figure 7b This is a schematic diagram of the second query scenario of the access control list. As shown in the figure, the off-chip memory includes hash tables built based on the matching fields of the access control list. Each hash table is used to indicate in which table entries all matching results have appeared.

[0156] As mentioned earlier, the on-chip memory 110 includes a binary classifier array 4 and a binary classifier array 5. The binary classifier array 4 pre-stores the pre-processing results of the longest prefix of the source computing device's IP address, and the binary classifier array 5 pre-stores the pre-processing results of the longest prefix of the target computing device's IP address.

[0157] During the query, the processor 100 can first use the ACL lookup module 113 to perform a hash operation on the IP address of the source computing device to obtain a fourth hash value.

[0158] Then, the ACL lookup module 113 inputs the fourth hash value into the binary classifier array 4, and uses 32 binary classifiers to output the set encoding classification result corresponding to the fourth hash value in parallel based on the pre-processing result of the longest prefix of the IP address of the source computing device. The set encoding classification result is used to indicate the longest prefix of the IP address of the source computing device.

[0159] Understandably, the ACL lookup module 113 can use the same method to determine whether the longest prefix of the IP address corresponding to the destination IP address exists in the access control list using the binary classifier array 5.

[0160] First, the processor 100 can use the ACL lookup module 113 to perform a hash operation on the IP address of the target computing device to obtain a fifth hash value.

[0161] Then, the ACL lookup module 113 inputs the fifth hash value into the binary classifier array 5, and uses 32 binary classifiers to output the set encoding classification result corresponding to the fifth hash value in parallel based on the pre-processing result of the longest prefix of the IP address of the target computing device. The set encoding classification result is used to indicate the longest prefix of the IP address of the target computing device.

[0162] Finally, the processor 100 can use the longest prefix of the source computing device's IP address and the longest prefix of the target computing device's IP address as matching values, and send the matching values ​​to the off-chip memory 200 through the hash table lookup interface of the ACL lookup module 113.

[0163] In some possible implementations, if the input value of the ACL includes the port numbers of the source computing device and the target computing device, the processor may also use the port numbers of the source computing device and the target computing device as the matching value, and send the matching value to the off-chip memory 200 through the hash table lookup interface of the ACL lookup module 113.

[0164] The off-chip memory 200 includes a hash table generated based on a complete access control list. The entries in the hash table may include the longest prefix of the source computing device's IP address, the longest prefix of the target computing device's IP address, the port number of the source computing device, the port number of the target computing device, and the action that the switch needs to perform.

[0165] The hash table described above can be divided into multiple sub-tables based on the type of the entries. These sub-tables include sub-tables corresponding to the longest IP address prefix of the source computing device, the longest IP address prefix of the target computing device, the port number of the source computing device, and the port number of the target computing device. Each sub-table includes corresponding matching rules.

[0166] The matching rule described above consists of four binary digits, each corresponding to an index in the access control list. For illustration, the four binary digits of "0b0001" correspond to index numbers 0 through 4 from right to left. A "1" indicates that the IP address prefix "0b0*" matches the action corresponding to that index number, while a "0" indicates that the IP address prefix "0b0*" does not match the action corresponding to that index number.

[0167] In the sub-table corresponding to the longest prefix of the source IP address, the matching rule for the longest prefix 0b* is 0b0001, indicating that the index number that this prefix can match is "3", and the action corresponding to this index number is "discard"; the matching rule for 0b0* is 0b0110, indicating that the index numbers that this prefix can match are "1" and "2". As mentioned before, according to the size of the index numbers "1" and "2", switch 10 needs to execute the action "discard" corresponding to the index number "1" according to the priority; the matching rule for 0b00* is 0b1000, indicating that the index number that this prefix can match is "0", and the action corresponding to this index number is "pass".

[0168] Understandably, in the sub-table corresponding to the longest prefix of the target IP address, the action corresponding to the longest prefix 0b* is "drop"; the action corresponding to the longest prefix 0b1* is "drop"; and the action corresponding to the longest prefix 0b0* is "allow".

[0169] Then, the processor 100 can match the matching value with the above sub-table, take the intersection of the query results to obtain the index number with the most matching items, and determine the execution action of the data packet based on the above index number.

[0170] Finally, the off-chip memory 200 sends the execution action to the ACL lookup module 113, where the processor 100 performs the corresponding action on the data packet to complete the access control list lookup process.

[0171] Since the exact matching table, the longest prefix matching table, and the pre-computation results in the access control list are stored through a binary classifier, when the storage resources of a certain type of netlist are insufficient, this application can expand the storage resources of the netlist by releasing the length of the binary classifier corresponding to other netlists.

[0172] Indicative, Figure 8a This is a schematic diagram of the first scenario of expanding the forwarding information table storage resources. As shown in the figure, the storage resources in the on-chip memory 100 used to store the forwarding information table have been exhausted (as shown in the gray part in the upper right of the figure). The binary classifier array used to store the physical address table also includes free length. The binary classifier array used to store the access control list includes free binary classifiers. At the same time, the allocated binary classifiers in the binary classifier array also include free length.

[0173] The processor 100 can dynamically adjust the storage resources in the binary classifier array corresponding to the physical address table and the binary classifier array corresponding to the access control list during runtime.

[0174] Indicative, Figure 8b This is a second scenario diagram illustrating the expansion of storage resources for the forwarding information table, where there is insufficient binary classifier to store the entries in the forwarding information table when querying it.

[0175] First, the processor can perform a netlist lookup on the on-chip memory 110. The processor 100 can directly query the complete forwarding information table in the off-chip memory 200 based on the keywords in the data packet.

[0176] Then, the processor 100 can compress the length of the binary classifier storing the physical address table entries, reallocate the starting address and length of the binary classifier storing the forwarding information table entries, calculate the new binary classifier content, write the forwarding information table entries into the new binary classifier, and then initiate a query of the on-chip forwarding information table, as shown by the horizontal arrow in the figure.

[0177] In some possible implementations, if the resources of a binary classifier are exhausted, there are sufficient binary classifiers for storing and forwarding information table entries.

[0178] First, the processor 100 can directly calculate the new binary classifier structure and allocate the starting address and length of the binary classifier in the spare part of the chip.

[0179] Then, the processor 100 can write the forwarding information table entries from the resource-depleted binary classifier into a new binary classifier, and then directly point the address of the binary classifier to the new memory, completing the dynamic adjustment for continuous on-chip operation, as shown by the vertical arrow in the figure.

[0180] Next, based on the content described above, a method for querying the network table of a switch provided in this application embodiment will be introduced. It is understood that this method is proposed based on the content described above, and some or all of the content of this method can be found in the description above.

[0181] Please see Figure 9 , Figure 9 This is a flowchart illustrating a data processing method provided in an embodiment of this application. As shown in the figure, a network table lookup of the switch can be performed through steps S910 to S930. It can be understood that when performing a network table lookup of the switch, this method involves... Figure 1 The processor 100 shown executes.

[0182] S910: Acquire data packets.

[0183] As previously described, switch 10 can obtain data packets transmitted over the network through processor 100. The data packets include keywords used for querying the first netlist.

[0184] The keywords mentioned above include the IP address and port number of both the target and source computing devices. The first netlist can be one of the following types: an exact match table, a longest prefix match table, or an access control list.

[0185] In some possible implementations, the keywords may also include the IP address of the next-hop mapping and the physical address of the computing device.

[0186] S920: Determine the input values ​​of the binary classifier array corresponding to the first netlist based on the keywords.

[0187] As mentioned earlier, to achieve isomorphism in the storage structures of the exact matching table, the longest prefix matching table, and the access control list, this application sets up a binary classifier array corresponding to the first netlist in on-chip memory, for each of these types. This binary classifier array includes multiple binary classifiers. Each of these binary classifiers pre-stores multiple hash values, which correspond to the pre-processing results of the first netlist output value.

[0188] The processor 100 can determine the input value of the binary classifier array corresponding to the first netlist based on the keywords in step S910.

[0189] In some possible ways, the first netlist can be a physical address table in an exact match table type.

[0190] When the first netlist is a physical address table, the processor 100 can determine the input value of the first binary classifier array as the physical address of the target computing device based on the keyword in step S910. The first binary classifier array includes a first number of binary classifiers, which pre-store the pre-processing results of the port numbers of the target computing device. For example, if the switch 10 includes 32 ports, all 32 ports of the computing device can be represented by 5 bits of binary data; therefore, the first binary classifier array includes 5 binary classifiers.

[0191] As one possible implementation, the first netlist can be an address resolution protocol table in an exact match table type.

[0192] When the first netlist is an Address Resolution Protocol (ARP) table, the processor 100 can determine the input value of the second binary classifier array as the IP address mapped to the next hop based on the keyword in step S910. The second binary classifier array includes a second number of binary classifiers, which pre-store the results of pre-processing the physical address of the target computing device. For example, representing the physical address of a computing device using binary data requires 48 data bits; therefore, the second binary classifier array includes 48 binary classifiers.

[0193] In some possible ways, the first netlist can be the forwarding information table in the longest prefix match table.

[0194] When the first netlist is a forwarding information table, the processor 100 can determine the input value of the third binary classifier array as the IP address of the target computing device based on the keyword in step S910. The third binary classifier array includes a third number of binary classifiers, which pre-store the pre-processing results of the longest prefix of the target computing device's IP address. For example, if the switch network uses the IPv4 protocol, it means that the IP address of any computing device requires 32 data bits; therefore, the third binary classifier array includes 32 binary classifiers.

[0195] As one possible implementation, the first netlist can be an access control list.

[0196] When the first netlist is an access control list, this application can transform the query of the access control list into multiple sub-tables similar to the longest prefix matching table and multiple sub-tables similar to the exact matching table for separate queries.

[0197] The processor 100 can determine the input value of the fourth binary classifier array as the IP address of the source computing device based on the keyword in step S910. The fourth binary classifier array includes a fourth number of binary classifiers, which pre-store the pre-processing results of the longest prefix of the source computing device's IP address. For example, if the switch network uses the IPv4 protocol, it means that the IP address of any computing device requires 32 data bits; therefore, the fourth binary classifier array includes 32 binary classifiers.

[0198] It is understandable that the processor 100 can determine the input value of the fifth binary classifier array as the IP address of the target computing device in the same way. The fifth binary classifier array includes a fifth number of binary classifiers, in which the pre-processing results of the longest prefix of the IP address of the target computing device are pre-stored.

[0199] S930: Input the input value into a binary classifier array, and use multiple binary classifiers based on multiple hash values ​​to output the set-encoded classification result corresponding to the input value in parallel.

[0200] The processor 100 can input the input value determined in step S920 into the binary classifier array corresponding to the first netlist, and use multiple binary classifiers in the binary classifier array to output the set-encoded classification result corresponding to the input value in parallel based on multiple hash values. The set-encoded classification result is used to indicate the output value of the first netlist.

[0201] In some possible ways, when the first netlist is a physical address table, the input value of the first netlist is the physical address of the target computing device.

[0202] As mentioned above, the on-chip memory 110 includes a first binary classifier array, which pre-stores the pre-processing results of the target computing device port number.

[0203] First, the processor 100 can perform a hash operation on the physical address to obtain the first hash value.

[0204] Then, the processor 100 can input the first hash value into the first binary classifier array, and using the first number of binary classifiers, based on the pre-processing results of the port number, output the set-encoded classification result corresponding to the first hash value in parallel. The set-encoded classification result is used to indicate the port number of the target computing device.

[0205] As one possible approach, when the first netlist is an Address Resolution Protocol (ARP) table, the input value of the first netlist is the IP address mapped to the next hop.

[0206] As mentioned earlier, the on-chip memory 110 includes a second binary classifier array, which pre-stores the pre-processing results of the physical address of the target computing device.

[0207] First, the processor 100 can perform a hash operation on the IP address of the next-hop mapping to obtain a second hash value.

[0208] Then, the processor 100 can input the second hash value into a second binary classifier array, and using a second number of binary classifiers, based on the pre-processing results of the physical address, output the set-encoded classification result corresponding to the second hash value in parallel. The set-encoded classification result is used to indicate the physical address of the target computing device.

[0209] In some possible ways, when the first netlist is a forwarding information table, the input value of the first netlist is the IP address of the target computing device.

[0210] As mentioned earlier, the on-chip memory 110 includes a three-classifier array, which pre-stores the pre-processing results of the longest prefix of the target computing device's IP address.

[0211] First, the processor 100 can perform a hash operation on the IP address of the target computing device to obtain a third hash value.

[0212] Then, the processor 100 can input the third hash value into the third binary classifier array, and using the third number of binary classifiers, based on the preprocessing results of the longest prefix of the target computing device's IP address, output the set-encoded classification result corresponding to the third hash value in parallel. The set-encoded classification result is used to indicate the longest prefix of the target computing device's IP address.

[0213] As mentioned earlier, the complete forwarding information table is stored in the off-chip memory 200.

[0214] Finally, the processor 100 can send the longest prefix of the target computing device's IP address to the off-chip memory 200 in order to obtain the IP address of the next-hop mapping from the forwarding information table in the off-chip memory.

[0215] In some possible ways, when the first netlist is an access control list, the input values ​​of the first netlist may include the IP address of the source computing device and the IP address of the target computing device.

[0216] As mentioned earlier, the on-chip memory 110 includes a fourth binary classifier array. This fourth binary classifier array pre-stores the pre-processing results of the longest prefix of the source computing device's IP address.

[0217] First, the processor 100 can perform a hash operation on the IP address of the source computing device to obtain a fourth hash value.

[0218] Then, the processor 100 can input the fourth hash value into the fourth binary classifier array, and using the fourth number of binary classifiers, based on the preprocessing results of the longest prefix of the target computing device's IP address, output the set-encoded classification result corresponding to the fourth hash value in parallel. The set-encoded classification result is used to indicate the longest prefix of the source computing device's IP address.

[0219] As mentioned earlier, the on-chip memory 110 includes a fifth binary classifier array. This fifth binary classifier array pre-stores the pre-processing results of the longest prefix of the target computing device's IP address.

[0220] First, the processor 100 can perform a hash operation on the IP address of the target computing device to obtain a fifth hash value.

[0221] Then, the processor 100 can input the fifth hash value into the fifth binary classifier array, and using the fifth number of binary classifiers, based on the preprocessing results of the longest prefix of the target computing device's IP address, output the set-encoded classification result corresponding to the fifth hash value in parallel. The set-encoded classification result is used to indicate the longest prefix of the target computing device's IP address.

[0222] As mentioned earlier, the complete access control list is stored in off-chip memory 200.

[0223] Finally, the processor 100 can send the longest prefix of the source computing device's IP address and the longest prefix of the target computing device's IP address to the off-chip memory 200 so as to obtain the data packet execution action from the forwarding information table in the off-chip memory.

[0224] In some possible implementations, when the first netlist is an access control list, the input values ​​of the first netlist may also include the port number of the source computing device and the port number of the target computing device.

[0225] The processor 100 can also send the longest prefix of the IP address of the source computing device, the longest prefix of the IP address of the target computing device, the port number of the source computing device, and the port number of the target computing device to the off-chip memory 200 so as to obtain the execution action of the data packet from the forwarding information table of the off-chip memory.

[0226] As mentioned above, the binary classifier array corresponding to the first netlist includes multiple binary classifiers, which are used to store the pre-processing results of the output values ​​of the first netlist.

[0227] It is worth noting that the first binary classifier array, the second binary classifier array, the third binary classifier array, the fourth binary classifier array, and the fifth binary classifier array share multiple binary classifiers in the on-chip memory 100.

[0228] Therefore, when there is insufficient storage resources for the binary classifiers in the binary classifier array corresponding to the first netlist.

[0229] In some possible implementations, if the on-chip memory 100 has insufficient storage resources, this application may also reallocate the starting addresses and lengths of the binary classifiers in the first, second, third, fourth, and fifth binary classifier arrays according to their usage, so as to achieve dynamic expansion of the binary classifiers in the binary classifier array corresponding to the first netlist.

[0230] As one possible implementation, if the on-chip memory 100 has sufficient storage resources, this application can directly calculate a new binary classifier structure, allocate the starting address and length of the binary classifier in the spare part of the on-chip memory 100, write the pre-operation result of the first netlist output value into the new binary classifier, and the processor 100 can point the address of the binary classifier to the new memory to realize the dynamic expansion of the binary classifier in the binary classifier array corresponding to the first netlist.

[0231] For example, Figure 10 This is a timing diagram illustrating the adjustment of the on-chip memory line table capacity, as shown in the figure, simulating a situation where the on-chip memory 100 has insufficient storage resources.

[0232] First, at time t1, the operator uses the control plane of switch 10 to switch the first binary classifier array in on-chip memory 100, which is used to store the exact matching table, to the third binary classifier array, which is used to store the forwarding information table. Simultaneously, the operator disables on-chip lookup via the control plane of switch 10.

[0233] Secondly, after the switch from the first binary classifier array to the second binary classifier array is completed at time t2, the processor can use the third binary classifier array in on-chip memory plus the method of querying off-chip memory to query the forwarding information table.

[0234] Then, at time t3, the operator, through the control plane of switch 10, switches the third binary classifier array in on-chip memory 100, which is used to store the forwarding information table, to the fourth and fifth binary classifier arrays, which are used to store the access control list. Simultaneously, on-chip lookup is disabled.

[0235] Finally, at time t4, the switching from the third binary classifier array to the fourth and fifth binary classifier arrays is completed. The processor 100 can use the on-chip memory of the fourth and fifth binary classifier arrays, as well as the off-chip memory query method, to perform access control list queries.

[0236] In some possible implementations, the operator sets the on-chip memory 100 to 4M and evenly distributes the 4M of storage resources to the physical address table, address resolution protocol table, forwarding information table, and access control list.

[0237] Then, the staff stored the physical address table, address resolution protocol table, forwarding information table, and any netlist in the access control list in the on-chip memory using multiple binary classifiers.

[0238] Experiments revealed that, compared to fixed memory methods, the technical solution that dynamically adjusts on-chip memory storage resources can increase the maximum number of entries in the physical address table to 7.73 times that of the traditional solution, the maximum number of entries in the address resolution protocol table to 3.94 times, the maximum number of entries in the forwarding information table to 15.7 times, and the maximum number of entries in the access control list to 21.3 times.

[0239] This application proposes a method and related apparatus for netlist lookup and data packet processing in a switch. By configuring multiple binary classifiers in the on-chip memory of the switch processor, and generating pre-processing results corresponding to the output values ​​of the exact match table, longest prefix match table, and access control list through hash operations based on these output values, the pre-processing results are stored in the multiple binary classifiers corresponding to the exact match table, longest prefix match table, and access control list. During the switch's netlist lookup, these multiple binary classifiers can be used to output the switch's netlist values ​​in parallel based on the pre-processing results. This scheme achieves isomorphism in the storage structures of the exact match table, longest prefix match table, and access control list, and can dynamically allocate on-chip memory storage resources during netlist lookups to adapt to different times and scenarios.

[0240] Secondly, based on the content described above, a data packet processing method for a switch provided in the embodiments of this application will be introduced. It is understood that this method is proposed based on the content described above, and some or all of the content of this method can be found in the description above.

[0241] Please see Figure 11 , Figure 11This is a flowchart illustrating a data packet processing method for a switch according to an embodiment of this application. As shown in the figure, data packet processing for the switch can be implemented through steps S10 to S60. It can be understood that, during data packet processing for the switch, this method involves... Figure 1 The processor 100 shown executes.

[0242] S10: Receive data packets and parse them to obtain the IP address of the source computing device and the IP address of the target computing device.

[0243] As previously mentioned, switch 10 can obtain data packets transmitted over the network through processor 100. The data packets include keywords used for performing network table lookups on the switch.

[0244] The keywords mentioned above include the IP address and port number of the target computing device, as well as the IP address and port number of the source computing device.

[0245] S20: Input the IP address of the target computing device into the third binary classifier array, and use the third binary classifier array to determine the IP address of the next hop mapping.

[0246] Switch 10 can input the IP address of the target computing device into the third binary classifier array through processor 100, and use the third binary classifier array to determine the IP address of the next hop mapping.

[0247] The third binary classifier array includes a third number of binary classifiers, which pre-store the pre-processing results related to the IP address of the next-hop mapping in the forwarding information table. These pre-processing results related to the IP address of the next-hop mapping are the longest prefix of the target computing device's IP address.

[0248] S30: Input the IP address of the next-hop mapping into the second binary classifier array, and use the second binary classifier array to determine the physical address of the target computing device.

[0249] The switch 10 can input the IP address mapped to the next hop into the second binary classifier array through the processor 100, and use the second binary classifier array to determine the physical address of the target computing device.

[0250] The second binary classifier array includes a second number of binary classifiers, which pre-store the pre-processing results related to the physical address of the target device in the address resolution protocol.

[0251] S40: Input the physical address of the target computing device into the first binary classifier array, and use the first binary classifier array to determine the port number of the target computing device.

[0252] The switch 10 can input the physical address of the target computing device into the first binary classifier array through the processor 100, and use the first binary classifier array to determine the port number of the target computing device.

[0253] The first binary classifier array includes a first number of binary classifiers, which pre-store the pre-processing results related to the port number of the target computing device in the physical address table.

[0254] S50: Input the IP address of the source computing device into the fourth binary classifier array and input the IP address of the target computing device into the fifth binary classifier array. Use the fourth and fifth binary classifier arrays to determine the execution action of the data packet.

[0255] The switch 10 can input the IP address of the source computing device into the fourth binary classifier array and the IP address of the target computing device into the fifth binary classifier array through the processor 100, and use the fourth binary classifier array and the fifth binary classifier array to determine the execution action of the data packet.

[0256] The fourth binary classifier array includes a fourth number of binary classifiers, and the fifth binary classifier array includes a fifth number of binary classifiers. The fourth and fifth binary classifiers pre-store the pre-processing results related to the actions described in the access control list. These pre-processing results include the longest prefix of the source computing device's IP address stored in the fourth binary classifier, and the longest prefix of the target computing device's IP address stored in the fifth binary classifier.

[0257] S60: Depending on the action performed, send the data packet to the computing device corresponding to the port number or discard the data packet.

[0258] In this application, on the one hand, the processor can determine the port number of the target computing device by querying the physical address table, forwarding information table, and forwarding information table through the first, second, and third binary classifier arrays. On the other hand, the processor can determine the execution action of the data packet by querying the access control list through the fourth and fifth binary classifier arrays, and process the data packet according to the aforementioned execution action. Compared with traditional data packet processing methods, this scheme utilizes binary classifiers for netlist storage, which allows for the storage of more netlist entries in on-chip memory within the limited storage capacity of the processor, reducing the number of off-chip memory accesses during netlist queries and improving the processing efficiency of data packets.

[0259] Thirdly, based on the content described above, a processor provided in the embodiments of this application will be introduced. It is understood that this processor is proposed based on the content described above, and some or all of its components can be found in the description above.

[0260] For example, Figure 12 This is a schematic diagram of the structure of a processor provided in this application. As shown in the figure, the processor 100 includes on-chip memory 110, and the on-chip memory 110 includes a binary classifier array corresponding to the first netlist. The binary classifier array includes multiple binary classifiers, which are used to store the pre-processing results related to the output value of the first netlist.

[0261] The first netlist includes one of the following types: exact match table, longest prefix match table, and access control list.

[0262] The processor 100 is used to acquire data packets, determine the input values ​​of multiple binary classifiers based on the keywords in the data packets, input the input values ​​into the multiple binary classifiers, and use the multiple binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the pre-processing results related to the output value of the first netlist. The set-encoded classification result is used to indicate the output value of the first netlist.

[0263] In addition to the methods, apparatus, and electronic devices described above, embodiments of this application may also provide a computer program product, comprising computer program instructions. When executed by a processor, the computer program instructions cause the processor to perform the steps of the methods in the various embodiments of this application described in the "Method" section of this specification. The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The computer program code can be in source code form, object code form, executable file, or some intermediate form. The computer program code can be executed entirely on a user's computing device, partially on a user's device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0264] Furthermore, embodiments of this application may also provide a computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps of the methods described in the "Method" section of this specification according to the various embodiments of this disclosure. The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. It should be noted that the content contained in the computer-readable medium may be appropriately added to or subtracted from the requirements of legislation and patent practice in a jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media may not include electrical carrier signals and telecommunication signals.

[0265] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0266] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0267] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of the various embodiments of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the specific details described above.

[0268] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0269] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0270] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0271] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The specific embodiments described above have further detailed the purpose, technical solutions, and beneficial effects of this application. It should be understood that the above descriptions are merely specific embodiments of this application and are not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

[0272] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this application. It should be understood that the above description is only a specific embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for querying a network table on a switch, characterized in that, The switch includes a processor, the processor includes on-chip memory, the on-chip memory includes multiple binary classifiers, and the method is applied to the processor, the method including: Obtain a data packet, the data packet including keywords for querying the first netlist, the first netlist being of the type including an exact match table, a longest prefix match table, and an access control list; Based on the keyword, the input value of the binary classifier array corresponding to the first netlist is determined. The binary classifier array includes multiple binary classifiers. Each of the multiple binary classifiers stores multiple hash values ​​in advance. The multiple hash values ​​correspond to the pre-processing results of the output value of the first netlist. The input value is input into the binary classifier array. Using the multiple binary classifiers, the set-encoded classification result corresponding to the input value is output in parallel based on the multiple hash values. The set-encoded classification result is used to indicate the output value of the first netlist.

2. The method according to claim 1, characterized in that, The exact matching table includes a physical address table. When the first netlist is a physical address table, determining the input value of the binary classifier array based on the keywords includes: The input value of the first binary classifier array is determined based on the keyword; the input value includes the physical address of the target computing device, and the first binary classifier array includes a first number of binary classifiers, in which the pre-processing results of the port number of the target computing device are pre-stored.

3. The method according to claim 2, characterized in that, The step of inputting the input value into the binary classifier array and using the multiple binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the multiple hash values ​​includes: Perform a hash operation on the physical address to obtain a first hash value; The first hash value is input into the first binary classifier array. Using the first number of binary classifiers, based on the pre-processing result of the port number, the set encoding classification result corresponding to the first hash value is output in parallel. The set encoding classification result is used to indicate the port number of the target computing device.

4. The method according to claim 1, characterized in that, The exact matching table includes an address resolution protocol table. When the first netlist is an address resolution protocol table, determining the input value of the binary classifier array based on the keyword includes: The input value of the second binary classifier array is determined based on the keyword; the input value includes the IP address of the next hop mapping, and the second binary classifier array includes a second number of binary classifiers, in which the pre-processing results of the physical address of the target computing device are pre-stored.

5. The method according to claim 4, characterized in that, The step of inputting the input value into the binary classifier array and using the multiple binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the multiple hash values ​​includes: A second hash value is obtained by performing a hash operation on the IP address of the next-hop mapping; The second hash value is input into the second binary classifier array. Using the second number of binary classifiers, based on the pre-processing result of the physical address, the set-encoded classification result corresponding to the second hash value is output in parallel. The set-encoded classification result is used to indicate the physical address of the target computing device.

6. The method according to claim 1, characterized in that, The longest prefix matching table includes a forwarding information table. When the first network table is a forwarding information table, determining the input value of the binary classifier array based on the keyword includes: The input value of the third binary classifier array is determined based on the keyword; the input value includes the IP address of the target computing device, and the third binary classifier array includes a third number of binary classifiers, in which the pre-processing result of the longest prefix of the target computing device's IP address is pre-stored.

7. The method according to claim 6, characterized in that, The step of inputting the input value into the binary classifier array and using the multiple binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the multiple hash values ​​includes: A third hash value is obtained by performing a hash operation on the IP address of the target computing device; The third hash value is input into the third binary classifier array. Using the third number of binary classifiers, based on the pre-processing result of the longest prefix of the IP address of the target computing device, the set encoding classification result corresponding to the third hash value is output in parallel. The set encoding classification result is used to indicate the longest prefix of the IP address of the target computing device.

8. The method according to claim 7, characterized in that, The switch further includes off-chip memory connected to the processor, the off-chip memory including the forwarding information table, the forwarding information table including the port number corresponding to the longest prefix of the IP address of the target computing device, and the method further includes: Based on the longest prefix of the target computing device's IP address, the IP address of the next-hop mapping is obtained from the forwarding information table in the off-chip memory.

9. The method according to claim 1, characterized in that, When the first netlist is an access control list, the input values ​​include the IP address of the source computing device and the IP address of the target computing device. The step of determining the input values ​​for the binary classifier array based on the keywords includes: The input value of the fourth binary classifier array is determined based on the IP address of the source computing device; the fourth binary classifier array includes a fourth number of binary classifiers, and the pre-processing result of the longest prefix of the IP address of the source computing device is pre-stored in the fourth number of binary classifiers; The input value of the fifth binary classifier array is determined based on the IP address of the target computing device; the fifth binary classifier array includes a fifth number of binary classifiers, and the pre-processing results of the longest prefix of the IP address of the target computing device are pre-stored in the fifth number of binary classifiers.

10. The method according to any one of claims 8-9, characterized in that, The step of inputting the input value into the binary classifier array and using the multiple binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the multiple hash values ​​includes: A fourth hash value is obtained by performing a hash operation on the IP address of the source computing device; The fourth hash value is input into the fourth binary classifier array. Using the fourth number of binary classifiers, based on the pre-processing result of the longest prefix of the IP address of the source computing device, the set encoding classification result corresponding to the fourth hash value is output in parallel. The set encoding classification result is used to indicate the longest prefix of the IP address of the source computing device. A fifth hash value is obtained by performing a hash operation on the IP address of the target computing device; The fifth hash value is input into the fifth binary classifier array. Using the fifth number of binary classifiers, based on the pre-processing result of the longest prefix of the IP address of the target computing device, the set encoding classification result corresponding to the fifth hash value is output in parallel. The set encoding classification result is used to indicate the longest prefix of the IP address of the target computing device.

11. The method according to claim 10, characterized in that, The off-chip memory includes the access control list, which includes the execution action of the data packet. The execution action corresponds to the longest prefix of the IP address of the source computing device and the longest prefix of the IP address of the target computing device. The method further includes: Based on the longest prefix of the IP address of the source computing device and the longest prefix of the IP address of the target computing device, the execution action of the data packet is obtained from the access control list of the off-chip memory.

12. The method according to claim 11, characterized in that, The input values ​​also include the port numbers of the source computing device and the target computing device. The execution action corresponds to the longest prefix of the IP address of the source computing device, the longest prefix of the IP address of the target computing device, and the port numbers of the source computing device and the target computing device. The method further includes: Based on the longest prefix of the IP address of the source computing device, the longest prefix of the IP address of the target computing device, the port number of the source computing device, and the port number of the target computing device, the execution action of the data packet is obtained from the access control list of the off-chip memory.

13. The method according to any one of claims 1-12, characterized in that, The method further includes: If the number of binary classifiers in the binary classifier array corresponding to the first netlist is insufficient, the starting address and length of the binary classifiers in the first binary classifier array, the second binary classifier array, the third binary classifier array, the fourth binary classifier array, and the fifth binary classifier array are reallocated to expand the number of binary classifiers in the binary classifier array corresponding to the first netlist.

14. A method for processing data packets of a switch, characterized in that, The switch includes a processor, the processor includes on-chip memory, the on-chip memory includes multiple binary classifiers, and the method is applied to the processor, the method including: Receive and parse data packets to obtain keywords in the data packets, including the IP address of the source computing device and the IP address of the target computing device; The IP address of the target computing device is input into the third binary classifier array, and the IP address of the next hop mapping is determined by the third binary classifier array. The third binary classifier array includes a third number of binary classifiers, and the third number of binary classifiers pre-store the pre-processing results related to the IP address of the next hop mapping in the forwarding information table. The IP address of the next-hop mapping is input into the second binary classifier array, and the physical address of the target computing device is determined by the second binary classifier array. The second binary classifier array includes a second number of binary classifiers, and the second number of binary classifiers pre-store the pre-processing results related to the physical address of the target device in the address resolution protocol. The physical address of the target computing device is input into a first binary classifier array, and the port number of the target computing device is determined using the first binary classifier array. The first binary classifier array includes a first number of binary classifiers, and the first number of binary classifiers pre-store the pre-processing results related to the port number of the target computing device in the physical address table. The IP address of the source computing device is input into the fourth binary classifier array, and the IP address of the target computing device is input into the fifth binary classifier array. The execution action of the data packet is determined using the fourth binary classifier array and the fifth binary classifier array. The fourth binary classifier array includes a fourth number of binary classifiers, and the fifth binary classifier array includes a fifth number of binary classifiers. The fourth and fifth binary classifiers pre-store the pre-processing results related to the execution action in the access control list. Depending on the action performed, the data packet may be sent to the target computing device corresponding to the port number or the data packet may be discarded.

15. A processor, characterized in that, The processor includes on-chip memory, which includes a binary classifier array corresponding to the first netlist. The binary classifier array includes multiple binary classifiers, which are used to store the pre-processing results related to the output values ​​of the first netlist. The first netlist includes one of the following types: exact matching table, longest prefix matching table, and access control list. The processor is used to acquire data packets, determine the input values ​​of the plurality of binary classifiers based on the keywords in the data packets, input the input values ​​into the plurality of binary classifiers, and use the plurality of binary classifiers to output the set-encoded classification result corresponding to the input value in parallel based on the pre-processing result. The set-encoded classification result is used to indicate the output value of the first netlist.

16. A computer-readable storage medium, characterized in that, Includes computer program instructions, which, when executed by a processor, enable the processor to perform the network table lookup method for a switch as described in any one of claims 1-13.

17. A computer-readable storage medium, characterized in that, It includes computer program instructions, which, when executed by a processor, enable the processor to perform the data packet processing method of the switch as described in any one of claims 14 to 18.

18. A computer program product containing instructions, characterized in that, When the instruction is executed by the processor, the processor performs the network table lookup method of the switch as described in any one of claims 1-13.

19. A computer program product containing instructions, characterized in that, When the instruction is executed by the processor, the processor performs the data packet processing method of the switch as described in any one of claims 14 to 18.

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