Blue-green dual-band light-emitting diode epitaxial wafer and preparation method thereof, LED

Abstract

This invention relates to the field of light-emitting diode (LED) technology, specifically disclosing a blue-green dual-band LED epitaxial wafer and its fabrication method, as well as an LED. The blue-green dual-band LED epitaxial wafer includes a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed. The blue-green dual-band LED epitaxial wafer provided by this invention can simultaneously excite LED light sources in both blue and green bands, thereby reducing the cost of RGB-LED backlight sources and reducing the use of phosphors in white LED backlight sources.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and in particular to a blue-green dual-band light-emitting diode epitaxial wafer and its preparation method, and LEDs. Background Technology

[0002] Currently, there are two types of LED backlight sources used in displays: RGB-LED and white LED. RGB-LED encapsulates three monochromatic LED chips (blue, green, and red) together, while white LED is formed by combining monochromatic LED chips with phosphors, such as combining a monochromatic blue chip with green and red phosphors, or a single blue LED chip with yellow phosphor. Among these, RGB tri-color LED backlight sources offer the best display effect but are more expensive. White LEDs require phosphors, but different phosphor schemes have significant differences in color gamut, and the uniformity of the phosphor mixed with the adhesive is difficult to control, resulting in poor light uniformity, poor color tone consistency, easy deviation in color temperature, and less than ideal color rendering. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a blue-green dual-band light-emitting diode epitaxial wafer that can simultaneously excite LED light sources in both blue and green bands, thereby reducing the cost of RGB-LED backlight sources and reducing the use of phosphors in white LED backlight sources.

[0004] The technical problem to be solved by the present invention is to provide a method for preparing a blue-green dual-band light-emitting diode epitaxial wafer, which has a simple process and can stably produce a blue-green dual-band light-emitting diode epitaxial wafer with good luminous efficiency.

[0005] To solve the above-mentioned technical problems, the present invention provides a blue-green dual-band light-emitting diode epitaxial wafer, comprising a substrate, wherein a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum-well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed on the substrate. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

[0006] In some embodiments, the size of the first quantum well stress relief hole is smaller than the size of the third V-pit; The first V-shaped pits are uniformly distributed in the stress relief layer, and the distribution density of the first V-shaped pits is 1.2 × 10⁻⁶. 8 / cm 2 ~5.6×10 11 / cm 2 ; The first quantum well stress relief holes are uniformly arranged in the quantum well stress control layer, and the distribution density of the first quantum well stress relief holes is 2.6 × 10⁻⁶. 8 / cm 2 ~1.8×10 12 / cm 2 .

[0007] In some embodiments, the stress relief layer is a first Si-doped GaN layer and / or an InGaN / GaN superlattice layer; The thickness of the first Si-doped GaN layer is 10 nm to 500 nm, and the Si doping concentration is 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 ; The InGaN / GaN superlattice layer comprises alternating layers of InGaN and GaN, with the number of alternating growth cycles being 2 to 6. The InGaN layer has a thickness of 1 nm to 3 nm and an In content of 0.01 to 0.20. The GaN layer has a thickness of 1 nm to 3 nm and a Si doping concentration of 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 .

[0008] In some embodiments, the green light multi-quantum-well emitting layer comprises alternating layers of green light InGaN quantum wells and green light GaN quantum barriers, with the number of alternating growth cycles being 2 to 9. The thickness of the green InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.22 to 0.28. The thickness of the green GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

[0009] In some embodiments, the quantum well stress modulation layer includes a second Si-doped GaN layer with a thickness of 1 nm to 10 nm and a Si doping concentration of 1.8 × 10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

[0010] In some embodiments, the blue light multi-quantum-well emitting layer includes alternating layers of blue light InGaN quantum wells and blue light GaN quantum barrier layers, with the number of alternating growth cycles being 2 to 10. The thickness of the blue InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.08 to 0.19. The thickness of the blue GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

[0011] To address the above problems, the present invention also provides a method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer, comprising the following steps: S1. Prepare the substrate; S2. A buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially deposited on the substrate. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

[0012] In some embodiments, the surface of the epitaxial layer material is subjected to a first hydrogen treatment before the stress relief layer is grown; Before growing the quantum well stress control layer, the surface of the epitaxial layer material is subjected to a second hydrogen treatment, and then the quantum well stress control layer is grown. The hydrogen treatment time of the first hydrogen treatment is longer than that of the second hydrogen treatment, and the hydrogen flow rate of the first hydrogen treatment is greater than that of the second hydrogen treatment.

[0013] In some embodiments, the temperature of the first hydrogen treatment is controlled at 800°C to 1150°C, the pressure is controlled at 30 torr to 600 torr, the hydrogen treatment time is 6s to 150s, and the hydrogen flow rate is 30slm to 360slm. The temperature of the second hydrogen treatment is controlled at 800℃~1150℃, the pressure is controlled at 30 torr~600 torr, the hydrogen treatment time is 5s~130s, and the hydrogen flow rate is 20slm~300slm.

[0014] To address the above problems, the present invention also provides an LED, wherein the LED comprises the blue-green dual-band light-emitting diode epitaxial wafer.

[0015] Implementing this invention has the following beneficial effects: The blue-green dual-band light-emitting diode epitaxial wafer provided by this invention comprises, sequentially, a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer on a substrate. LED chips prepared using this invention can emit both green and blue light in a single chip, thereby reducing the cost of RGB-LED backlight sources and decreasing the amount of phosphor used in white LED backlight sources.

[0016] The present invention provides a V-pit between the stress relief layer and the P-type semiconductor layer, and a quantum well stress relief hole between the quantum well stress control layer and the P-type semiconductor layer. The above porous structure design is conducive to fully releasing the stress of the epitaxial layer material, which can effectively reduce the defects caused by large stress on the subsequent epitaxial layer material, thereby improving the quality of the multi-quantum well light-emitting layer material.

[0017] Furthermore, the structural and process design of the V-pit and quantum well stress relief holes can effectively reduce the lattice mismatch stress between the well layer and the barrier layer of the blue multi-quantum well emitting layer material, as well as the lattice mismatch stress between the well layer and the barrier layer of the green multi-quantum well emitting layer material. The reduction of lattice mismatch stress can reduce the band bending phenomenon caused by the piezoelectric polarization effect in the well layer material of the green / blue multi-quantum well emitting layer, thereby improving the coupling degree between the electron and hole wave functions in the well layer material of the green / blue multi-quantum well emitting layer, so as to improve the radiative recombination efficiency in the multi-quantum well emitting layer, and ultimately improve the luminous efficiency of the blue-green dual-band LED chip of the present invention. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of the blue-green dual-band light-emitting diode epitaxial wafer provided by the present invention; Figure 2 The flowchart illustrates the method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer provided by this invention. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.

[0020] Unless otherwise stated or in case of contradiction, the terms or phrases used herein shall have the following meanings: In this invention, "preferred" is merely a description of a more effective implementation method or embodiment, and should be understood as not constituting a limitation on the scope of protection of this invention.

[0021] In this invention, the technical features described in an open-ended manner include both closed-ended technical solutions composed of the listed features and open-ended technical solutions that include the listed features.

[0022] In this invention, numerical ranges are involved, and unless otherwise specified, they include the two endpoints of the numerical range.

[0023] In this invention, the term "doping concentration" is used, which refers to the concentration of electrons or holes generated in association with doping using N-type or P-type impurities.

[0024] To address the above problems, the present invention provides a light-emitting diode epitaxial wafer, such as... Figure 1 As shown, the present invention provides a blue-green dual-band light-emitting diode epitaxial wafer, including a substrate 100, on which a buffer layer 200, an N-type semiconductor layer 300, a stress relief layer 400, a green multi-quantum well light-emitting layer 500, a quantum well stress modulation layer 600, a blue multi-quantum well light-emitting layer 700, an electron blocking layer 800, and a P-type semiconductor layer 900 are sequentially disposed. The stress relief layer 400 has a first V-pit 410 penetrating through it; the green multi-quantum well light-emitting layer 500 has a second V-pit 510 grown on the first V-pit 410; the quantum well stress control layer 600 has a third V-pit 610 grown on the second V-pit 510; the blue multi-quantum well light-emitting layer 700 has a fourth V-pit 710 grown on the third V-pit 610; the electron blocking layer 800 has a fifth V-pit 810 grown on the fourth V-pit 710; and the fifth V-pit 810 is filled by the P-type semiconductor layer 900. The quantum well stress control layer 600 is provided with a first quantum well stress relief hole 620 that does not penetrate the quantum well stress control layer 600. The blue light multi-quantum well emitting layer 700 is provided with a second quantum well stress relief hole 720 grown on the first quantum well stress relief hole 620. The electron blocking layer 800 is provided with a third quantum well stress relief hole 820 grown on the second quantum well stress relief hole 720. The third quantum well stress relief hole 820 is filled by the P-type semiconductor layer 900.

[0025] The LED chip prepared using the epitaxial wafer provided by this invention can emit LED light sources in both green and blue wavelengths, thereby reducing the cost of RGB-LED backlight sources and reducing the use of phosphors in white LED backlight sources.

[0026] In some embodiments, the size of the first quantum well stress relief hole 620 is smaller than the size of the third V-pit 610; The first V-shaped pits 410 are uniformly distributed in the stress relief layer 400, and the distribution density of the first V-shaped pits 410 is 1.2 × 10⁻⁶. 8 / cm 2 ~5.6×10 11 / cm 2 ; The first quantum well stress relief holes 620 are uniformly arranged in the quantum well stress control layer 600, and the distribution density of the first quantum well stress relief holes 620 is 2.6 × 10⁻⁶. 8 / cm 2 ~1.8×10 12 / cm 2 .

[0027] Preferably, the distribution density of the first V-shaped pit 410 is 2 × 10⁻⁶. 8 / cm 2 ~5×10 11 / cm 2 The distribution density of the first quantum well stress relief holes 620 is 3 × 10⁻⁶. 8 / cm2 ~1×10 12 / cm 2 .

[0028] Preferably, the first quantum well stress relief hole 620 is V-shaped.

[0029] The present invention provides a V-pit between the stress relief layer 400 and the P-type semiconductor layer 900, and a quantum well stress relief hole between the quantum well stress control layer 600 and the P-type semiconductor layer 900. The above porous structure design is conducive to fully releasing the stress of the epitaxial layer material, which can effectively reduce the defects caused by the large stress on the subsequent epitaxial layer material, thereby improving the quality of the multi-quantum well light-emitting layer material.

[0030] Furthermore, the structural and process design of the V-pit and quantum well stress relief holes can effectively reduce the lattice mismatch stress between the well layer and the barrier layer of the blue multi-quantum well emitting layer 700 material, as well as the lattice mismatch stress between the well layer and the barrier layer of the green multi-quantum well emitting layer 500 material. The reduction of lattice mismatch stress can reduce the band bending phenomenon caused by the piezoelectric polarization effect in the well layer material of the green / blue multi-quantum well emitting layer, thereby improving the coupling degree between the electron and hole wave functions in the well layer material of the green / blue multi-quantum well emitting layer, so as to improve the radiative recombination efficiency in the multi-quantum well emitting layer, and ultimately improve the luminous efficiency of the blue-green dual-band LED chip of the present invention.

[0031] In some embodiments, the stress relief layer 400 is a first Si-doped GaN layer and / or an InGaN / GaN superlattice layer; it is understood that the stress relief layer 400 is a first Si-doped GaN layer, or an InGaN / GaN superlattice layer, or a first Si-doped GaN layer and an InGaN / GaN superlattice layer.

[0032] In some embodiments, the thickness of the first Si-doped GaN layer is 10 nm to 500 nm, and the Si doping concentration is 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 Preferably, the thickness of the first Si-doped GaN layer is 50 nm to 450 nm, and the Si doping concentration is 5 × 10⁻⁶. 17 atoms / cm 3 ~1×10 18 atoms / cm 3The exemplary thicknesses of the first Si-doped GaN layer are 50 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, and 450 nm, but are not limited thereto. The Si doping concentration of the first Si-doped GaN layer is 3 × 10⁻⁶. 17 atoms / cm 3 6×10 17 atoms / cm 3 9×10 17 atoms / cm 3 2×10 18 atoms / cm 3 4×10 18 atoms / cm 3 However, it is not limited to this.

[0033] In some embodiments, the growth temperature of the first Si-doped GaN layer is 800℃-960℃, the growth pressure is 30 torr-360 torr, the growth atmosphere includes N2 and H2, the N2 gas flow rate is 50 SLM-500 SLM, and the H2 flow rate ranges from 0 to 200 SLM.

[0034] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of the V-groove. Specifically, the size of the V-groove is increased by lowering the growth temperature and / or reducing the growth pressure. The size of the V-groove is also increased by controlling the growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen content in the growth atmosphere.

[0035] In some embodiments, the InGaN / GaN superlattice layer comprises alternating InGaN and GaN layers, with the number of alternating growth cycles being 2 to 6; preferably, the number of alternating growth cycles is 4 to 5.

[0036] The InGaN layer has a thickness of 1 nm to 3 nm and an In content of 0.01 to 0.20; preferably, the InGaN layer has a thickness of 1.5 nm to 2.5 nm and an In content of 0.05 to 0.15. Exemplary thicknesses of the InGaN layer are 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2.0 nm, 2.2 nm, 2.4 nm, 2.6 nm, and 2.8 nm, but are not limited thereto.

[0037] In some embodiments, the growth temperature of the InGaN layer is 760℃-960℃, the growth pressure is 30 torr-360 torr, the growth atmosphere includes N2 and H2, the N2 gas flow rate is 50 SLM-500 SLM, and the H2 flow rate ranges from 0 to 200 SLM.

[0038] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of the V-groove. Specifically, the size of the V-groove is increased by lowering the growth temperature and / or reducing the growth pressure. The size of the V-groove is also increased by controlling the growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen content in the growth atmosphere.

[0039] The GaN layer has a thickness of 1 nm to 3 nm and a Si doping concentration of 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 Preferably, the GaN layer has a thickness of 1.2 nm to 2.8 nm and a Si doping concentration of 2 × 10⁻⁶. 17 atoms / cm 3 ~3×10 18 atoms / cm 3 .

[0040] The exemplary thicknesses of the GaN layer are 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2.0 nm, 2.2 nm, 2.4 nm, 2.6 nm, and 2.8 nm, but are not limited thereto. The Si doping concentration of the GaN layer is 3 × 10⁻⁶. 17 atoms / cm 3 6×10 17 atoms / cm 3 9×10 17 atoms / cm 3 2×10 18 atoms / cm 3 4×10 18 atoms / cm 3 However, it is not limited to this.

[0041] In some embodiments, the GaN layer is grown at a temperature of 800°C-960°C, at a growth pressure of 30 torr-360 torr, and in a growth atmosphere consisting of N2 and H2, with an N2 flow rate of 50 SLM-500 SLM and an H2 flow rate of 0-200 SLM.

[0042] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of the V-groove. Specifically, the size of the V-groove is increased by lowering the growth temperature and / or reducing the growth pressure. The size of the V-groove is also increased by controlling the growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen content in the growth atmosphere.

[0043] In some embodiments, the green multi-quantum-well light-emitting layer 500 includes alternating layers of green InGaN quantum wells and green GaN quantum barriers, with the number of alternating growth cycles being 2 to 9; preferably, the number of alternating growth cycles is 3 to 7.

[0044] The thickness of the green InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.22 to 0.28%. Preferably, the thickness of the green InGaN quantum well layer is 2.2 nm to 4.5 nm, and the In content is 0.23 to 0.27%. Exemplary thicknesses of the green InGaN quantum well layer are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited thereto.

[0045] In some embodiments, the growth temperature of the green InGaN quantum well layer is 680℃-920℃, the growth pressure is 30 torr-360 torr, the growth atmosphere includes N2 and H2, the N2 gas flow rate is 50SLM-500SLM, and the H2 flow rate ranges from 0-200SLM.

[0046] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of the V-groove. Specifically, the size of the V-groove is increased by lowering the growth temperature and / or reducing the growth pressure. The size of the V-groove is also increased by controlling the growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen content in the growth atmosphere.

[0047] The thickness of the green GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 Preferably, the thickness of the green GaN quantum barrier layer is 6 nm to 14 nm, and the Si doping concentration is 2 × 10⁻⁶. 17 atoms / cm 3 ~9×10 17 atoms / cm 3 .

[0048] The exemplary thicknesses of the green GaN quantum barrier layer are 6 nm, 8 nm, 10 nm, 12 nm, and 14 nm, but are not limited thereto. The Si doping concentration of the green GaN quantum barrier layer is 2 × 10⁻⁶. 17 atoms / cm 3 4×10 17 atoms / cm 3 6×10 17 atoms / cm 3 8×1017 atoms / cm 3 However, it is not limited to this.

[0049] In some embodiments, the growth temperature of the green GaN quantum barrier layer is 800℃-950℃, the growth pressure is 30 torr-360 torr, and the growth atmosphere includes N2 and H2, with the N2 flow rate ranging from 20 SLM to 200 SLM and the H2 flow rate ranging from 20 SLM to 200 SLM.

[0050] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of the V-groove. Specifically, the size of the V-groove is increased by lowering the growth temperature and / or reducing the growth pressure. The size of the V-groove is also increased by controlling the growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen content in the growth atmosphere.

[0051] In some embodiments, the quantum well stress modulation layer 600 includes a second Si-doped GaN layer with a thickness of 1 nm to 10 nm and a Si doping concentration of 1.8 × 10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 Preferably, the quantum well stress modulation layer 600 includes a second Si-doped GaN layer with a thickness of 2 nm to 8 nm and a Si doping concentration of 2 × 10⁻⁶. 17 atoms / cm 3 ~9×10 17 atoms / cm 3 .

[0052] The exemplary thicknesses of the second Si-doped GaN layer are 2 nm, 4 nm, 6 nm, 8 nm, and 9 nm, but are not limited thereto. The Si doping concentration of the second Si-doped GaN layer is 2 × 10⁻⁶. 17 atoms / cm 3 4×10 17 atoms / cm 3 6×10 17 atoms / cm 3 8×10 17 atoms / cm 3 However, it is not limited to this.

[0053] In some embodiments, the growth temperature of the second Si-doped GaN layer is 750°C-920°C, the growth pressure is 30 torr-360 torr, the growth atmosphere includes N2 and H2, the N2 gas flow rate is 50 SLM-500 SLM, and the H2 flow rate ranges from 0 to 200 SLM.

[0054] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of V-pits and quantum well stress relief holes. Specifically, by reducing the growth temperature and / or reducing the growth pressure, the size of V-pits or quantum well stress relief holes is increased. By controlling the material growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen ratio in the growth atmosphere, the size of V-pits or quantum well stress relief holes is also increased.

[0055] In some embodiments, the blue light multi-quantum-well emitting layer 700 includes alternating layers of blue light InGaN quantum well layers and blue light GaN quantum barrier layers, with the number of alternating growth cycles being 2 to 10; preferably, the number of alternating growth cycles is 3 to 9.

[0056] The thickness of the blue InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.08 to 0.19. Preferably, the thickness of the blue InGaN quantum well layer is 2.5 nm to 4.5 nm, and the In content is 0.09 to 0.18. Exemplary thicknesses of the blue InGaN quantum well layer are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited thereto.

[0057] In some embodiments, the growth temperature of the blue InGaN quantum well layer is 725℃-920℃, the growth pressure is 30 torr-360 torr, the growth atmosphere includes N2 and H2, the N2 gas flow rate is 50SLM-500SLM, and the H2 flow rate ranges from 0-200SLM.

[0058] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of V-pits and quantum well stress relief holes. Specifically, by reducing the growth temperature and / or reducing the growth pressure, the size of V-pits or quantum well stress relief holes is increased. By controlling the material growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen ratio in the growth atmosphere, the size of V-pits or quantum well stress relief holes is also increased.

[0059] The thickness of the blue GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 Preferably, the thickness of the blue GaN quantum barrier layer is 6nm~13nm, and the Si doping concentration is 2×10⁻⁶. 17 atoms / cm 3 ~9×10 17 atoms / cm 3 .

[0060] The exemplary thicknesses of the blue GaN quantum barrier layer are 6 nm, 8 nm, 10 nm, 12 nm, and 14 nm, but are not limited thereto. The Si doping concentration of the blue GaN quantum barrier layer is 2 × 10⁻⁶. 17 atoms / cm 3 4×10 17 atoms / cm 3 6×10 17 atoms / cm 3 8×10 17 atoms / cm 3 However, it is not limited to this.

[0061] In some embodiments, the growth temperature of the blue GaN quantum barrier layer is 800℃-950℃, the growth pressure is 30 torr-360 torr, and the growth atmosphere includes N2 and H2, with the N2 flow rate ranging from 20 SLM to 200 SLM and the H2 flow rate ranging from 20 SLM to 200 SLM.

[0062] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of V-pits and quantum well stress relief holes. Specifically, by reducing the growth temperature and / or reducing the growth pressure, the size of V-pits or quantum well stress relief holes is increased. By controlling the material growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen ratio in the growth atmosphere, the size of V-pits or quantum well stress relief holes is also increased.

[0063] In some embodiments, the electron blocking layer 800 comprises an AlGaN layer, wherein the AlGaN material is not intentionally doped, the Al content is 0.05 ≤ x ≤ 1, the thickness is 0.8 nm to 50 nm, the growth temperature is 750 °C to 1050 °C, and the pressure is 30 torr to 360 torr. The growth atmosphere comprises N2 and H2, with an N2 flow rate of 50 SLM to 500 SLM and an H2 flow rate of 0 to 200 SLM.

[0064] It should be noted that this invention regulates the growth mode of semiconductor materials through the synergistic coordination of the aforementioned process parameters, thereby precisely controlling the size of V-pits and quantum well stress relief holes. Specifically, by reducing the growth temperature and / or reducing the growth pressure, the size of V-pits or quantum well stress relief holes is increased. By controlling the material growth atmosphere to be primarily N2 atmosphere and increasing the nitrogen ratio in the growth atmosphere, the size of V-pits or quantum well stress relief holes is also increased.

[0065] In some embodiments, the P-type semiconductor layer 900 is an AlInGaN layer doped with Mg, wherein the Al content of the P-type semiconductor layer 900 is 0~0.3%, the In content is 0~0.3%, the thickness is 20nm~500nm, and the Mg concentration is 2.5×10⁻⁶. 19 / cm³~3.6×10 20 / cm³, growth temperature is 950℃~1050℃, pressure is 20torr~320torr.

[0066] Preferably, the P-type semiconductor layer 900 is an AlInGaN layer doped with Mg, wherein the Al content of the P-type semiconductor layer 900 is 0.05~0.28%, the In content is 0.05~0.28%, the thickness is 30nm~490nm, and the Mg concentration is 3×10⁻⁶. 19 / cm³~3×10 20 / cm³, growth temperature is 960℃~1000℃, pressure is 30torr~300torr.

[0067] Accordingly, the present invention also provides a method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer, referring to... Figure 2 This includes the following steps: S1. Prepare substrate 100; S2. A buffer layer 200, an N-type semiconductor layer 300, a stress relief layer 400, a green multi-quantum well light-emitting layer 500, a quantum well stress modulation layer 600, a blue multi-quantum well light-emitting layer 700, an electron blocking layer 800, and a P-type semiconductor layer 900 are sequentially deposited on the substrate 100. The stress relief layer 400 has a first V-pit 410 penetrating through it; the green multi-quantum well light-emitting layer 500 has a second V-pit 510 grown on the first V-pit 410; the quantum well stress control layer 600 has a third V-pit 610 grown on the second V-pit 510; the blue multi-quantum well light-emitting layer 700 has a fourth V-pit 710 grown on the third V-pit 610; the electron blocking layer 800 has a fifth V-pit 810 grown on the fourth V-pit 710; and the fifth V-pit 810 is filled by the P-type semiconductor layer 900. The quantum well stress control layer 600 is provided with a first quantum well stress relief hole 620 that does not penetrate the quantum well stress control layer 600. The blue light multi-quantum well emitting layer 700 is provided with a second quantum well stress relief hole 720 grown on the first quantum well stress relief hole 620. The electron blocking layer 800 is provided with a third quantum well stress relief hole 820 grown on the second quantum well stress relief hole 720. The third quantum well stress relief hole 820 is filled by the P-type semiconductor layer 900.

[0068] In some embodiments, the surface of the epitaxial layer material is subjected to a first hydrogen treatment before the stress relief layer 400 is grown; Before growing the quantum well stress control layer 600, the surface of the epitaxial layer material is subjected to a second hydrogen treatment, and then the quantum well stress control layer 600 is grown. The hydrogen treatment time of the first hydrogen treatment is longer than that of the second hydrogen treatment, and the hydrogen flow rate of the first hydrogen treatment is greater than that of the second hydrogen treatment.

[0069] Before depositing the stress relief layer 400, the epitaxial layer material surface undergoes a first high-temperature hydrogen treatment. Before depositing the quantum well stress control layer 600, a second high-temperature hydrogen treatment is required. After hydrogen treatment, materials with poor crystal quality on the epitaxial layer surface are decomposed, which helps reduce the defect density and improve the crystal quality of the epitaxial layer material. Simultaneously, the formation of an uneven, rough surface facilitates the formation of V-shaped holes and quantum well stress relief holes in the subsequently deposited epitaxial layer material, further releasing the stress and improving the quality of the epitaxial layer material. Moreover, this rough surface and porous epitaxial layer structure design reduces in-plane total internal reflection of the quantum well material, significantly increasing the proportion of photon emissive material in the quantum well light-emitting layer, thereby improving the light extraction efficiency of the blue-green dual-band LED chip of this invention.

[0070] In some embodiments, the temperature of the first hydrogen treatment is controlled at 800°C to 1150°C, the pressure is controlled at 30 torr to 600 torr, the hydrogen treatment time is 6s to 150s, and the hydrogen flow rate is 30slm to 360slm. The temperature of the second hydrogen treatment is controlled at 800℃~1150℃, the pressure is controlled at 30 torr~600 torr, the hydrogen treatment time is 5s~130s, and the hydrogen flow rate is 20slm~300slm.

[0071] Preferably, the temperature of the first hydrogen treatment is controlled at 850℃~1100℃, the pressure is controlled at 40 torr~590 torr, the hydrogen treatment time is 10s~140s, and the hydrogen flow rate is 40slm~350slm. The temperature of the second hydrogen treatment is controlled at 850℃~1100℃, the pressure is controlled at 40 torr~590 torr, the hydrogen treatment time is 10s~120s, and the hydrogen flow rate is 30slm~290slm.

[0072] The present invention will be further described below with reference to specific embodiments: Example 1 This embodiment provides a blue-green dual-band light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

[0073] The size of the first quantum well stress relief hole is smaller than the size of the third V-pit, and the distribution density of the first V-pit is 1.5 × 10⁻⁶. 9 / cm 2 ; The first quantum well stress relief holes are uniformly arranged in the quantum well stress control layer, and the distribution density of the first quantum well stress relief holes is 1×10⁻⁶. 10 / cm 2 .

[0074] The stress relief layer is a first Si-doped GaN layer with a thickness of 100 nm and a Si doping concentration of 1 × 10⁻⁶. 18 atoms / cm 3 ; The InGaN / GaN superlattice layer comprises alternating layers of InGaN and GaN, with an alternating growth period of 4. The InGaN layer has a thickness of 2 nm and an In content of 0.1%. The GaN layer has a thickness of 2 nm and a Si doping concentration of 1 × 10⁻⁶. 18 atoms / cm 3 ; The green multi-quantum-well emitting layer comprises alternating layers of green InGaN quantum wells and green GaN quantum barriers, with an alternating growth period of 5. The thickness of the green InGaN quantum well layer is 3 nm, and the In content is 0.25%. The thickness of the green GaN quantum barrier layer is 10 nm, and the Si doping concentration is 5 × 10⁻⁶. 17 atoms / cm 3 .

[0075] The quantum well stress modulation layer includes a second Si-doped GaN layer with a thickness of 6 nm and a Si doping concentration of 5 × 10⁻⁶. 17 atoms / cm 3 .

[0076] The blue light-emitting multi-quantum-well layer comprises alternating layers of blue InGaN quantum wells and blue GaN quantum barrier layers, with an alternating growth period of 5. The thickness of the blue InGaN quantum well layer is 3 nm, and the In content is 0.14%. The thickness of the blue GaN quantum barrier layer is 10 nm, and the Si doping concentration is 5 × 10⁻⁶. 17 atoms / cm 3 .

[0077] Example 2 This embodiment provides a blue-green dual-band light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

[0078] The size of the first quantum well stress relief hole is smaller than the size of the third V-pit, and the distribution density of the first V-pit is 1.2 × 10⁻⁶. 8 / cm 2 ; The first quantum well stress relief holes are uniformly arranged in the quantum well stress control layer, and the distribution density of the first quantum well stress relief holes is 2.6 × 10⁻⁶. 8 / cm 2 .

[0079] The stress relief layer is a first Si-doped GaN layer with a thickness of 10 nm and a Si doping concentration of 2 × 10⁻⁶. 17 atoms / cm 3 ; The InGaN / GaN superlattice layer comprises alternating layers of InGaN and GaN, with a cycle number of 2. The InGaN layer has a thickness of 1 nm and an In content of 0.05%. The GaN layer has a thickness of 1 nm and a Si doping concentration of 2 × 10⁻⁶. 17 atoms / cm 3 ; The green multi-quantum-well emitting layer comprises alternating layers of green InGaN quantum wells and green GaN quantum barriers, with an alternating growth period of 2. The thickness of the green InGaN quantum well layer is 3 nm, and the In content is 0.22%. The thickness of the green GaN quantum barrier layer is 5 nm, and the Si doping concentration is 2 × 10⁻⁶. 17 atoms / cm 3 .

[0080] The quantum well stress modulation layer includes a second Si-doped GaN layer with a thickness of 2 nm and a Si doping concentration of 2 × 10⁻⁶. 17 atoms / cm 3 .

[0081] The blue light-emitting multi-quantum-well layer comprises alternating layers of blue InGaN quantum wells and blue GaN quantum barriers, with an alternating growth period of 2. The thickness of the blue InGaN quantum well layer is 3 nm, and the In content is 0.1%. The thickness of the blue GaN quantum barrier layer is 5 nm, and the Si doping concentration is 2 × 10⁻⁶. 17atoms / cm 3 .

[0082] Example 3 This embodiment provides a blue-green dual-band light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

[0083] The size of the first quantum well stress relief hole is smaller than the size of the third V-pit, and the distribution density of the first V-pit is 5.6 × 10⁻⁶. 11 / cm 2 ; The first quantum well stress relief holes are uniformly arranged in the quantum well stress control layer, and the distribution density of the first quantum well stress relief holes is 1.8 × 10⁻⁶. 12 / cm 2 .

[0084] The stress relief layer is a first Si-doped GaN layer with a thickness of 500 nm and a Si doping concentration of 5 × 10⁻⁶. 18 atoms / cm 3 ; The InGaN / GaN superlattice layer comprises alternating layers of InGaN and GaN, with a cycle number of 6. The InGaN layer has a thickness of 3 nm and an In content of 0.2%. The GaN layer has a thickness of 3 nm and a Si doping concentration of 5 × 10⁻⁶. 18 atoms / cm 3 ; The green multi-quantum-well emitting layer comprises alternating layers of green InGaN quantum wells and green GaN quantum barriers, with an alternating growth period of 9. The thickness of the green InGaN quantum well layer is 4 nm, and the In content is 0.28%. The thickness of the green GaN quantum barrier layer is 15 nm, and the Si doping concentration is 9 × 10⁻⁶. 17 atoms / cm 3 .

[0085] The quantum well stress modulation layer includes a second Si-doped GaN layer with a thickness of 10 nm and a Si doping concentration of 9 × 10⁻⁶. 17 atoms / cm 3 .

[0086] The blue light-emitting multi-quantum-well layer comprises alternating layers of blue InGaN quantum wells and blue GaN quantum barrier layers, with an alternating growth period of 10. The thickness of the blue InGaN quantum well layer is 4 nm, and the In content is 0.19%. The thickness of the blue GaN quantum barrier layer is 15 nm, and the Si doping concentration is 9 × 10⁻⁶. 17 atoms / cm 3 .

[0087] Comparative Example 1 This comparative example provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially disposed. It does not have the first V-hole to the fifth V-hole structure, and the rest is the same as in Example 1.

[0088] Comparative Example 2 This comparative example provides a light-emitting diode epitaxial wafer, including a substrate. The substrate is provided with a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer in sequence. It does not have the first quantum well stress relief hole to the third quantum well stress relief hole structure. The rest is the same as in Example 1.

[0089] Comparative Example 3 This comparative example provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an N-type semiconductor layer, a stress relief layer, a multiple quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer are sequentially stacked along the epitaxial direction. The multi-quantum-well light-emitting layer has a periodic structure of alternating InGaN multi-quantum-well layers and GaN quantum barrier layers, with a stacking period of 8. Within a single period, the InGaN quantum well layer has an In content of 0.17%, and the thickness of the InGaN quantum well layer is 3.4 nm; the thickness of the GaN quantum barrier layer is 13 nm.

[0090] The epitaxial wafers obtained in the examples and comparative examples were fabricated into 20μm×20μm LED chips, and subjected to 20A / cm 2 The chip's luminous efficacy improvement, WD STD (nm) and epitaxial wafer XRD test results were obtained under the working current density. The luminous efficacy improvement was calculated based on Comparative Example 3.

[0091] It should be noted that arcsec(002) data can characterize screw dislocations, while arcsec(102) data can characterize mixed dislocations of screw and edge dislocations. The smaller the value of arcsec(002) or arcsec(102), the lower the dislocation density and the better the crystal quality. WD STD mainly reflects the wavelength standard deviation. The smaller the standard deviation, the more concentrated the chip parameter distribution and the more stable the manufacturing process.

[0092] It should be noted that the color rendering index (CRI) is a metric established by the International Commission on Illumination (ICI) to evaluate the color rendering performance of light sources. It measures the ability of a light source to reproduce the colors of objects. Its core principle is to quantify color rendering performance by comparing the color difference between the tested light source and a standard color sample under a reference light source.

[0093] Evaluation criteria: Ra≥80: Good color rendering, meeting general lighting needs; Ra≥95: Excellent color rendering, close to the effect of natural light; Ra<70: Poor color rendering, which may lead to color distortion.

[0094] The fidelity index is a light source color quality evaluation index proposed by the Illuminating Engineering Society of North America in the TM-30-15 standard. It is specifically used to evaluate how well a light source reproduces the true colors of an object.

[0095] Evaluation criteria: Rf≥80: Good fidelity; Rf≥95: Excellent fidelity; Rf<70: Insufficient fidelity, obvious color distortion.

[0096] The specific test results for the above tests are shown in Table 1.

[0097] Table 1 Performance test results of LEDs prepared in Examples 1-3 and Comparative Examples 1-3

[0098] As shown in the above results, the blue-green dual-band light-emitting diode epitaxial wafer provided by this invention has, sequentially disposed on a substrate, a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum-well emitting layer, a quantum-well stress modulation layer, a blue multi-quantum-well emitting layer, an electron blocking layer, and a P-type semiconductor layer. The LED chip prepared using this invention can emit both green and blue light in a single chip, thereby reducing the cost of RGB-LED backlight sources and decreasing the amount of phosphor used in white LED backlight sources.

[0099] The present invention provides a V-pit between the stress relief layer and the P-type semiconductor layer, and a quantum well stress relief hole between the quantum well stress control layer and the P-type semiconductor layer. The above porous structure design is conducive to fully releasing the stress of the epitaxial layer material, which can effectively reduce the defects caused by large stress on the subsequent epitaxial layer material, thereby improving the quality of the multi-quantum well light-emitting layer material.

[0100] Furthermore, the structural and process design of the V-pit and quantum well stress relief holes can effectively reduce the lattice mismatch stress between the well layer and the barrier layer of the blue multi-quantum well emitting layer material, as well as the lattice mismatch stress between the well layer and the barrier layer of the green multi-quantum well emitting layer material. The reduction of lattice mismatch stress can reduce the band bending phenomenon caused by the piezoelectric polarization effect in the well layer material of the green / blue multi-quantum well emitting layer, thereby improving the coupling degree between the electron and hole wave functions in the well layer material of the green / blue multi-quantum well emitting layer, so as to improve the radiative recombination efficiency in the multi-quantum well emitting layer, and ultimately improve the luminous efficiency of the blue-green dual-band LED chip of the present invention.

[0101] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A blue-green dual-band light-emitting diode epitaxial wafer, characterized in that, The substrate includes a buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer, which are sequentially disposed on the substrate. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

2. The blue-green dual-band light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The size of the first quantum well stress relief hole is smaller than the size of the third V-pit; The first V-shaped pits are uniformly distributed in the stress relief layer, and the distribution density of the first V-shaped pits is 1.2 × 10⁻⁶. 8 / cm 2 ~5.6×10 11 / cm 2 ; The first quantum well stress relief holes are uniformly arranged in the quantum well stress control layer, and the distribution density of the first quantum well stress relief holes is 2.6 × 10⁻⁶. 8 / cm 2 ~1.8×10 12 / cm 2 .

3. The blue-green dual-band light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The stress relief layer is a first Si-doped GaN layer and / or an InGaN / GaN superlattice layer; The thickness of the first Si-doped GaN layer is 10 nm to 500 nm, and the Si doping concentration is 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 ; The InGaN / GaN superlattice layer comprises alternating layers of InGaN and GaN, with the number of alternating growth cycles being 2 to 6. The InGaN layer has a thickness of 1 nm to 3 nm and an In content of 0.01 to 0.

20. The GaN layer has a thickness of 1 nm to 3 nm and a Si doping concentration of 1.2 × 10⁻⁶. 17 atoms / cm 3 ~5.6×10 18 atoms / cm 3 .

4. The blue-green dual-band light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The green light multi-quantum-well emitting layer includes alternating layers of green InGaN quantum wells and green GaN quantum barrier layers, with an alternating growth period of 2 to 9. The thickness of the green InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.22 to 0.

28. The thickness of the green GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

5. The blue-green dual-band light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The quantum well stress modulation layer includes a second Si-doped GaN layer with a thickness of 1 nm to 10 nm and a Si doping concentration of 1.8 × 10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

6. The blue-green dual-band light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The blue light multi-quantum-well emitting layer includes alternating layers of blue light InGaN quantum wells and blue light GaN quantum barrier layers, with an alternating growth period of 2 to 10. The thickness of the blue InGaN quantum well layer is 2.1 nm to 4.6 nm, and the In content is 0.08 to 0.

19. The thickness of the blue GaN quantum barrier layer is 5nm~15nm, and the Si doping concentration is 1.8×10⁻⁶. 17 atoms / cm 3 ~9.6×10 17 atoms / cm 3 .

7. A method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer as described in any one of claims 1 to 6, characterized in that, Includes the following steps: S1. Prepare the substrate; S2. A buffer layer, an N-type semiconductor layer, a stress relief layer, a green multi-quantum well light-emitting layer, a quantum well stress modulation layer, a blue multi-quantum well light-emitting layer, an electron blocking layer, and a P-type semiconductor layer are sequentially deposited on the substrate. The stress relief layer has a first V-hole penetrating through it; the green multi-quantum well emitting layer has a second V-hole grown on the first V-hole; the quantum well stress control layer has a third V-hole grown on the second V-hole; the blue multi-quantum well emitting layer has a fourth V-hole grown on the third V-hole; the electron blocking layer has a fifth V-hole grown on the fourth V-hole; and the fifth V-hole is filled by the P-type semiconductor layer. The quantum well stress control layer is provided with a first quantum well stress relief hole that does not penetrate the quantum well stress control layer. The blue light multi-quantum well emitting layer is provided with a second quantum well stress relief hole grown on the first quantum well stress relief hole. The electron blocking layer is provided with a third quantum well stress relief hole grown on the second quantum well stress relief hole. The third quantum well stress relief hole is filled by the P-type semiconductor layer.

8. The method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer as described in claim 7, characterized in that, Before growing the stress relief layer, the surface of the epitaxial layer material is subjected to a first hydrogen treatment, and then the stress relief layer is grown. Before growing the quantum well stress control layer, the surface of the epitaxial layer material is subjected to a second hydrogen treatment, and then the quantum well stress control layer is grown. The hydrogen treatment time of the first hydrogen treatment is longer than that of the second hydrogen treatment, and the hydrogen flow rate of the first hydrogen treatment is greater than that of the second hydrogen treatment.

9. The method for fabricating a blue-green dual-band light-emitting diode epitaxial wafer as described in claim 8, characterized in that, The temperature of the first hydrogen treatment is controlled at 800℃~1150℃, the pressure is controlled at 30 torr~600 torr, the hydrogen treatment time is 6s~150s, and the hydrogen flow rate is 30slm~360slm. The temperature of the second hydrogen treatment is controlled at 800℃~1150℃, the pressure is controlled at 30 torr~600 torr, the hydrogen treatment time is 5s~130s, and the hydrogen flow rate is 20slm~300slm.

10. An LED, characterized in that, The LED includes a blue-green dual-band light-emitting diode epitaxial wafer as described in any one of claims 1 to 6.

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