Control circuit, method and display device

Abstract

This disclosure provides a control circuit, method, and display device. The control circuit includes a power supply chip and a first control component. One end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit. One end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip. The first control component is configured to increase the first duration required for the power supply voltage to drop to a first target voltage when the first target control signal is input. The first control component is also configured to decrease the second duration required for the power supply voltage to drop to the first target voltage when a second target control signal is input. The first target control signal is triggered in response to the power supply voltage stopping input. The second target control signal is triggered in response to the power supply voltage input and the power supply voltage starting to drop. The pixel driving circuit controls internal pixel elements to perform a discharge operation.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to a control circuit, method, and display device. Background Technology

[0002] In the event of an abnormal power outage, the rapid drop in power supply voltage prevents the display's pixel circuits from discharging properly. Summary of the Invention

[0003] In view of the above, this disclosure provides a control circuit, method, and display device.

[0004] The first aspect of this disclosure provides a control circuit, including a power supply chip and a first control component;

[0005] One end of the power supply chip receives the power supply voltage input, and the other end outputs the power supply voltage to the pixel driving circuit; one end of the first control component receives the target control signal input, and the other end is connected to the other end of the power supply chip.

[0006] A first control component is configured to increase the first duration required for the supply voltage to drop to the first target voltage upon input of a first target control signal.

[0007] The first control component is also configured to reduce the second duration required for the supply voltage to drop to the first target voltage when the second target control signal is input.

[0008] Specifically, in response to the power supply voltage stopping input, a first target control signal is triggered; in response to the power supply voltage input and the power supply voltage starting to drop, a second target control signal is triggered; the pixel driving circuit is used to control the internal pixel elements to perform a discharge action before the power supply voltage drops to the first target voltage.

[0009] According to embodiments of this disclosure, the control circuit further includes a second control component;

[0010] One end of the second control component is connected to the reset signal port of the pixel driving circuit, and the other end is grounded;

[0011] The second control component is used to reduce the third duration required for the reset signal to drop to the second target voltage when the target control signal is input to the first control component;

[0012] When the reset signal drops to the second target voltage, the pixel driving circuit controls the internal pixel elements to perform a discharge action.

[0013] According to embodiments of this disclosure, the first control component includes a capacitor;

[0014] One end of the capacitor is connected to the other end of the power supply chip, and the other end is grounded.

[0015] A capacitor is used to increase the first duration required for the supply voltage to drop to the first target voltage when a first target control signal is input.

[0016] The first duration is determined based on the parameters of the capacitor.

[0017] According to embodiments of this disclosure, the first control component further includes a transistor and a resistor;

[0018] The first terminal of the transistor receives the target control signal input, the second terminal is connected to one end of the resistor, and the third terminal is grounded.

[0019] The other end of the resistor is connected to the other end of the power supply chip;

[0020] The transistor is configured to be in the off state when a first target control signal is input, and in the on state when a second target control signal is input.

[0021] According to embodiments of this disclosure, a resistor is used to reduce the second duration required for the supply voltage to drop to a first target voltage when the transistor is in the on state.

[0022] The second duration is determined based on the resistor parameters.

[0023] A second aspect of this disclosure provides a control method applied to a control circuit, the control circuit including a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the method includes:

[0024] In response to the power supply voltage stopping input, a first target control signal is triggered to be input to the first control component to increase the first duration required for the power supply voltage to drop to the first target voltage;

[0025] In response to the power supply voltage input and the power supply voltage starting to drop, a second target control signal is triggered to be input to the first control component to reduce the second time required for the power supply voltage to drop to the first target voltage;

[0026] The pixel driving circuit is used to control the internal pixel elements to perform a discharge action before the supply voltage drops to the first target voltage.

[0027] According to embodiments of this disclosure, the control circuit further includes a second control component; one end of the second control component is connected to the reset signal port of the pixel driving circuit, and the other end is grounded; the method further includes:

[0028] In response to the target control signal input to the first control component, the control reset signal drops to the second target voltage;

[0029] The second control component is used to reduce the third duration required for the reset signal to drop to the second target voltage; when the reset signal drops to the second target voltage, the pixel driving circuit controls the internal pixel element to perform a discharge action.

[0030] According to embodiments of this disclosure, in response to a power supply voltage input and the power supply voltage starting to drop, a second target control signal is triggered and input to the first control component to reduce the second duration required for the power supply voltage to drop to the first target voltage, including:

[0031] Output a low-level signal to the enable pin of the power supply chip to cause the supply voltage to start decreasing;

[0032] In response to the supply voltage starting to drop, a second target control signal is input to one end of the first control component;

[0033] In this configuration, when the second target control signal is input, the energy-consuming element of the first control component is turned on to consume the power supply voltage.

[0034] According to embodiments of this disclosure, in response to a power supply voltage input failure, a first target control signal is triggered and input to a first control component to increase the first duration required for the power supply voltage to drop to a first target voltage, including:

[0035] Stop supplying power voltage to one end of the power supply chip to cause the power supply voltage to start dropping;

[0036] In response to the supply voltage starting to drop, a first target control signal is input to one end of the first control component;

[0037] In this configuration, when the first target control signal is input, the energy-consuming element in the first control component is in a turned-off state, so as to delay the decrease of the supply voltage through the energy storage element of the first control component.

[0038] A third aspect of this disclosure provides a display device, comprising:

[0039] The control circuit includes a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to the pixel driving circuit; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the first control component is used to increase the first duration required for the power supply voltage to drop to the first target voltage when the first target control signal is input; the first control component is also used to decrease the second duration required for the power supply voltage to drop to the first target voltage when the second target control signal is input.

[0040] The processor is configured to trigger a first target control signal input in response to a power supply voltage input stopping; and to trigger a second target control signal input in response to a power supply voltage input and the supply voltage starting to drop.

[0041] The pixel driving circuit is used to control the internal pixel elements to perform a discharge action before the supply voltage drops to the first target voltage.

[0042] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0043] The above and other objects, features, and advantages of this disclosure will become clearer from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0044] Figure 1 The schematic diagram illustrates one of the schematic principles of a control circuit according to an embodiment of the present disclosure;

[0045] Figure 2 The schematic diagram illustrates a second schematic diagram of a control circuit according to an embodiment of the present disclosure;

[0046] Figure 3 The schematic diagram shows a third schematic diagram of a control circuit according to an embodiment of the present disclosure;

[0047] Figure 4 The schematic diagram shows a fourth schematic diagram of a control circuit according to an embodiment of the present disclosure;

[0048] Figure 5 The schematic diagram illustrates a flow chart of a control method according to an embodiment of the present disclosure;

[0049] Figure 6 One schematic diagram illustrating the principle of a control method according to an embodiment of the present disclosure is shown for illustrative purposes.

[0050] Figure 7A The diagram illustrates a second schematic representation of a control method according to an embodiment of the present disclosure.

[0051] Figure 7B The diagram illustrates the principle of a control method according to an embodiment of the present disclosure (Figure 3).

[0052] Figure 8 The schematic diagram illustrates a display device according to an embodiment of the present disclosure;

[0053] Figure 9A block diagram of an electronic device according to an embodiment of the present disclosure is shown schematically. Detailed Implementation

[0054] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0055] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0056] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0057] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0058] A first aspect of this disclosure provides a control circuit including a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the first control component is configured to increase the first duration required for the power supply voltage to drop to a first target voltage when the first target control signal is input; the first control component is further configured to decrease the second duration required for the power supply voltage to drop to the first target voltage when a second target control signal is input; wherein, the first target control signal input is triggered in response to the power supply voltage stopping input; the second target control signal input is triggered in response to the power supply voltage input and the power supply voltage starting to drop; the pixel driving circuit is configured to control internal pixel elements to perform a discharge operation before the power supply voltage drops to the first target voltage.

[0059] In embodiments of this disclosure, the control circuit is a functional circuit in an electronic device used to control the device's display screen, wherein the various input signals in the control circuit can be input by a processor in the electronic device.

[0060] In the embodiments of this disclosure, the pixel driving circuit is the circuit that operates the internal pixel elements of the display screen. When the display screen is powered off (including normal power off or abnormal power off), before the power supply voltage of the display screen drops to a certain value, the pixel driving circuit can control the internal pixel elements to perform a discharge action according to the circuit design.

[0061] In the embodiments of this disclosure, normal power failure refers to the control circuit executing normal power-down control logic through automatic control or user instructions; abnormal power failure refers to the situation where the power supply of the electronic device suddenly loses its power supply capability, resulting in a power outage at each power supply port of the electronic device.

[0062] In the embodiments of this disclosure, the power supply voltage provides the initial electrical energy source for the entire control circuit and pixel driving circuit. The power supply voltage is the voltage output from the power supply chip to the pixel driving circuit, providing electrical energy for the operation of the pixel driving circuit and its internal pixel elements.

[0063] By employing the aforementioned control circuit, when an abnormal power outage occurs at the power supply end of the display screen, causing the power supply voltage to stop input, the first control component can increase the first time required for the power supply voltage to drop to the first target voltage. This provides the pixel driving circuit with more ample time, enabling it to control the internal pixel elements to perform the discharge action before the power supply voltage drops to the first target voltage. Compared to the case without a control component, the pixel circuit can complete the discharge process more completely, avoiding insufficient discharge or abnormal situations caused by an excessively rapid drop in power supply voltage, thus improving the stability and reliability of the display screen under abnormal power outage conditions.

[0064] Figure 1 The schematic diagram illustrates one of the schematic principles of a control circuit according to an embodiment of the present disclosure.

[0065] like Figure 1As shown, the control circuit includes a power supply chip 100 and a first control component 200. One end of the power supply chip 100 receives a power supply voltage VIN input, and the other end outputs a power supply voltage to the pixel driving circuit 300. One end of the first control component 200 receives a target control signal input, and the other end is connected to the other end of the power supply chip 100. The first control component 200 is used to increase the first duration required for the power supply voltage to drop to the first target voltage when the first target control signal is input. The first control component 200 is also used to decrease the second duration required for the power supply voltage VDDIO to drop to the first target voltage when the second target control signal is input. The first target control signal is triggered in response to the power supply voltage VIN stopping input. The second target control signal is triggered in response to the power supply voltage VIN input and the power supply voltage VDDIO starting to drop. The pixel driving circuit 300 is used to control the internal pixel element to perform a discharge operation before the power supply voltage VDDIO drops to the first target voltage.

[0066] In embodiments of this disclosure, the first control component 200 may delay the descent process of VDDIO when a first target control signal is input, or accelerate the descent process of VDDIO when a second target control signal is input.

[0067] In the embodiments of this disclosure, the first target voltage is the minimum voltage at which the pixel driving circuit 300 maintains the discharge operation. When VDDIO drops to the first target voltage, the pixel driving circuit 300 stops performing the discharge operation.

[0068] Specifically, when the power supply voltage of the power supply chip 100 experiences an abnormal power-down, the output voltage port of the power supply chip 100 will drop rapidly due to the loss of power supply. To prevent VDDIO from dropping too quickly and causing the pixel driving circuit 300 to fail to perform the discharge operation, the first control component 200 needs to be adjusted to a mode that delays the drop of VDDIO. Since the first target control signal is a low-level signal during an abnormal power-down, the function module in the first control component 200 that accelerates the drop of VDDIO is in a closed state, while the function module in the first control component 200 that delays the drop of VDDIO is in a closed state. Consequently, when the VDDIO voltage drops to the first target voltage, the pixel driving circuit 300 has already completed the discharge process of the content pixel unit.

[0069] Furthermore, when the power supply chip 100 is powered on normally, its output voltage port is powered normally. During normal power-down, the enable pin of the power supply chip 100 is set to a low-level signal, causing VDDIO to lose its power input. Without external circuit interference, VDDIO will decrease slowly, resulting in a longer normal screen shutdown time. To achieve rapid screen shutdown, the VDDIO decrease rate needs to be accelerated. Therefore, the first control component 200 needs to be adjusted to have a function mode that accelerates VDDIO decrease. Since the second target control signal is high-level during normal power-down, the function module in the first control component 2001 that accelerates the VDDIO decrease process is enabled; this causes the VDDIO voltage to decrease to the first target voltage faster, ensuring rapid screen shutdown.

[0070] In some scenarios, the functional module of the first control component 200 that delays the descent process of VDDIO can be kept on or configured to be off during normal power-down.

[0071] In some scenarios, by configuring the parameters of relevant functional elements in the first control component, the duration for which the supply voltage VDDIO of the pixel driving circuit drops to the first target voltage is maintained between a first duration and a second duration. The first duration is the minimum duration required for the pixel driving circuit to complete its discharge operation, and the second duration is the screen-off duration for normal power-off of the display screen, as specified by the display screen performance requirements.

[0072] Figure 2 The schematic diagram illustrates a second schematic diagram of a control circuit according to an embodiment of the present disclosure.

[0073] like Figure 2 As shown, according to an embodiment of this disclosure, the control circuit further includes a second control component 400; one end of the second control component 400 is connected to the reset signal port RESET of the pixel driving circuit 300, and the other end is grounded; the second control component 400 is used to reduce the third duration required for the reset signal to drop to the second target voltage when the target control signal is input to the first control component 200; wherein, when the reset signal drops to the second target voltage, the pixel driving circuit 300 controls the internal pixel element to perform a discharge operation.

[0074] In embodiments of this disclosure, the second control component 400 is used to control the falling process of the reset signal. When the reset signal falls to the second target voltage, the pixel driving circuit 300 begins to perform a discharge operation.

[0075] Specifically, during abnormal power-down, the reset signal drops rapidly, allowing the pixel driving circuit 300 to quickly begin the discharge action. Simultaneously, the first control component 200 delays the decrease of VDDIO, giving the pixel driving circuit 300 sufficient time to perform the discharge action. During normal power-down, the reset signal is pulled down to the target signal value and drops rapidly through the second control component 400. At the same time, the first control component 200 reduces the rate of VDDIO decrease, enabling the pixel driving circuit to quickly complete the discharge action.

[0076] By employing the aforementioned control circuit, when the target control signal is input to the first control component, the second control component shortens the third time interval during which the reset signal drops to the second target voltage, thereby triggering the pixel element discharge action. This provides an additional duration control method for the pixel element discharge in the pixel driving circuit, further improving the reliability and stability of the pixel circuit's discharge during abnormal power outages.

[0077] Figure 3 The schematic diagram shows a third schematic diagram of a control circuit according to an embodiment of the present disclosure.

[0078] like Figure 3 As shown, according to an embodiment of this disclosure, the first control component 200 further includes a capacitor C1, one end of which is connected to the other end of the power supply chip 100, and the other end is grounded; the capacitor C1 is used to increase the first duration required for the power supply voltage VDDIO to drop to the first target voltage when the first target control signal is input; wherein the first duration is determined based on the parameters of the capacitor C1.

[0079] In the embodiments of this disclosure, capacitor C1 is a component of the first control component, with one end connected to the output terminal of the power supply chip 100 and the other end grounded. When the first target control signal is input, the charging and discharging characteristics of capacitor C1 can be used to increase the first time required for the supply voltage to drop to the first target voltage.

[0080] Specifically, when the first target control signal is input, the functional module in the first control component used to accelerate the descent process of VDDIO is in the off state. At this time, due to the electrical energy stored inside the capacitor C1, the descent speed of VDDIO is slowed down as the capacitor C1 releases the stored electrical energy during the descent process.

[0081] By employing the aforementioned control circuit and utilizing the charging and discharging characteristics of the capacitor, when the first target control signal is input, the first time required for the supply voltage to drop to the first target voltage is increased, thus avoiding the problem that the pixel driving circuit cannot complete the discharge action due to the supply voltage dropping too quickly.

[0082] Figure 4The schematic diagram shows the fourth schematic diagram of a control circuit according to an embodiment of the present disclosure.

[0083] like Figure 4 As shown, according to an embodiment of this disclosure, the first control component 200 further includes a transistor and a resistor; a first terminal of the transistor receives a target control signal input, a second terminal is connected to one end of the resistor R1, and a third terminal is grounded; the other end of the resistor R1 is connected to the other end of the power supply chip; the transistor Q1 is configured to be in a turned-off state when the first target control signal is input, and in a turned-on state when the second target control signal is input.

[0084] In embodiments of this disclosure, transistor Q1 controls its own on or off state according to different states of the input target control signal.

[0085] In the embodiments of this disclosure, resistor R1 works in conjunction with transistor Q1. One end of resistor R1 is connected to the second terminal of transistor Q1, and the other end is connected to the output terminal of the power supply chip. When transistor Q1 is turned on, resistor R1 affects the power supply voltage drop process by consuming power, thereby reducing the second time required for the power supply voltage to drop to the first target voltage.

[0086] Specifically, when the first target control signal is input, transistor Q1 is turned off, and capacitor C1 alone increases the duration of VDDIO's decline; when the second target control signal is input, transistor Q1 is turned on, and resistor R1 participates in the decline process of VDDIO, thus increasing the duration of the supply voltage decline.

[0087] By employing the aforementioned control circuit, the transistor can flexibly switch between on and off states based on different target control signals, while the resistor works in conjunction with the transistor when it is on. When the first target control signal is input, the transistor is off, and the capacitor acts alone to prolong the supply voltage drop time; conversely, when the second target control signal is input, the transistor is on, and the resistor is connected to the circuit, accelerating the supply voltage drop. This allows the first control component to precisely adjust the rate of supply voltage drop according to different operating states, meeting the needs of the pixel circuit for supply voltage changes under various complex conditions.

[0088] According to embodiments of this disclosure, a resistor is used to reduce the supply voltage VDDIO to a first target voltage for a second duration when the transistor is in the on state; wherein the second duration is determined based on parameters of the resistor.

[0089] For example, when the power supply voltage stops input, the first target control signal is triggered. At this time, transistor Q1 is turned off, and capacitor C1 begins to discharge through the pixel drive circuit 300 and other loads. Since resistor R1 is not directly involved in the discharge circuit, the power supply voltage drops relatively slowly, increasing the first time required for the power supply voltage to drop to the first target voltage, providing a longer time for the pixel drive circuit 300 to control the pixel element discharge. When the power supply voltage is input normally and a drop in the power supply voltage is detected, the second target control signal is triggered. At this time, transistor Q1 is turned on, and resistor R1 is connected to the discharge circuit of the power supply voltage. Resistor R1 and capacitor C1 form a new discharge circuit. Due to the presence of resistor R1, the discharge current increases, causing the power supply voltage to drop faster, thereby reducing the second time required for the power supply voltage to drop to the first target voltage. By adjusting the resistance value of resistor R1, the magnitude of the discharge current can be changed, thereby precisely controlling the second time. For example, if the resistance value of resistor R1 is increased, the discharge current decreases, and the second time will increase accordingly; conversely, if the resistance value is decreased, the second time will be shortened.

[0090] like Figure 5 The schematic diagram illustrates a flow chart of a control method according to an embodiment of the present disclosure.

[0091] A second aspect of this disclosure provides a control method applied to a control circuit, the control circuit including a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; as shown... Figure 5 As shown, the control method 500 includes operations S510 to S520.

[0092] Operation S510, in response to the power supply voltage stopping input, triggers a first target control signal input to the first control component to increase the first duration required for the power supply voltage to drop to the first target voltage;

[0093] Operation S520, in response to the power supply voltage input and the power supply voltage starting to drop, triggers a second target control signal input to the first control component to reduce the second time required for the power supply voltage to drop to the first target voltage; wherein, the pixel driving circuit is used to control the internal pixel element to perform a discharge action before the power supply voltage drops to the target voltage.

[0094] In embodiments of this disclosure, the processor controls the control circuit by adjusting the power supply voltage enable terminal and the input of the target control signal.

[0095] Figure 6 One of the schematic diagrams illustrating the principle of a control method according to an embodiment of the present disclosure is shown for illustrative purposes.

[0096] Specifically, when the power supply voltage stops being input, the circuit is in an abnormal power-down state, and the processor 500 inputs a first target control signal to the first control component 200; when the power supply voltage is input and the supply voltage begins to drop, the processor 500 controls the pixel driving circuit 300 in the display screen to perform a normal discharge operation.

[0097] According to an embodiment of this disclosure, the control circuit further includes a second control component; one end of the second control component is connected to the reset signal port of the pixel driving circuit, and the other end is grounded; the method further includes operation S530.

[0098] Operation S530, in response to the target control signal input to the first control component, controls the reset signal to drop to the second target voltage;

[0099] The second control component is used to reduce the third duration required for the reset signal to drop to the second target voltage; when the reset signal drops to the second target voltage, the pixel driving circuit controls the internal pixel element to perform a discharge action.

[0100] Specifically, such as Figure 6 As shown, when the target control signal is input to the first control component 200, the voltage value of the reset signal begins to decrease. When it drops to the second target voltage, the pixel driving circuit 300 starts to perform a discharge operation. Specifically, when the target control signal is the first target control signal, the voltage value of the reset signal decreases due to the loss of power supply; while when the target control signal is the second target control signal, the processor 400 actively controls the reset signal to begin decreasing.

[0101] According to an embodiment of this disclosure, in operation S520, in response to the input of a power supply voltage and the start of a decrease in the power supply voltage, a second target control signal is triggered to be input to the first control component to reduce the second duration required for the power supply voltage to decrease to the first target voltage. This includes: outputting a low-level signal to the enable terminal of the power supply chip to cause the power supply voltage to start decreasing; and in response to the start of a decrease in the power supply voltage, inputting the second target control signal to one end of the first control component. The first control component's energy-consuming element is in an on state when the second target control signal is input, so as to consume the power supply voltage through the energy-consuming element.

[0102] Specifically, such as Figure 6 As shown, during the normal power-down process, the processor 400 controls the power supply chip 100 to stop inputting the power supply voltage VDDIO by adjusting the power supply voltage enable signal to a low level signal, so that the power supply voltage begins to drop.

[0103] According to an embodiment of this disclosure, in operation S510, in response to the power supply voltage stopping input, a first target control signal is triggered to be input to the first control component to increase the first duration required for the power supply voltage to drop to the first target voltage. This includes: stopping the input of power supply voltage to one end of the power supply chip to allow the power supply voltage to begin to drop; and in response to the power supply voltage starting to drop, inputting the first target control signal to one end of the first control component. The first control component's energy-consuming element is in a turned-off state when the first target control signal is input, so as to delay the drop in power supply voltage through the energy storage element of the first control component.

[0104] Specifically, such as Figure 6 As shown, during the abnormal power-down process, since the processor 400 is unable to send an enable signal normally, the power supply voltage enable signal is empty. However, due to the loss of power supply voltage, the supply voltage VDDIO will drop rapidly without the action of the first control component 200.

[0105] The signal control timing in the control method of the embodiments of this disclosure will be described in detail below.

[0106] like Figure 7A The diagram illustrates a second schematic representation of a control method according to an embodiment of the present disclosure.

[0107] Among them, under normal power-off conditions, such as Figure 7A As shown, RESET represents the change of the reset signal over time, EN represents the change of the power enable signal over time, and VDDIO represents the change of the supply voltage signal over time. At time t1, when RESET drops to the second target voltage, the pixel driving circuit 300 begins to discharge. Simultaneously, the EN signal, needing to be powered down, also begins to drop to a low level after RESET drops, causing the supply voltage VDDIO to stop acquiring a voltage source, thus causing VDDIO to begin to drop. Finally, since the processor 400 controls the target control signal to be high at this time (i.e., the first target control signal), the function module of the first control component that accelerates the drop of VDDIO is activated, accelerating the power-down of VDDIO. At time t2, when VDDIO drops to the first target voltage, the pixel driving circuit 300 stops discharging.

[0108] like Figure 7B The diagram illustrates the principle of a control method according to an embodiment of the present disclosure.

[0109] Among them, under normal power-off conditions, such as Figure 7BAs shown, RESET represents the change of the reset signal over time, EN represents the change of the power enable signal over time, and VDDIO represents the change of the supply voltage signal over time. At time t1, when RESET drops to the second target voltage, the pixel driving circuit 300 begins to perform a discharge operation. Simultaneously, the EN signal becomes null due to the loss of power and becomes a low-level signal. Finally, since the control target signal (the second target control signal) is low at this time, the function module of the second control component that delays the drop of VDDIO is activated to prevent VDDIO from losing power. At time t3, when VDDIO drops to the first target voltage, the pixel driving circuit 300 stops performing the discharge operation.

[0110] It should be noted that the control method in the embodiments of this disclosure corresponds to the control circuit part in the embodiments of this disclosure, and their specific implementation details are the same. For embodiments not mentioned, please refer to the embodiments on the control circuit side, which will not be repeated here.

[0111] like Figure 8 The schematic diagram illustrates a display device according to an embodiment of the present disclosure.

[0112] like Figure 8 As shown, a third aspect of this disclosure provides a display device, comprising: a control circuit including a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the first control component is configured to, in the case of the first target control signal input, increase a first duration required for the power supply voltage to drop to a first target voltage; the first control component is further configured to, in the case of the second target control signal input, decrease a second duration required for the power supply voltage to drop to the first target voltage; a processor is configured to, in response to the power supply voltage stopping input, trigger the first target control signal input; and in response to the power supply voltage input and the power supply voltage starting to drop, trigger the second target control signal input; and a pixel driving circuit is configured to, before the power supply voltage drops to the target voltage, control internal pixel elements to perform a discharge operation.

[0113] The following is a detailed description of the discharge operation of the pixel driving circuit in the embodiments of this disclosure.

[0114] like Figure 8As shown, in an embodiment of this disclosure, the pixel driving circuit of the display screen includes: a display driving chip and a pixel circuit; one end of the display driving chip is connected to a control circuit, and the other end is connected to the pixel circuit; wherein, the control circuit includes a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to one end of the display driving chip; one end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the first control component is used to control the power supply voltage to drop to a first target voltage for a first duration based on the target control signal when the power supply voltage stops input; wherein, the display driving chip is used to control the pixel circuit to perform a discharge operation before the power supply voltage drops to the first target voltage.

[0115] In the embodiments of this disclosure, the display driver chip is a functional chip in the display screen used to drive the light-emitting state of the pixel circuit.

[0116] In the embodiments of this disclosure, the display driver chip controls the gate input signal and source input signal input to each pixel in the pixel circuit through the gate control signal and source control signal, thereby controlling the execution of the discharge action.

[0117] In some scenarios, the display driver chip includes a first control unit, a second control unit, and a voltage control unit; the voltage control unit is used to receive the power supply voltage input to the control circuit; the first control unit is used to output a first control signal to the pixel circuit; and the second control unit is used to output a second control signal to the pixel circuit.

[0118] The first control signal acts on the gate of the transistor in the pixel circuit, and the second control signal acts on the source of the transistor in the pixel circuit. The first and second control signals are generated based on the power supply voltage.

[0119] In embodiments of this disclosure, the first control signal is a signal output to the gate of all transistors in the pixel circuit; the second control signal is a signal output to the source of all transistors in the pixel circuit.

[0120] In some scenarios, the display driver chip is also used to adjust the first control signal to the first potential and the second control signal to the second potential in response to the reset signal dropping to the second target voltage, so as to control the gate of the transistor in the pixel circuit to turn on and release the charge in the transistor of the pixel circuit; when the supply voltage drops to the first target voltage, the display driver chip stops controlling the pixel circuit to perform the discharge action.

[0121] The first potential is a high potential signal VGH, and the second potential is a low potential signal GND. This means that the gate of the transistor in the control pixel circuit is turned on, making the transistor conduct. The source potential is the same as the ground point, so that the residual charge inside the transistor can be released through the ground point.

[0122] In some scenarios, the light-emitting device in the pixel driving circuit is an LCD device; in this case, the channel material of the transistor in the pixel circuit is indium gallium zinc oxide.

[0123] Specifically, IGZO (Indium Gallium Zinc Oxide) LCD screens use IGZO as the channel material for thin-film transistors. Due to the low carrier concentration of IGZO, residual charge may remain in the transistor even when it is off. Long-term accumulation of this charge can lead to polarization of the liquid crystal molecules, causing image retention. This is especially problematic when the device experiences a sudden power outage; the pixel drive circuit may fail to execute the normal discharge sequence, and the voltage difference between the pixel electrode and the common electrode cannot be effectively cleared, further exacerbating the charge residue and resulting in image retention. By employing the aforementioned control circuit and method, the image retention problem in IGZO LCD screens can be effectively solved.

[0124] Figure 9 A block diagram of an electronic device suitable for implementing the methods described above, according to embodiments of the present disclosure, is illustrated schematically. Figure 9 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments disclosed herein.

[0125] like Figure 9 As shown, an electronic device 900 according to an embodiment of the present disclosure includes a processor 901, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 902 or a program loaded from a storage portion 908 into a random access memory (RAM) 903. The processor 901 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 901 may also include onboard memory configured for caching purposes. The processor 901 may include a single processing unit or multiple processing units configured to perform different actions of the method flow according to an embodiment of the present disclosure.

[0126] RAM 903 stores various programs and data required for the operation of electronic device 900. Processor 901, ROM 902, and RAM 903 are interconnected via bus 904. Processor 901 performs various operations of the method flow according to embodiments of the present disclosure by executing programs in ROM 902 and / or RAM 903. It should be noted that the programs may also be stored in one or more memories other than ROM 902 and RAM 903. Processor 901 may also perform various operations of the method flow according to embodiments of the present disclosure by executing programs stored in said one or more memories.

[0127] According to embodiments of this disclosure, the electronic device 900 may further include an input / output (I / O) interface 905, which is also connected to a bus 904. The electronic device 900 may also include one or more of the following components connected to the input / output (I / O) interface 905: an input section 906 including a keyboard, mouse, etc.; an output section 907 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN card, modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 9010 is also connected to the input / output (I / O) interface 905 as needed. A removable medium 9011, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 9010 as needed so that computer programs read from it can be installed into the storage section 908 as needed.

[0128] According to embodiments of this disclosure, the method flow according to embodiments of this disclosure can be implemented as a computer software program. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable storage medium, the computer program containing program code configured to perform the methods shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network via communication section 909, and / or installed from removable medium 9011. When the computer program is executed by processor 901, it performs the functions defined in the system of embodiments of this disclosure. According to embodiments of this disclosure, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0129] This disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs that, when executed, implement the method according to the embodiments of this disclosure.

[0130] According to embodiments of this disclosure, the computer-readable storage medium can be a non-volatile computer-readable storage medium. Examples include, but are not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this disclosure, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0131] For example, according to embodiments of this disclosure, a computer-readable storage medium may include the ROM 902 and / or RAM 903 described above and / or one or more memories other than ROM 902 and RAM 903.

[0132] Embodiments of this disclosure also include a computer program product comprising a computer program containing program code configured to perform the methods provided in embodiments of this disclosure. When the computer program product is run on an electronic device, the program code is configured to cause the electronic device to implement the control methods provided in embodiments of this disclosure.

[0133] When the computer program is executed by the processor 901, it performs the functions defined in the system / apparatus of this disclosure embodiments. According to embodiments of this disclosure, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0134] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and downloaded and installed via the communication section 909, and / or installed from a removable medium 9011. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0135] According to embodiments of this disclosure, program code configured to execute the computer programs provided in embodiments of this disclosure can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can execute entirely on a user's computing device, partially on a user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0136] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions configured to perform a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions. Those skilled in the art will understand that the features described in the various embodiments of the present disclosure can be combined and / or combined in various ways, even if such combinations are not explicitly described in the present disclosure. In particular, the features described in the various embodiments of this disclosure may be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0137] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. A control circuit, comprising a power supply chip and a first control component; One end of the power supply chip receives the power supply voltage input, and the other end outputs the power supply voltage to the pixel driving circuit; One end of the first control component receives the target control signal input, and the other end is connected to the other end of the power supply chip; The first control component is configured to, upon input of a first target control signal, increase the first duration required for the supply voltage to drop to the first target voltage; The first control component is further configured to, in the event of a second target control signal input, reduce the second duration required for the supply voltage to drop to the first target voltage; Specifically, in response to the power supply voltage stopping input, the first target control signal is triggered; in response to the power supply voltage input and the supply voltage starting to drop, the second target control signal is triggered. The pixel driving circuit is used to control the internal pixel element to perform a discharge action before the supply voltage drops to the first target voltage.

2. The control circuit according to claim 1 further includes a second control component; One end of the second control component is connected to the reset signal port of the pixel driving circuit, and the other end is grounded; The second control component is configured to reduce the third duration required for the reset signal to drop to the second target voltage when the target control signal is input to the first control component; in, When the reset signal drops to the second target voltage, the pixel driving circuit controls the internal pixel element to perform a discharge action.

3. The control circuit according to claim 1, wherein the first control component includes a capacitor; One end of the capacitor is connected to the other end of the power supply chip, and the other end is grounded. The capacitor is used to increase the first duration required for the supply voltage to drop to the first target voltage when the first target control signal is input. in, The first duration is determined based on the parameters of the capacitor.

4. The control circuit according to claim 1 or 3, wherein the first control component further comprises a transistor and a resistor; The first terminal of the transistor receives the target control signal input, the second terminal is connected to one end of the resistor, and the third terminal is grounded. The other end of the resistor is connected to the other end of the power supply chip; The transistor is configured to be in a turned-off state when a first target control signal is input; It is in the on state when the second target control signal is input.

5. The control circuit according to claim 4, wherein the resistor is used to reduce the second duration required for the supply voltage to drop to the first target voltage when the transistor is in the on state; in, The second duration is determined based on the parameters of the resistor.

6. A control method applied to a control circuit, the control circuit including a power supply chip and a first control component; one end of the power supply chip receives a power supply voltage input, and the other end outputs a power supply voltage to a pixel driving circuit; One end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the method includes: In response to the power supply voltage stopping input, a first target control signal is triggered and input to the first control component to increase the first duration required for the power supply voltage to drop to the first target voltage; In response to the power supply voltage input and the power supply voltage starting to drop, a second target control signal is triggered and input to the first control component to reduce the second time required for the power supply voltage to drop to the first target voltage; The pixel driving circuit is used to control the internal pixel element to perform a discharge action before the supply voltage drops to the first target voltage.

7. The method according to claim 6, wherein the control circuit further comprises a second control component; one end of the second control component is connected to the reset signal port of the pixel driving circuit, and the other end is grounded; the method further comprises: In response to a target control signal input to the first control component, the reset signal is controlled to decrease to the second target voltage; The second control component is used to reduce the third duration required for the reset signal to drop to the second target voltage; when the reset signal drops to the second target voltage, the pixel driving circuit controls the internal pixel element to perform a discharge action.

8. The method of claim 6, wherein in response to the power supply voltage input and the power supply voltage starting to decrease, a second target control signal is triggered to be input to the first control component to reduce the second duration required for the power supply voltage to decrease to the first target voltage, comprising: A low-level signal is output to the enable terminal of the power supply chip to cause the power supply voltage to start decreasing; In response to the supply voltage starting to drop, a second target control signal is input to one end of the first control component; In this configuration, when the second target control signal is input, the energy-consuming element of the first control component is turned on to consume the power supply voltage through the energy-consuming element.

9. The method of claim 6, wherein in response to the power supply voltage stopping input, a first target control signal is triggered to be input to the first control component to increase the first duration required for the power supply voltage to drop to the first target voltage, comprising: Stop supplying power voltage to one end of the power supply chip, so that the power supply voltage begins to drop; In response to the supply voltage starting to drop, a first target control signal is input to one end of the first control component; In this configuration, when the first target control signal is input, the energy-consuming element in the first control component is in a turned-off state, so as to delay the decrease of the supply voltage through the energy storage element of the first control component.

10. A display device, comprising: The control circuit includes a power supply chip and a first control component; One end of the power supply chip receives the power supply voltage input, and the other end outputs the power supply voltage to the pixel driving circuit; One end of the first control component receives a target control signal input, and the other end is connected to the other end of the power supply chip; the first control component is configured to increase the first duration required for the power supply voltage to drop to the first target voltage when the first target control signal is input; the first control component is also configured to decrease the second duration required for the power supply voltage to drop to the first target voltage when the second target control signal is input. The processor is configured to trigger the first target control signal input in response to the power supply voltage stopping input; In response to the power supply voltage input and the power supply voltage starting to drop, the second target control signal input is triggered. The pixel driving circuit is used to control the internal pixel element to perform a discharge action before the supply voltage drops to the first target voltage.

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